1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define ENA_NAPI_BUDGET 64 35 36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 38 39 static struct ena_aenq_handlers aenq_handlers; 40 41 static struct workqueue_struct *ena_wq; 42 43 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 44 45 static int ena_rss_init_default(struct ena_adapter *adapter); 46 static void check_for_admin_com_state(struct ena_adapter *adapter); 47 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 48 static int ena_restore_device(struct ena_adapter *adapter); 49 50 static void ena_init_io_rings(struct ena_adapter *adapter, 51 int first_index, int count); 52 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 53 int count); 54 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 55 int count); 56 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 57 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 58 int first_index, 59 int count); 60 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 61 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 62 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 63 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 64 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 65 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 66 int first_index, int count); 67 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 68 int first_index, int count); 69 static int ena_up(struct ena_adapter *adapter); 70 static void ena_down(struct ena_adapter *adapter); 71 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 72 struct ena_ring *rx_ring); 73 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 74 struct ena_ring *rx_ring); 75 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 76 struct ena_tx_buffer *tx_info); 77 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 78 int first_index, int count); 79 80 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 81 static void ena_increase_stat(u64 *statp, u64 cnt, 82 struct u64_stats_sync *syncp) 83 { 84 u64_stats_update_begin(syncp); 85 (*statp) += cnt; 86 u64_stats_update_end(syncp); 87 } 88 89 static void ena_ring_tx_doorbell(struct ena_ring *tx_ring) 90 { 91 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 92 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp); 93 } 94 95 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 96 { 97 struct ena_adapter *adapter = netdev_priv(dev); 98 99 /* Change the state of the device to trigger reset 100 * Check that we are not in the middle or a trigger already 101 */ 102 103 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 104 return; 105 106 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 107 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 108 109 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 110 } 111 112 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 113 { 114 int i; 115 116 for (i = 0; i < adapter->num_io_queues; i++) 117 adapter->rx_ring[i].mtu = mtu; 118 } 119 120 static int ena_change_mtu(struct net_device *dev, int new_mtu) 121 { 122 struct ena_adapter *adapter = netdev_priv(dev); 123 int ret; 124 125 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 126 if (!ret) { 127 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 128 update_rx_ring_mtu(adapter, new_mtu); 129 dev->mtu = new_mtu; 130 } else { 131 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 132 new_mtu); 133 } 134 135 return ret; 136 } 137 138 static int ena_xmit_common(struct net_device *dev, 139 struct ena_ring *ring, 140 struct ena_tx_buffer *tx_info, 141 struct ena_com_tx_ctx *ena_tx_ctx, 142 u16 next_to_use, 143 u32 bytes) 144 { 145 struct ena_adapter *adapter = netdev_priv(dev); 146 int rc, nb_hw_desc; 147 148 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 149 ena_tx_ctx))) { 150 netif_dbg(adapter, tx_queued, dev, 151 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 152 ring->qid); 153 ena_ring_tx_doorbell(ring); 154 } 155 156 /* prepare the packet's descriptors to dma engine */ 157 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 158 &nb_hw_desc); 159 160 /* In case there isn't enough space in the queue for the packet, 161 * we simply drop it. All other failure reasons of 162 * ena_com_prepare_tx() are fatal and therefore require a device reset. 163 */ 164 if (unlikely(rc)) { 165 netif_err(adapter, tx_queued, dev, 166 "Failed to prepare tx bufs\n"); 167 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 168 &ring->syncp); 169 if (rc != -ENOMEM) { 170 adapter->reset_reason = 171 ENA_REGS_RESET_DRIVER_INVALID_STATE; 172 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 173 } 174 return rc; 175 } 176 177 u64_stats_update_begin(&ring->syncp); 178 ring->tx_stats.cnt++; 179 ring->tx_stats.bytes += bytes; 180 u64_stats_update_end(&ring->syncp); 181 182 tx_info->tx_descs = nb_hw_desc; 183 tx_info->last_jiffies = jiffies; 184 tx_info->print_once = 0; 185 186 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 187 ring->ring_size); 188 return 0; 189 } 190 191 /* This is the XDP napi callback. XDP queues use a separate napi callback 192 * than Rx/Tx queues. 193 */ 194 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 195 { 196 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 197 u32 xdp_work_done, xdp_budget; 198 struct ena_ring *xdp_ring; 199 int napi_comp_call = 0; 200 int ret; 201 202 xdp_ring = ena_napi->xdp_ring; 203 204 xdp_budget = budget; 205 206 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 207 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 208 napi_complete_done(napi, 0); 209 return 0; 210 } 211 212 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 213 214 /* If the device is about to reset or down, avoid unmask 215 * the interrupt and return 0 so NAPI won't reschedule 216 */ 217 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 218 napi_complete_done(napi, 0); 219 ret = 0; 220 } else if (xdp_budget > xdp_work_done) { 221 napi_comp_call = 1; 222 if (napi_complete_done(napi, xdp_work_done)) 223 ena_unmask_interrupt(xdp_ring, NULL); 224 ena_update_ring_numa_node(xdp_ring, NULL); 225 ret = xdp_work_done; 226 } else { 227 ret = xdp_budget; 228 } 229 230 u64_stats_update_begin(&xdp_ring->syncp); 231 xdp_ring->tx_stats.napi_comp += napi_comp_call; 232 xdp_ring->tx_stats.tx_poll++; 233 u64_stats_update_end(&xdp_ring->syncp); 234 xdp_ring->tx_stats.last_napi_jiffies = jiffies; 235 236 return ret; 237 } 238 239 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 240 struct ena_tx_buffer *tx_info, 241 struct xdp_frame *xdpf, 242 void **push_hdr, 243 u32 *push_len) 244 { 245 struct ena_adapter *adapter = xdp_ring->adapter; 246 struct ena_com_buf *ena_buf; 247 dma_addr_t dma = 0; 248 u32 size; 249 250 tx_info->xdpf = xdpf; 251 size = tx_info->xdpf->len; 252 ena_buf = tx_info->bufs; 253 254 /* llq push buffer */ 255 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 256 *push_hdr = tx_info->xdpf->data; 257 258 if (size - *push_len > 0) { 259 dma = dma_map_single(xdp_ring->dev, 260 *push_hdr + *push_len, 261 size - *push_len, 262 DMA_TO_DEVICE); 263 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 264 goto error_report_dma_error; 265 266 tx_info->map_linear_data = 1; 267 tx_info->num_of_bufs = 1; 268 } 269 270 ena_buf->paddr = dma; 271 ena_buf->len = size; 272 273 return 0; 274 275 error_report_dma_error: 276 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 277 &xdp_ring->syncp); 278 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 279 280 xdp_return_frame_rx_napi(tx_info->xdpf); 281 tx_info->xdpf = NULL; 282 tx_info->num_of_bufs = 0; 283 284 return -EINVAL; 285 } 286 287 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 288 struct net_device *dev, 289 struct xdp_frame *xdpf, 290 int flags) 291 { 292 struct ena_com_tx_ctx ena_tx_ctx = {}; 293 struct ena_tx_buffer *tx_info; 294 u16 next_to_use, req_id; 295 void *push_hdr; 296 u32 push_len; 297 int rc; 298 299 next_to_use = xdp_ring->next_to_use; 300 req_id = xdp_ring->free_ids[next_to_use]; 301 tx_info = &xdp_ring->tx_buffer_info[req_id]; 302 tx_info->num_of_bufs = 0; 303 304 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &push_hdr, &push_len); 305 if (unlikely(rc)) 306 return rc; 307 308 ena_tx_ctx.ena_bufs = tx_info->bufs; 309 ena_tx_ctx.push_header = push_hdr; 310 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 311 ena_tx_ctx.req_id = req_id; 312 ena_tx_ctx.header_len = push_len; 313 314 rc = ena_xmit_common(dev, 315 xdp_ring, 316 tx_info, 317 &ena_tx_ctx, 318 next_to_use, 319 xdpf->len); 320 if (rc) 321 goto error_unmap_dma; 322 323 /* trigger the dma engine. ena_ring_tx_doorbell() 324 * calls a memory barrier inside it. 325 */ 326 if (flags & XDP_XMIT_FLUSH) 327 ena_ring_tx_doorbell(xdp_ring); 328 329 return rc; 330 331 error_unmap_dma: 332 ena_unmap_tx_buff(xdp_ring, tx_info); 333 tx_info->xdpf = NULL; 334 return rc; 335 } 336 337 static int ena_xdp_xmit(struct net_device *dev, int n, 338 struct xdp_frame **frames, u32 flags) 339 { 340 struct ena_adapter *adapter = netdev_priv(dev); 341 struct ena_ring *xdp_ring; 342 int qid, i, nxmit = 0; 343 344 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 345 return -EINVAL; 346 347 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 348 return -ENETDOWN; 349 350 /* We assume that all rings have the same XDP program */ 351 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 352 return -ENXIO; 353 354 qid = smp_processor_id() % adapter->xdp_num_queues; 355 qid += adapter->xdp_first_ring; 356 xdp_ring = &adapter->tx_ring[qid]; 357 358 /* Other CPU ids might try to send thorugh this queue */ 359 spin_lock(&xdp_ring->xdp_tx_lock); 360 361 for (i = 0; i < n; i++) { 362 if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0)) 363 break; 364 nxmit++; 365 } 366 367 /* Ring doorbell to make device aware of the packets */ 368 if (flags & XDP_XMIT_FLUSH) 369 ena_ring_tx_doorbell(xdp_ring); 370 371 spin_unlock(&xdp_ring->xdp_tx_lock); 372 373 /* Return number of packets sent */ 374 return nxmit; 375 } 376 377 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 378 { 379 struct bpf_prog *xdp_prog; 380 struct ena_ring *xdp_ring; 381 u32 verdict = XDP_PASS; 382 struct xdp_frame *xdpf; 383 u64 *xdp_stat; 384 385 rcu_read_lock(); 386 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 387 388 if (!xdp_prog) 389 goto out; 390 391 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 392 393 switch (verdict) { 394 case XDP_TX: 395 xdpf = xdp_convert_buff_to_frame(xdp); 396 if (unlikely(!xdpf)) { 397 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 398 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 399 verdict = XDP_ABORTED; 400 break; 401 } 402 403 /* Find xmit queue */ 404 xdp_ring = rx_ring->xdp_ring; 405 406 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 407 spin_lock(&xdp_ring->xdp_tx_lock); 408 409 if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, 410 XDP_XMIT_FLUSH)) 411 xdp_return_frame(xdpf); 412 413 spin_unlock(&xdp_ring->xdp_tx_lock); 414 xdp_stat = &rx_ring->rx_stats.xdp_tx; 415 break; 416 case XDP_REDIRECT: 417 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 418 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 419 break; 420 } 421 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 422 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 423 verdict = XDP_ABORTED; 424 break; 425 case XDP_ABORTED: 426 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 427 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 428 break; 429 case XDP_DROP: 430 xdp_stat = &rx_ring->rx_stats.xdp_drop; 431 break; 432 case XDP_PASS: 433 xdp_stat = &rx_ring->rx_stats.xdp_pass; 434 break; 435 default: 436 bpf_warn_invalid_xdp_action(verdict); 437 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 438 } 439 440 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 441 out: 442 rcu_read_unlock(); 443 444 return verdict; 445 } 446 447 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 448 { 449 adapter->xdp_first_ring = adapter->num_io_queues; 450 adapter->xdp_num_queues = adapter->num_io_queues; 451 452 ena_init_io_rings(adapter, 453 adapter->xdp_first_ring, 454 adapter->xdp_num_queues); 455 } 456 457 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 458 { 459 int rc = 0; 460 461 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 462 adapter->xdp_num_queues); 463 if (rc) 464 goto setup_err; 465 466 rc = ena_create_io_tx_queues_in_range(adapter, 467 adapter->xdp_first_ring, 468 adapter->xdp_num_queues); 469 if (rc) 470 goto create_err; 471 472 return 0; 473 474 create_err: 475 ena_free_all_io_tx_resources(adapter); 476 setup_err: 477 return rc; 478 } 479 480 /* Provides a way for both kernel and bpf-prog to know 481 * more about the RX-queue a given XDP frame arrived on. 482 */ 483 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 484 { 485 int rc; 486 487 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 488 489 if (rc) { 490 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 491 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 492 rx_ring->qid, rc); 493 goto err; 494 } 495 496 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 497 NULL); 498 499 if (rc) { 500 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 501 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 502 rx_ring->qid, rc); 503 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 504 } 505 506 err: 507 return rc; 508 } 509 510 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 511 { 512 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 513 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 514 } 515 516 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 517 struct bpf_prog *prog, 518 int first, int count) 519 { 520 struct ena_ring *rx_ring; 521 int i = 0; 522 523 for (i = first; i < count; i++) { 524 rx_ring = &adapter->rx_ring[i]; 525 xchg(&rx_ring->xdp_bpf_prog, prog); 526 if (prog) { 527 ena_xdp_register_rxq_info(rx_ring); 528 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 529 } else { 530 ena_xdp_unregister_rxq_info(rx_ring); 531 rx_ring->rx_headroom = NET_SKB_PAD; 532 } 533 } 534 } 535 536 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 537 struct bpf_prog *prog) 538 { 539 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 540 541 ena_xdp_exchange_program_rx_in_range(adapter, 542 prog, 543 0, 544 adapter->num_io_queues); 545 546 if (old_bpf_prog) 547 bpf_prog_put(old_bpf_prog); 548 } 549 550 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 551 { 552 bool was_up; 553 int rc; 554 555 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 556 557 if (was_up) 558 ena_down(adapter); 559 560 adapter->xdp_first_ring = 0; 561 adapter->xdp_num_queues = 0; 562 ena_xdp_exchange_program(adapter, NULL); 563 if (was_up) { 564 rc = ena_up(adapter); 565 if (rc) 566 return rc; 567 } 568 return 0; 569 } 570 571 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 572 { 573 struct ena_adapter *adapter = netdev_priv(netdev); 574 struct bpf_prog *prog = bpf->prog; 575 struct bpf_prog *old_bpf_prog; 576 int rc, prev_mtu; 577 bool is_up; 578 579 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 580 rc = ena_xdp_allowed(adapter); 581 if (rc == ENA_XDP_ALLOWED) { 582 old_bpf_prog = adapter->xdp_bpf_prog; 583 if (prog) { 584 if (!is_up) { 585 ena_init_all_xdp_queues(adapter); 586 } else if (!old_bpf_prog) { 587 ena_down(adapter); 588 ena_init_all_xdp_queues(adapter); 589 } 590 ena_xdp_exchange_program(adapter, prog); 591 592 if (is_up && !old_bpf_prog) { 593 rc = ena_up(adapter); 594 if (rc) 595 return rc; 596 } 597 } else if (old_bpf_prog) { 598 rc = ena_destroy_and_free_all_xdp_queues(adapter); 599 if (rc) 600 return rc; 601 } 602 603 prev_mtu = netdev->max_mtu; 604 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 605 606 if (!old_bpf_prog) 607 netif_info(adapter, drv, adapter->netdev, 608 "XDP program is set, changing the max_mtu from %d to %d", 609 prev_mtu, netdev->max_mtu); 610 611 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 612 netif_err(adapter, drv, adapter->netdev, 613 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 614 netdev->mtu, ENA_XDP_MAX_MTU); 615 NL_SET_ERR_MSG_MOD(bpf->extack, 616 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 617 return -EINVAL; 618 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 619 netif_err(adapter, drv, adapter->netdev, 620 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 621 adapter->num_io_queues, adapter->max_num_io_queues); 622 NL_SET_ERR_MSG_MOD(bpf->extack, 623 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 624 return -EINVAL; 625 } 626 627 return 0; 628 } 629 630 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 631 * program as well as to query the current xdp program id. 632 */ 633 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 634 { 635 switch (bpf->command) { 636 case XDP_SETUP_PROG: 637 return ena_xdp_set(netdev, bpf); 638 default: 639 return -EINVAL; 640 } 641 return 0; 642 } 643 644 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 645 { 646 #ifdef CONFIG_RFS_ACCEL 647 u32 i; 648 int rc; 649 650 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 651 if (!adapter->netdev->rx_cpu_rmap) 652 return -ENOMEM; 653 for (i = 0; i < adapter->num_io_queues; i++) { 654 int irq_idx = ENA_IO_IRQ_IDX(i); 655 656 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 657 pci_irq_vector(adapter->pdev, irq_idx)); 658 if (rc) { 659 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 660 adapter->netdev->rx_cpu_rmap = NULL; 661 return rc; 662 } 663 } 664 #endif /* CONFIG_RFS_ACCEL */ 665 return 0; 666 } 667 668 static void ena_init_io_rings_common(struct ena_adapter *adapter, 669 struct ena_ring *ring, u16 qid) 670 { 671 ring->qid = qid; 672 ring->pdev = adapter->pdev; 673 ring->dev = &adapter->pdev->dev; 674 ring->netdev = adapter->netdev; 675 ring->napi = &adapter->ena_napi[qid].napi; 676 ring->adapter = adapter; 677 ring->ena_dev = adapter->ena_dev; 678 ring->per_napi_packets = 0; 679 ring->cpu = 0; 680 ring->no_interrupt_event_cnt = 0; 681 u64_stats_init(&ring->syncp); 682 } 683 684 static void ena_init_io_rings(struct ena_adapter *adapter, 685 int first_index, int count) 686 { 687 struct ena_com_dev *ena_dev; 688 struct ena_ring *txr, *rxr; 689 int i; 690 691 ena_dev = adapter->ena_dev; 692 693 for (i = first_index; i < first_index + count; i++) { 694 txr = &adapter->tx_ring[i]; 695 rxr = &adapter->rx_ring[i]; 696 697 /* TX common ring state */ 698 ena_init_io_rings_common(adapter, txr, i); 699 700 /* TX specific ring state */ 701 txr->ring_size = adapter->requested_tx_ring_size; 702 txr->tx_max_header_size = ena_dev->tx_max_header_size; 703 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 704 txr->sgl_size = adapter->max_tx_sgl_size; 705 txr->smoothed_interval = 706 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 707 txr->disable_meta_caching = adapter->disable_meta_caching; 708 spin_lock_init(&txr->xdp_tx_lock); 709 710 /* Don't init RX queues for xdp queues */ 711 if (!ENA_IS_XDP_INDEX(adapter, i)) { 712 /* RX common ring state */ 713 ena_init_io_rings_common(adapter, rxr, i); 714 715 /* RX specific ring state */ 716 rxr->ring_size = adapter->requested_rx_ring_size; 717 rxr->rx_copybreak = adapter->rx_copybreak; 718 rxr->sgl_size = adapter->max_rx_sgl_size; 719 rxr->smoothed_interval = 720 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 721 rxr->empty_rx_queue = 0; 722 rxr->rx_headroom = NET_SKB_PAD; 723 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 724 rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues]; 725 } 726 } 727 } 728 729 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 730 * @adapter: network interface device structure 731 * @qid: queue index 732 * 733 * Return 0 on success, negative on failure 734 */ 735 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 736 { 737 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 738 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 739 int size, i, node; 740 741 if (tx_ring->tx_buffer_info) { 742 netif_err(adapter, ifup, 743 adapter->netdev, "tx_buffer_info info is not NULL"); 744 return -EEXIST; 745 } 746 747 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 748 node = cpu_to_node(ena_irq->cpu); 749 750 tx_ring->tx_buffer_info = vzalloc_node(size, node); 751 if (!tx_ring->tx_buffer_info) { 752 tx_ring->tx_buffer_info = vzalloc(size); 753 if (!tx_ring->tx_buffer_info) 754 goto err_tx_buffer_info; 755 } 756 757 size = sizeof(u16) * tx_ring->ring_size; 758 tx_ring->free_ids = vzalloc_node(size, node); 759 if (!tx_ring->free_ids) { 760 tx_ring->free_ids = vzalloc(size); 761 if (!tx_ring->free_ids) 762 goto err_tx_free_ids; 763 } 764 765 size = tx_ring->tx_max_header_size; 766 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 767 if (!tx_ring->push_buf_intermediate_buf) { 768 tx_ring->push_buf_intermediate_buf = vzalloc(size); 769 if (!tx_ring->push_buf_intermediate_buf) 770 goto err_push_buf_intermediate_buf; 771 } 772 773 /* Req id ring for TX out of order completions */ 774 for (i = 0; i < tx_ring->ring_size; i++) 775 tx_ring->free_ids[i] = i; 776 777 /* Reset tx statistics */ 778 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 779 780 tx_ring->next_to_use = 0; 781 tx_ring->next_to_clean = 0; 782 tx_ring->cpu = ena_irq->cpu; 783 return 0; 784 785 err_push_buf_intermediate_buf: 786 vfree(tx_ring->free_ids); 787 tx_ring->free_ids = NULL; 788 err_tx_free_ids: 789 vfree(tx_ring->tx_buffer_info); 790 tx_ring->tx_buffer_info = NULL; 791 err_tx_buffer_info: 792 return -ENOMEM; 793 } 794 795 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 796 * @adapter: network interface device structure 797 * @qid: queue index 798 * 799 * Free all transmit software resources 800 */ 801 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 802 { 803 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 804 805 vfree(tx_ring->tx_buffer_info); 806 tx_ring->tx_buffer_info = NULL; 807 808 vfree(tx_ring->free_ids); 809 tx_ring->free_ids = NULL; 810 811 vfree(tx_ring->push_buf_intermediate_buf); 812 tx_ring->push_buf_intermediate_buf = NULL; 813 } 814 815 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 816 int first_index, 817 int count) 818 { 819 int i, rc = 0; 820 821 for (i = first_index; i < first_index + count; i++) { 822 rc = ena_setup_tx_resources(adapter, i); 823 if (rc) 824 goto err_setup_tx; 825 } 826 827 return 0; 828 829 err_setup_tx: 830 831 netif_err(adapter, ifup, adapter->netdev, 832 "Tx queue %d: allocation failed\n", i); 833 834 /* rewind the index freeing the rings as we go */ 835 while (first_index < i--) 836 ena_free_tx_resources(adapter, i); 837 return rc; 838 } 839 840 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 841 int first_index, int count) 842 { 843 int i; 844 845 for (i = first_index; i < first_index + count; i++) 846 ena_free_tx_resources(adapter, i); 847 } 848 849 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 850 * @adapter: board private structure 851 * 852 * Free all transmit software resources 853 */ 854 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 855 { 856 ena_free_all_io_tx_resources_in_range(adapter, 857 0, 858 adapter->xdp_num_queues + 859 adapter->num_io_queues); 860 } 861 862 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 863 * @adapter: network interface device structure 864 * @qid: queue index 865 * 866 * Returns 0 on success, negative on failure 867 */ 868 static int ena_setup_rx_resources(struct ena_adapter *adapter, 869 u32 qid) 870 { 871 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 872 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 873 int size, node, i; 874 875 if (rx_ring->rx_buffer_info) { 876 netif_err(adapter, ifup, adapter->netdev, 877 "rx_buffer_info is not NULL"); 878 return -EEXIST; 879 } 880 881 /* alloc extra element so in rx path 882 * we can always prefetch rx_info + 1 883 */ 884 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 885 node = cpu_to_node(ena_irq->cpu); 886 887 rx_ring->rx_buffer_info = vzalloc_node(size, node); 888 if (!rx_ring->rx_buffer_info) { 889 rx_ring->rx_buffer_info = vzalloc(size); 890 if (!rx_ring->rx_buffer_info) 891 return -ENOMEM; 892 } 893 894 size = sizeof(u16) * rx_ring->ring_size; 895 rx_ring->free_ids = vzalloc_node(size, node); 896 if (!rx_ring->free_ids) { 897 rx_ring->free_ids = vzalloc(size); 898 if (!rx_ring->free_ids) { 899 vfree(rx_ring->rx_buffer_info); 900 rx_ring->rx_buffer_info = NULL; 901 return -ENOMEM; 902 } 903 } 904 905 /* Req id ring for receiving RX pkts out of order */ 906 for (i = 0; i < rx_ring->ring_size; i++) 907 rx_ring->free_ids[i] = i; 908 909 /* Reset rx statistics */ 910 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 911 912 rx_ring->next_to_clean = 0; 913 rx_ring->next_to_use = 0; 914 rx_ring->cpu = ena_irq->cpu; 915 916 return 0; 917 } 918 919 /* ena_free_rx_resources - Free I/O Rx Resources 920 * @adapter: network interface device structure 921 * @qid: queue index 922 * 923 * Free all receive software resources 924 */ 925 static void ena_free_rx_resources(struct ena_adapter *adapter, 926 u32 qid) 927 { 928 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 929 930 vfree(rx_ring->rx_buffer_info); 931 rx_ring->rx_buffer_info = NULL; 932 933 vfree(rx_ring->free_ids); 934 rx_ring->free_ids = NULL; 935 } 936 937 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 938 * @adapter: board private structure 939 * 940 * Return 0 on success, negative on failure 941 */ 942 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 943 { 944 int i, rc = 0; 945 946 for (i = 0; i < adapter->num_io_queues; i++) { 947 rc = ena_setup_rx_resources(adapter, i); 948 if (rc) 949 goto err_setup_rx; 950 } 951 952 return 0; 953 954 err_setup_rx: 955 956 netif_err(adapter, ifup, adapter->netdev, 957 "Rx queue %d: allocation failed\n", i); 958 959 /* rewind the index freeing the rings as we go */ 960 while (i--) 961 ena_free_rx_resources(adapter, i); 962 return rc; 963 } 964 965 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 966 * @adapter: board private structure 967 * 968 * Free all receive software resources 969 */ 970 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 971 { 972 int i; 973 974 for (i = 0; i < adapter->num_io_queues; i++) 975 ena_free_rx_resources(adapter, i); 976 } 977 978 static struct page *ena_alloc_map_page(struct ena_ring *rx_ring, 979 dma_addr_t *dma) 980 { 981 struct page *page; 982 983 /* This would allocate the page on the same NUMA node the executing code 984 * is running on. 985 */ 986 page = dev_alloc_page(); 987 if (!page) { 988 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 989 &rx_ring->syncp); 990 return ERR_PTR(-ENOSPC); 991 } 992 993 /* To enable NIC-side port-mirroring, AKA SPAN port, 994 * we make the buffer readable from the nic as well 995 */ 996 *dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 997 DMA_BIDIRECTIONAL); 998 if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) { 999 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 1000 &rx_ring->syncp); 1001 __free_page(page); 1002 return ERR_PTR(-EIO); 1003 } 1004 1005 return page; 1006 } 1007 1008 static int ena_alloc_rx_buffer(struct ena_ring *rx_ring, 1009 struct ena_rx_buffer *rx_info) 1010 { 1011 int headroom = rx_ring->rx_headroom; 1012 struct ena_com_buf *ena_buf; 1013 struct page *page; 1014 dma_addr_t dma; 1015 int tailroom; 1016 1017 /* restore page offset value in case it has been changed by device */ 1018 rx_info->page_offset = headroom; 1019 1020 /* if previous allocated page is not used */ 1021 if (unlikely(rx_info->page)) 1022 return 0; 1023 1024 /* We handle DMA here */ 1025 page = ena_alloc_map_page(rx_ring, &dma); 1026 if (unlikely(IS_ERR(page))) 1027 return PTR_ERR(page); 1028 1029 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1030 "Allocate page %p, rx_info %p\n", page, rx_info); 1031 1032 tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1033 1034 rx_info->page = page; 1035 ena_buf = &rx_info->ena_buf; 1036 ena_buf->paddr = dma + headroom; 1037 ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom; 1038 1039 return 0; 1040 } 1041 1042 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1043 struct ena_rx_buffer *rx_info) 1044 { 1045 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1046 1047 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1048 ENA_PAGE_SIZE, 1049 DMA_BIDIRECTIONAL); 1050 } 1051 1052 static void ena_free_rx_page(struct ena_ring *rx_ring, 1053 struct ena_rx_buffer *rx_info) 1054 { 1055 struct page *page = rx_info->page; 1056 1057 if (unlikely(!page)) { 1058 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1059 "Trying to free unallocated buffer\n"); 1060 return; 1061 } 1062 1063 ena_unmap_rx_buff(rx_ring, rx_info); 1064 1065 __free_page(page); 1066 rx_info->page = NULL; 1067 } 1068 1069 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1070 { 1071 u16 next_to_use, req_id; 1072 u32 i; 1073 int rc; 1074 1075 next_to_use = rx_ring->next_to_use; 1076 1077 for (i = 0; i < num; i++) { 1078 struct ena_rx_buffer *rx_info; 1079 1080 req_id = rx_ring->free_ids[next_to_use]; 1081 1082 rx_info = &rx_ring->rx_buffer_info[req_id]; 1083 1084 rc = ena_alloc_rx_buffer(rx_ring, rx_info); 1085 if (unlikely(rc < 0)) { 1086 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1087 "Failed to allocate buffer for rx queue %d\n", 1088 rx_ring->qid); 1089 break; 1090 } 1091 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1092 &rx_info->ena_buf, 1093 req_id); 1094 if (unlikely(rc)) { 1095 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1096 "Failed to add buffer for rx queue %d\n", 1097 rx_ring->qid); 1098 break; 1099 } 1100 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1101 rx_ring->ring_size); 1102 } 1103 1104 if (unlikely(i < num)) { 1105 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1106 &rx_ring->syncp); 1107 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1108 "Refilled rx qid %d with only %d buffers (from %d)\n", 1109 rx_ring->qid, i, num); 1110 } 1111 1112 /* ena_com_write_sq_doorbell issues a wmb() */ 1113 if (likely(i)) 1114 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1115 1116 rx_ring->next_to_use = next_to_use; 1117 1118 return i; 1119 } 1120 1121 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1122 u32 qid) 1123 { 1124 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1125 u32 i; 1126 1127 for (i = 0; i < rx_ring->ring_size; i++) { 1128 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1129 1130 if (rx_info->page) 1131 ena_free_rx_page(rx_ring, rx_info); 1132 } 1133 } 1134 1135 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1136 * @adapter: board private structure 1137 */ 1138 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1139 { 1140 struct ena_ring *rx_ring; 1141 int i, rc, bufs_num; 1142 1143 for (i = 0; i < adapter->num_io_queues; i++) { 1144 rx_ring = &adapter->rx_ring[i]; 1145 bufs_num = rx_ring->ring_size - 1; 1146 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1147 1148 if (unlikely(rc != bufs_num)) 1149 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1150 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1151 i, rc, bufs_num); 1152 } 1153 } 1154 1155 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1156 { 1157 int i; 1158 1159 for (i = 0; i < adapter->num_io_queues; i++) 1160 ena_free_rx_bufs(adapter, i); 1161 } 1162 1163 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1164 struct ena_tx_buffer *tx_info) 1165 { 1166 struct ena_com_buf *ena_buf; 1167 u32 cnt; 1168 int i; 1169 1170 ena_buf = tx_info->bufs; 1171 cnt = tx_info->num_of_bufs; 1172 1173 if (unlikely(!cnt)) 1174 return; 1175 1176 if (tx_info->map_linear_data) { 1177 dma_unmap_single(tx_ring->dev, 1178 dma_unmap_addr(ena_buf, paddr), 1179 dma_unmap_len(ena_buf, len), 1180 DMA_TO_DEVICE); 1181 ena_buf++; 1182 cnt--; 1183 } 1184 1185 /* unmap remaining mapped pages */ 1186 for (i = 0; i < cnt; i++) { 1187 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1188 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1189 ena_buf++; 1190 } 1191 } 1192 1193 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1194 * @tx_ring: TX ring for which buffers be freed 1195 */ 1196 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1197 { 1198 bool print_once = true; 1199 u32 i; 1200 1201 for (i = 0; i < tx_ring->ring_size; i++) { 1202 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1203 1204 if (!tx_info->skb) 1205 continue; 1206 1207 if (print_once) { 1208 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1209 "Free uncompleted tx skb qid %d idx 0x%x\n", 1210 tx_ring->qid, i); 1211 print_once = false; 1212 } else { 1213 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1214 "Free uncompleted tx skb qid %d idx 0x%x\n", 1215 tx_ring->qid, i); 1216 } 1217 1218 ena_unmap_tx_buff(tx_ring, tx_info); 1219 1220 dev_kfree_skb_any(tx_info->skb); 1221 } 1222 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1223 tx_ring->qid)); 1224 } 1225 1226 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1227 { 1228 struct ena_ring *tx_ring; 1229 int i; 1230 1231 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1232 tx_ring = &adapter->tx_ring[i]; 1233 ena_free_tx_bufs(tx_ring); 1234 } 1235 } 1236 1237 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1238 { 1239 u16 ena_qid; 1240 int i; 1241 1242 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1243 ena_qid = ENA_IO_TXQ_IDX(i); 1244 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1245 } 1246 } 1247 1248 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1249 { 1250 u16 ena_qid; 1251 int i; 1252 1253 for (i = 0; i < adapter->num_io_queues; i++) { 1254 ena_qid = ENA_IO_RXQ_IDX(i); 1255 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1256 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1257 } 1258 } 1259 1260 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1261 { 1262 ena_destroy_all_tx_queues(adapter); 1263 ena_destroy_all_rx_queues(adapter); 1264 } 1265 1266 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1267 struct ena_tx_buffer *tx_info, bool is_xdp) 1268 { 1269 if (tx_info) 1270 netif_err(ring->adapter, 1271 tx_done, 1272 ring->netdev, 1273 "tx_info doesn't have valid %s", 1274 is_xdp ? "xdp frame" : "skb"); 1275 else 1276 netif_err(ring->adapter, 1277 tx_done, 1278 ring->netdev, 1279 "Invalid req_id: %hu\n", 1280 req_id); 1281 1282 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1283 1284 /* Trigger device reset */ 1285 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1286 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1287 return -EFAULT; 1288 } 1289 1290 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1291 { 1292 struct ena_tx_buffer *tx_info = NULL; 1293 1294 if (likely(req_id < tx_ring->ring_size)) { 1295 tx_info = &tx_ring->tx_buffer_info[req_id]; 1296 if (likely(tx_info->skb)) 1297 return 0; 1298 } 1299 1300 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1301 } 1302 1303 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1304 { 1305 struct ena_tx_buffer *tx_info = NULL; 1306 1307 if (likely(req_id < xdp_ring->ring_size)) { 1308 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1309 if (likely(tx_info->xdpf)) 1310 return 0; 1311 } 1312 1313 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1314 } 1315 1316 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1317 { 1318 struct netdev_queue *txq; 1319 bool above_thresh; 1320 u32 tx_bytes = 0; 1321 u32 total_done = 0; 1322 u16 next_to_clean; 1323 u16 req_id; 1324 int tx_pkts = 0; 1325 int rc; 1326 1327 next_to_clean = tx_ring->next_to_clean; 1328 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1329 1330 while (tx_pkts < budget) { 1331 struct ena_tx_buffer *tx_info; 1332 struct sk_buff *skb; 1333 1334 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1335 &req_id); 1336 if (rc) 1337 break; 1338 1339 rc = validate_tx_req_id(tx_ring, req_id); 1340 if (rc) 1341 break; 1342 1343 tx_info = &tx_ring->tx_buffer_info[req_id]; 1344 skb = tx_info->skb; 1345 1346 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1347 prefetch(&skb->end); 1348 1349 tx_info->skb = NULL; 1350 tx_info->last_jiffies = 0; 1351 1352 ena_unmap_tx_buff(tx_ring, tx_info); 1353 1354 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1355 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1356 skb); 1357 1358 tx_bytes += skb->len; 1359 dev_kfree_skb(skb); 1360 tx_pkts++; 1361 total_done += tx_info->tx_descs; 1362 1363 tx_ring->free_ids[next_to_clean] = req_id; 1364 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1365 tx_ring->ring_size); 1366 } 1367 1368 tx_ring->next_to_clean = next_to_clean; 1369 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1370 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1371 1372 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1373 1374 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1375 "tx_poll: q %d done. total pkts: %d\n", 1376 tx_ring->qid, tx_pkts); 1377 1378 /* need to make the rings circular update visible to 1379 * ena_start_xmit() before checking for netif_queue_stopped(). 1380 */ 1381 smp_mb(); 1382 1383 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1384 ENA_TX_WAKEUP_THRESH); 1385 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1386 __netif_tx_lock(txq, smp_processor_id()); 1387 above_thresh = 1388 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1389 ENA_TX_WAKEUP_THRESH); 1390 if (netif_tx_queue_stopped(txq) && above_thresh && 1391 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1392 netif_tx_wake_queue(txq); 1393 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1394 &tx_ring->syncp); 1395 } 1396 __netif_tx_unlock(txq); 1397 } 1398 1399 return tx_pkts; 1400 } 1401 1402 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag) 1403 { 1404 struct sk_buff *skb; 1405 1406 if (!first_frag) 1407 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1408 rx_ring->rx_copybreak); 1409 else 1410 skb = build_skb(first_frag, ENA_PAGE_SIZE); 1411 1412 if (unlikely(!skb)) { 1413 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1414 &rx_ring->syncp); 1415 1416 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1417 "Failed to allocate skb. first_frag %s\n", 1418 first_frag ? "provided" : "not provided"); 1419 return NULL; 1420 } 1421 1422 return skb; 1423 } 1424 1425 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1426 struct ena_com_rx_buf_info *ena_bufs, 1427 u32 descs, 1428 u16 *next_to_clean) 1429 { 1430 struct ena_rx_buffer *rx_info; 1431 u16 len, req_id, buf = 0; 1432 struct sk_buff *skb; 1433 void *page_addr; 1434 u32 page_offset; 1435 void *data_addr; 1436 1437 len = ena_bufs[buf].len; 1438 req_id = ena_bufs[buf].req_id; 1439 1440 rx_info = &rx_ring->rx_buffer_info[req_id]; 1441 1442 if (unlikely(!rx_info->page)) { 1443 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1444 "Page is NULL\n"); 1445 return NULL; 1446 } 1447 1448 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1449 "rx_info %p page %p\n", 1450 rx_info, rx_info->page); 1451 1452 /* save virt address of first buffer */ 1453 page_addr = page_address(rx_info->page); 1454 page_offset = rx_info->page_offset; 1455 data_addr = page_addr + page_offset; 1456 1457 prefetch(data_addr); 1458 1459 if (len <= rx_ring->rx_copybreak) { 1460 skb = ena_alloc_skb(rx_ring, NULL); 1461 if (unlikely(!skb)) 1462 return NULL; 1463 1464 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1465 "RX allocated small packet. len %d. data_len %d\n", 1466 skb->len, skb->data_len); 1467 1468 /* sync this buffer for CPU use */ 1469 dma_sync_single_for_cpu(rx_ring->dev, 1470 dma_unmap_addr(&rx_info->ena_buf, paddr), 1471 len, 1472 DMA_FROM_DEVICE); 1473 skb_copy_to_linear_data(skb, data_addr, len); 1474 dma_sync_single_for_device(rx_ring->dev, 1475 dma_unmap_addr(&rx_info->ena_buf, paddr), 1476 len, 1477 DMA_FROM_DEVICE); 1478 1479 skb_put(skb, len); 1480 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1481 rx_ring->free_ids[*next_to_clean] = req_id; 1482 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1483 rx_ring->ring_size); 1484 return skb; 1485 } 1486 1487 ena_unmap_rx_buff(rx_ring, rx_info); 1488 1489 skb = ena_alloc_skb(rx_ring, page_addr); 1490 if (unlikely(!skb)) 1491 return NULL; 1492 1493 /* Populate skb's linear part */ 1494 skb_reserve(skb, page_offset); 1495 skb_put(skb, len); 1496 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1497 1498 do { 1499 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1500 "RX skb updated. len %d. data_len %d\n", 1501 skb->len, skb->data_len); 1502 1503 rx_info->page = NULL; 1504 1505 rx_ring->free_ids[*next_to_clean] = req_id; 1506 *next_to_clean = 1507 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1508 rx_ring->ring_size); 1509 if (likely(--descs == 0)) 1510 break; 1511 1512 buf++; 1513 len = ena_bufs[buf].len; 1514 req_id = ena_bufs[buf].req_id; 1515 1516 rx_info = &rx_ring->rx_buffer_info[req_id]; 1517 1518 ena_unmap_rx_buff(rx_ring, rx_info); 1519 1520 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1521 rx_info->page_offset, len, ENA_PAGE_SIZE); 1522 1523 } while (1); 1524 1525 return skb; 1526 } 1527 1528 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1529 * @adapter: structure containing adapter specific data 1530 * @ena_rx_ctx: received packet context/metadata 1531 * @skb: skb currently being received and modified 1532 */ 1533 static void ena_rx_checksum(struct ena_ring *rx_ring, 1534 struct ena_com_rx_ctx *ena_rx_ctx, 1535 struct sk_buff *skb) 1536 { 1537 /* Rx csum disabled */ 1538 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1539 skb->ip_summed = CHECKSUM_NONE; 1540 return; 1541 } 1542 1543 /* For fragmented packets the checksum isn't valid */ 1544 if (ena_rx_ctx->frag) { 1545 skb->ip_summed = CHECKSUM_NONE; 1546 return; 1547 } 1548 1549 /* if IP and error */ 1550 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1551 (ena_rx_ctx->l3_csum_err))) { 1552 /* ipv4 checksum error */ 1553 skb->ip_summed = CHECKSUM_NONE; 1554 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1555 &rx_ring->syncp); 1556 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1557 "RX IPv4 header checksum error\n"); 1558 return; 1559 } 1560 1561 /* if TCP/UDP */ 1562 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1563 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1564 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1565 /* TCP/UDP checksum error */ 1566 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1567 &rx_ring->syncp); 1568 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1569 "RX L4 checksum error\n"); 1570 skb->ip_summed = CHECKSUM_NONE; 1571 return; 1572 } 1573 1574 if (likely(ena_rx_ctx->l4_csum_checked)) { 1575 skb->ip_summed = CHECKSUM_UNNECESSARY; 1576 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1577 &rx_ring->syncp); 1578 } else { 1579 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1580 &rx_ring->syncp); 1581 skb->ip_summed = CHECKSUM_NONE; 1582 } 1583 } else { 1584 skb->ip_summed = CHECKSUM_NONE; 1585 return; 1586 } 1587 1588 } 1589 1590 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1591 struct ena_com_rx_ctx *ena_rx_ctx, 1592 struct sk_buff *skb) 1593 { 1594 enum pkt_hash_types hash_type; 1595 1596 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1597 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1598 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1599 1600 hash_type = PKT_HASH_TYPE_L4; 1601 else 1602 hash_type = PKT_HASH_TYPE_NONE; 1603 1604 /* Override hash type if the packet is fragmented */ 1605 if (ena_rx_ctx->frag) 1606 hash_type = PKT_HASH_TYPE_NONE; 1607 1608 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1609 } 1610 } 1611 1612 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1613 { 1614 struct ena_rx_buffer *rx_info; 1615 int ret; 1616 1617 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1618 xdp_prepare_buff(xdp, page_address(rx_info->page), 1619 rx_info->page_offset, 1620 rx_ring->ena_bufs[0].len, false); 1621 /* If for some reason we received a bigger packet than 1622 * we expect, then we simply drop it 1623 */ 1624 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1625 return XDP_DROP; 1626 1627 ret = ena_xdp_execute(rx_ring, xdp); 1628 1629 /* The xdp program might expand the headers */ 1630 if (ret == XDP_PASS) { 1631 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1632 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1633 } 1634 1635 return ret; 1636 } 1637 /* ena_clean_rx_irq - Cleanup RX irq 1638 * @rx_ring: RX ring to clean 1639 * @napi: napi handler 1640 * @budget: how many packets driver is allowed to clean 1641 * 1642 * Returns the number of cleaned buffers. 1643 */ 1644 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1645 u32 budget) 1646 { 1647 u16 next_to_clean = rx_ring->next_to_clean; 1648 struct ena_com_rx_ctx ena_rx_ctx; 1649 struct ena_rx_buffer *rx_info; 1650 struct ena_adapter *adapter; 1651 u32 res_budget, work_done; 1652 int rx_copybreak_pkt = 0; 1653 int refill_threshold; 1654 struct sk_buff *skb; 1655 int refill_required; 1656 struct xdp_buff xdp; 1657 int xdp_flags = 0; 1658 int total_len = 0; 1659 int xdp_verdict; 1660 int rc = 0; 1661 int i; 1662 1663 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1664 "%s qid %d\n", __func__, rx_ring->qid); 1665 res_budget = budget; 1666 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq); 1667 1668 do { 1669 xdp_verdict = XDP_PASS; 1670 skb = NULL; 1671 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1672 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1673 ena_rx_ctx.descs = 0; 1674 ena_rx_ctx.pkt_offset = 0; 1675 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1676 rx_ring->ena_com_io_sq, 1677 &ena_rx_ctx); 1678 if (unlikely(rc)) 1679 goto error; 1680 1681 if (unlikely(ena_rx_ctx.descs == 0)) 1682 break; 1683 1684 /* First descriptor might have an offset set by the device */ 1685 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1686 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1687 1688 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1689 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1690 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1691 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1692 1693 if (ena_xdp_present_ring(rx_ring)) 1694 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1695 1696 /* allocate skb and fill it */ 1697 if (xdp_verdict == XDP_PASS) 1698 skb = ena_rx_skb(rx_ring, 1699 rx_ring->ena_bufs, 1700 ena_rx_ctx.descs, 1701 &next_to_clean); 1702 1703 if (unlikely(!skb)) { 1704 for (i = 0; i < ena_rx_ctx.descs; i++) { 1705 int req_id = rx_ring->ena_bufs[i].req_id; 1706 1707 rx_ring->free_ids[next_to_clean] = req_id; 1708 next_to_clean = 1709 ENA_RX_RING_IDX_NEXT(next_to_clean, 1710 rx_ring->ring_size); 1711 1712 /* Packets was passed for transmission, unmap it 1713 * from RX side. 1714 */ 1715 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) { 1716 ena_unmap_rx_buff(rx_ring, 1717 &rx_ring->rx_buffer_info[req_id]); 1718 rx_ring->rx_buffer_info[req_id].page = NULL; 1719 } 1720 } 1721 if (xdp_verdict != XDP_PASS) { 1722 xdp_flags |= xdp_verdict; 1723 res_budget--; 1724 continue; 1725 } 1726 break; 1727 } 1728 1729 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1730 1731 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1732 1733 skb_record_rx_queue(skb, rx_ring->qid); 1734 1735 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) 1736 rx_copybreak_pkt++; 1737 1738 total_len += skb->len; 1739 1740 napi_gro_receive(napi, skb); 1741 1742 res_budget--; 1743 } while (likely(res_budget)); 1744 1745 work_done = budget - res_budget; 1746 rx_ring->per_napi_packets += work_done; 1747 u64_stats_update_begin(&rx_ring->syncp); 1748 rx_ring->rx_stats.bytes += total_len; 1749 rx_ring->rx_stats.cnt += work_done; 1750 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1751 u64_stats_update_end(&rx_ring->syncp); 1752 1753 rx_ring->next_to_clean = next_to_clean; 1754 1755 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1756 refill_threshold = 1757 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1758 ENA_RX_REFILL_THRESH_PACKET); 1759 1760 /* Optimization, try to batch new rx buffers */ 1761 if (refill_required > refill_threshold) { 1762 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1763 ena_refill_rx_bufs(rx_ring, refill_required); 1764 } 1765 1766 if (xdp_flags & XDP_REDIRECT) 1767 xdp_do_flush_map(); 1768 1769 return work_done; 1770 1771 error: 1772 adapter = netdev_priv(rx_ring->netdev); 1773 1774 if (rc == -ENOSPC) { 1775 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1776 &rx_ring->syncp); 1777 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1778 } else { 1779 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1780 &rx_ring->syncp); 1781 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 1782 } 1783 1784 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1785 1786 return 0; 1787 } 1788 1789 static void ena_dim_work(struct work_struct *w) 1790 { 1791 struct dim *dim = container_of(w, struct dim, work); 1792 struct dim_cq_moder cur_moder = 1793 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1794 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1795 1796 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1797 dim->state = DIM_START_MEASURE; 1798 } 1799 1800 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1801 { 1802 struct dim_sample dim_sample; 1803 struct ena_ring *rx_ring = ena_napi->rx_ring; 1804 1805 if (!rx_ring->per_napi_packets) 1806 return; 1807 1808 rx_ring->non_empty_napi_events++; 1809 1810 dim_update_sample(rx_ring->non_empty_napi_events, 1811 rx_ring->rx_stats.cnt, 1812 rx_ring->rx_stats.bytes, 1813 &dim_sample); 1814 1815 net_dim(&ena_napi->dim, dim_sample); 1816 1817 rx_ring->per_napi_packets = 0; 1818 } 1819 1820 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1821 struct ena_ring *rx_ring) 1822 { 1823 struct ena_eth_io_intr_reg intr_reg; 1824 u32 rx_interval = 0; 1825 /* Rx ring can be NULL when for XDP tx queues which don't have an 1826 * accompanying rx_ring pair. 1827 */ 1828 if (rx_ring) 1829 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1830 rx_ring->smoothed_interval : 1831 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1832 1833 /* Update intr register: rx intr delay, 1834 * tx intr delay and interrupt unmask 1835 */ 1836 ena_com_update_intr_reg(&intr_reg, 1837 rx_interval, 1838 tx_ring->smoothed_interval, 1839 true); 1840 1841 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1842 &tx_ring->syncp); 1843 1844 /* It is a shared MSI-X. 1845 * Tx and Rx CQ have pointer to it. 1846 * So we use one of them to reach the intr reg 1847 * The Tx ring is used because the rx_ring is NULL for XDP queues 1848 */ 1849 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1850 } 1851 1852 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1853 struct ena_ring *rx_ring) 1854 { 1855 int cpu = get_cpu(); 1856 int numa_node; 1857 1858 /* Check only one ring since the 2 rings are running on the same cpu */ 1859 if (likely(tx_ring->cpu == cpu)) 1860 goto out; 1861 1862 numa_node = cpu_to_node(cpu); 1863 put_cpu(); 1864 1865 if (numa_node != NUMA_NO_NODE) { 1866 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1867 if (rx_ring) 1868 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1869 numa_node); 1870 } 1871 1872 tx_ring->cpu = cpu; 1873 if (rx_ring) 1874 rx_ring->cpu = cpu; 1875 1876 return; 1877 out: 1878 put_cpu(); 1879 } 1880 1881 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1882 { 1883 u32 total_done = 0; 1884 u16 next_to_clean; 1885 u32 tx_bytes = 0; 1886 int tx_pkts = 0; 1887 u16 req_id; 1888 int rc; 1889 1890 if (unlikely(!xdp_ring)) 1891 return 0; 1892 next_to_clean = xdp_ring->next_to_clean; 1893 1894 while (tx_pkts < budget) { 1895 struct ena_tx_buffer *tx_info; 1896 struct xdp_frame *xdpf; 1897 1898 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1899 &req_id); 1900 if (rc) 1901 break; 1902 1903 rc = validate_xdp_req_id(xdp_ring, req_id); 1904 if (rc) 1905 break; 1906 1907 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1908 xdpf = tx_info->xdpf; 1909 1910 tx_info->xdpf = NULL; 1911 tx_info->last_jiffies = 0; 1912 ena_unmap_tx_buff(xdp_ring, tx_info); 1913 1914 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1915 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1916 xdpf); 1917 1918 tx_bytes += xdpf->len; 1919 tx_pkts++; 1920 total_done += tx_info->tx_descs; 1921 1922 xdp_return_frame(xdpf); 1923 xdp_ring->free_ids[next_to_clean] = req_id; 1924 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1925 xdp_ring->ring_size); 1926 } 1927 1928 xdp_ring->next_to_clean = next_to_clean; 1929 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1930 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1931 1932 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1933 "tx_poll: q %d done. total pkts: %d\n", 1934 xdp_ring->qid, tx_pkts); 1935 1936 return tx_pkts; 1937 } 1938 1939 static int ena_io_poll(struct napi_struct *napi, int budget) 1940 { 1941 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1942 struct ena_ring *tx_ring, *rx_ring; 1943 int tx_work_done; 1944 int rx_work_done = 0; 1945 int tx_budget; 1946 int napi_comp_call = 0; 1947 int ret; 1948 1949 tx_ring = ena_napi->tx_ring; 1950 rx_ring = ena_napi->rx_ring; 1951 1952 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1953 1954 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1955 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1956 napi_complete_done(napi, 0); 1957 return 0; 1958 } 1959 1960 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1961 /* On netpoll the budget is zero and the handler should only clean the 1962 * tx completions. 1963 */ 1964 if (likely(budget)) 1965 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1966 1967 /* If the device is about to reset or down, avoid unmask 1968 * the interrupt and return 0 so NAPI won't reschedule 1969 */ 1970 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1971 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1972 napi_complete_done(napi, 0); 1973 ret = 0; 1974 1975 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1976 napi_comp_call = 1; 1977 1978 /* Update numa and unmask the interrupt only when schedule 1979 * from the interrupt context (vs from sk_busy_loop) 1980 */ 1981 if (napi_complete_done(napi, rx_work_done) && 1982 READ_ONCE(ena_napi->interrupts_masked)) { 1983 smp_rmb(); /* make sure interrupts_masked is read */ 1984 WRITE_ONCE(ena_napi->interrupts_masked, false); 1985 /* We apply adaptive moderation on Rx path only. 1986 * Tx uses static interrupt moderation. 1987 */ 1988 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1989 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1990 1991 ena_unmask_interrupt(tx_ring, rx_ring); 1992 } 1993 1994 ena_update_ring_numa_node(tx_ring, rx_ring); 1995 1996 ret = rx_work_done; 1997 } else { 1998 ret = budget; 1999 } 2000 2001 u64_stats_update_begin(&tx_ring->syncp); 2002 tx_ring->tx_stats.napi_comp += napi_comp_call; 2003 tx_ring->tx_stats.tx_poll++; 2004 u64_stats_update_end(&tx_ring->syncp); 2005 2006 tx_ring->tx_stats.last_napi_jiffies = jiffies; 2007 2008 return ret; 2009 } 2010 2011 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 2012 { 2013 struct ena_adapter *adapter = (struct ena_adapter *)data; 2014 2015 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 2016 2017 /* Don't call the aenq handler before probe is done */ 2018 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 2019 ena_com_aenq_intr_handler(adapter->ena_dev, data); 2020 2021 return IRQ_HANDLED; 2022 } 2023 2024 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 2025 * @irq: interrupt number 2026 * @data: pointer to a network interface private napi device structure 2027 */ 2028 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2029 { 2030 struct ena_napi *ena_napi = data; 2031 2032 /* Used to check HW health */ 2033 WRITE_ONCE(ena_napi->first_interrupt, true); 2034 2035 WRITE_ONCE(ena_napi->interrupts_masked, true); 2036 smp_wmb(); /* write interrupts_masked before calling napi */ 2037 2038 napi_schedule_irqoff(&ena_napi->napi); 2039 2040 return IRQ_HANDLED; 2041 } 2042 2043 /* Reserve a single MSI-X vector for management (admin + aenq). 2044 * plus reserve one vector for each potential io queue. 2045 * the number of potential io queues is the minimum of what the device 2046 * supports and the number of vCPUs. 2047 */ 2048 static int ena_enable_msix(struct ena_adapter *adapter) 2049 { 2050 int msix_vecs, irq_cnt; 2051 2052 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2053 netif_err(adapter, probe, adapter->netdev, 2054 "Error, MSI-X is already enabled\n"); 2055 return -EPERM; 2056 } 2057 2058 /* Reserved the max msix vectors we might need */ 2059 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2060 netif_dbg(adapter, probe, adapter->netdev, 2061 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2062 2063 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2064 msix_vecs, PCI_IRQ_MSIX); 2065 2066 if (irq_cnt < 0) { 2067 netif_err(adapter, probe, adapter->netdev, 2068 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2069 return -ENOSPC; 2070 } 2071 2072 if (irq_cnt != msix_vecs) { 2073 netif_notice(adapter, probe, adapter->netdev, 2074 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2075 irq_cnt, msix_vecs); 2076 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2077 } 2078 2079 if (ena_init_rx_cpu_rmap(adapter)) 2080 netif_warn(adapter, probe, adapter->netdev, 2081 "Failed to map IRQs to CPUs\n"); 2082 2083 adapter->msix_vecs = irq_cnt; 2084 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2085 2086 return 0; 2087 } 2088 2089 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2090 { 2091 u32 cpu; 2092 2093 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2094 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2095 pci_name(adapter->pdev)); 2096 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2097 ena_intr_msix_mgmnt; 2098 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2099 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2100 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2101 cpu = cpumask_first(cpu_online_mask); 2102 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2103 cpumask_set_cpu(cpu, 2104 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2105 } 2106 2107 static void ena_setup_io_intr(struct ena_adapter *adapter) 2108 { 2109 struct net_device *netdev; 2110 int irq_idx, i, cpu; 2111 int io_queue_count; 2112 2113 netdev = adapter->netdev; 2114 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2115 2116 for (i = 0; i < io_queue_count; i++) { 2117 irq_idx = ENA_IO_IRQ_IDX(i); 2118 cpu = i % num_online_cpus(); 2119 2120 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2121 "%s-Tx-Rx-%d", netdev->name, i); 2122 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2123 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2124 adapter->irq_tbl[irq_idx].vector = 2125 pci_irq_vector(adapter->pdev, irq_idx); 2126 adapter->irq_tbl[irq_idx].cpu = cpu; 2127 2128 cpumask_set_cpu(cpu, 2129 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2130 } 2131 } 2132 2133 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2134 { 2135 unsigned long flags = 0; 2136 struct ena_irq *irq; 2137 int rc; 2138 2139 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2140 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2141 irq->data); 2142 if (rc) { 2143 netif_err(adapter, probe, adapter->netdev, 2144 "Failed to request admin irq\n"); 2145 return rc; 2146 } 2147 2148 netif_dbg(adapter, probe, adapter->netdev, 2149 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2150 irq->affinity_hint_mask.bits[0], irq->vector); 2151 2152 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2153 2154 return rc; 2155 } 2156 2157 static int ena_request_io_irq(struct ena_adapter *adapter) 2158 { 2159 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2160 unsigned long flags = 0; 2161 struct ena_irq *irq; 2162 int rc = 0, i, k; 2163 2164 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2165 netif_err(adapter, ifup, adapter->netdev, 2166 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2167 return -EINVAL; 2168 } 2169 2170 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2171 irq = &adapter->irq_tbl[i]; 2172 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2173 irq->data); 2174 if (rc) { 2175 netif_err(adapter, ifup, adapter->netdev, 2176 "Failed to request I/O IRQ. index %d rc %d\n", 2177 i, rc); 2178 goto err; 2179 } 2180 2181 netif_dbg(adapter, ifup, adapter->netdev, 2182 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2183 i, irq->affinity_hint_mask.bits[0], irq->vector); 2184 2185 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2186 } 2187 2188 return rc; 2189 2190 err: 2191 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2192 irq = &adapter->irq_tbl[k]; 2193 free_irq(irq->vector, irq->data); 2194 } 2195 2196 return rc; 2197 } 2198 2199 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2200 { 2201 struct ena_irq *irq; 2202 2203 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2204 synchronize_irq(irq->vector); 2205 irq_set_affinity_hint(irq->vector, NULL); 2206 free_irq(irq->vector, irq->data); 2207 } 2208 2209 static void ena_free_io_irq(struct ena_adapter *adapter) 2210 { 2211 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2212 struct ena_irq *irq; 2213 int i; 2214 2215 #ifdef CONFIG_RFS_ACCEL 2216 if (adapter->msix_vecs >= 1) { 2217 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2218 adapter->netdev->rx_cpu_rmap = NULL; 2219 } 2220 #endif /* CONFIG_RFS_ACCEL */ 2221 2222 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2223 irq = &adapter->irq_tbl[i]; 2224 irq_set_affinity_hint(irq->vector, NULL); 2225 free_irq(irq->vector, irq->data); 2226 } 2227 } 2228 2229 static void ena_disable_msix(struct ena_adapter *adapter) 2230 { 2231 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2232 pci_free_irq_vectors(adapter->pdev); 2233 } 2234 2235 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2236 { 2237 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2238 int i; 2239 2240 if (!netif_running(adapter->netdev)) 2241 return; 2242 2243 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2244 synchronize_irq(adapter->irq_tbl[i].vector); 2245 } 2246 2247 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2248 int first_index, 2249 int count) 2250 { 2251 int i; 2252 2253 for (i = first_index; i < first_index + count; i++) { 2254 netif_napi_del(&adapter->ena_napi[i].napi); 2255 2256 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2257 adapter->ena_napi[i].xdp_ring); 2258 } 2259 } 2260 2261 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2262 int first_index, int count) 2263 { 2264 int i; 2265 2266 for (i = first_index; i < first_index + count; i++) { 2267 struct ena_napi *napi = &adapter->ena_napi[i]; 2268 2269 netif_napi_add(adapter->netdev, 2270 &napi->napi, 2271 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2272 ENA_NAPI_BUDGET); 2273 2274 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2275 napi->rx_ring = &adapter->rx_ring[i]; 2276 napi->tx_ring = &adapter->tx_ring[i]; 2277 } else { 2278 napi->xdp_ring = &adapter->tx_ring[i]; 2279 } 2280 napi->qid = i; 2281 } 2282 } 2283 2284 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2285 int first_index, 2286 int count) 2287 { 2288 int i; 2289 2290 for (i = first_index; i < first_index + count; i++) 2291 napi_disable(&adapter->ena_napi[i].napi); 2292 } 2293 2294 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2295 int first_index, 2296 int count) 2297 { 2298 int i; 2299 2300 for (i = first_index; i < first_index + count; i++) 2301 napi_enable(&adapter->ena_napi[i].napi); 2302 } 2303 2304 /* Configure the Rx forwarding */ 2305 static int ena_rss_configure(struct ena_adapter *adapter) 2306 { 2307 struct ena_com_dev *ena_dev = adapter->ena_dev; 2308 int rc; 2309 2310 /* In case the RSS table wasn't initialized by probe */ 2311 if (!ena_dev->rss.tbl_log_size) { 2312 rc = ena_rss_init_default(adapter); 2313 if (rc && (rc != -EOPNOTSUPP)) { 2314 netif_err(adapter, ifup, adapter->netdev, 2315 "Failed to init RSS rc: %d\n", rc); 2316 return rc; 2317 } 2318 } 2319 2320 /* Set indirect table */ 2321 rc = ena_com_indirect_table_set(ena_dev); 2322 if (unlikely(rc && rc != -EOPNOTSUPP)) 2323 return rc; 2324 2325 /* Configure hash function (if supported) */ 2326 rc = ena_com_set_hash_function(ena_dev); 2327 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2328 return rc; 2329 2330 /* Configure hash inputs (if supported) */ 2331 rc = ena_com_set_hash_ctrl(ena_dev); 2332 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2333 return rc; 2334 2335 return 0; 2336 } 2337 2338 static int ena_up_complete(struct ena_adapter *adapter) 2339 { 2340 int rc; 2341 2342 rc = ena_rss_configure(adapter); 2343 if (rc) 2344 return rc; 2345 2346 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2347 2348 ena_refill_all_rx_bufs(adapter); 2349 2350 /* enable transmits */ 2351 netif_tx_start_all_queues(adapter->netdev); 2352 2353 ena_napi_enable_in_range(adapter, 2354 0, 2355 adapter->xdp_num_queues + adapter->num_io_queues); 2356 2357 return 0; 2358 } 2359 2360 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2361 { 2362 struct ena_com_create_io_ctx ctx; 2363 struct ena_com_dev *ena_dev; 2364 struct ena_ring *tx_ring; 2365 u32 msix_vector; 2366 u16 ena_qid; 2367 int rc; 2368 2369 ena_dev = adapter->ena_dev; 2370 2371 tx_ring = &adapter->tx_ring[qid]; 2372 msix_vector = ENA_IO_IRQ_IDX(qid); 2373 ena_qid = ENA_IO_TXQ_IDX(qid); 2374 2375 memset(&ctx, 0x0, sizeof(ctx)); 2376 2377 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2378 ctx.qid = ena_qid; 2379 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2380 ctx.msix_vector = msix_vector; 2381 ctx.queue_size = tx_ring->ring_size; 2382 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2383 2384 rc = ena_com_create_io_queue(ena_dev, &ctx); 2385 if (rc) { 2386 netif_err(adapter, ifup, adapter->netdev, 2387 "Failed to create I/O TX queue num %d rc: %d\n", 2388 qid, rc); 2389 return rc; 2390 } 2391 2392 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2393 &tx_ring->ena_com_io_sq, 2394 &tx_ring->ena_com_io_cq); 2395 if (rc) { 2396 netif_err(adapter, ifup, adapter->netdev, 2397 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2398 qid, rc); 2399 ena_com_destroy_io_queue(ena_dev, ena_qid); 2400 return rc; 2401 } 2402 2403 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2404 return rc; 2405 } 2406 2407 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2408 int first_index, int count) 2409 { 2410 struct ena_com_dev *ena_dev = adapter->ena_dev; 2411 int rc, i; 2412 2413 for (i = first_index; i < first_index + count; i++) { 2414 rc = ena_create_io_tx_queue(adapter, i); 2415 if (rc) 2416 goto create_err; 2417 } 2418 2419 return 0; 2420 2421 create_err: 2422 while (i-- > first_index) 2423 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2424 2425 return rc; 2426 } 2427 2428 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2429 { 2430 struct ena_com_dev *ena_dev; 2431 struct ena_com_create_io_ctx ctx; 2432 struct ena_ring *rx_ring; 2433 u32 msix_vector; 2434 u16 ena_qid; 2435 int rc; 2436 2437 ena_dev = adapter->ena_dev; 2438 2439 rx_ring = &adapter->rx_ring[qid]; 2440 msix_vector = ENA_IO_IRQ_IDX(qid); 2441 ena_qid = ENA_IO_RXQ_IDX(qid); 2442 2443 memset(&ctx, 0x0, sizeof(ctx)); 2444 2445 ctx.qid = ena_qid; 2446 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2447 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2448 ctx.msix_vector = msix_vector; 2449 ctx.queue_size = rx_ring->ring_size; 2450 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2451 2452 rc = ena_com_create_io_queue(ena_dev, &ctx); 2453 if (rc) { 2454 netif_err(adapter, ifup, adapter->netdev, 2455 "Failed to create I/O RX queue num %d rc: %d\n", 2456 qid, rc); 2457 return rc; 2458 } 2459 2460 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2461 &rx_ring->ena_com_io_sq, 2462 &rx_ring->ena_com_io_cq); 2463 if (rc) { 2464 netif_err(adapter, ifup, adapter->netdev, 2465 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2466 qid, rc); 2467 goto err; 2468 } 2469 2470 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2471 2472 return rc; 2473 err: 2474 ena_com_destroy_io_queue(ena_dev, ena_qid); 2475 return rc; 2476 } 2477 2478 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2479 { 2480 struct ena_com_dev *ena_dev = adapter->ena_dev; 2481 int rc, i; 2482 2483 for (i = 0; i < adapter->num_io_queues; i++) { 2484 rc = ena_create_io_rx_queue(adapter, i); 2485 if (rc) 2486 goto create_err; 2487 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2488 } 2489 2490 return 0; 2491 2492 create_err: 2493 while (i--) { 2494 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2495 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2496 } 2497 2498 return rc; 2499 } 2500 2501 static void set_io_rings_size(struct ena_adapter *adapter, 2502 int new_tx_size, 2503 int new_rx_size) 2504 { 2505 int i; 2506 2507 for (i = 0; i < adapter->num_io_queues; i++) { 2508 adapter->tx_ring[i].ring_size = new_tx_size; 2509 adapter->rx_ring[i].ring_size = new_rx_size; 2510 } 2511 } 2512 2513 /* This function allows queue allocation to backoff when the system is 2514 * low on memory. If there is not enough memory to allocate io queues 2515 * the driver will try to allocate smaller queues. 2516 * 2517 * The backoff algorithm is as follows: 2518 * 1. Try to allocate TX and RX and if successful. 2519 * 1.1. return success 2520 * 2521 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2522 * 2523 * 3. If TX or RX is smaller than 256 2524 * 3.1. return failure. 2525 * 4. else 2526 * 4.1. go back to 1. 2527 */ 2528 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2529 { 2530 int rc, cur_rx_ring_size, cur_tx_ring_size; 2531 int new_rx_ring_size, new_tx_ring_size; 2532 2533 /* current queue sizes might be set to smaller than the requested 2534 * ones due to past queue allocation failures. 2535 */ 2536 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2537 adapter->requested_rx_ring_size); 2538 2539 while (1) { 2540 if (ena_xdp_present(adapter)) { 2541 rc = ena_setup_and_create_all_xdp_queues(adapter); 2542 2543 if (rc) 2544 goto err_setup_tx; 2545 } 2546 rc = ena_setup_tx_resources_in_range(adapter, 2547 0, 2548 adapter->num_io_queues); 2549 if (rc) 2550 goto err_setup_tx; 2551 2552 rc = ena_create_io_tx_queues_in_range(adapter, 2553 0, 2554 adapter->num_io_queues); 2555 if (rc) 2556 goto err_create_tx_queues; 2557 2558 rc = ena_setup_all_rx_resources(adapter); 2559 if (rc) 2560 goto err_setup_rx; 2561 2562 rc = ena_create_all_io_rx_queues(adapter); 2563 if (rc) 2564 goto err_create_rx_queues; 2565 2566 return 0; 2567 2568 err_create_rx_queues: 2569 ena_free_all_io_rx_resources(adapter); 2570 err_setup_rx: 2571 ena_destroy_all_tx_queues(adapter); 2572 err_create_tx_queues: 2573 ena_free_all_io_tx_resources(adapter); 2574 err_setup_tx: 2575 if (rc != -ENOMEM) { 2576 netif_err(adapter, ifup, adapter->netdev, 2577 "Queue creation failed with error code %d\n", 2578 rc); 2579 return rc; 2580 } 2581 2582 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2583 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2584 2585 netif_err(adapter, ifup, adapter->netdev, 2586 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2587 cur_tx_ring_size, cur_rx_ring_size); 2588 2589 new_tx_ring_size = cur_tx_ring_size; 2590 new_rx_ring_size = cur_rx_ring_size; 2591 2592 /* Decrease the size of the larger queue, or 2593 * decrease both if they are the same size. 2594 */ 2595 if (cur_rx_ring_size <= cur_tx_ring_size) 2596 new_tx_ring_size = cur_tx_ring_size / 2; 2597 if (cur_rx_ring_size >= cur_tx_ring_size) 2598 new_rx_ring_size = cur_rx_ring_size / 2; 2599 2600 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2601 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2602 netif_err(adapter, ifup, adapter->netdev, 2603 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2604 ENA_MIN_RING_SIZE); 2605 return rc; 2606 } 2607 2608 netif_err(adapter, ifup, adapter->netdev, 2609 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2610 new_tx_ring_size, 2611 new_rx_ring_size); 2612 2613 set_io_rings_size(adapter, new_tx_ring_size, 2614 new_rx_ring_size); 2615 } 2616 } 2617 2618 static int ena_up(struct ena_adapter *adapter) 2619 { 2620 int io_queue_count, rc, i; 2621 2622 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2623 2624 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2625 ena_setup_io_intr(adapter); 2626 2627 /* napi poll functions should be initialized before running 2628 * request_irq(), to handle a rare condition where there is a pending 2629 * interrupt, causing the ISR to fire immediately while the poll 2630 * function wasn't set yet, causing a null dereference 2631 */ 2632 ena_init_napi_in_range(adapter, 0, io_queue_count); 2633 2634 rc = ena_request_io_irq(adapter); 2635 if (rc) 2636 goto err_req_irq; 2637 2638 rc = create_queues_with_size_backoff(adapter); 2639 if (rc) 2640 goto err_create_queues_with_backoff; 2641 2642 rc = ena_up_complete(adapter); 2643 if (rc) 2644 goto err_up; 2645 2646 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2647 netif_carrier_on(adapter->netdev); 2648 2649 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2650 &adapter->syncp); 2651 2652 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2653 2654 /* Enable completion queues interrupt */ 2655 for (i = 0; i < adapter->num_io_queues; i++) 2656 ena_unmask_interrupt(&adapter->tx_ring[i], 2657 &adapter->rx_ring[i]); 2658 2659 /* schedule napi in case we had pending packets 2660 * from the last time we disable napi 2661 */ 2662 for (i = 0; i < io_queue_count; i++) 2663 napi_schedule(&adapter->ena_napi[i].napi); 2664 2665 return rc; 2666 2667 err_up: 2668 ena_destroy_all_tx_queues(adapter); 2669 ena_free_all_io_tx_resources(adapter); 2670 ena_destroy_all_rx_queues(adapter); 2671 ena_free_all_io_rx_resources(adapter); 2672 err_create_queues_with_backoff: 2673 ena_free_io_irq(adapter); 2674 err_req_irq: 2675 ena_del_napi_in_range(adapter, 0, io_queue_count); 2676 2677 return rc; 2678 } 2679 2680 static void ena_down(struct ena_adapter *adapter) 2681 { 2682 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2683 2684 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2685 2686 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2687 2688 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2689 &adapter->syncp); 2690 2691 netif_carrier_off(adapter->netdev); 2692 netif_tx_disable(adapter->netdev); 2693 2694 /* After this point the napi handler won't enable the tx queue */ 2695 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2696 2697 /* After destroy the queue there won't be any new interrupts */ 2698 2699 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2700 int rc; 2701 2702 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2703 if (rc) 2704 netif_err(adapter, ifdown, adapter->netdev, 2705 "Device reset failed\n"); 2706 /* stop submitting admin commands on a device that was reset */ 2707 ena_com_set_admin_running_state(adapter->ena_dev, false); 2708 } 2709 2710 ena_destroy_all_io_queues(adapter); 2711 2712 ena_disable_io_intr_sync(adapter); 2713 ena_free_io_irq(adapter); 2714 ena_del_napi_in_range(adapter, 0, io_queue_count); 2715 2716 ena_free_all_tx_bufs(adapter); 2717 ena_free_all_rx_bufs(adapter); 2718 ena_free_all_io_tx_resources(adapter); 2719 ena_free_all_io_rx_resources(adapter); 2720 } 2721 2722 /* ena_open - Called when a network interface is made active 2723 * @netdev: network interface device structure 2724 * 2725 * Returns 0 on success, negative value on failure 2726 * 2727 * The open entry point is called when a network interface is made 2728 * active by the system (IFF_UP). At this point all resources needed 2729 * for transmit and receive operations are allocated, the interrupt 2730 * handler is registered with the OS, the watchdog timer is started, 2731 * and the stack is notified that the interface is ready. 2732 */ 2733 static int ena_open(struct net_device *netdev) 2734 { 2735 struct ena_adapter *adapter = netdev_priv(netdev); 2736 int rc; 2737 2738 /* Notify the stack of the actual queue counts. */ 2739 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2740 if (rc) { 2741 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2742 return rc; 2743 } 2744 2745 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2746 if (rc) { 2747 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2748 return rc; 2749 } 2750 2751 rc = ena_up(adapter); 2752 if (rc) 2753 return rc; 2754 2755 return rc; 2756 } 2757 2758 /* ena_close - Disables a network interface 2759 * @netdev: network interface device structure 2760 * 2761 * Returns 0, this is not allowed to fail 2762 * 2763 * The close entry point is called when an interface is de-activated 2764 * by the OS. The hardware is still under the drivers control, but 2765 * needs to be disabled. A global MAC reset is issued to stop the 2766 * hardware, and all transmit and receive resources are freed. 2767 */ 2768 static int ena_close(struct net_device *netdev) 2769 { 2770 struct ena_adapter *adapter = netdev_priv(netdev); 2771 2772 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2773 2774 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2775 return 0; 2776 2777 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2778 ena_down(adapter); 2779 2780 /* Check for device status and issue reset if needed*/ 2781 check_for_admin_com_state(adapter); 2782 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2783 netif_err(adapter, ifdown, adapter->netdev, 2784 "Destroy failure, restarting device\n"); 2785 ena_dump_stats_to_dmesg(adapter); 2786 /* rtnl lock already obtained in dev_ioctl() layer */ 2787 ena_destroy_device(adapter, false); 2788 ena_restore_device(adapter); 2789 } 2790 2791 return 0; 2792 } 2793 2794 int ena_update_queue_sizes(struct ena_adapter *adapter, 2795 u32 new_tx_size, 2796 u32 new_rx_size) 2797 { 2798 bool dev_was_up; 2799 2800 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2801 ena_close(adapter->netdev); 2802 adapter->requested_tx_ring_size = new_tx_size; 2803 adapter->requested_rx_ring_size = new_rx_size; 2804 ena_init_io_rings(adapter, 2805 0, 2806 adapter->xdp_num_queues + 2807 adapter->num_io_queues); 2808 return dev_was_up ? ena_up(adapter) : 0; 2809 } 2810 2811 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2812 { 2813 struct ena_com_dev *ena_dev = adapter->ena_dev; 2814 int prev_channel_count; 2815 bool dev_was_up; 2816 2817 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2818 ena_close(adapter->netdev); 2819 prev_channel_count = adapter->num_io_queues; 2820 adapter->num_io_queues = new_channel_count; 2821 if (ena_xdp_present(adapter) && 2822 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2823 adapter->xdp_first_ring = new_channel_count; 2824 adapter->xdp_num_queues = new_channel_count; 2825 if (prev_channel_count > new_channel_count) 2826 ena_xdp_exchange_program_rx_in_range(adapter, 2827 NULL, 2828 new_channel_count, 2829 prev_channel_count); 2830 else 2831 ena_xdp_exchange_program_rx_in_range(adapter, 2832 adapter->xdp_bpf_prog, 2833 prev_channel_count, 2834 new_channel_count); 2835 } 2836 2837 /* We need to destroy the rss table so that the indirection 2838 * table will be reinitialized by ena_up() 2839 */ 2840 ena_com_rss_destroy(ena_dev); 2841 ena_init_io_rings(adapter, 2842 0, 2843 adapter->xdp_num_queues + 2844 adapter->num_io_queues); 2845 return dev_was_up ? ena_open(adapter->netdev) : 0; 2846 } 2847 2848 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2849 struct sk_buff *skb, 2850 bool disable_meta_caching) 2851 { 2852 u32 mss = skb_shinfo(skb)->gso_size; 2853 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2854 u8 l4_protocol = 0; 2855 2856 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2857 ena_tx_ctx->l4_csum_enable = 1; 2858 if (mss) { 2859 ena_tx_ctx->tso_enable = 1; 2860 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2861 ena_tx_ctx->l4_csum_partial = 0; 2862 } else { 2863 ena_tx_ctx->tso_enable = 0; 2864 ena_meta->l4_hdr_len = 0; 2865 ena_tx_ctx->l4_csum_partial = 1; 2866 } 2867 2868 switch (ip_hdr(skb)->version) { 2869 case IPVERSION: 2870 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2871 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2872 ena_tx_ctx->df = 1; 2873 if (mss) 2874 ena_tx_ctx->l3_csum_enable = 1; 2875 l4_protocol = ip_hdr(skb)->protocol; 2876 break; 2877 case 6: 2878 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2879 l4_protocol = ipv6_hdr(skb)->nexthdr; 2880 break; 2881 default: 2882 break; 2883 } 2884 2885 if (l4_protocol == IPPROTO_TCP) 2886 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2887 else 2888 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2889 2890 ena_meta->mss = mss; 2891 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2892 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2893 ena_tx_ctx->meta_valid = 1; 2894 } else if (disable_meta_caching) { 2895 memset(ena_meta, 0, sizeof(*ena_meta)); 2896 ena_tx_ctx->meta_valid = 1; 2897 } else { 2898 ena_tx_ctx->meta_valid = 0; 2899 } 2900 } 2901 2902 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2903 struct sk_buff *skb) 2904 { 2905 int num_frags, header_len, rc; 2906 2907 num_frags = skb_shinfo(skb)->nr_frags; 2908 header_len = skb_headlen(skb); 2909 2910 if (num_frags < tx_ring->sgl_size) 2911 return 0; 2912 2913 if ((num_frags == tx_ring->sgl_size) && 2914 (header_len < tx_ring->tx_max_header_size)) 2915 return 0; 2916 2917 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2918 2919 rc = skb_linearize(skb); 2920 if (unlikely(rc)) { 2921 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2922 &tx_ring->syncp); 2923 } 2924 2925 return rc; 2926 } 2927 2928 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2929 struct ena_tx_buffer *tx_info, 2930 struct sk_buff *skb, 2931 void **push_hdr, 2932 u16 *header_len) 2933 { 2934 struct ena_adapter *adapter = tx_ring->adapter; 2935 struct ena_com_buf *ena_buf; 2936 dma_addr_t dma; 2937 u32 skb_head_len, frag_len, last_frag; 2938 u16 push_len = 0; 2939 u16 delta = 0; 2940 int i = 0; 2941 2942 skb_head_len = skb_headlen(skb); 2943 tx_info->skb = skb; 2944 ena_buf = tx_info->bufs; 2945 2946 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2947 /* When the device is LLQ mode, the driver will copy 2948 * the header into the device memory space. 2949 * the ena_com layer assume the header is in a linear 2950 * memory space. 2951 * This assumption might be wrong since part of the header 2952 * can be in the fragmented buffers. 2953 * Use skb_header_pointer to make sure the header is in a 2954 * linear memory space. 2955 */ 2956 2957 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2958 *push_hdr = skb_header_pointer(skb, 0, push_len, 2959 tx_ring->push_buf_intermediate_buf); 2960 *header_len = push_len; 2961 if (unlikely(skb->data != *push_hdr)) { 2962 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 2963 &tx_ring->syncp); 2964 2965 delta = push_len - skb_head_len; 2966 } 2967 } else { 2968 *push_hdr = NULL; 2969 *header_len = min_t(u32, skb_head_len, 2970 tx_ring->tx_max_header_size); 2971 } 2972 2973 netif_dbg(adapter, tx_queued, adapter->netdev, 2974 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2975 *push_hdr, push_len); 2976 2977 if (skb_head_len > push_len) { 2978 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2979 skb_head_len - push_len, DMA_TO_DEVICE); 2980 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2981 goto error_report_dma_error; 2982 2983 ena_buf->paddr = dma; 2984 ena_buf->len = skb_head_len - push_len; 2985 2986 ena_buf++; 2987 tx_info->num_of_bufs++; 2988 tx_info->map_linear_data = 1; 2989 } else { 2990 tx_info->map_linear_data = 0; 2991 } 2992 2993 last_frag = skb_shinfo(skb)->nr_frags; 2994 2995 for (i = 0; i < last_frag; i++) { 2996 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2997 2998 frag_len = skb_frag_size(frag); 2999 3000 if (unlikely(delta >= frag_len)) { 3001 delta -= frag_len; 3002 continue; 3003 } 3004 3005 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 3006 frag_len - delta, DMA_TO_DEVICE); 3007 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 3008 goto error_report_dma_error; 3009 3010 ena_buf->paddr = dma; 3011 ena_buf->len = frag_len - delta; 3012 ena_buf++; 3013 tx_info->num_of_bufs++; 3014 delta = 0; 3015 } 3016 3017 return 0; 3018 3019 error_report_dma_error: 3020 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 3021 &tx_ring->syncp); 3022 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 3023 3024 tx_info->skb = NULL; 3025 3026 tx_info->num_of_bufs += i; 3027 ena_unmap_tx_buff(tx_ring, tx_info); 3028 3029 return -EINVAL; 3030 } 3031 3032 /* Called with netif_tx_lock. */ 3033 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3034 { 3035 struct ena_adapter *adapter = netdev_priv(dev); 3036 struct ena_tx_buffer *tx_info; 3037 struct ena_com_tx_ctx ena_tx_ctx; 3038 struct ena_ring *tx_ring; 3039 struct netdev_queue *txq; 3040 void *push_hdr; 3041 u16 next_to_use, req_id, header_len; 3042 int qid, rc; 3043 3044 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3045 /* Determine which tx ring we will be placed on */ 3046 qid = skb_get_queue_mapping(skb); 3047 tx_ring = &adapter->tx_ring[qid]; 3048 txq = netdev_get_tx_queue(dev, qid); 3049 3050 rc = ena_check_and_linearize_skb(tx_ring, skb); 3051 if (unlikely(rc)) 3052 goto error_drop_packet; 3053 3054 skb_tx_timestamp(skb); 3055 3056 next_to_use = tx_ring->next_to_use; 3057 req_id = tx_ring->free_ids[next_to_use]; 3058 tx_info = &tx_ring->tx_buffer_info[req_id]; 3059 tx_info->num_of_bufs = 0; 3060 3061 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3062 3063 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3064 if (unlikely(rc)) 3065 goto error_drop_packet; 3066 3067 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3068 ena_tx_ctx.ena_bufs = tx_info->bufs; 3069 ena_tx_ctx.push_header = push_hdr; 3070 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3071 ena_tx_ctx.req_id = req_id; 3072 ena_tx_ctx.header_len = header_len; 3073 3074 /* set flags and meta data */ 3075 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3076 3077 rc = ena_xmit_common(dev, 3078 tx_ring, 3079 tx_info, 3080 &ena_tx_ctx, 3081 next_to_use, 3082 skb->len); 3083 if (rc) 3084 goto error_unmap_dma; 3085 3086 netdev_tx_sent_queue(txq, skb->len); 3087 3088 /* stop the queue when no more space available, the packet can have up 3089 * to sgl_size + 2. one for the meta descriptor and one for header 3090 * (if the header is larger than tx_max_header_size). 3091 */ 3092 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3093 tx_ring->sgl_size + 2))) { 3094 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3095 __func__, qid); 3096 3097 netif_tx_stop_queue(txq); 3098 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3099 &tx_ring->syncp); 3100 3101 /* There is a rare condition where this function decide to 3102 * stop the queue but meanwhile clean_tx_irq updates 3103 * next_to_completion and terminates. 3104 * The queue will remain stopped forever. 3105 * To solve this issue add a mb() to make sure that 3106 * netif_tx_stop_queue() write is vissible before checking if 3107 * there is additional space in the queue. 3108 */ 3109 smp_mb(); 3110 3111 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3112 ENA_TX_WAKEUP_THRESH)) { 3113 netif_tx_wake_queue(txq); 3114 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3115 &tx_ring->syncp); 3116 } 3117 } 3118 3119 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) 3120 /* trigger the dma engine. ena_ring_tx_doorbell() 3121 * calls a memory barrier inside it. 3122 */ 3123 ena_ring_tx_doorbell(tx_ring); 3124 3125 return NETDEV_TX_OK; 3126 3127 error_unmap_dma: 3128 ena_unmap_tx_buff(tx_ring, tx_info); 3129 tx_info->skb = NULL; 3130 3131 error_drop_packet: 3132 dev_kfree_skb(skb); 3133 return NETDEV_TX_OK; 3134 } 3135 3136 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3137 struct net_device *sb_dev) 3138 { 3139 u16 qid; 3140 /* we suspect that this is good for in--kernel network services that 3141 * want to loop incoming skb rx to tx in normal user generated traffic, 3142 * most probably we will not get to this 3143 */ 3144 if (skb_rx_queue_recorded(skb)) 3145 qid = skb_get_rx_queue(skb); 3146 else 3147 qid = netdev_pick_tx(dev, skb, NULL); 3148 3149 return qid; 3150 } 3151 3152 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3153 { 3154 struct device *dev = &pdev->dev; 3155 struct ena_admin_host_info *host_info; 3156 int rc; 3157 3158 /* Allocate only the host info */ 3159 rc = ena_com_allocate_host_info(ena_dev); 3160 if (rc) { 3161 dev_err(dev, "Cannot allocate host info\n"); 3162 return; 3163 } 3164 3165 host_info = ena_dev->host_attr.host_info; 3166 3167 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3168 host_info->os_type = ENA_ADMIN_OS_LINUX; 3169 host_info->kernel_ver = LINUX_VERSION_CODE; 3170 strlcpy(host_info->kernel_ver_str, utsname()->version, 3171 sizeof(host_info->kernel_ver_str) - 1); 3172 host_info->os_dist = 0; 3173 strncpy(host_info->os_dist_str, utsname()->release, 3174 sizeof(host_info->os_dist_str) - 1); 3175 host_info->driver_version = 3176 (DRV_MODULE_GEN_MAJOR) | 3177 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3178 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3179 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3180 host_info->num_cpus = num_online_cpus(); 3181 3182 host_info->driver_supported_features = 3183 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3184 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3185 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3186 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3187 3188 rc = ena_com_set_host_attributes(ena_dev); 3189 if (rc) { 3190 if (rc == -EOPNOTSUPP) 3191 dev_warn(dev, "Cannot set host attributes\n"); 3192 else 3193 dev_err(dev, "Cannot set host attributes\n"); 3194 3195 goto err; 3196 } 3197 3198 return; 3199 3200 err: 3201 ena_com_delete_host_info(ena_dev); 3202 } 3203 3204 static void ena_config_debug_area(struct ena_adapter *adapter) 3205 { 3206 u32 debug_area_size; 3207 int rc, ss_count; 3208 3209 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3210 if (ss_count <= 0) { 3211 netif_err(adapter, drv, adapter->netdev, 3212 "SS count is negative\n"); 3213 return; 3214 } 3215 3216 /* allocate 32 bytes for each string and 64bit for the value */ 3217 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3218 3219 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3220 if (rc) { 3221 netif_err(adapter, drv, adapter->netdev, 3222 "Cannot allocate debug area\n"); 3223 return; 3224 } 3225 3226 rc = ena_com_set_host_attributes(adapter->ena_dev); 3227 if (rc) { 3228 if (rc == -EOPNOTSUPP) 3229 netif_warn(adapter, drv, adapter->netdev, 3230 "Cannot set host attributes\n"); 3231 else 3232 netif_err(adapter, drv, adapter->netdev, 3233 "Cannot set host attributes\n"); 3234 goto err; 3235 } 3236 3237 return; 3238 err: 3239 ena_com_delete_debug_area(adapter->ena_dev); 3240 } 3241 3242 int ena_update_hw_stats(struct ena_adapter *adapter) 3243 { 3244 int rc = 0; 3245 3246 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3247 if (rc) { 3248 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n"); 3249 return rc; 3250 } 3251 3252 return 0; 3253 } 3254 3255 static void ena_get_stats64(struct net_device *netdev, 3256 struct rtnl_link_stats64 *stats) 3257 { 3258 struct ena_adapter *adapter = netdev_priv(netdev); 3259 struct ena_ring *rx_ring, *tx_ring; 3260 unsigned int start; 3261 u64 rx_drops; 3262 u64 tx_drops; 3263 int i; 3264 3265 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3266 return; 3267 3268 for (i = 0; i < adapter->num_io_queues; i++) { 3269 u64 bytes, packets; 3270 3271 tx_ring = &adapter->tx_ring[i]; 3272 3273 do { 3274 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3275 packets = tx_ring->tx_stats.cnt; 3276 bytes = tx_ring->tx_stats.bytes; 3277 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3278 3279 stats->tx_packets += packets; 3280 stats->tx_bytes += bytes; 3281 3282 rx_ring = &adapter->rx_ring[i]; 3283 3284 do { 3285 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3286 packets = rx_ring->rx_stats.cnt; 3287 bytes = rx_ring->rx_stats.bytes; 3288 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3289 3290 stats->rx_packets += packets; 3291 stats->rx_bytes += bytes; 3292 } 3293 3294 do { 3295 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3296 rx_drops = adapter->dev_stats.rx_drops; 3297 tx_drops = adapter->dev_stats.tx_drops; 3298 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3299 3300 stats->rx_dropped = rx_drops; 3301 stats->tx_dropped = tx_drops; 3302 3303 stats->multicast = 0; 3304 stats->collisions = 0; 3305 3306 stats->rx_length_errors = 0; 3307 stats->rx_crc_errors = 0; 3308 stats->rx_frame_errors = 0; 3309 stats->rx_fifo_errors = 0; 3310 stats->rx_missed_errors = 0; 3311 stats->tx_window_errors = 0; 3312 3313 stats->rx_errors = 0; 3314 stats->tx_errors = 0; 3315 } 3316 3317 static const struct net_device_ops ena_netdev_ops = { 3318 .ndo_open = ena_open, 3319 .ndo_stop = ena_close, 3320 .ndo_start_xmit = ena_start_xmit, 3321 .ndo_select_queue = ena_select_queue, 3322 .ndo_get_stats64 = ena_get_stats64, 3323 .ndo_tx_timeout = ena_tx_timeout, 3324 .ndo_change_mtu = ena_change_mtu, 3325 .ndo_set_mac_address = NULL, 3326 .ndo_validate_addr = eth_validate_addr, 3327 .ndo_bpf = ena_xdp, 3328 .ndo_xdp_xmit = ena_xdp_xmit, 3329 }; 3330 3331 static int ena_device_validate_params(struct ena_adapter *adapter, 3332 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3333 { 3334 struct net_device *netdev = adapter->netdev; 3335 int rc; 3336 3337 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3338 adapter->mac_addr); 3339 if (!rc) { 3340 netif_err(adapter, drv, netdev, 3341 "Error, mac address are different\n"); 3342 return -EINVAL; 3343 } 3344 3345 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3346 netif_err(adapter, drv, netdev, 3347 "Error, device max mtu is smaller than netdev MTU\n"); 3348 return -EINVAL; 3349 } 3350 3351 return 0; 3352 } 3353 3354 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 3355 { 3356 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3357 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3358 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3359 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3360 llq_config->llq_ring_entry_size_value = 128; 3361 } 3362 3363 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3364 struct ena_com_dev *ena_dev, 3365 struct ena_admin_feature_llq_desc *llq, 3366 struct ena_llq_configurations *llq_default_configurations) 3367 { 3368 int rc; 3369 u32 llq_feature_mask; 3370 3371 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3372 if (!(ena_dev->supported_features & llq_feature_mask)) { 3373 dev_warn(&pdev->dev, 3374 "LLQ is not supported Fallback to host mode policy.\n"); 3375 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3376 return 0; 3377 } 3378 3379 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3380 if (unlikely(rc)) { 3381 dev_err(&pdev->dev, 3382 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3383 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3384 } 3385 3386 return 0; 3387 } 3388 3389 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3390 int bars) 3391 { 3392 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3393 3394 if (!has_mem_bar) { 3395 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3396 dev_err(&pdev->dev, 3397 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3398 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3399 } 3400 3401 return 0; 3402 } 3403 3404 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3405 pci_resource_start(pdev, ENA_MEM_BAR), 3406 pci_resource_len(pdev, ENA_MEM_BAR)); 3407 3408 if (!ena_dev->mem_bar) 3409 return -EFAULT; 3410 3411 return 0; 3412 } 3413 3414 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3415 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3416 bool *wd_state) 3417 { 3418 struct ena_llq_configurations llq_config; 3419 struct device *dev = &pdev->dev; 3420 bool readless_supported; 3421 u32 aenq_groups; 3422 int dma_width; 3423 int rc; 3424 3425 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3426 if (rc) { 3427 dev_err(dev, "Failed to init mmio read less\n"); 3428 return rc; 3429 } 3430 3431 /* The PCIe configuration space revision id indicate if mmio reg 3432 * read is disabled 3433 */ 3434 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3435 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3436 3437 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3438 if (rc) { 3439 dev_err(dev, "Can not reset device\n"); 3440 goto err_mmio_read_less; 3441 } 3442 3443 rc = ena_com_validate_version(ena_dev); 3444 if (rc) { 3445 dev_err(dev, "Device version is too low\n"); 3446 goto err_mmio_read_less; 3447 } 3448 3449 dma_width = ena_com_get_dma_width(ena_dev); 3450 if (dma_width < 0) { 3451 dev_err(dev, "Invalid dma width value %d", dma_width); 3452 rc = dma_width; 3453 goto err_mmio_read_less; 3454 } 3455 3456 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3457 if (rc) { 3458 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3459 goto err_mmio_read_less; 3460 } 3461 3462 /* ENA admin level init */ 3463 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3464 if (rc) { 3465 dev_err(dev, 3466 "Can not initialize ena admin queue with device\n"); 3467 goto err_mmio_read_less; 3468 } 3469 3470 /* To enable the msix interrupts the driver needs to know the number 3471 * of queues. So the driver uses polling mode to retrieve this 3472 * information 3473 */ 3474 ena_com_set_admin_polling_mode(ena_dev, true); 3475 3476 ena_config_host_info(ena_dev, pdev); 3477 3478 /* Get Device Attributes*/ 3479 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3480 if (rc) { 3481 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3482 goto err_admin_init; 3483 } 3484 3485 /* Try to turn all the available aenq groups */ 3486 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3487 BIT(ENA_ADMIN_FATAL_ERROR) | 3488 BIT(ENA_ADMIN_WARNING) | 3489 BIT(ENA_ADMIN_NOTIFICATION) | 3490 BIT(ENA_ADMIN_KEEP_ALIVE); 3491 3492 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3493 3494 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3495 if (rc) { 3496 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3497 goto err_admin_init; 3498 } 3499 3500 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3501 3502 set_default_llq_configurations(&llq_config); 3503 3504 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3505 &llq_config); 3506 if (rc) { 3507 dev_err(dev, "ENA device init failed\n"); 3508 goto err_admin_init; 3509 } 3510 3511 return 0; 3512 3513 err_admin_init: 3514 ena_com_delete_host_info(ena_dev); 3515 ena_com_admin_destroy(ena_dev); 3516 err_mmio_read_less: 3517 ena_com_mmio_reg_read_request_destroy(ena_dev); 3518 3519 return rc; 3520 } 3521 3522 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3523 { 3524 struct ena_com_dev *ena_dev = adapter->ena_dev; 3525 struct device *dev = &adapter->pdev->dev; 3526 int rc; 3527 3528 rc = ena_enable_msix(adapter); 3529 if (rc) { 3530 dev_err(dev, "Can not reserve msix vectors\n"); 3531 return rc; 3532 } 3533 3534 ena_setup_mgmnt_intr(adapter); 3535 3536 rc = ena_request_mgmnt_irq(adapter); 3537 if (rc) { 3538 dev_err(dev, "Can not setup management interrupts\n"); 3539 goto err_disable_msix; 3540 } 3541 3542 ena_com_set_admin_polling_mode(ena_dev, false); 3543 3544 ena_com_admin_aenq_enable(ena_dev); 3545 3546 return 0; 3547 3548 err_disable_msix: 3549 ena_disable_msix(adapter); 3550 3551 return rc; 3552 } 3553 3554 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3555 { 3556 struct net_device *netdev = adapter->netdev; 3557 struct ena_com_dev *ena_dev = adapter->ena_dev; 3558 bool dev_up; 3559 3560 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3561 return; 3562 3563 netif_carrier_off(netdev); 3564 3565 del_timer_sync(&adapter->timer_service); 3566 3567 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3568 adapter->dev_up_before_reset = dev_up; 3569 if (!graceful) 3570 ena_com_set_admin_running_state(ena_dev, false); 3571 3572 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3573 ena_down(adapter); 3574 3575 /* Stop the device from sending AENQ events (in case reset flag is set 3576 * and device is up, ena_down() already reset the device. 3577 */ 3578 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3579 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3580 3581 ena_free_mgmnt_irq(adapter); 3582 3583 ena_disable_msix(adapter); 3584 3585 ena_com_abort_admin_commands(ena_dev); 3586 3587 ena_com_wait_for_abort_completion(ena_dev); 3588 3589 ena_com_admin_destroy(ena_dev); 3590 3591 ena_com_mmio_reg_read_request_destroy(ena_dev); 3592 3593 /* return reset reason to default value */ 3594 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3595 3596 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3597 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3598 } 3599 3600 static int ena_restore_device(struct ena_adapter *adapter) 3601 { 3602 struct ena_com_dev_get_features_ctx get_feat_ctx; 3603 struct ena_com_dev *ena_dev = adapter->ena_dev; 3604 struct pci_dev *pdev = adapter->pdev; 3605 bool wd_state; 3606 int rc; 3607 3608 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3609 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3610 if (rc) { 3611 dev_err(&pdev->dev, "Can not initialize device\n"); 3612 goto err; 3613 } 3614 adapter->wd_state = wd_state; 3615 3616 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3617 if (rc) { 3618 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3619 goto err_device_destroy; 3620 } 3621 3622 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3623 if (rc) { 3624 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3625 goto err_device_destroy; 3626 } 3627 /* If the interface was up before the reset bring it up */ 3628 if (adapter->dev_up_before_reset) { 3629 rc = ena_up(adapter); 3630 if (rc) { 3631 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3632 goto err_disable_msix; 3633 } 3634 } 3635 3636 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3637 3638 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3639 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3640 netif_carrier_on(adapter->netdev); 3641 3642 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3643 adapter->last_keep_alive_jiffies = jiffies; 3644 3645 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3646 3647 return rc; 3648 err_disable_msix: 3649 ena_free_mgmnt_irq(adapter); 3650 ena_disable_msix(adapter); 3651 err_device_destroy: 3652 ena_com_abort_admin_commands(ena_dev); 3653 ena_com_wait_for_abort_completion(ena_dev); 3654 ena_com_admin_destroy(ena_dev); 3655 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3656 ena_com_mmio_reg_read_request_destroy(ena_dev); 3657 err: 3658 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3659 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3660 dev_err(&pdev->dev, 3661 "Reset attempt failed. Can not reset the device\n"); 3662 3663 return rc; 3664 } 3665 3666 static void ena_fw_reset_device(struct work_struct *work) 3667 { 3668 struct ena_adapter *adapter = 3669 container_of(work, struct ena_adapter, reset_task); 3670 3671 rtnl_lock(); 3672 3673 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3674 ena_destroy_device(adapter, false); 3675 ena_restore_device(adapter); 3676 } 3677 3678 rtnl_unlock(); 3679 } 3680 3681 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3682 struct ena_ring *rx_ring) 3683 { 3684 struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi); 3685 3686 if (likely(READ_ONCE(ena_napi->first_interrupt))) 3687 return 0; 3688 3689 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3690 return 0; 3691 3692 rx_ring->no_interrupt_event_cnt++; 3693 3694 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3695 netif_err(adapter, rx_err, adapter->netdev, 3696 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3697 rx_ring->qid); 3698 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3699 smp_mb__before_atomic(); 3700 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3701 return -EIO; 3702 } 3703 3704 return 0; 3705 } 3706 3707 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3708 struct ena_ring *tx_ring) 3709 { 3710 struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi); 3711 unsigned int time_since_last_napi; 3712 unsigned int missing_tx_comp_to; 3713 bool is_tx_comp_time_expired; 3714 struct ena_tx_buffer *tx_buf; 3715 unsigned long last_jiffies; 3716 u32 missed_tx = 0; 3717 int i, rc = 0; 3718 3719 for (i = 0; i < tx_ring->ring_size; i++) { 3720 tx_buf = &tx_ring->tx_buffer_info[i]; 3721 last_jiffies = tx_buf->last_jiffies; 3722 3723 if (last_jiffies == 0) 3724 /* no pending Tx at this location */ 3725 continue; 3726 3727 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3728 2 * adapter->missing_tx_completion_to); 3729 3730 if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) { 3731 /* If after graceful period interrupt is still not 3732 * received, we schedule a reset 3733 */ 3734 netif_err(adapter, tx_err, adapter->netdev, 3735 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3736 tx_ring->qid); 3737 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3738 smp_mb__before_atomic(); 3739 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3740 return -EIO; 3741 } 3742 3743 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3744 adapter->missing_tx_completion_to); 3745 3746 if (unlikely(is_tx_comp_time_expired)) { 3747 if (!tx_buf->print_once) { 3748 time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies); 3749 missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to); 3750 netif_notice(adapter, tx_err, adapter->netdev, 3751 "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n", 3752 tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to); 3753 } 3754 3755 tx_buf->print_once = 1; 3756 missed_tx++; 3757 } 3758 } 3759 3760 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3761 netif_err(adapter, tx_err, adapter->netdev, 3762 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3763 missed_tx, 3764 adapter->missing_tx_completion_threshold); 3765 adapter->reset_reason = 3766 ENA_REGS_RESET_MISS_TX_CMPL; 3767 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3768 rc = -EIO; 3769 } 3770 3771 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3772 &tx_ring->syncp); 3773 3774 return rc; 3775 } 3776 3777 static void check_for_missing_completions(struct ena_adapter *adapter) 3778 { 3779 struct ena_ring *tx_ring; 3780 struct ena_ring *rx_ring; 3781 int i, budget, rc; 3782 int io_queue_count; 3783 3784 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3785 /* Make sure the driver doesn't turn the device in other process */ 3786 smp_rmb(); 3787 3788 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3789 return; 3790 3791 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3792 return; 3793 3794 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3795 return; 3796 3797 budget = ENA_MONITORED_TX_QUEUES; 3798 3799 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3800 tx_ring = &adapter->tx_ring[i]; 3801 rx_ring = &adapter->rx_ring[i]; 3802 3803 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3804 if (unlikely(rc)) 3805 return; 3806 3807 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3808 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3809 if (unlikely(rc)) 3810 return; 3811 3812 budget--; 3813 if (!budget) 3814 break; 3815 } 3816 3817 adapter->last_monitored_tx_qid = i % io_queue_count; 3818 } 3819 3820 /* trigger napi schedule after 2 consecutive detections */ 3821 #define EMPTY_RX_REFILL 2 3822 /* For the rare case where the device runs out of Rx descriptors and the 3823 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3824 * for example). 3825 * This case will lead to a deadlock: 3826 * The device won't send interrupts since all the new Rx packets will be dropped 3827 * The napi handler won't allocate new Rx descriptors so the device will be 3828 * able to send new packets. 3829 * 3830 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3831 * It is recommended to have at least 512MB, with a minimum of 128MB for 3832 * constrained environment). 3833 * 3834 * When such a situation is detected - Reschedule napi 3835 */ 3836 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3837 { 3838 struct ena_ring *rx_ring; 3839 int i, refill_required; 3840 3841 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3842 return; 3843 3844 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3845 return; 3846 3847 for (i = 0; i < adapter->num_io_queues; i++) { 3848 rx_ring = &adapter->rx_ring[i]; 3849 3850 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3851 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3852 rx_ring->empty_rx_queue++; 3853 3854 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3855 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 3856 &rx_ring->syncp); 3857 3858 netif_err(adapter, drv, adapter->netdev, 3859 "Trigger refill for ring %d\n", i); 3860 3861 napi_schedule(rx_ring->napi); 3862 rx_ring->empty_rx_queue = 0; 3863 } 3864 } else { 3865 rx_ring->empty_rx_queue = 0; 3866 } 3867 } 3868 } 3869 3870 /* Check for keep alive expiration */ 3871 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3872 { 3873 unsigned long keep_alive_expired; 3874 3875 if (!adapter->wd_state) 3876 return; 3877 3878 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3879 return; 3880 3881 keep_alive_expired = adapter->last_keep_alive_jiffies + 3882 adapter->keep_alive_timeout; 3883 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3884 netif_err(adapter, drv, adapter->netdev, 3885 "Keep alive watchdog timeout.\n"); 3886 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 3887 &adapter->syncp); 3888 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3889 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3890 } 3891 } 3892 3893 static void check_for_admin_com_state(struct ena_adapter *adapter) 3894 { 3895 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3896 netif_err(adapter, drv, adapter->netdev, 3897 "ENA admin queue is not in running state!\n"); 3898 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 3899 &adapter->syncp); 3900 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3901 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3902 } 3903 } 3904 3905 static void ena_update_hints(struct ena_adapter *adapter, 3906 struct ena_admin_ena_hw_hints *hints) 3907 { 3908 struct net_device *netdev = adapter->netdev; 3909 3910 if (hints->admin_completion_tx_timeout) 3911 adapter->ena_dev->admin_queue.completion_timeout = 3912 hints->admin_completion_tx_timeout * 1000; 3913 3914 if (hints->mmio_read_timeout) 3915 /* convert to usec */ 3916 adapter->ena_dev->mmio_read.reg_read_to = 3917 hints->mmio_read_timeout * 1000; 3918 3919 if (hints->missed_tx_completion_count_threshold_to_reset) 3920 adapter->missing_tx_completion_threshold = 3921 hints->missed_tx_completion_count_threshold_to_reset; 3922 3923 if (hints->missing_tx_completion_timeout) { 3924 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3925 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3926 else 3927 adapter->missing_tx_completion_to = 3928 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3929 } 3930 3931 if (hints->netdev_wd_timeout) 3932 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3933 3934 if (hints->driver_watchdog_timeout) { 3935 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3936 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3937 else 3938 adapter->keep_alive_timeout = 3939 msecs_to_jiffies(hints->driver_watchdog_timeout); 3940 } 3941 } 3942 3943 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3944 struct net_device *netdev) 3945 { 3946 host_info->supported_network_features[0] = 3947 netdev->features & GENMASK_ULL(31, 0); 3948 host_info->supported_network_features[1] = 3949 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3950 } 3951 3952 static void ena_timer_service(struct timer_list *t) 3953 { 3954 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3955 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3956 struct ena_admin_host_info *host_info = 3957 adapter->ena_dev->host_attr.host_info; 3958 3959 check_for_missing_keep_alive(adapter); 3960 3961 check_for_admin_com_state(adapter); 3962 3963 check_for_missing_completions(adapter); 3964 3965 check_for_empty_rx_ring(adapter); 3966 3967 if (debug_area) 3968 ena_dump_stats_to_buf(adapter, debug_area); 3969 3970 if (host_info) 3971 ena_update_host_info(host_info, adapter->netdev); 3972 3973 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3974 netif_err(adapter, drv, adapter->netdev, 3975 "Trigger reset is on\n"); 3976 ena_dump_stats_to_dmesg(adapter); 3977 queue_work(ena_wq, &adapter->reset_task); 3978 return; 3979 } 3980 3981 /* Reset the timer */ 3982 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3983 } 3984 3985 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 3986 struct ena_com_dev *ena_dev, 3987 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3988 { 3989 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3990 3991 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3992 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3993 &get_feat_ctx->max_queue_ext.max_queue_ext; 3994 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3995 max_queue_ext->max_rx_cq_num); 3996 3997 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3998 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3999 } else { 4000 struct ena_admin_queue_feature_desc *max_queues = 4001 &get_feat_ctx->max_queues; 4002 io_tx_sq_num = max_queues->max_sq_num; 4003 io_tx_cq_num = max_queues->max_cq_num; 4004 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 4005 } 4006 4007 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 4008 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4009 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 4010 4011 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 4012 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 4013 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 4014 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 4015 /* 1 IRQ for mgmnt and 1 IRQs for each IO direction */ 4016 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 4017 if (unlikely(!max_num_io_queues)) { 4018 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 4019 return -EFAULT; 4020 } 4021 4022 return max_num_io_queues; 4023 } 4024 4025 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 4026 struct net_device *netdev) 4027 { 4028 netdev_features_t dev_features = 0; 4029 4030 /* Set offload features */ 4031 if (feat->offload.tx & 4032 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 4033 dev_features |= NETIF_F_IP_CSUM; 4034 4035 if (feat->offload.tx & 4036 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 4037 dev_features |= NETIF_F_IPV6_CSUM; 4038 4039 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4040 dev_features |= NETIF_F_TSO; 4041 4042 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4043 dev_features |= NETIF_F_TSO6; 4044 4045 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4046 dev_features |= NETIF_F_TSO_ECN; 4047 4048 if (feat->offload.rx_supported & 4049 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4050 dev_features |= NETIF_F_RXCSUM; 4051 4052 if (feat->offload.rx_supported & 4053 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4054 dev_features |= NETIF_F_RXCSUM; 4055 4056 netdev->features = 4057 dev_features | 4058 NETIF_F_SG | 4059 NETIF_F_RXHASH | 4060 NETIF_F_HIGHDMA; 4061 4062 netdev->hw_features |= netdev->features; 4063 netdev->vlan_features |= netdev->features; 4064 } 4065 4066 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4067 struct ena_com_dev_get_features_ctx *feat) 4068 { 4069 struct net_device *netdev = adapter->netdev; 4070 4071 /* Copy mac address */ 4072 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4073 eth_hw_addr_random(netdev); 4074 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4075 } else { 4076 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4077 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 4078 } 4079 4080 /* Set offload features */ 4081 ena_set_dev_offloads(feat, netdev); 4082 4083 adapter->max_mtu = feat->dev_attr.max_mtu; 4084 netdev->max_mtu = adapter->max_mtu; 4085 netdev->min_mtu = ENA_MIN_MTU; 4086 } 4087 4088 static int ena_rss_init_default(struct ena_adapter *adapter) 4089 { 4090 struct ena_com_dev *ena_dev = adapter->ena_dev; 4091 struct device *dev = &adapter->pdev->dev; 4092 int rc, i; 4093 u32 val; 4094 4095 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4096 if (unlikely(rc)) { 4097 dev_err(dev, "Cannot init indirect table\n"); 4098 goto err_rss_init; 4099 } 4100 4101 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4102 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4103 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4104 ENA_IO_RXQ_IDX(val)); 4105 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4106 dev_err(dev, "Cannot fill indirect table\n"); 4107 goto err_fill_indir; 4108 } 4109 } 4110 4111 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4112 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4113 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4114 dev_err(dev, "Cannot fill hash function\n"); 4115 goto err_fill_indir; 4116 } 4117 4118 rc = ena_com_set_default_hash_ctrl(ena_dev); 4119 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4120 dev_err(dev, "Cannot fill hash control\n"); 4121 goto err_fill_indir; 4122 } 4123 4124 return 0; 4125 4126 err_fill_indir: 4127 ena_com_rss_destroy(ena_dev); 4128 err_rss_init: 4129 4130 return rc; 4131 } 4132 4133 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4134 { 4135 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4136 4137 pci_release_selected_regions(pdev, release_bars); 4138 } 4139 4140 4141 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4142 { 4143 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4144 struct ena_com_dev *ena_dev = ctx->ena_dev; 4145 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4146 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4147 u32 max_tx_queue_size; 4148 u32 max_rx_queue_size; 4149 4150 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4151 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4152 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4153 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4154 max_queue_ext->max_rx_sq_depth); 4155 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4156 4157 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4158 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4159 llq->max_llq_depth); 4160 else 4161 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4162 max_queue_ext->max_tx_sq_depth); 4163 4164 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4165 max_queue_ext->max_per_packet_tx_descs); 4166 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4167 max_queue_ext->max_per_packet_rx_descs); 4168 } else { 4169 struct ena_admin_queue_feature_desc *max_queues = 4170 &ctx->get_feat_ctx->max_queues; 4171 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4172 max_queues->max_sq_depth); 4173 max_tx_queue_size = max_queues->max_cq_depth; 4174 4175 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4176 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4177 llq->max_llq_depth); 4178 else 4179 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4180 max_queues->max_sq_depth); 4181 4182 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4183 max_queues->max_packet_tx_descs); 4184 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4185 max_queues->max_packet_rx_descs); 4186 } 4187 4188 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4189 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4190 4191 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4192 max_tx_queue_size); 4193 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4194 max_rx_queue_size); 4195 4196 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4197 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4198 4199 ctx->max_tx_queue_size = max_tx_queue_size; 4200 ctx->max_rx_queue_size = max_rx_queue_size; 4201 ctx->tx_queue_size = tx_queue_size; 4202 ctx->rx_queue_size = rx_queue_size; 4203 4204 return 0; 4205 } 4206 4207 /* ena_probe - Device Initialization Routine 4208 * @pdev: PCI device information struct 4209 * @ent: entry in ena_pci_tbl 4210 * 4211 * Returns 0 on success, negative on failure 4212 * 4213 * ena_probe initializes an adapter identified by a pci_dev structure. 4214 * The OS initialization, configuring of the adapter private structure, 4215 * and a hardware reset occur. 4216 */ 4217 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4218 { 4219 struct ena_calc_queue_size_ctx calc_queue_ctx = {}; 4220 struct ena_com_dev_get_features_ctx get_feat_ctx; 4221 struct ena_com_dev *ena_dev = NULL; 4222 struct ena_adapter *adapter; 4223 struct net_device *netdev; 4224 static int adapters_found; 4225 u32 max_num_io_queues; 4226 bool wd_state; 4227 int bars, rc; 4228 4229 dev_dbg(&pdev->dev, "%s\n", __func__); 4230 4231 rc = pci_enable_device_mem(pdev); 4232 if (rc) { 4233 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4234 return rc; 4235 } 4236 4237 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4238 if (rc) { 4239 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4240 goto err_disable_device; 4241 } 4242 4243 pci_set_master(pdev); 4244 4245 ena_dev = vzalloc(sizeof(*ena_dev)); 4246 if (!ena_dev) { 4247 rc = -ENOMEM; 4248 goto err_disable_device; 4249 } 4250 4251 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4252 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4253 if (rc) { 4254 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4255 rc); 4256 goto err_free_ena_dev; 4257 } 4258 4259 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4260 pci_resource_start(pdev, ENA_REG_BAR), 4261 pci_resource_len(pdev, ENA_REG_BAR)); 4262 if (!ena_dev->reg_bar) { 4263 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4264 rc = -EFAULT; 4265 goto err_free_region; 4266 } 4267 4268 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4269 4270 ena_dev->dmadev = &pdev->dev; 4271 4272 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4273 if (!netdev) { 4274 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4275 rc = -ENOMEM; 4276 goto err_free_region; 4277 } 4278 4279 SET_NETDEV_DEV(netdev, &pdev->dev); 4280 adapter = netdev_priv(netdev); 4281 adapter->ena_dev = ena_dev; 4282 adapter->netdev = netdev; 4283 adapter->pdev = pdev; 4284 adapter->msg_enable = DEFAULT_MSG_ENABLE; 4285 4286 ena_dev->net_device = netdev; 4287 4288 pci_set_drvdata(pdev, adapter); 4289 4290 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4291 if (rc) { 4292 dev_err(&pdev->dev, "ENA device init failed\n"); 4293 if (rc == -ETIME) 4294 rc = -EPROBE_DEFER; 4295 goto err_netdev_destroy; 4296 } 4297 4298 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4299 if (rc) { 4300 dev_err(&pdev->dev, "ENA llq bar mapping failed\n"); 4301 goto err_device_destroy; 4302 } 4303 4304 calc_queue_ctx.ena_dev = ena_dev; 4305 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4306 calc_queue_ctx.pdev = pdev; 4307 4308 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4309 * Updated during device initialization with the real granularity 4310 */ 4311 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4312 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4313 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4314 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4315 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4316 if (rc || !max_num_io_queues) { 4317 rc = -EFAULT; 4318 goto err_device_destroy; 4319 } 4320 4321 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4322 4323 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4324 4325 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4326 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4327 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4328 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4329 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4330 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4331 4332 adapter->num_io_queues = max_num_io_queues; 4333 adapter->max_num_io_queues = max_num_io_queues; 4334 adapter->last_monitored_tx_qid = 0; 4335 4336 adapter->xdp_first_ring = 0; 4337 adapter->xdp_num_queues = 0; 4338 4339 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4340 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4341 adapter->disable_meta_caching = 4342 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4343 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4344 4345 adapter->wd_state = wd_state; 4346 4347 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4348 4349 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4350 if (rc) { 4351 dev_err(&pdev->dev, 4352 "Failed to query interrupt moderation feature\n"); 4353 goto err_device_destroy; 4354 } 4355 ena_init_io_rings(adapter, 4356 0, 4357 adapter->xdp_num_queues + 4358 adapter->num_io_queues); 4359 4360 netdev->netdev_ops = &ena_netdev_ops; 4361 netdev->watchdog_timeo = TX_TIMEOUT; 4362 ena_set_ethtool_ops(netdev); 4363 4364 netdev->priv_flags |= IFF_UNICAST_FLT; 4365 4366 u64_stats_init(&adapter->syncp); 4367 4368 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4369 if (rc) { 4370 dev_err(&pdev->dev, 4371 "Failed to enable and set the admin interrupts\n"); 4372 goto err_worker_destroy; 4373 } 4374 rc = ena_rss_init_default(adapter); 4375 if (rc && (rc != -EOPNOTSUPP)) { 4376 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4377 goto err_free_msix; 4378 } 4379 4380 ena_config_debug_area(adapter); 4381 4382 if (!ena_update_hw_stats(adapter)) 4383 adapter->eni_stats_supported = true; 4384 else 4385 adapter->eni_stats_supported = false; 4386 4387 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4388 4389 netif_carrier_off(netdev); 4390 4391 rc = register_netdev(netdev); 4392 if (rc) { 4393 dev_err(&pdev->dev, "Cannot register net device\n"); 4394 goto err_rss; 4395 } 4396 4397 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4398 4399 adapter->last_keep_alive_jiffies = jiffies; 4400 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4401 adapter->missing_tx_completion_to = TX_TIMEOUT; 4402 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4403 4404 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4405 4406 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4407 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4408 4409 dev_info(&pdev->dev, 4410 "%s found at mem %lx, mac addr %pM\n", 4411 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4412 netdev->dev_addr); 4413 4414 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4415 4416 adapters_found++; 4417 4418 return 0; 4419 4420 err_rss: 4421 ena_com_delete_debug_area(ena_dev); 4422 ena_com_rss_destroy(ena_dev); 4423 err_free_msix: 4424 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4425 /* stop submitting admin commands on a device that was reset */ 4426 ena_com_set_admin_running_state(ena_dev, false); 4427 ena_free_mgmnt_irq(adapter); 4428 ena_disable_msix(adapter); 4429 err_worker_destroy: 4430 del_timer(&adapter->timer_service); 4431 err_device_destroy: 4432 ena_com_delete_host_info(ena_dev); 4433 ena_com_admin_destroy(ena_dev); 4434 err_netdev_destroy: 4435 free_netdev(netdev); 4436 err_free_region: 4437 ena_release_bars(ena_dev, pdev); 4438 err_free_ena_dev: 4439 vfree(ena_dev); 4440 err_disable_device: 4441 pci_disable_device(pdev); 4442 return rc; 4443 } 4444 4445 /*****************************************************************************/ 4446 4447 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4448 * @pdev: PCI device information struct 4449 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4450 * 4451 * __ena_shutoff is a helper routine that does the real work on shutdown and 4452 * removal paths; the difference between those paths is with regards to whether 4453 * dettach or unregister the netdevice. 4454 */ 4455 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4456 { 4457 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4458 struct ena_com_dev *ena_dev; 4459 struct net_device *netdev; 4460 4461 ena_dev = adapter->ena_dev; 4462 netdev = adapter->netdev; 4463 4464 #ifdef CONFIG_RFS_ACCEL 4465 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4466 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4467 netdev->rx_cpu_rmap = NULL; 4468 } 4469 #endif /* CONFIG_RFS_ACCEL */ 4470 4471 /* Make sure timer and reset routine won't be called after 4472 * freeing device resources. 4473 */ 4474 del_timer_sync(&adapter->timer_service); 4475 cancel_work_sync(&adapter->reset_task); 4476 4477 rtnl_lock(); /* lock released inside the below if-else block */ 4478 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4479 ena_destroy_device(adapter, true); 4480 if (shutdown) { 4481 netif_device_detach(netdev); 4482 dev_close(netdev); 4483 rtnl_unlock(); 4484 } else { 4485 rtnl_unlock(); 4486 unregister_netdev(netdev); 4487 free_netdev(netdev); 4488 } 4489 4490 ena_com_rss_destroy(ena_dev); 4491 4492 ena_com_delete_debug_area(ena_dev); 4493 4494 ena_com_delete_host_info(ena_dev); 4495 4496 ena_release_bars(ena_dev, pdev); 4497 4498 pci_disable_device(pdev); 4499 4500 vfree(ena_dev); 4501 } 4502 4503 /* ena_remove - Device Removal Routine 4504 * @pdev: PCI device information struct 4505 * 4506 * ena_remove is called by the PCI subsystem to alert the driver 4507 * that it should release a PCI device. 4508 */ 4509 4510 static void ena_remove(struct pci_dev *pdev) 4511 { 4512 __ena_shutoff(pdev, false); 4513 } 4514 4515 /* ena_shutdown - Device Shutdown Routine 4516 * @pdev: PCI device information struct 4517 * 4518 * ena_shutdown is called by the PCI subsystem to alert the driver that 4519 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4520 */ 4521 4522 static void ena_shutdown(struct pci_dev *pdev) 4523 { 4524 __ena_shutoff(pdev, true); 4525 } 4526 4527 /* ena_suspend - PM suspend callback 4528 * @dev_d: Device information struct 4529 */ 4530 static int __maybe_unused ena_suspend(struct device *dev_d) 4531 { 4532 struct pci_dev *pdev = to_pci_dev(dev_d); 4533 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4534 4535 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4536 4537 rtnl_lock(); 4538 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4539 dev_err(&pdev->dev, 4540 "Ignoring device reset request as the device is being suspended\n"); 4541 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4542 } 4543 ena_destroy_device(adapter, true); 4544 rtnl_unlock(); 4545 return 0; 4546 } 4547 4548 /* ena_resume - PM resume callback 4549 * @dev_d: Device information struct 4550 */ 4551 static int __maybe_unused ena_resume(struct device *dev_d) 4552 { 4553 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4554 int rc; 4555 4556 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4557 4558 rtnl_lock(); 4559 rc = ena_restore_device(adapter); 4560 rtnl_unlock(); 4561 return rc; 4562 } 4563 4564 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4565 4566 static struct pci_driver ena_pci_driver = { 4567 .name = DRV_MODULE_NAME, 4568 .id_table = ena_pci_tbl, 4569 .probe = ena_probe, 4570 .remove = ena_remove, 4571 .shutdown = ena_shutdown, 4572 .driver.pm = &ena_pm_ops, 4573 .sriov_configure = pci_sriov_configure_simple, 4574 }; 4575 4576 static int __init ena_init(void) 4577 { 4578 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4579 if (!ena_wq) { 4580 pr_err("Failed to create workqueue\n"); 4581 return -ENOMEM; 4582 } 4583 4584 return pci_register_driver(&ena_pci_driver); 4585 } 4586 4587 static void __exit ena_cleanup(void) 4588 { 4589 pci_unregister_driver(&ena_pci_driver); 4590 4591 if (ena_wq) { 4592 destroy_workqueue(ena_wq); 4593 ena_wq = NULL; 4594 } 4595 } 4596 4597 /****************************************************************************** 4598 ******************************** AENQ Handlers ******************************* 4599 *****************************************************************************/ 4600 /* ena_update_on_link_change: 4601 * Notify the network interface about the change in link status 4602 */ 4603 static void ena_update_on_link_change(void *adapter_data, 4604 struct ena_admin_aenq_entry *aenq_e) 4605 { 4606 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4607 struct ena_admin_aenq_link_change_desc *aenq_desc = 4608 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4609 int status = aenq_desc->flags & 4610 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4611 4612 if (status) { 4613 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4614 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4615 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4616 netif_carrier_on(adapter->netdev); 4617 } else { 4618 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4619 netif_carrier_off(adapter->netdev); 4620 } 4621 } 4622 4623 static void ena_keep_alive_wd(void *adapter_data, 4624 struct ena_admin_aenq_entry *aenq_e) 4625 { 4626 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4627 struct ena_admin_aenq_keep_alive_desc *desc; 4628 u64 rx_drops; 4629 u64 tx_drops; 4630 4631 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4632 adapter->last_keep_alive_jiffies = jiffies; 4633 4634 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4635 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4636 4637 u64_stats_update_begin(&adapter->syncp); 4638 /* These stats are accumulated by the device, so the counters indicate 4639 * all drops since last reset. 4640 */ 4641 adapter->dev_stats.rx_drops = rx_drops; 4642 adapter->dev_stats.tx_drops = tx_drops; 4643 u64_stats_update_end(&adapter->syncp); 4644 } 4645 4646 static void ena_notification(void *adapter_data, 4647 struct ena_admin_aenq_entry *aenq_e) 4648 { 4649 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4650 struct ena_admin_ena_hw_hints *hints; 4651 4652 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4653 "Invalid group(%x) expected %x\n", 4654 aenq_e->aenq_common_desc.group, 4655 ENA_ADMIN_NOTIFICATION); 4656 4657 switch (aenq_e->aenq_common_desc.syndrome) { 4658 case ENA_ADMIN_UPDATE_HINTS: 4659 hints = (struct ena_admin_ena_hw_hints *) 4660 (&aenq_e->inline_data_w4); 4661 ena_update_hints(adapter, hints); 4662 break; 4663 default: 4664 netif_err(adapter, drv, adapter->netdev, 4665 "Invalid aenq notification link state %d\n", 4666 aenq_e->aenq_common_desc.syndrome); 4667 } 4668 } 4669 4670 /* This handler will called for unknown event group or unimplemented handlers*/ 4671 static void unimplemented_aenq_handler(void *data, 4672 struct ena_admin_aenq_entry *aenq_e) 4673 { 4674 struct ena_adapter *adapter = (struct ena_adapter *)data; 4675 4676 netif_err(adapter, drv, adapter->netdev, 4677 "Unknown event was received or event with unimplemented handler\n"); 4678 } 4679 4680 static struct ena_aenq_handlers aenq_handlers = { 4681 .handlers = { 4682 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4683 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4684 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4685 }, 4686 .unimplemented_handler = unimplemented_aenq_handler 4687 }; 4688 4689 module_init(ena_init); 4690 module_exit(ena_cleanup); 4691