1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3  * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
4  */
5 
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 
8 #ifdef CONFIG_RFS_ACCEL
9 #include <linux/cpu_rmap.h>
10 #endif /* CONFIG_RFS_ACCEL */
11 #include <linux/ethtool.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/numa.h>
15 #include <linux/pci.h>
16 #include <linux/utsname.h>
17 #include <linux/version.h>
18 #include <linux/vmalloc.h>
19 #include <net/ip.h>
20 
21 #include "ena_netdev.h"
22 #include <linux/bpf_trace.h>
23 #include "ena_pci_id_tbl.h"
24 
25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
26 MODULE_DESCRIPTION(DEVICE_NAME);
27 MODULE_LICENSE("GPL");
28 
29 /* Time in jiffies before concluding the transmitter is hung. */
30 #define TX_TIMEOUT  (5 * HZ)
31 
32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus())
33 
34 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
35 		NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
36 
37 static struct ena_aenq_handlers aenq_handlers;
38 
39 static struct workqueue_struct *ena_wq;
40 
41 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
42 
43 static int ena_rss_init_default(struct ena_adapter *adapter);
44 static void check_for_admin_com_state(struct ena_adapter *adapter);
45 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
46 static int ena_restore_device(struct ena_adapter *adapter);
47 
48 static void ena_init_io_rings(struct ena_adapter *adapter,
49 			      int first_index, int count);
50 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
51 				   int count);
52 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
53 				  int count);
54 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
55 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
56 					   int first_index,
57 					   int count);
58 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
59 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
60 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
61 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
62 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
63 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
64 				      int first_index, int count);
65 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
66 				     int first_index, int count);
67 static int ena_up(struct ena_adapter *adapter);
68 static void ena_down(struct ena_adapter *adapter);
69 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
70 				 struct ena_ring *rx_ring);
71 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
72 				      struct ena_ring *rx_ring);
73 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
74 			      struct ena_tx_buffer *tx_info);
75 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
76 					    int first_index, int count);
77 
78 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */
79 static void ena_increase_stat(u64 *statp, u64 cnt,
80 			      struct u64_stats_sync *syncp)
81 {
82 	u64_stats_update_begin(syncp);
83 	(*statp) += cnt;
84 	u64_stats_update_end(syncp);
85 }
86 
87 static void ena_ring_tx_doorbell(struct ena_ring *tx_ring)
88 {
89 	ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
90 	ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp);
91 }
92 
93 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
94 {
95 	struct ena_adapter *adapter = netdev_priv(dev);
96 
97 	/* Change the state of the device to trigger reset
98 	 * Check that we are not in the middle or a trigger already
99 	 */
100 
101 	if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
102 		return;
103 
104 	ena_reset_device(adapter, ENA_REGS_RESET_OS_NETDEV_WD);
105 	ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp);
106 
107 	netif_err(adapter, tx_err, dev, "Transmit time out\n");
108 }
109 
110 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
111 {
112 	int i;
113 
114 	for (i = 0; i < adapter->num_io_queues; i++)
115 		adapter->rx_ring[i].mtu = mtu;
116 }
117 
118 static int ena_change_mtu(struct net_device *dev, int new_mtu)
119 {
120 	struct ena_adapter *adapter = netdev_priv(dev);
121 	int ret;
122 
123 	ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
124 	if (!ret) {
125 		netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);
126 		update_rx_ring_mtu(adapter, new_mtu);
127 		dev->mtu = new_mtu;
128 	} else {
129 		netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
130 			  new_mtu);
131 	}
132 
133 	return ret;
134 }
135 
136 static int ena_xmit_common(struct net_device *dev,
137 			   struct ena_ring *ring,
138 			   struct ena_tx_buffer *tx_info,
139 			   struct ena_com_tx_ctx *ena_tx_ctx,
140 			   u16 next_to_use,
141 			   u32 bytes)
142 {
143 	struct ena_adapter *adapter = netdev_priv(dev);
144 	int rc, nb_hw_desc;
145 
146 	if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
147 						ena_tx_ctx))) {
148 		netif_dbg(adapter, tx_queued, dev,
149 			  "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
150 			  ring->qid);
151 		ena_ring_tx_doorbell(ring);
152 	}
153 
154 	/* prepare the packet's descriptors to dma engine */
155 	rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
156 				&nb_hw_desc);
157 
158 	/* In case there isn't enough space in the queue for the packet,
159 	 * we simply drop it. All other failure reasons of
160 	 * ena_com_prepare_tx() are fatal and therefore require a device reset.
161 	 */
162 	if (unlikely(rc)) {
163 		netif_err(adapter, tx_queued, dev,
164 			  "Failed to prepare tx bufs\n");
165 		ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1,
166 				  &ring->syncp);
167 		if (rc != -ENOMEM)
168 			ena_reset_device(adapter,
169 					 ENA_REGS_RESET_DRIVER_INVALID_STATE);
170 		return rc;
171 	}
172 
173 	u64_stats_update_begin(&ring->syncp);
174 	ring->tx_stats.cnt++;
175 	ring->tx_stats.bytes += bytes;
176 	u64_stats_update_end(&ring->syncp);
177 
178 	tx_info->tx_descs = nb_hw_desc;
179 	tx_info->last_jiffies = jiffies;
180 	tx_info->print_once = 0;
181 
182 	ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
183 						 ring->ring_size);
184 	return 0;
185 }
186 
187 /* This is the XDP napi callback. XDP queues use a separate napi callback
188  * than Rx/Tx queues.
189  */
190 static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
191 {
192 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
193 	u32 xdp_work_done, xdp_budget;
194 	struct ena_ring *xdp_ring;
195 	int napi_comp_call = 0;
196 	int ret;
197 
198 	xdp_ring = ena_napi->xdp_ring;
199 
200 	xdp_budget = budget;
201 
202 	if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
203 	    test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
204 		napi_complete_done(napi, 0);
205 		return 0;
206 	}
207 
208 	xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
209 
210 	/* If the device is about to reset or down, avoid unmask
211 	 * the interrupt and return 0 so NAPI won't reschedule
212 	 */
213 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
214 		napi_complete_done(napi, 0);
215 		ret = 0;
216 	} else if (xdp_budget > xdp_work_done) {
217 		napi_comp_call = 1;
218 		if (napi_complete_done(napi, xdp_work_done))
219 			ena_unmask_interrupt(xdp_ring, NULL);
220 		ena_update_ring_numa_node(xdp_ring, NULL);
221 		ret = xdp_work_done;
222 	} else {
223 		ret = xdp_budget;
224 	}
225 
226 	u64_stats_update_begin(&xdp_ring->syncp);
227 	xdp_ring->tx_stats.napi_comp += napi_comp_call;
228 	xdp_ring->tx_stats.tx_poll++;
229 	u64_stats_update_end(&xdp_ring->syncp);
230 	xdp_ring->tx_stats.last_napi_jiffies = jiffies;
231 
232 	return ret;
233 }
234 
235 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring,
236 				struct ena_tx_buffer *tx_info,
237 				struct xdp_frame *xdpf,
238 				struct ena_com_tx_ctx *ena_tx_ctx)
239 {
240 	struct ena_adapter *adapter = xdp_ring->adapter;
241 	struct ena_com_buf *ena_buf;
242 	int push_len = 0;
243 	dma_addr_t dma;
244 	void *data;
245 	u32 size;
246 
247 	tx_info->xdpf = xdpf;
248 	data = tx_info->xdpf->data;
249 	size = tx_info->xdpf->len;
250 
251 	if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
252 		/* Designate part of the packet for LLQ */
253 		push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
254 
255 		ena_tx_ctx->push_header = data;
256 
257 		size -= push_len;
258 		data += push_len;
259 	}
260 
261 	ena_tx_ctx->header_len = push_len;
262 
263 	if (size > 0) {
264 		dma = dma_map_single(xdp_ring->dev,
265 				     data,
266 				     size,
267 				     DMA_TO_DEVICE);
268 		if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
269 			goto error_report_dma_error;
270 
271 		tx_info->map_linear_data = 0;
272 
273 		ena_buf = tx_info->bufs;
274 		ena_buf->paddr = dma;
275 		ena_buf->len = size;
276 
277 		ena_tx_ctx->ena_bufs = ena_buf;
278 		ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1;
279 	}
280 
281 	return 0;
282 
283 error_report_dma_error:
284 	ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1,
285 			  &xdp_ring->syncp);
286 	netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n");
287 
288 	return -EINVAL;
289 }
290 
291 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring,
292 			      struct net_device *dev,
293 			      struct xdp_frame *xdpf,
294 			      int flags)
295 {
296 	struct ena_com_tx_ctx ena_tx_ctx = {};
297 	struct ena_tx_buffer *tx_info;
298 	u16 next_to_use, req_id;
299 	int rc;
300 
301 	next_to_use = xdp_ring->next_to_use;
302 	req_id = xdp_ring->free_ids[next_to_use];
303 	tx_info = &xdp_ring->tx_buffer_info[req_id];
304 	tx_info->num_of_bufs = 0;
305 
306 	rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx);
307 	if (unlikely(rc))
308 		return rc;
309 
310 	ena_tx_ctx.req_id = req_id;
311 
312 	rc = ena_xmit_common(dev,
313 			     xdp_ring,
314 			     tx_info,
315 			     &ena_tx_ctx,
316 			     next_to_use,
317 			     xdpf->len);
318 	if (rc)
319 		goto error_unmap_dma;
320 
321 	/* trigger the dma engine. ena_ring_tx_doorbell()
322 	 * calls a memory barrier inside it.
323 	 */
324 	if (flags & XDP_XMIT_FLUSH)
325 		ena_ring_tx_doorbell(xdp_ring);
326 
327 	return rc;
328 
329 error_unmap_dma:
330 	ena_unmap_tx_buff(xdp_ring, tx_info);
331 	tx_info->xdpf = NULL;
332 	return rc;
333 }
334 
335 static int ena_xdp_xmit(struct net_device *dev, int n,
336 			struct xdp_frame **frames, u32 flags)
337 {
338 	struct ena_adapter *adapter = netdev_priv(dev);
339 	struct ena_ring *xdp_ring;
340 	int qid, i, nxmit = 0;
341 
342 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
343 		return -EINVAL;
344 
345 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
346 		return -ENETDOWN;
347 
348 	/* We assume that all rings have the same XDP program */
349 	if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog))
350 		return -ENXIO;
351 
352 	qid = smp_processor_id() % adapter->xdp_num_queues;
353 	qid += adapter->xdp_first_ring;
354 	xdp_ring = &adapter->tx_ring[qid];
355 
356 	/* Other CPU ids might try to send thorugh this queue */
357 	spin_lock(&xdp_ring->xdp_tx_lock);
358 
359 	for (i = 0; i < n; i++) {
360 		if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0))
361 			break;
362 		nxmit++;
363 	}
364 
365 	/* Ring doorbell to make device aware of the packets */
366 	if (flags & XDP_XMIT_FLUSH)
367 		ena_ring_tx_doorbell(xdp_ring);
368 
369 	spin_unlock(&xdp_ring->xdp_tx_lock);
370 
371 	/* Return number of packets sent */
372 	return nxmit;
373 }
374 
375 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp)
376 {
377 	u32 verdict = ENA_XDP_PASS;
378 	struct bpf_prog *xdp_prog;
379 	struct ena_ring *xdp_ring;
380 	struct xdp_frame *xdpf;
381 	u64 *xdp_stat;
382 
383 	xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
384 
385 	if (!xdp_prog)
386 		goto out;
387 
388 	verdict = bpf_prog_run_xdp(xdp_prog, xdp);
389 
390 	switch (verdict) {
391 	case XDP_TX:
392 		xdpf = xdp_convert_buff_to_frame(xdp);
393 		if (unlikely(!xdpf)) {
394 			trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
395 			xdp_stat = &rx_ring->rx_stats.xdp_aborted;
396 			verdict = ENA_XDP_DROP;
397 			break;
398 		}
399 
400 		/* Find xmit queue */
401 		xdp_ring = rx_ring->xdp_ring;
402 
403 		/* The XDP queues are shared between XDP_TX and XDP_REDIRECT */
404 		spin_lock(&xdp_ring->xdp_tx_lock);
405 
406 		if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf,
407 				       XDP_XMIT_FLUSH))
408 			xdp_return_frame(xdpf);
409 
410 		spin_unlock(&xdp_ring->xdp_tx_lock);
411 		xdp_stat = &rx_ring->rx_stats.xdp_tx;
412 		verdict = ENA_XDP_TX;
413 		break;
414 	case XDP_REDIRECT:
415 		if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) {
416 			xdp_stat = &rx_ring->rx_stats.xdp_redirect;
417 			verdict = ENA_XDP_REDIRECT;
418 			break;
419 		}
420 		trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
421 		xdp_stat = &rx_ring->rx_stats.xdp_aborted;
422 		verdict = ENA_XDP_DROP;
423 		break;
424 	case XDP_ABORTED:
425 		trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
426 		xdp_stat = &rx_ring->rx_stats.xdp_aborted;
427 		verdict = ENA_XDP_DROP;
428 		break;
429 	case XDP_DROP:
430 		xdp_stat = &rx_ring->rx_stats.xdp_drop;
431 		verdict = ENA_XDP_DROP;
432 		break;
433 	case XDP_PASS:
434 		xdp_stat = &rx_ring->rx_stats.xdp_pass;
435 		verdict = ENA_XDP_PASS;
436 		break;
437 	default:
438 		bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, verdict);
439 		xdp_stat = &rx_ring->rx_stats.xdp_invalid;
440 		verdict = ENA_XDP_DROP;
441 	}
442 
443 	ena_increase_stat(xdp_stat, 1, &rx_ring->syncp);
444 out:
445 	return verdict;
446 }
447 
448 static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
449 {
450 	adapter->xdp_first_ring = adapter->num_io_queues;
451 	adapter->xdp_num_queues = adapter->num_io_queues;
452 
453 	ena_init_io_rings(adapter,
454 			  adapter->xdp_first_ring,
455 			  adapter->xdp_num_queues);
456 }
457 
458 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
459 {
460 	int rc = 0;
461 
462 	rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
463 					     adapter->xdp_num_queues);
464 	if (rc)
465 		goto setup_err;
466 
467 	rc = ena_create_io_tx_queues_in_range(adapter,
468 					      adapter->xdp_first_ring,
469 					      adapter->xdp_num_queues);
470 	if (rc)
471 		goto create_err;
472 
473 	return 0;
474 
475 create_err:
476 	ena_free_all_io_tx_resources(adapter);
477 setup_err:
478 	return rc;
479 }
480 
481 /* Provides a way for both kernel and bpf-prog to know
482  * more about the RX-queue a given XDP frame arrived on.
483  */
484 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
485 {
486 	int rc;
487 
488 	rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0);
489 
490 	if (rc) {
491 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
492 			  "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
493 			  rx_ring->qid, rc);
494 		goto err;
495 	}
496 
497 	rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
498 					NULL);
499 
500 	if (rc) {
501 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
502 			  "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
503 			  rx_ring->qid, rc);
504 		xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
505 	}
506 
507 err:
508 	return rc;
509 }
510 
511 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
512 {
513 	xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
514 	xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
515 }
516 
517 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
518 						 struct bpf_prog *prog,
519 						 int first, int count)
520 {
521 	struct bpf_prog *old_bpf_prog;
522 	struct ena_ring *rx_ring;
523 	int i = 0;
524 
525 	for (i = first; i < count; i++) {
526 		rx_ring = &adapter->rx_ring[i];
527 		old_bpf_prog = xchg(&rx_ring->xdp_bpf_prog, prog);
528 
529 		if (!old_bpf_prog && prog) {
530 			ena_xdp_register_rxq_info(rx_ring);
531 			rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
532 		} else if (old_bpf_prog && !prog) {
533 			ena_xdp_unregister_rxq_info(rx_ring);
534 			rx_ring->rx_headroom = NET_SKB_PAD;
535 		}
536 	}
537 }
538 
539 static void ena_xdp_exchange_program(struct ena_adapter *adapter,
540 				     struct bpf_prog *prog)
541 {
542 	struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
543 
544 	ena_xdp_exchange_program_rx_in_range(adapter,
545 					     prog,
546 					     0,
547 					     adapter->num_io_queues);
548 
549 	if (old_bpf_prog)
550 		bpf_prog_put(old_bpf_prog);
551 }
552 
553 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
554 {
555 	bool was_up;
556 	int rc;
557 
558 	was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
559 
560 	if (was_up)
561 		ena_down(adapter);
562 
563 	adapter->xdp_first_ring = 0;
564 	adapter->xdp_num_queues = 0;
565 	ena_xdp_exchange_program(adapter, NULL);
566 	if (was_up) {
567 		rc = ena_up(adapter);
568 		if (rc)
569 			return rc;
570 	}
571 	return 0;
572 }
573 
574 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
575 {
576 	struct ena_adapter *adapter = netdev_priv(netdev);
577 	struct bpf_prog *prog = bpf->prog;
578 	struct bpf_prog *old_bpf_prog;
579 	int rc, prev_mtu;
580 	bool is_up;
581 
582 	is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
583 	rc = ena_xdp_allowed(adapter);
584 	if (rc == ENA_XDP_ALLOWED) {
585 		old_bpf_prog = adapter->xdp_bpf_prog;
586 		if (prog) {
587 			if (!is_up) {
588 				ena_init_all_xdp_queues(adapter);
589 			} else if (!old_bpf_prog) {
590 				ena_down(adapter);
591 				ena_init_all_xdp_queues(adapter);
592 			}
593 			ena_xdp_exchange_program(adapter, prog);
594 
595 			if (is_up && !old_bpf_prog) {
596 				rc = ena_up(adapter);
597 				if (rc)
598 					return rc;
599 			}
600 			xdp_features_set_redirect_target(netdev, false);
601 		} else if (old_bpf_prog) {
602 			xdp_features_clear_redirect_target(netdev);
603 			rc = ena_destroy_and_free_all_xdp_queues(adapter);
604 			if (rc)
605 				return rc;
606 		}
607 
608 		prev_mtu = netdev->max_mtu;
609 		netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
610 
611 		if (!old_bpf_prog)
612 			netif_info(adapter, drv, adapter->netdev,
613 				   "XDP program is set, changing the max_mtu from %d to %d",
614 				   prev_mtu, netdev->max_mtu);
615 
616 	} else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
617 		netif_err(adapter, drv, adapter->netdev,
618 			  "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
619 			  netdev->mtu, ENA_XDP_MAX_MTU);
620 		NL_SET_ERR_MSG_MOD(bpf->extack,
621 				   "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
622 		return -EINVAL;
623 	} else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
624 		netif_err(adapter, drv, adapter->netdev,
625 			  "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
626 			  adapter->num_io_queues, adapter->max_num_io_queues);
627 		NL_SET_ERR_MSG_MOD(bpf->extack,
628 				   "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
629 		return -EINVAL;
630 	}
631 
632 	return 0;
633 }
634 
635 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp
636  * program as well as to query the current xdp program id.
637  */
638 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
639 {
640 	switch (bpf->command) {
641 	case XDP_SETUP_PROG:
642 		return ena_xdp_set(netdev, bpf);
643 	default:
644 		return -EINVAL;
645 	}
646 	return 0;
647 }
648 
649 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
650 {
651 #ifdef CONFIG_RFS_ACCEL
652 	u32 i;
653 	int rc;
654 
655 	adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
656 	if (!adapter->netdev->rx_cpu_rmap)
657 		return -ENOMEM;
658 	for (i = 0; i < adapter->num_io_queues; i++) {
659 		int irq_idx = ENA_IO_IRQ_IDX(i);
660 
661 		rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
662 				      pci_irq_vector(adapter->pdev, irq_idx));
663 		if (rc) {
664 			free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
665 			adapter->netdev->rx_cpu_rmap = NULL;
666 			return rc;
667 		}
668 	}
669 #endif /* CONFIG_RFS_ACCEL */
670 	return 0;
671 }
672 
673 static void ena_init_io_rings_common(struct ena_adapter *adapter,
674 				     struct ena_ring *ring, u16 qid)
675 {
676 	ring->qid = qid;
677 	ring->pdev = adapter->pdev;
678 	ring->dev = &adapter->pdev->dev;
679 	ring->netdev = adapter->netdev;
680 	ring->napi = &adapter->ena_napi[qid].napi;
681 	ring->adapter = adapter;
682 	ring->ena_dev = adapter->ena_dev;
683 	ring->per_napi_packets = 0;
684 	ring->cpu = 0;
685 	ring->numa_node = 0;
686 	ring->no_interrupt_event_cnt = 0;
687 	u64_stats_init(&ring->syncp);
688 }
689 
690 static void ena_init_io_rings(struct ena_adapter *adapter,
691 			      int first_index, int count)
692 {
693 	struct ena_com_dev *ena_dev;
694 	struct ena_ring *txr, *rxr;
695 	int i;
696 
697 	ena_dev = adapter->ena_dev;
698 
699 	for (i = first_index; i < first_index + count; i++) {
700 		txr = &adapter->tx_ring[i];
701 		rxr = &adapter->rx_ring[i];
702 
703 		/* TX common ring state */
704 		ena_init_io_rings_common(adapter, txr, i);
705 
706 		/* TX specific ring state */
707 		txr->ring_size = adapter->requested_tx_ring_size;
708 		txr->tx_max_header_size = ena_dev->tx_max_header_size;
709 		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
710 		txr->sgl_size = adapter->max_tx_sgl_size;
711 		txr->smoothed_interval =
712 			ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
713 		txr->disable_meta_caching = adapter->disable_meta_caching;
714 		spin_lock_init(&txr->xdp_tx_lock);
715 
716 		/* Don't init RX queues for xdp queues */
717 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
718 			/* RX common ring state */
719 			ena_init_io_rings_common(adapter, rxr, i);
720 
721 			/* RX specific ring state */
722 			rxr->ring_size = adapter->requested_rx_ring_size;
723 			rxr->rx_copybreak = adapter->rx_copybreak;
724 			rxr->sgl_size = adapter->max_rx_sgl_size;
725 			rxr->smoothed_interval =
726 				ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
727 			rxr->empty_rx_queue = 0;
728 			rxr->rx_headroom = NET_SKB_PAD;
729 			adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
730 			rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues];
731 		}
732 	}
733 }
734 
735 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
736  * @adapter: network interface device structure
737  * @qid: queue index
738  *
739  * Return 0 on success, negative on failure
740  */
741 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
742 {
743 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
744 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
745 	int size, i, node;
746 
747 	if (tx_ring->tx_buffer_info) {
748 		netif_err(adapter, ifup,
749 			  adapter->netdev, "tx_buffer_info info is not NULL");
750 		return -EEXIST;
751 	}
752 
753 	size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
754 	node = cpu_to_node(ena_irq->cpu);
755 
756 	tx_ring->tx_buffer_info = vzalloc_node(size, node);
757 	if (!tx_ring->tx_buffer_info) {
758 		tx_ring->tx_buffer_info = vzalloc(size);
759 		if (!tx_ring->tx_buffer_info)
760 			goto err_tx_buffer_info;
761 	}
762 
763 	size = sizeof(u16) * tx_ring->ring_size;
764 	tx_ring->free_ids = vzalloc_node(size, node);
765 	if (!tx_ring->free_ids) {
766 		tx_ring->free_ids = vzalloc(size);
767 		if (!tx_ring->free_ids)
768 			goto err_tx_free_ids;
769 	}
770 
771 	size = tx_ring->tx_max_header_size;
772 	tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
773 	if (!tx_ring->push_buf_intermediate_buf) {
774 		tx_ring->push_buf_intermediate_buf = vzalloc(size);
775 		if (!tx_ring->push_buf_intermediate_buf)
776 			goto err_push_buf_intermediate_buf;
777 	}
778 
779 	/* Req id ring for TX out of order completions */
780 	for (i = 0; i < tx_ring->ring_size; i++)
781 		tx_ring->free_ids[i] = i;
782 
783 	/* Reset tx statistics */
784 	memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
785 
786 	tx_ring->next_to_use = 0;
787 	tx_ring->next_to_clean = 0;
788 	tx_ring->cpu = ena_irq->cpu;
789 	tx_ring->numa_node = node;
790 	return 0;
791 
792 err_push_buf_intermediate_buf:
793 	vfree(tx_ring->free_ids);
794 	tx_ring->free_ids = NULL;
795 err_tx_free_ids:
796 	vfree(tx_ring->tx_buffer_info);
797 	tx_ring->tx_buffer_info = NULL;
798 err_tx_buffer_info:
799 	return -ENOMEM;
800 }
801 
802 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
803  * @adapter: network interface device structure
804  * @qid: queue index
805  *
806  * Free all transmit software resources
807  */
808 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
809 {
810 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
811 
812 	vfree(tx_ring->tx_buffer_info);
813 	tx_ring->tx_buffer_info = NULL;
814 
815 	vfree(tx_ring->free_ids);
816 	tx_ring->free_ids = NULL;
817 
818 	vfree(tx_ring->push_buf_intermediate_buf);
819 	tx_ring->push_buf_intermediate_buf = NULL;
820 }
821 
822 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
823 					   int first_index,
824 					   int count)
825 {
826 	int i, rc = 0;
827 
828 	for (i = first_index; i < first_index + count; i++) {
829 		rc = ena_setup_tx_resources(adapter, i);
830 		if (rc)
831 			goto err_setup_tx;
832 	}
833 
834 	return 0;
835 
836 err_setup_tx:
837 
838 	netif_err(adapter, ifup, adapter->netdev,
839 		  "Tx queue %d: allocation failed\n", i);
840 
841 	/* rewind the index freeing the rings as we go */
842 	while (first_index < i--)
843 		ena_free_tx_resources(adapter, i);
844 	return rc;
845 }
846 
847 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
848 						  int first_index, int count)
849 {
850 	int i;
851 
852 	for (i = first_index; i < first_index + count; i++)
853 		ena_free_tx_resources(adapter, i);
854 }
855 
856 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
857  * @adapter: board private structure
858  *
859  * Free all transmit software resources
860  */
861 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
862 {
863 	ena_free_all_io_tx_resources_in_range(adapter,
864 					      0,
865 					      adapter->xdp_num_queues +
866 					      adapter->num_io_queues);
867 }
868 
869 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
870  * @adapter: network interface device structure
871  * @qid: queue index
872  *
873  * Returns 0 on success, negative on failure
874  */
875 static int ena_setup_rx_resources(struct ena_adapter *adapter,
876 				  u32 qid)
877 {
878 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
879 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
880 	int size, node, i;
881 
882 	if (rx_ring->rx_buffer_info) {
883 		netif_err(adapter, ifup, adapter->netdev,
884 			  "rx_buffer_info is not NULL");
885 		return -EEXIST;
886 	}
887 
888 	/* alloc extra element so in rx path
889 	 * we can always prefetch rx_info + 1
890 	 */
891 	size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
892 	node = cpu_to_node(ena_irq->cpu);
893 
894 	rx_ring->rx_buffer_info = vzalloc_node(size, node);
895 	if (!rx_ring->rx_buffer_info) {
896 		rx_ring->rx_buffer_info = vzalloc(size);
897 		if (!rx_ring->rx_buffer_info)
898 			return -ENOMEM;
899 	}
900 
901 	size = sizeof(u16) * rx_ring->ring_size;
902 	rx_ring->free_ids = vzalloc_node(size, node);
903 	if (!rx_ring->free_ids) {
904 		rx_ring->free_ids = vzalloc(size);
905 		if (!rx_ring->free_ids) {
906 			vfree(rx_ring->rx_buffer_info);
907 			rx_ring->rx_buffer_info = NULL;
908 			return -ENOMEM;
909 		}
910 	}
911 
912 	/* Req id ring for receiving RX pkts out of order */
913 	for (i = 0; i < rx_ring->ring_size; i++)
914 		rx_ring->free_ids[i] = i;
915 
916 	/* Reset rx statistics */
917 	memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
918 
919 	rx_ring->next_to_clean = 0;
920 	rx_ring->next_to_use = 0;
921 	rx_ring->cpu = ena_irq->cpu;
922 	rx_ring->numa_node = node;
923 
924 	return 0;
925 }
926 
927 /* ena_free_rx_resources - Free I/O Rx Resources
928  * @adapter: network interface device structure
929  * @qid: queue index
930  *
931  * Free all receive software resources
932  */
933 static void ena_free_rx_resources(struct ena_adapter *adapter,
934 				  u32 qid)
935 {
936 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
937 
938 	vfree(rx_ring->rx_buffer_info);
939 	rx_ring->rx_buffer_info = NULL;
940 
941 	vfree(rx_ring->free_ids);
942 	rx_ring->free_ids = NULL;
943 }
944 
945 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
946  * @adapter: board private structure
947  *
948  * Return 0 on success, negative on failure
949  */
950 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
951 {
952 	int i, rc = 0;
953 
954 	for (i = 0; i < adapter->num_io_queues; i++) {
955 		rc = ena_setup_rx_resources(adapter, i);
956 		if (rc)
957 			goto err_setup_rx;
958 	}
959 
960 	return 0;
961 
962 err_setup_rx:
963 
964 	netif_err(adapter, ifup, adapter->netdev,
965 		  "Rx queue %d: allocation failed\n", i);
966 
967 	/* rewind the index freeing the rings as we go */
968 	while (i--)
969 		ena_free_rx_resources(adapter, i);
970 	return rc;
971 }
972 
973 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
974  * @adapter: board private structure
975  *
976  * Free all receive software resources
977  */
978 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
979 {
980 	int i;
981 
982 	for (i = 0; i < adapter->num_io_queues; i++)
983 		ena_free_rx_resources(adapter, i);
984 }
985 
986 static struct page *ena_alloc_map_page(struct ena_ring *rx_ring,
987 				       dma_addr_t *dma)
988 {
989 	struct page *page;
990 
991 	/* This would allocate the page on the same NUMA node the executing code
992 	 * is running on.
993 	 */
994 	page = dev_alloc_page();
995 	if (!page) {
996 		ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1,
997 				  &rx_ring->syncp);
998 		return ERR_PTR(-ENOSPC);
999 	}
1000 
1001 	/* To enable NIC-side port-mirroring, AKA SPAN port,
1002 	 * we make the buffer readable from the nic as well
1003 	 */
1004 	*dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
1005 			    DMA_BIDIRECTIONAL);
1006 	if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) {
1007 		ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1,
1008 				  &rx_ring->syncp);
1009 		__free_page(page);
1010 		return ERR_PTR(-EIO);
1011 	}
1012 
1013 	return page;
1014 }
1015 
1016 static int ena_alloc_rx_buffer(struct ena_ring *rx_ring,
1017 			       struct ena_rx_buffer *rx_info)
1018 {
1019 	int headroom = rx_ring->rx_headroom;
1020 	struct ena_com_buf *ena_buf;
1021 	struct page *page;
1022 	dma_addr_t dma;
1023 	int tailroom;
1024 
1025 	/* restore page offset value in case it has been changed by device */
1026 	rx_info->buf_offset = headroom;
1027 
1028 	/* if previous allocated page is not used */
1029 	if (unlikely(rx_info->page))
1030 		return 0;
1031 
1032 	/* We handle DMA here */
1033 	page = ena_alloc_map_page(rx_ring, &dma);
1034 	if (unlikely(IS_ERR(page)))
1035 		return PTR_ERR(page);
1036 
1037 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1038 		  "Allocate page %p, rx_info %p\n", page, rx_info);
1039 
1040 	tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1041 
1042 	rx_info->page = page;
1043 	rx_info->dma_addr = dma;
1044 	rx_info->page_offset = 0;
1045 	ena_buf = &rx_info->ena_buf;
1046 	ena_buf->paddr = dma + headroom;
1047 	ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom;
1048 
1049 	return 0;
1050 }
1051 
1052 static void ena_unmap_rx_buff_attrs(struct ena_ring *rx_ring,
1053 				    struct ena_rx_buffer *rx_info,
1054 				    unsigned long attrs)
1055 {
1056 	dma_unmap_page_attrs(rx_ring->dev, rx_info->dma_addr, ENA_PAGE_SIZE,
1057 			     DMA_BIDIRECTIONAL, attrs);
1058 }
1059 
1060 static void ena_free_rx_page(struct ena_ring *rx_ring,
1061 			     struct ena_rx_buffer *rx_info)
1062 {
1063 	struct page *page = rx_info->page;
1064 
1065 	if (unlikely(!page)) {
1066 		netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1067 			   "Trying to free unallocated buffer\n");
1068 		return;
1069 	}
1070 
1071 	ena_unmap_rx_buff_attrs(rx_ring, rx_info, 0);
1072 
1073 	__free_page(page);
1074 	rx_info->page = NULL;
1075 }
1076 
1077 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
1078 {
1079 	u16 next_to_use, req_id;
1080 	u32 i;
1081 	int rc;
1082 
1083 	next_to_use = rx_ring->next_to_use;
1084 
1085 	for (i = 0; i < num; i++) {
1086 		struct ena_rx_buffer *rx_info;
1087 
1088 		req_id = rx_ring->free_ids[next_to_use];
1089 
1090 		rx_info = &rx_ring->rx_buffer_info[req_id];
1091 
1092 		rc = ena_alloc_rx_buffer(rx_ring, rx_info);
1093 		if (unlikely(rc < 0)) {
1094 			netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1095 				   "Failed to allocate buffer for rx queue %d\n",
1096 				   rx_ring->qid);
1097 			break;
1098 		}
1099 		rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1100 						&rx_info->ena_buf,
1101 						req_id);
1102 		if (unlikely(rc)) {
1103 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1104 				   "Failed to add buffer for rx queue %d\n",
1105 				   rx_ring->qid);
1106 			break;
1107 		}
1108 		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1109 						   rx_ring->ring_size);
1110 	}
1111 
1112 	if (unlikely(i < num)) {
1113 		ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1,
1114 				  &rx_ring->syncp);
1115 		netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1116 			   "Refilled rx qid %d with only %d buffers (from %d)\n",
1117 			   rx_ring->qid, i, num);
1118 	}
1119 
1120 	/* ena_com_write_sq_doorbell issues a wmb() */
1121 	if (likely(i))
1122 		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1123 
1124 	rx_ring->next_to_use = next_to_use;
1125 
1126 	return i;
1127 }
1128 
1129 static void ena_free_rx_bufs(struct ena_adapter *adapter,
1130 			     u32 qid)
1131 {
1132 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1133 	u32 i;
1134 
1135 	for (i = 0; i < rx_ring->ring_size; i++) {
1136 		struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1137 
1138 		if (rx_info->page)
1139 			ena_free_rx_page(rx_ring, rx_info);
1140 	}
1141 }
1142 
1143 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1144  * @adapter: board private structure
1145  */
1146 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1147 {
1148 	struct ena_ring *rx_ring;
1149 	int i, rc, bufs_num;
1150 
1151 	for (i = 0; i < adapter->num_io_queues; i++) {
1152 		rx_ring = &adapter->rx_ring[i];
1153 		bufs_num = rx_ring->ring_size - 1;
1154 		rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1155 
1156 		if (unlikely(rc != bufs_num))
1157 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1158 				   "Refilling Queue %d failed. allocated %d buffers from: %d\n",
1159 				   i, rc, bufs_num);
1160 	}
1161 }
1162 
1163 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1164 {
1165 	int i;
1166 
1167 	for (i = 0; i < adapter->num_io_queues; i++)
1168 		ena_free_rx_bufs(adapter, i);
1169 }
1170 
1171 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1172 			      struct ena_tx_buffer *tx_info)
1173 {
1174 	struct ena_com_buf *ena_buf;
1175 	u32 cnt;
1176 	int i;
1177 
1178 	ena_buf = tx_info->bufs;
1179 	cnt = tx_info->num_of_bufs;
1180 
1181 	if (unlikely(!cnt))
1182 		return;
1183 
1184 	if (tx_info->map_linear_data) {
1185 		dma_unmap_single(tx_ring->dev,
1186 				 dma_unmap_addr(ena_buf, paddr),
1187 				 dma_unmap_len(ena_buf, len),
1188 				 DMA_TO_DEVICE);
1189 		ena_buf++;
1190 		cnt--;
1191 	}
1192 
1193 	/* unmap remaining mapped pages */
1194 	for (i = 0; i < cnt; i++) {
1195 		dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1196 			       dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1197 		ena_buf++;
1198 	}
1199 }
1200 
1201 /* ena_free_tx_bufs - Free Tx Buffers per Queue
1202  * @tx_ring: TX ring for which buffers be freed
1203  */
1204 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1205 {
1206 	bool print_once = true;
1207 	u32 i;
1208 
1209 	for (i = 0; i < tx_ring->ring_size; i++) {
1210 		struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1211 
1212 		if (!tx_info->skb)
1213 			continue;
1214 
1215 		if (print_once) {
1216 			netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev,
1217 				     "Free uncompleted tx skb qid %d idx 0x%x\n",
1218 				     tx_ring->qid, i);
1219 			print_once = false;
1220 		} else {
1221 			netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev,
1222 				  "Free uncompleted tx skb qid %d idx 0x%x\n",
1223 				  tx_ring->qid, i);
1224 		}
1225 
1226 		ena_unmap_tx_buff(tx_ring, tx_info);
1227 
1228 		dev_kfree_skb_any(tx_info->skb);
1229 	}
1230 	netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1231 						  tx_ring->qid));
1232 }
1233 
1234 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1235 {
1236 	struct ena_ring *tx_ring;
1237 	int i;
1238 
1239 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1240 		tx_ring = &adapter->tx_ring[i];
1241 		ena_free_tx_bufs(tx_ring);
1242 	}
1243 }
1244 
1245 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1246 {
1247 	u16 ena_qid;
1248 	int i;
1249 
1250 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1251 		ena_qid = ENA_IO_TXQ_IDX(i);
1252 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1253 	}
1254 }
1255 
1256 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1257 {
1258 	u16 ena_qid;
1259 	int i;
1260 
1261 	for (i = 0; i < adapter->num_io_queues; i++) {
1262 		ena_qid = ENA_IO_RXQ_IDX(i);
1263 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
1264 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1265 	}
1266 }
1267 
1268 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1269 {
1270 	ena_destroy_all_tx_queues(adapter);
1271 	ena_destroy_all_rx_queues(adapter);
1272 }
1273 
1274 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1275 				 struct ena_tx_buffer *tx_info, bool is_xdp)
1276 {
1277 	if (tx_info)
1278 		netif_err(ring->adapter,
1279 			  tx_done,
1280 			  ring->netdev,
1281 			  "tx_info doesn't have valid %s. qid %u req_id %u",
1282 			   is_xdp ? "xdp frame" : "skb", ring->qid, req_id);
1283 	else
1284 		netif_err(ring->adapter,
1285 			  tx_done,
1286 			  ring->netdev,
1287 			  "Invalid req_id %u in qid %u\n",
1288 			  req_id, ring->qid);
1289 
1290 	ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp);
1291 	ena_reset_device(ring->adapter, ENA_REGS_RESET_INV_TX_REQ_ID);
1292 
1293 	return -EFAULT;
1294 }
1295 
1296 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1297 {
1298 	struct ena_tx_buffer *tx_info;
1299 
1300 	tx_info = &tx_ring->tx_buffer_info[req_id];
1301 	if (likely(tx_info->skb))
1302 		return 0;
1303 
1304 	return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1305 }
1306 
1307 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1308 {
1309 	struct ena_tx_buffer *tx_info;
1310 
1311 	tx_info = &xdp_ring->tx_buffer_info[req_id];
1312 	if (likely(tx_info->xdpf))
1313 		return 0;
1314 
1315 	return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1316 }
1317 
1318 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1319 {
1320 	struct netdev_queue *txq;
1321 	bool above_thresh;
1322 	u32 tx_bytes = 0;
1323 	u32 total_done = 0;
1324 	u16 next_to_clean;
1325 	u16 req_id;
1326 	int tx_pkts = 0;
1327 	int rc;
1328 
1329 	next_to_clean = tx_ring->next_to_clean;
1330 	txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1331 
1332 	while (tx_pkts < budget) {
1333 		struct ena_tx_buffer *tx_info;
1334 		struct sk_buff *skb;
1335 
1336 		rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1337 						&req_id);
1338 		if (rc) {
1339 			if (unlikely(rc == -EINVAL))
1340 				handle_invalid_req_id(tx_ring, req_id, NULL,
1341 						      false);
1342 			break;
1343 		}
1344 
1345 		/* validate that the request id points to a valid skb */
1346 		rc = validate_tx_req_id(tx_ring, req_id);
1347 		if (rc)
1348 			break;
1349 
1350 		tx_info = &tx_ring->tx_buffer_info[req_id];
1351 		skb = tx_info->skb;
1352 
1353 		/* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1354 		prefetch(&skb->end);
1355 
1356 		tx_info->skb = NULL;
1357 		tx_info->last_jiffies = 0;
1358 
1359 		ena_unmap_tx_buff(tx_ring, tx_info);
1360 
1361 		netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1362 			  "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1363 			  skb);
1364 
1365 		tx_bytes += skb->len;
1366 		dev_kfree_skb(skb);
1367 		tx_pkts++;
1368 		total_done += tx_info->tx_descs;
1369 
1370 		tx_ring->free_ids[next_to_clean] = req_id;
1371 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1372 						     tx_ring->ring_size);
1373 	}
1374 
1375 	tx_ring->next_to_clean = next_to_clean;
1376 	ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1377 	ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1378 
1379 	netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1380 
1381 	netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1382 		  "tx_poll: q %d done. total pkts: %d\n",
1383 		  tx_ring->qid, tx_pkts);
1384 
1385 	/* need to make the rings circular update visible to
1386 	 * ena_start_xmit() before checking for netif_queue_stopped().
1387 	 */
1388 	smp_mb();
1389 
1390 	above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1391 						    ENA_TX_WAKEUP_THRESH);
1392 	if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1393 		__netif_tx_lock(txq, smp_processor_id());
1394 		above_thresh =
1395 			ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1396 						     ENA_TX_WAKEUP_THRESH);
1397 		if (netif_tx_queue_stopped(txq) && above_thresh &&
1398 		    test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1399 			netif_tx_wake_queue(txq);
1400 			ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
1401 					  &tx_ring->syncp);
1402 		}
1403 		__netif_tx_unlock(txq);
1404 	}
1405 
1406 	return tx_pkts;
1407 }
1408 
1409 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag, u16 len)
1410 {
1411 	struct sk_buff *skb;
1412 
1413 	if (!first_frag)
1414 		skb = napi_alloc_skb(rx_ring->napi, len);
1415 	else
1416 		skb = napi_build_skb(first_frag, len);
1417 
1418 	if (unlikely(!skb)) {
1419 		ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1,
1420 				  &rx_ring->syncp);
1421 
1422 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1423 			  "Failed to allocate skb. first_frag %s\n",
1424 			  first_frag ? "provided" : "not provided");
1425 	}
1426 
1427 	return skb;
1428 }
1429 
1430 static bool ena_try_rx_buf_page_reuse(struct ena_rx_buffer *rx_info, u16 buf_len,
1431 				      u16 len, int pkt_offset)
1432 {
1433 	struct ena_com_buf *ena_buf = &rx_info->ena_buf;
1434 
1435 	/* More than ENA_MIN_RX_BUF_SIZE left in the reused buffer
1436 	 * for data + headroom + tailroom.
1437 	 */
1438 	if (SKB_DATA_ALIGN(len + pkt_offset) + ENA_MIN_RX_BUF_SIZE <= ena_buf->len) {
1439 		page_ref_inc(rx_info->page);
1440 		rx_info->page_offset += buf_len;
1441 		ena_buf->paddr += buf_len;
1442 		ena_buf->len -= buf_len;
1443 		return true;
1444 	}
1445 
1446 	return false;
1447 }
1448 
1449 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1450 				  struct ena_com_rx_buf_info *ena_bufs,
1451 				  u32 descs,
1452 				  u16 *next_to_clean)
1453 {
1454 	int tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1455 	bool is_xdp_loaded = ena_xdp_present_ring(rx_ring);
1456 	struct ena_rx_buffer *rx_info;
1457 	struct ena_adapter *adapter;
1458 	int page_offset, pkt_offset;
1459 	dma_addr_t pre_reuse_paddr;
1460 	u16 len, req_id, buf = 0;
1461 	bool reuse_rx_buf_page;
1462 	struct sk_buff *skb;
1463 	void *buf_addr;
1464 	int buf_offset;
1465 	u16 buf_len;
1466 
1467 	len = ena_bufs[buf].len;
1468 	req_id = ena_bufs[buf].req_id;
1469 
1470 	rx_info = &rx_ring->rx_buffer_info[req_id];
1471 
1472 	if (unlikely(!rx_info->page)) {
1473 		adapter = rx_ring->adapter;
1474 		netif_err(adapter, rx_err, rx_ring->netdev,
1475 			  "Page is NULL. qid %u req_id %u\n", rx_ring->qid, req_id);
1476 		ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, &rx_ring->syncp);
1477 		ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID);
1478 		return NULL;
1479 	}
1480 
1481 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1482 		  "rx_info %p page %p\n",
1483 		  rx_info, rx_info->page);
1484 
1485 	buf_offset = rx_info->buf_offset;
1486 	pkt_offset = buf_offset - rx_ring->rx_headroom;
1487 	page_offset = rx_info->page_offset;
1488 	buf_addr = page_address(rx_info->page) + page_offset;
1489 
1490 	if (len <= rx_ring->rx_copybreak) {
1491 		skb = ena_alloc_skb(rx_ring, NULL, len);
1492 		if (unlikely(!skb))
1493 			return NULL;
1494 
1495 		/* sync this buffer for CPU use */
1496 		dma_sync_single_for_cpu(rx_ring->dev,
1497 					dma_unmap_addr(&rx_info->ena_buf, paddr) + pkt_offset,
1498 					len,
1499 					DMA_FROM_DEVICE);
1500 		skb_copy_to_linear_data(skb, buf_addr + buf_offset, len);
1501 		dma_sync_single_for_device(rx_ring->dev,
1502 					   dma_unmap_addr(&rx_info->ena_buf, paddr) + pkt_offset,
1503 					   len,
1504 					   DMA_FROM_DEVICE);
1505 
1506 		skb_put(skb, len);
1507 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1508 			  "RX allocated small packet. len %d.\n", skb->len);
1509 		skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1510 		rx_ring->free_ids[*next_to_clean] = req_id;
1511 		*next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1512 						     rx_ring->ring_size);
1513 		return skb;
1514 	}
1515 
1516 	buf_len = SKB_DATA_ALIGN(len + buf_offset + tailroom);
1517 
1518 	pre_reuse_paddr = dma_unmap_addr(&rx_info->ena_buf, paddr);
1519 
1520 	/* If XDP isn't loaded try to reuse part of the RX buffer */
1521 	reuse_rx_buf_page = !is_xdp_loaded &&
1522 			    ena_try_rx_buf_page_reuse(rx_info, buf_len, len, pkt_offset);
1523 
1524 	dma_sync_single_for_cpu(rx_ring->dev,
1525 				pre_reuse_paddr + pkt_offset,
1526 				len,
1527 				DMA_FROM_DEVICE);
1528 
1529 	if (!reuse_rx_buf_page)
1530 		ena_unmap_rx_buff_attrs(rx_ring, rx_info, DMA_ATTR_SKIP_CPU_SYNC);
1531 
1532 	skb = ena_alloc_skb(rx_ring, buf_addr, buf_len);
1533 	if (unlikely(!skb))
1534 		return NULL;
1535 
1536 	/* Populate skb's linear part */
1537 	skb_reserve(skb, buf_offset);
1538 	skb_put(skb, len);
1539 	skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1540 
1541 	do {
1542 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1543 			  "RX skb updated. len %d. data_len %d\n",
1544 			  skb->len, skb->data_len);
1545 
1546 		if (!reuse_rx_buf_page)
1547 			rx_info->page = NULL;
1548 
1549 		rx_ring->free_ids[*next_to_clean] = req_id;
1550 		*next_to_clean =
1551 			ENA_RX_RING_IDX_NEXT(*next_to_clean,
1552 					     rx_ring->ring_size);
1553 		if (likely(--descs == 0))
1554 			break;
1555 
1556 		buf++;
1557 		len = ena_bufs[buf].len;
1558 		req_id = ena_bufs[buf].req_id;
1559 
1560 		rx_info = &rx_ring->rx_buffer_info[req_id];
1561 
1562 		/* rx_info->buf_offset includes rx_ring->rx_headroom */
1563 		buf_offset = rx_info->buf_offset;
1564 		pkt_offset = buf_offset - rx_ring->rx_headroom;
1565 		buf_len = SKB_DATA_ALIGN(len + buf_offset + tailroom);
1566 		page_offset = rx_info->page_offset;
1567 
1568 		pre_reuse_paddr = dma_unmap_addr(&rx_info->ena_buf, paddr);
1569 
1570 		reuse_rx_buf_page = !is_xdp_loaded &&
1571 				    ena_try_rx_buf_page_reuse(rx_info, buf_len, len, pkt_offset);
1572 
1573 		dma_sync_single_for_cpu(rx_ring->dev,
1574 					pre_reuse_paddr + pkt_offset,
1575 					len,
1576 					DMA_FROM_DEVICE);
1577 
1578 		if (!reuse_rx_buf_page)
1579 			ena_unmap_rx_buff_attrs(rx_ring, rx_info,
1580 						DMA_ATTR_SKIP_CPU_SYNC);
1581 
1582 		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1583 				page_offset + buf_offset, len, buf_len);
1584 
1585 	} while (1);
1586 
1587 	return skb;
1588 }
1589 
1590 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1591  * @adapter: structure containing adapter specific data
1592  * @ena_rx_ctx: received packet context/metadata
1593  * @skb: skb currently being received and modified
1594  */
1595 static void ena_rx_checksum(struct ena_ring *rx_ring,
1596 				   struct ena_com_rx_ctx *ena_rx_ctx,
1597 				   struct sk_buff *skb)
1598 {
1599 	/* Rx csum disabled */
1600 	if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1601 		skb->ip_summed = CHECKSUM_NONE;
1602 		return;
1603 	}
1604 
1605 	/* For fragmented packets the checksum isn't valid */
1606 	if (ena_rx_ctx->frag) {
1607 		skb->ip_summed = CHECKSUM_NONE;
1608 		return;
1609 	}
1610 
1611 	/* if IP and error */
1612 	if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1613 		     (ena_rx_ctx->l3_csum_err))) {
1614 		/* ipv4 checksum error */
1615 		skb->ip_summed = CHECKSUM_NONE;
1616 		ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1,
1617 				  &rx_ring->syncp);
1618 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1619 			  "RX IPv4 header checksum error\n");
1620 		return;
1621 	}
1622 
1623 	/* if TCP/UDP */
1624 	if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1625 		   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1626 		if (unlikely(ena_rx_ctx->l4_csum_err)) {
1627 			/* TCP/UDP checksum error */
1628 			ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1,
1629 					  &rx_ring->syncp);
1630 			netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1631 				  "RX L4 checksum error\n");
1632 			skb->ip_summed = CHECKSUM_NONE;
1633 			return;
1634 		}
1635 
1636 		if (likely(ena_rx_ctx->l4_csum_checked)) {
1637 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1638 			ena_increase_stat(&rx_ring->rx_stats.csum_good, 1,
1639 					  &rx_ring->syncp);
1640 		} else {
1641 			ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1,
1642 					  &rx_ring->syncp);
1643 			skb->ip_summed = CHECKSUM_NONE;
1644 		}
1645 	} else {
1646 		skb->ip_summed = CHECKSUM_NONE;
1647 		return;
1648 	}
1649 
1650 }
1651 
1652 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1653 			    struct ena_com_rx_ctx *ena_rx_ctx,
1654 			    struct sk_buff *skb)
1655 {
1656 	enum pkt_hash_types hash_type;
1657 
1658 	if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1659 		if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1660 			   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1661 
1662 			hash_type = PKT_HASH_TYPE_L4;
1663 		else
1664 			hash_type = PKT_HASH_TYPE_NONE;
1665 
1666 		/* Override hash type if the packet is fragmented */
1667 		if (ena_rx_ctx->frag)
1668 			hash_type = PKT_HASH_TYPE_NONE;
1669 
1670 		skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1671 	}
1672 }
1673 
1674 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1675 {
1676 	struct ena_rx_buffer *rx_info;
1677 	int ret;
1678 
1679 	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1680 	xdp_prepare_buff(xdp, page_address(rx_info->page),
1681 			 rx_info->buf_offset,
1682 			 rx_ring->ena_bufs[0].len, false);
1683 	/* If for some reason we received a bigger packet than
1684 	 * we expect, then we simply drop it
1685 	 */
1686 	if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1687 		return ENA_XDP_DROP;
1688 
1689 	ret = ena_xdp_execute(rx_ring, xdp);
1690 
1691 	/* The xdp program might expand the headers */
1692 	if (ret == ENA_XDP_PASS) {
1693 		rx_info->buf_offset = xdp->data - xdp->data_hard_start;
1694 		rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1695 	}
1696 
1697 	return ret;
1698 }
1699 /* ena_clean_rx_irq - Cleanup RX irq
1700  * @rx_ring: RX ring to clean
1701  * @napi: napi handler
1702  * @budget: how many packets driver is allowed to clean
1703  *
1704  * Returns the number of cleaned buffers.
1705  */
1706 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1707 			    u32 budget)
1708 {
1709 	u16 next_to_clean = rx_ring->next_to_clean;
1710 	struct ena_com_rx_ctx ena_rx_ctx;
1711 	struct ena_rx_buffer *rx_info;
1712 	struct ena_adapter *adapter;
1713 	u32 res_budget, work_done;
1714 	int rx_copybreak_pkt = 0;
1715 	int refill_threshold;
1716 	struct sk_buff *skb;
1717 	int refill_required;
1718 	struct xdp_buff xdp;
1719 	int xdp_flags = 0;
1720 	int total_len = 0;
1721 	int xdp_verdict;
1722 	int rc = 0;
1723 	int i;
1724 
1725 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1726 		  "%s qid %d\n", __func__, rx_ring->qid);
1727 	res_budget = budget;
1728 	xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq);
1729 
1730 	do {
1731 		xdp_verdict = ENA_XDP_PASS;
1732 		skb = NULL;
1733 		ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1734 		ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1735 		ena_rx_ctx.descs = 0;
1736 		ena_rx_ctx.pkt_offset = 0;
1737 		rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1738 				    rx_ring->ena_com_io_sq,
1739 				    &ena_rx_ctx);
1740 		if (unlikely(rc))
1741 			goto error;
1742 
1743 		if (unlikely(ena_rx_ctx.descs == 0))
1744 			break;
1745 
1746 		/* First descriptor might have an offset set by the device */
1747 		rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1748 		rx_info->buf_offset += ena_rx_ctx.pkt_offset;
1749 
1750 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1751 			  "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1752 			  rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1753 			  ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1754 
1755 		if (ena_xdp_present_ring(rx_ring))
1756 			xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1757 
1758 		/* allocate skb and fill it */
1759 		if (xdp_verdict == ENA_XDP_PASS)
1760 			skb = ena_rx_skb(rx_ring,
1761 					 rx_ring->ena_bufs,
1762 					 ena_rx_ctx.descs,
1763 					 &next_to_clean);
1764 
1765 		if (unlikely(!skb)) {
1766 			for (i = 0; i < ena_rx_ctx.descs; i++) {
1767 				int req_id = rx_ring->ena_bufs[i].req_id;
1768 
1769 				rx_ring->free_ids[next_to_clean] = req_id;
1770 				next_to_clean =
1771 					ENA_RX_RING_IDX_NEXT(next_to_clean,
1772 							     rx_ring->ring_size);
1773 
1774 				/* Packets was passed for transmission, unmap it
1775 				 * from RX side.
1776 				 */
1777 				if (xdp_verdict & ENA_XDP_FORWARDED) {
1778 					ena_unmap_rx_buff_attrs(rx_ring,
1779 								&rx_ring->rx_buffer_info[req_id],
1780 								0);
1781 					rx_ring->rx_buffer_info[req_id].page = NULL;
1782 				}
1783 			}
1784 			if (xdp_verdict != ENA_XDP_PASS) {
1785 				xdp_flags |= xdp_verdict;
1786 				total_len += ena_rx_ctx.ena_bufs[0].len;
1787 				res_budget--;
1788 				continue;
1789 			}
1790 			break;
1791 		}
1792 
1793 		ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1794 
1795 		ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1796 
1797 		skb_record_rx_queue(skb, rx_ring->qid);
1798 
1799 		if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak)
1800 			rx_copybreak_pkt++;
1801 
1802 		total_len += skb->len;
1803 
1804 		napi_gro_receive(napi, skb);
1805 
1806 		res_budget--;
1807 	} while (likely(res_budget));
1808 
1809 	work_done = budget - res_budget;
1810 	rx_ring->per_napi_packets += work_done;
1811 	u64_stats_update_begin(&rx_ring->syncp);
1812 	rx_ring->rx_stats.bytes += total_len;
1813 	rx_ring->rx_stats.cnt += work_done;
1814 	rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1815 	u64_stats_update_end(&rx_ring->syncp);
1816 
1817 	rx_ring->next_to_clean = next_to_clean;
1818 
1819 	refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
1820 	refill_threshold =
1821 		min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1822 		      ENA_RX_REFILL_THRESH_PACKET);
1823 
1824 	/* Optimization, try to batch new rx buffers */
1825 	if (refill_required > refill_threshold) {
1826 		ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1827 		ena_refill_rx_bufs(rx_ring, refill_required);
1828 	}
1829 
1830 	if (xdp_flags & ENA_XDP_REDIRECT)
1831 		xdp_do_flush_map();
1832 
1833 	return work_done;
1834 
1835 error:
1836 	adapter = netdev_priv(rx_ring->netdev);
1837 
1838 	if (rc == -ENOSPC) {
1839 		ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1,
1840 				  &rx_ring->syncp);
1841 		ena_reset_device(adapter, ENA_REGS_RESET_TOO_MANY_RX_DESCS);
1842 	} else {
1843 		ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1,
1844 				  &rx_ring->syncp);
1845 		ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID);
1846 	}
1847 	return 0;
1848 }
1849 
1850 static void ena_dim_work(struct work_struct *w)
1851 {
1852 	struct dim *dim = container_of(w, struct dim, work);
1853 	struct dim_cq_moder cur_moder =
1854 		net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1855 	struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1856 
1857 	ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1858 	dim->state = DIM_START_MEASURE;
1859 }
1860 
1861 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1862 {
1863 	struct dim_sample dim_sample;
1864 	struct ena_ring *rx_ring = ena_napi->rx_ring;
1865 
1866 	if (!rx_ring->per_napi_packets)
1867 		return;
1868 
1869 	rx_ring->non_empty_napi_events++;
1870 
1871 	dim_update_sample(rx_ring->non_empty_napi_events,
1872 			  rx_ring->rx_stats.cnt,
1873 			  rx_ring->rx_stats.bytes,
1874 			  &dim_sample);
1875 
1876 	net_dim(&ena_napi->dim, dim_sample);
1877 
1878 	rx_ring->per_napi_packets = 0;
1879 }
1880 
1881 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1882 					struct ena_ring *rx_ring)
1883 {
1884 	u32 rx_interval = tx_ring->smoothed_interval;
1885 	struct ena_eth_io_intr_reg intr_reg;
1886 
1887 	/* Rx ring can be NULL when for XDP tx queues which don't have an
1888 	 * accompanying rx_ring pair.
1889 	 */
1890 	if (rx_ring)
1891 		rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1892 			rx_ring->smoothed_interval :
1893 			ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1894 
1895 	/* Update intr register: rx intr delay,
1896 	 * tx intr delay and interrupt unmask
1897 	 */
1898 	ena_com_update_intr_reg(&intr_reg,
1899 				rx_interval,
1900 				tx_ring->smoothed_interval,
1901 				true);
1902 
1903 	ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1,
1904 			  &tx_ring->syncp);
1905 
1906 	/* It is a shared MSI-X.
1907 	 * Tx and Rx CQ have pointer to it.
1908 	 * So we use one of them to reach the intr reg
1909 	 * The Tx ring is used because the rx_ring is NULL for XDP queues
1910 	 */
1911 	ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1912 }
1913 
1914 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1915 					     struct ena_ring *rx_ring)
1916 {
1917 	int cpu = get_cpu();
1918 	int numa_node;
1919 
1920 	/* Check only one ring since the 2 rings are running on the same cpu */
1921 	if (likely(tx_ring->cpu == cpu))
1922 		goto out;
1923 
1924 	tx_ring->cpu = cpu;
1925 	if (rx_ring)
1926 		rx_ring->cpu = cpu;
1927 
1928 	numa_node = cpu_to_node(cpu);
1929 
1930 	if (likely(tx_ring->numa_node == numa_node))
1931 		goto out;
1932 
1933 	put_cpu();
1934 
1935 	if (numa_node != NUMA_NO_NODE) {
1936 		ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1937 		tx_ring->numa_node = numa_node;
1938 		if (rx_ring) {
1939 			rx_ring->numa_node = numa_node;
1940 			ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1941 						 numa_node);
1942 		}
1943 	}
1944 
1945 	return;
1946 out:
1947 	put_cpu();
1948 }
1949 
1950 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1951 {
1952 	u32 total_done = 0;
1953 	u16 next_to_clean;
1954 	int tx_pkts = 0;
1955 	u16 req_id;
1956 	int rc;
1957 
1958 	if (unlikely(!xdp_ring))
1959 		return 0;
1960 	next_to_clean = xdp_ring->next_to_clean;
1961 
1962 	while (tx_pkts < budget) {
1963 		struct ena_tx_buffer *tx_info;
1964 		struct xdp_frame *xdpf;
1965 
1966 		rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1967 						&req_id);
1968 		if (rc) {
1969 			if (unlikely(rc == -EINVAL))
1970 				handle_invalid_req_id(xdp_ring, req_id, NULL,
1971 						      true);
1972 			break;
1973 		}
1974 
1975 		/* validate that the request id points to a valid xdp_frame */
1976 		rc = validate_xdp_req_id(xdp_ring, req_id);
1977 		if (rc)
1978 			break;
1979 
1980 		tx_info = &xdp_ring->tx_buffer_info[req_id];
1981 		xdpf = tx_info->xdpf;
1982 
1983 		tx_info->xdpf = NULL;
1984 		tx_info->last_jiffies = 0;
1985 		ena_unmap_tx_buff(xdp_ring, tx_info);
1986 
1987 		netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1988 			  "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1989 			  xdpf);
1990 
1991 		tx_pkts++;
1992 		total_done += tx_info->tx_descs;
1993 
1994 		xdp_return_frame(xdpf);
1995 		xdp_ring->free_ids[next_to_clean] = req_id;
1996 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1997 						     xdp_ring->ring_size);
1998 	}
1999 
2000 	xdp_ring->next_to_clean = next_to_clean;
2001 	ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
2002 	ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
2003 
2004 	netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
2005 		  "tx_poll: q %d done. total pkts: %d\n",
2006 		  xdp_ring->qid, tx_pkts);
2007 
2008 	return tx_pkts;
2009 }
2010 
2011 static int ena_io_poll(struct napi_struct *napi, int budget)
2012 {
2013 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
2014 	struct ena_ring *tx_ring, *rx_ring;
2015 	int tx_work_done;
2016 	int rx_work_done = 0;
2017 	int tx_budget;
2018 	int napi_comp_call = 0;
2019 	int ret;
2020 
2021 	tx_ring = ena_napi->tx_ring;
2022 	rx_ring = ena_napi->rx_ring;
2023 
2024 	tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
2025 
2026 	if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
2027 	    test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
2028 		napi_complete_done(napi, 0);
2029 		return 0;
2030 	}
2031 
2032 	tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
2033 	/* On netpoll the budget is zero and the handler should only clean the
2034 	 * tx completions.
2035 	 */
2036 	if (likely(budget))
2037 		rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
2038 
2039 	/* If the device is about to reset or down, avoid unmask
2040 	 * the interrupt and return 0 so NAPI won't reschedule
2041 	 */
2042 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
2043 		     test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
2044 		napi_complete_done(napi, 0);
2045 		ret = 0;
2046 
2047 	} else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
2048 		napi_comp_call = 1;
2049 
2050 		/* Update numa and unmask the interrupt only when schedule
2051 		 * from the interrupt context (vs from sk_busy_loop)
2052 		 */
2053 		if (napi_complete_done(napi, rx_work_done) &&
2054 		    READ_ONCE(ena_napi->interrupts_masked)) {
2055 			smp_rmb(); /* make sure interrupts_masked is read */
2056 			WRITE_ONCE(ena_napi->interrupts_masked, false);
2057 			/* We apply adaptive moderation on Rx path only.
2058 			 * Tx uses static interrupt moderation.
2059 			 */
2060 			if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
2061 				ena_adjust_adaptive_rx_intr_moderation(ena_napi);
2062 
2063 			ena_update_ring_numa_node(tx_ring, rx_ring);
2064 			ena_unmask_interrupt(tx_ring, rx_ring);
2065 		}
2066 
2067 		ret = rx_work_done;
2068 	} else {
2069 		ret = budget;
2070 	}
2071 
2072 	u64_stats_update_begin(&tx_ring->syncp);
2073 	tx_ring->tx_stats.napi_comp += napi_comp_call;
2074 	tx_ring->tx_stats.tx_poll++;
2075 	u64_stats_update_end(&tx_ring->syncp);
2076 
2077 	tx_ring->tx_stats.last_napi_jiffies = jiffies;
2078 
2079 	return ret;
2080 }
2081 
2082 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
2083 {
2084 	struct ena_adapter *adapter = (struct ena_adapter *)data;
2085 
2086 	ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
2087 
2088 	/* Don't call the aenq handler before probe is done */
2089 	if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
2090 		ena_com_aenq_intr_handler(adapter->ena_dev, data);
2091 
2092 	return IRQ_HANDLED;
2093 }
2094 
2095 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
2096  * @irq: interrupt number
2097  * @data: pointer to a network interface private napi device structure
2098  */
2099 static irqreturn_t ena_intr_msix_io(int irq, void *data)
2100 {
2101 	struct ena_napi *ena_napi = data;
2102 
2103 	/* Used to check HW health */
2104 	WRITE_ONCE(ena_napi->first_interrupt, true);
2105 
2106 	WRITE_ONCE(ena_napi->interrupts_masked, true);
2107 	smp_wmb(); /* write interrupts_masked before calling napi */
2108 
2109 	napi_schedule_irqoff(&ena_napi->napi);
2110 
2111 	return IRQ_HANDLED;
2112 }
2113 
2114 /* Reserve a single MSI-X vector for management (admin + aenq).
2115  * plus reserve one vector for each potential io queue.
2116  * the number of potential io queues is the minimum of what the device
2117  * supports and the number of vCPUs.
2118  */
2119 static int ena_enable_msix(struct ena_adapter *adapter)
2120 {
2121 	int msix_vecs, irq_cnt;
2122 
2123 	if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2124 		netif_err(adapter, probe, adapter->netdev,
2125 			  "Error, MSI-X is already enabled\n");
2126 		return -EPERM;
2127 	}
2128 
2129 	/* Reserved the max msix vectors we might need */
2130 	msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
2131 	netif_dbg(adapter, probe, adapter->netdev,
2132 		  "Trying to enable MSI-X, vectors %d\n", msix_vecs);
2133 
2134 	irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
2135 					msix_vecs, PCI_IRQ_MSIX);
2136 
2137 	if (irq_cnt < 0) {
2138 		netif_err(adapter, probe, adapter->netdev,
2139 			  "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
2140 		return -ENOSPC;
2141 	}
2142 
2143 	if (irq_cnt != msix_vecs) {
2144 		netif_notice(adapter, probe, adapter->netdev,
2145 			     "Enable only %d MSI-X (out of %d), reduce the number of queues\n",
2146 			     irq_cnt, msix_vecs);
2147 		adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
2148 	}
2149 
2150 	if (ena_init_rx_cpu_rmap(adapter))
2151 		netif_warn(adapter, probe, adapter->netdev,
2152 			   "Failed to map IRQs to CPUs\n");
2153 
2154 	adapter->msix_vecs = irq_cnt;
2155 	set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
2156 
2157 	return 0;
2158 }
2159 
2160 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2161 {
2162 	u32 cpu;
2163 
2164 	snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2165 		 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2166 		 pci_name(adapter->pdev));
2167 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2168 		ena_intr_msix_mgmnt;
2169 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2170 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2171 		pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2172 	cpu = cpumask_first(cpu_online_mask);
2173 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2174 	cpumask_set_cpu(cpu,
2175 			&adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2176 }
2177 
2178 static void ena_setup_io_intr(struct ena_adapter *adapter)
2179 {
2180 	struct net_device *netdev;
2181 	int irq_idx, i, cpu;
2182 	int io_queue_count;
2183 
2184 	netdev = adapter->netdev;
2185 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2186 
2187 	for (i = 0; i < io_queue_count; i++) {
2188 		irq_idx = ENA_IO_IRQ_IDX(i);
2189 		cpu = i % num_online_cpus();
2190 
2191 		snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2192 			 "%s-Tx-Rx-%d", netdev->name, i);
2193 		adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2194 		adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2195 		adapter->irq_tbl[irq_idx].vector =
2196 			pci_irq_vector(adapter->pdev, irq_idx);
2197 		adapter->irq_tbl[irq_idx].cpu = cpu;
2198 
2199 		cpumask_set_cpu(cpu,
2200 				&adapter->irq_tbl[irq_idx].affinity_hint_mask);
2201 	}
2202 }
2203 
2204 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2205 {
2206 	unsigned long flags = 0;
2207 	struct ena_irq *irq;
2208 	int rc;
2209 
2210 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2211 	rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2212 			 irq->data);
2213 	if (rc) {
2214 		netif_err(adapter, probe, adapter->netdev,
2215 			  "Failed to request admin irq\n");
2216 		return rc;
2217 	}
2218 
2219 	netif_dbg(adapter, probe, adapter->netdev,
2220 		  "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2221 		  irq->affinity_hint_mask.bits[0], irq->vector);
2222 
2223 	irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2224 
2225 	return rc;
2226 }
2227 
2228 static int ena_request_io_irq(struct ena_adapter *adapter)
2229 {
2230 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2231 	unsigned long flags = 0;
2232 	struct ena_irq *irq;
2233 	int rc = 0, i, k;
2234 
2235 	if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2236 		netif_err(adapter, ifup, adapter->netdev,
2237 			  "Failed to request I/O IRQ: MSI-X is not enabled\n");
2238 		return -EINVAL;
2239 	}
2240 
2241 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2242 		irq = &adapter->irq_tbl[i];
2243 		rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2244 				 irq->data);
2245 		if (rc) {
2246 			netif_err(adapter, ifup, adapter->netdev,
2247 				  "Failed to request I/O IRQ. index %d rc %d\n",
2248 				   i, rc);
2249 			goto err;
2250 		}
2251 
2252 		netif_dbg(adapter, ifup, adapter->netdev,
2253 			  "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2254 			  i, irq->affinity_hint_mask.bits[0], irq->vector);
2255 
2256 		irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2257 	}
2258 
2259 	return rc;
2260 
2261 err:
2262 	for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2263 		irq = &adapter->irq_tbl[k];
2264 		free_irq(irq->vector, irq->data);
2265 	}
2266 
2267 	return rc;
2268 }
2269 
2270 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2271 {
2272 	struct ena_irq *irq;
2273 
2274 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2275 	synchronize_irq(irq->vector);
2276 	irq_set_affinity_hint(irq->vector, NULL);
2277 	free_irq(irq->vector, irq->data);
2278 }
2279 
2280 static void ena_free_io_irq(struct ena_adapter *adapter)
2281 {
2282 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2283 	struct ena_irq *irq;
2284 	int i;
2285 
2286 #ifdef CONFIG_RFS_ACCEL
2287 	if (adapter->msix_vecs >= 1) {
2288 		free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2289 		adapter->netdev->rx_cpu_rmap = NULL;
2290 	}
2291 #endif /* CONFIG_RFS_ACCEL */
2292 
2293 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2294 		irq = &adapter->irq_tbl[i];
2295 		irq_set_affinity_hint(irq->vector, NULL);
2296 		free_irq(irq->vector, irq->data);
2297 	}
2298 }
2299 
2300 static void ena_disable_msix(struct ena_adapter *adapter)
2301 {
2302 	if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2303 		pci_free_irq_vectors(adapter->pdev);
2304 }
2305 
2306 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2307 {
2308 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2309 	int i;
2310 
2311 	if (!netif_running(adapter->netdev))
2312 		return;
2313 
2314 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
2315 		synchronize_irq(adapter->irq_tbl[i].vector);
2316 }
2317 
2318 static void ena_del_napi_in_range(struct ena_adapter *adapter,
2319 				  int first_index,
2320 				  int count)
2321 {
2322 	int i;
2323 
2324 	for (i = first_index; i < first_index + count; i++) {
2325 		netif_napi_del(&adapter->ena_napi[i].napi);
2326 
2327 		WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) &&
2328 			adapter->ena_napi[i].xdp_ring);
2329 	}
2330 }
2331 
2332 static void ena_init_napi_in_range(struct ena_adapter *adapter,
2333 				   int first_index, int count)
2334 {
2335 	int i;
2336 
2337 	for (i = first_index; i < first_index + count; i++) {
2338 		struct ena_napi *napi = &adapter->ena_napi[i];
2339 
2340 		netif_napi_add(adapter->netdev, &napi->napi,
2341 			       ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll);
2342 
2343 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
2344 			napi->rx_ring = &adapter->rx_ring[i];
2345 			napi->tx_ring = &adapter->tx_ring[i];
2346 		} else {
2347 			napi->xdp_ring = &adapter->tx_ring[i];
2348 		}
2349 		napi->qid = i;
2350 	}
2351 }
2352 
2353 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2354 				      int first_index,
2355 				      int count)
2356 {
2357 	int i;
2358 
2359 	for (i = first_index; i < first_index + count; i++)
2360 		napi_disable(&adapter->ena_napi[i].napi);
2361 }
2362 
2363 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2364 				     int first_index,
2365 				     int count)
2366 {
2367 	int i;
2368 
2369 	for (i = first_index; i < first_index + count; i++)
2370 		napi_enable(&adapter->ena_napi[i].napi);
2371 }
2372 
2373 /* Configure the Rx forwarding */
2374 static int ena_rss_configure(struct ena_adapter *adapter)
2375 {
2376 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2377 	int rc;
2378 
2379 	/* In case the RSS table wasn't initialized by probe */
2380 	if (!ena_dev->rss.tbl_log_size) {
2381 		rc = ena_rss_init_default(adapter);
2382 		if (rc && (rc != -EOPNOTSUPP)) {
2383 			netif_err(adapter, ifup, adapter->netdev,
2384 				  "Failed to init RSS rc: %d\n", rc);
2385 			return rc;
2386 		}
2387 	}
2388 
2389 	/* Set indirect table */
2390 	rc = ena_com_indirect_table_set(ena_dev);
2391 	if (unlikely(rc && rc != -EOPNOTSUPP))
2392 		return rc;
2393 
2394 	/* Configure hash function (if supported) */
2395 	rc = ena_com_set_hash_function(ena_dev);
2396 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2397 		return rc;
2398 
2399 	/* Configure hash inputs (if supported) */
2400 	rc = ena_com_set_hash_ctrl(ena_dev);
2401 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2402 		return rc;
2403 
2404 	return 0;
2405 }
2406 
2407 static int ena_up_complete(struct ena_adapter *adapter)
2408 {
2409 	int rc;
2410 
2411 	rc = ena_rss_configure(adapter);
2412 	if (rc)
2413 		return rc;
2414 
2415 	ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2416 
2417 	ena_refill_all_rx_bufs(adapter);
2418 
2419 	/* enable transmits */
2420 	netif_tx_start_all_queues(adapter->netdev);
2421 
2422 	ena_napi_enable_in_range(adapter,
2423 				 0,
2424 				 adapter->xdp_num_queues + adapter->num_io_queues);
2425 
2426 	return 0;
2427 }
2428 
2429 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2430 {
2431 	struct ena_com_create_io_ctx ctx;
2432 	struct ena_com_dev *ena_dev;
2433 	struct ena_ring *tx_ring;
2434 	u32 msix_vector;
2435 	u16 ena_qid;
2436 	int rc;
2437 
2438 	ena_dev = adapter->ena_dev;
2439 
2440 	tx_ring = &adapter->tx_ring[qid];
2441 	msix_vector = ENA_IO_IRQ_IDX(qid);
2442 	ena_qid = ENA_IO_TXQ_IDX(qid);
2443 
2444 	memset(&ctx, 0x0, sizeof(ctx));
2445 
2446 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2447 	ctx.qid = ena_qid;
2448 	ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2449 	ctx.msix_vector = msix_vector;
2450 	ctx.queue_size = tx_ring->ring_size;
2451 	ctx.numa_node = tx_ring->numa_node;
2452 
2453 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2454 	if (rc) {
2455 		netif_err(adapter, ifup, adapter->netdev,
2456 			  "Failed to create I/O TX queue num %d rc: %d\n",
2457 			  qid, rc);
2458 		return rc;
2459 	}
2460 
2461 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2462 				     &tx_ring->ena_com_io_sq,
2463 				     &tx_ring->ena_com_io_cq);
2464 	if (rc) {
2465 		netif_err(adapter, ifup, adapter->netdev,
2466 			  "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2467 			  qid, rc);
2468 		ena_com_destroy_io_queue(ena_dev, ena_qid);
2469 		return rc;
2470 	}
2471 
2472 	ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2473 	return rc;
2474 }
2475 
2476 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2477 					    int first_index, int count)
2478 {
2479 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2480 	int rc, i;
2481 
2482 	for (i = first_index; i < first_index + count; i++) {
2483 		rc = ena_create_io_tx_queue(adapter, i);
2484 		if (rc)
2485 			goto create_err;
2486 	}
2487 
2488 	return 0;
2489 
2490 create_err:
2491 	while (i-- > first_index)
2492 		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2493 
2494 	return rc;
2495 }
2496 
2497 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2498 {
2499 	struct ena_com_dev *ena_dev;
2500 	struct ena_com_create_io_ctx ctx;
2501 	struct ena_ring *rx_ring;
2502 	u32 msix_vector;
2503 	u16 ena_qid;
2504 	int rc;
2505 
2506 	ena_dev = adapter->ena_dev;
2507 
2508 	rx_ring = &adapter->rx_ring[qid];
2509 	msix_vector = ENA_IO_IRQ_IDX(qid);
2510 	ena_qid = ENA_IO_RXQ_IDX(qid);
2511 
2512 	memset(&ctx, 0x0, sizeof(ctx));
2513 
2514 	ctx.qid = ena_qid;
2515 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2516 	ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2517 	ctx.msix_vector = msix_vector;
2518 	ctx.queue_size = rx_ring->ring_size;
2519 	ctx.numa_node = rx_ring->numa_node;
2520 
2521 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2522 	if (rc) {
2523 		netif_err(adapter, ifup, adapter->netdev,
2524 			  "Failed to create I/O RX queue num %d rc: %d\n",
2525 			  qid, rc);
2526 		return rc;
2527 	}
2528 
2529 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2530 				     &rx_ring->ena_com_io_sq,
2531 				     &rx_ring->ena_com_io_cq);
2532 	if (rc) {
2533 		netif_err(adapter, ifup, adapter->netdev,
2534 			  "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2535 			  qid, rc);
2536 		goto err;
2537 	}
2538 
2539 	ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2540 
2541 	return rc;
2542 err:
2543 	ena_com_destroy_io_queue(ena_dev, ena_qid);
2544 	return rc;
2545 }
2546 
2547 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2548 {
2549 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2550 	int rc, i;
2551 
2552 	for (i = 0; i < adapter->num_io_queues; i++) {
2553 		rc = ena_create_io_rx_queue(adapter, i);
2554 		if (rc)
2555 			goto create_err;
2556 		INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2557 	}
2558 
2559 	return 0;
2560 
2561 create_err:
2562 	while (i--) {
2563 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
2564 		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2565 	}
2566 
2567 	return rc;
2568 }
2569 
2570 static void set_io_rings_size(struct ena_adapter *adapter,
2571 			      int new_tx_size,
2572 			      int new_rx_size)
2573 {
2574 	int i;
2575 
2576 	for (i = 0; i < adapter->num_io_queues; i++) {
2577 		adapter->tx_ring[i].ring_size = new_tx_size;
2578 		adapter->rx_ring[i].ring_size = new_rx_size;
2579 	}
2580 }
2581 
2582 /* This function allows queue allocation to backoff when the system is
2583  * low on memory. If there is not enough memory to allocate io queues
2584  * the driver will try to allocate smaller queues.
2585  *
2586  * The backoff algorithm is as follows:
2587  *  1. Try to allocate TX and RX and if successful.
2588  *  1.1. return success
2589  *
2590  *  2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2591  *
2592  *  3. If TX or RX is smaller than 256
2593  *  3.1. return failure.
2594  *  4. else
2595  *  4.1. go back to 1.
2596  */
2597 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2598 {
2599 	int rc, cur_rx_ring_size, cur_tx_ring_size;
2600 	int new_rx_ring_size, new_tx_ring_size;
2601 
2602 	/* current queue sizes might be set to smaller than the requested
2603 	 * ones due to past queue allocation failures.
2604 	 */
2605 	set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2606 			  adapter->requested_rx_ring_size);
2607 
2608 	while (1) {
2609 		if (ena_xdp_present(adapter)) {
2610 			rc = ena_setup_and_create_all_xdp_queues(adapter);
2611 
2612 			if (rc)
2613 				goto err_setup_tx;
2614 		}
2615 		rc = ena_setup_tx_resources_in_range(adapter,
2616 						     0,
2617 						     adapter->num_io_queues);
2618 		if (rc)
2619 			goto err_setup_tx;
2620 
2621 		rc = ena_create_io_tx_queues_in_range(adapter,
2622 						      0,
2623 						      adapter->num_io_queues);
2624 		if (rc)
2625 			goto err_create_tx_queues;
2626 
2627 		rc = ena_setup_all_rx_resources(adapter);
2628 		if (rc)
2629 			goto err_setup_rx;
2630 
2631 		rc = ena_create_all_io_rx_queues(adapter);
2632 		if (rc)
2633 			goto err_create_rx_queues;
2634 
2635 		return 0;
2636 
2637 err_create_rx_queues:
2638 		ena_free_all_io_rx_resources(adapter);
2639 err_setup_rx:
2640 		ena_destroy_all_tx_queues(adapter);
2641 err_create_tx_queues:
2642 		ena_free_all_io_tx_resources(adapter);
2643 err_setup_tx:
2644 		if (rc != -ENOMEM) {
2645 			netif_err(adapter, ifup, adapter->netdev,
2646 				  "Queue creation failed with error code %d\n",
2647 				  rc);
2648 			return rc;
2649 		}
2650 
2651 		cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2652 		cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2653 
2654 		netif_err(adapter, ifup, adapter->netdev,
2655 			  "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2656 			  cur_tx_ring_size, cur_rx_ring_size);
2657 
2658 		new_tx_ring_size = cur_tx_ring_size;
2659 		new_rx_ring_size = cur_rx_ring_size;
2660 
2661 		/* Decrease the size of the larger queue, or
2662 		 * decrease both if they are the same size.
2663 		 */
2664 		if (cur_rx_ring_size <= cur_tx_ring_size)
2665 			new_tx_ring_size = cur_tx_ring_size / 2;
2666 		if (cur_rx_ring_size >= cur_tx_ring_size)
2667 			new_rx_ring_size = cur_rx_ring_size / 2;
2668 
2669 		if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2670 		    new_rx_ring_size < ENA_MIN_RING_SIZE) {
2671 			netif_err(adapter, ifup, adapter->netdev,
2672 				  "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2673 				  ENA_MIN_RING_SIZE);
2674 			return rc;
2675 		}
2676 
2677 		netif_err(adapter, ifup, adapter->netdev,
2678 			  "Retrying queue creation with sizes TX=%d, RX=%d\n",
2679 			  new_tx_ring_size,
2680 			  new_rx_ring_size);
2681 
2682 		set_io_rings_size(adapter, new_tx_ring_size,
2683 				  new_rx_ring_size);
2684 	}
2685 }
2686 
2687 static int ena_up(struct ena_adapter *adapter)
2688 {
2689 	int io_queue_count, rc, i;
2690 
2691 	netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
2692 
2693 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2694 	ena_setup_io_intr(adapter);
2695 
2696 	/* napi poll functions should be initialized before running
2697 	 * request_irq(), to handle a rare condition where there is a pending
2698 	 * interrupt, causing the ISR to fire immediately while the poll
2699 	 * function wasn't set yet, causing a null dereference
2700 	 */
2701 	ena_init_napi_in_range(adapter, 0, io_queue_count);
2702 
2703 	rc = ena_request_io_irq(adapter);
2704 	if (rc)
2705 		goto err_req_irq;
2706 
2707 	rc = create_queues_with_size_backoff(adapter);
2708 	if (rc)
2709 		goto err_create_queues_with_backoff;
2710 
2711 	rc = ena_up_complete(adapter);
2712 	if (rc)
2713 		goto err_up;
2714 
2715 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2716 		netif_carrier_on(adapter->netdev);
2717 
2718 	ena_increase_stat(&adapter->dev_stats.interface_up, 1,
2719 			  &adapter->syncp);
2720 
2721 	set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2722 
2723 	/* Enable completion queues interrupt */
2724 	for (i = 0; i < adapter->num_io_queues; i++)
2725 		ena_unmask_interrupt(&adapter->tx_ring[i],
2726 				     &adapter->rx_ring[i]);
2727 
2728 	/* schedule napi in case we had pending packets
2729 	 * from the last time we disable napi
2730 	 */
2731 	for (i = 0; i < io_queue_count; i++)
2732 		napi_schedule(&adapter->ena_napi[i].napi);
2733 
2734 	return rc;
2735 
2736 err_up:
2737 	ena_destroy_all_tx_queues(adapter);
2738 	ena_free_all_io_tx_resources(adapter);
2739 	ena_destroy_all_rx_queues(adapter);
2740 	ena_free_all_io_rx_resources(adapter);
2741 err_create_queues_with_backoff:
2742 	ena_free_io_irq(adapter);
2743 err_req_irq:
2744 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2745 
2746 	return rc;
2747 }
2748 
2749 static void ena_down(struct ena_adapter *adapter)
2750 {
2751 	int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2752 
2753 	netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2754 
2755 	clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2756 
2757 	ena_increase_stat(&adapter->dev_stats.interface_down, 1,
2758 			  &adapter->syncp);
2759 
2760 	netif_carrier_off(adapter->netdev);
2761 	netif_tx_disable(adapter->netdev);
2762 
2763 	/* After this point the napi handler won't enable the tx queue */
2764 	ena_napi_disable_in_range(adapter, 0, io_queue_count);
2765 
2766 	/* After destroy the queue there won't be any new interrupts */
2767 
2768 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2769 		int rc;
2770 
2771 		rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2772 		if (rc)
2773 			netif_err(adapter, ifdown, adapter->netdev,
2774 				  "Device reset failed\n");
2775 		/* stop submitting admin commands on a device that was reset */
2776 		ena_com_set_admin_running_state(adapter->ena_dev, false);
2777 	}
2778 
2779 	ena_destroy_all_io_queues(adapter);
2780 
2781 	ena_disable_io_intr_sync(adapter);
2782 	ena_free_io_irq(adapter);
2783 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2784 
2785 	ena_free_all_tx_bufs(adapter);
2786 	ena_free_all_rx_bufs(adapter);
2787 	ena_free_all_io_tx_resources(adapter);
2788 	ena_free_all_io_rx_resources(adapter);
2789 }
2790 
2791 /* ena_open - Called when a network interface is made active
2792  * @netdev: network interface device structure
2793  *
2794  * Returns 0 on success, negative value on failure
2795  *
2796  * The open entry point is called when a network interface is made
2797  * active by the system (IFF_UP).  At this point all resources needed
2798  * for transmit and receive operations are allocated, the interrupt
2799  * handler is registered with the OS, the watchdog timer is started,
2800  * and the stack is notified that the interface is ready.
2801  */
2802 static int ena_open(struct net_device *netdev)
2803 {
2804 	struct ena_adapter *adapter = netdev_priv(netdev);
2805 	int rc;
2806 
2807 	/* Notify the stack of the actual queue counts. */
2808 	rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2809 	if (rc) {
2810 		netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2811 		return rc;
2812 	}
2813 
2814 	rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2815 	if (rc) {
2816 		netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2817 		return rc;
2818 	}
2819 
2820 	rc = ena_up(adapter);
2821 	if (rc)
2822 		return rc;
2823 
2824 	return rc;
2825 }
2826 
2827 /* ena_close - Disables a network interface
2828  * @netdev: network interface device structure
2829  *
2830  * Returns 0, this is not allowed to fail
2831  *
2832  * The close entry point is called when an interface is de-activated
2833  * by the OS.  The hardware is still under the drivers control, but
2834  * needs to be disabled.  A global MAC reset is issued to stop the
2835  * hardware, and all transmit and receive resources are freed.
2836  */
2837 static int ena_close(struct net_device *netdev)
2838 {
2839 	struct ena_adapter *adapter = netdev_priv(netdev);
2840 
2841 	netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2842 
2843 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2844 		return 0;
2845 
2846 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2847 		ena_down(adapter);
2848 
2849 	/* Check for device status and issue reset if needed*/
2850 	check_for_admin_com_state(adapter);
2851 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2852 		netif_err(adapter, ifdown, adapter->netdev,
2853 			  "Destroy failure, restarting device\n");
2854 		ena_dump_stats_to_dmesg(adapter);
2855 		/* rtnl lock already obtained in dev_ioctl() layer */
2856 		ena_destroy_device(adapter, false);
2857 		ena_restore_device(adapter);
2858 	}
2859 
2860 	return 0;
2861 }
2862 
2863 int ena_update_queue_params(struct ena_adapter *adapter,
2864 			    u32 new_tx_size,
2865 			    u32 new_rx_size,
2866 			    u32 new_llq_header_len)
2867 {
2868 	bool dev_was_up, large_llq_changed = false;
2869 	int rc = 0;
2870 
2871 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2872 	ena_close(adapter->netdev);
2873 	adapter->requested_tx_ring_size = new_tx_size;
2874 	adapter->requested_rx_ring_size = new_rx_size;
2875 	ena_init_io_rings(adapter,
2876 			  0,
2877 			  adapter->xdp_num_queues +
2878 			  adapter->num_io_queues);
2879 
2880 	large_llq_changed = adapter->ena_dev->tx_mem_queue_type ==
2881 			    ENA_ADMIN_PLACEMENT_POLICY_DEV;
2882 	large_llq_changed &=
2883 		new_llq_header_len != adapter->ena_dev->tx_max_header_size;
2884 
2885 	/* a check that the configuration is valid is done by caller */
2886 	if (large_llq_changed) {
2887 		adapter->large_llq_header_enabled = !adapter->large_llq_header_enabled;
2888 
2889 		ena_destroy_device(adapter, false);
2890 		rc = ena_restore_device(adapter);
2891 	}
2892 
2893 	return dev_was_up && !rc ? ena_up(adapter) : rc;
2894 }
2895 
2896 int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak)
2897 {
2898 	struct ena_ring *rx_ring;
2899 	int i;
2900 
2901 	if (rx_copybreak > min_t(u16, adapter->netdev->mtu, ENA_PAGE_SIZE))
2902 		return -EINVAL;
2903 
2904 	adapter->rx_copybreak = rx_copybreak;
2905 
2906 	for (i = 0; i < adapter->num_io_queues; i++) {
2907 		rx_ring = &adapter->rx_ring[i];
2908 		rx_ring->rx_copybreak = rx_copybreak;
2909 	}
2910 
2911 	return 0;
2912 }
2913 
2914 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2915 {
2916 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2917 	int prev_channel_count;
2918 	bool dev_was_up;
2919 
2920 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2921 	ena_close(adapter->netdev);
2922 	prev_channel_count = adapter->num_io_queues;
2923 	adapter->num_io_queues = new_channel_count;
2924 	if (ena_xdp_present(adapter) &&
2925 	    ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2926 		adapter->xdp_first_ring = new_channel_count;
2927 		adapter->xdp_num_queues = new_channel_count;
2928 		if (prev_channel_count > new_channel_count)
2929 			ena_xdp_exchange_program_rx_in_range(adapter,
2930 							     NULL,
2931 							     new_channel_count,
2932 							     prev_channel_count);
2933 		else
2934 			ena_xdp_exchange_program_rx_in_range(adapter,
2935 							     adapter->xdp_bpf_prog,
2936 							     prev_channel_count,
2937 							     new_channel_count);
2938 	}
2939 
2940 	/* We need to destroy the rss table so that the indirection
2941 	 * table will be reinitialized by ena_up()
2942 	 */
2943 	ena_com_rss_destroy(ena_dev);
2944 	ena_init_io_rings(adapter,
2945 			  0,
2946 			  adapter->xdp_num_queues +
2947 			  adapter->num_io_queues);
2948 	return dev_was_up ? ena_open(adapter->netdev) : 0;
2949 }
2950 
2951 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,
2952 			struct sk_buff *skb,
2953 			bool disable_meta_caching)
2954 {
2955 	u32 mss = skb_shinfo(skb)->gso_size;
2956 	struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2957 	u8 l4_protocol = 0;
2958 
2959 	if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2960 		ena_tx_ctx->l4_csum_enable = 1;
2961 		if (mss) {
2962 			ena_tx_ctx->tso_enable = 1;
2963 			ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2964 			ena_tx_ctx->l4_csum_partial = 0;
2965 		} else {
2966 			ena_tx_ctx->tso_enable = 0;
2967 			ena_meta->l4_hdr_len = 0;
2968 			ena_tx_ctx->l4_csum_partial = 1;
2969 		}
2970 
2971 		switch (ip_hdr(skb)->version) {
2972 		case IPVERSION:
2973 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2974 			if (ip_hdr(skb)->frag_off & htons(IP_DF))
2975 				ena_tx_ctx->df = 1;
2976 			if (mss)
2977 				ena_tx_ctx->l3_csum_enable = 1;
2978 			l4_protocol = ip_hdr(skb)->protocol;
2979 			break;
2980 		case 6:
2981 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2982 			l4_protocol = ipv6_hdr(skb)->nexthdr;
2983 			break;
2984 		default:
2985 			break;
2986 		}
2987 
2988 		if (l4_protocol == IPPROTO_TCP)
2989 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2990 		else
2991 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2992 
2993 		ena_meta->mss = mss;
2994 		ena_meta->l3_hdr_len = skb_network_header_len(skb);
2995 		ena_meta->l3_hdr_offset = skb_network_offset(skb);
2996 		ena_tx_ctx->meta_valid = 1;
2997 	} else if (disable_meta_caching) {
2998 		memset(ena_meta, 0, sizeof(*ena_meta));
2999 		ena_tx_ctx->meta_valid = 1;
3000 	} else {
3001 		ena_tx_ctx->meta_valid = 0;
3002 	}
3003 }
3004 
3005 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
3006 				       struct sk_buff *skb)
3007 {
3008 	int num_frags, header_len, rc;
3009 
3010 	num_frags = skb_shinfo(skb)->nr_frags;
3011 	header_len = skb_headlen(skb);
3012 
3013 	if (num_frags < tx_ring->sgl_size)
3014 		return 0;
3015 
3016 	if ((num_frags == tx_ring->sgl_size) &&
3017 	    (header_len < tx_ring->tx_max_header_size))
3018 		return 0;
3019 
3020 	ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp);
3021 
3022 	rc = skb_linearize(skb);
3023 	if (unlikely(rc)) {
3024 		ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1,
3025 				  &tx_ring->syncp);
3026 	}
3027 
3028 	return rc;
3029 }
3030 
3031 static int ena_tx_map_skb(struct ena_ring *tx_ring,
3032 			  struct ena_tx_buffer *tx_info,
3033 			  struct sk_buff *skb,
3034 			  void **push_hdr,
3035 			  u16 *header_len)
3036 {
3037 	struct ena_adapter *adapter = tx_ring->adapter;
3038 	struct ena_com_buf *ena_buf;
3039 	dma_addr_t dma;
3040 	u32 skb_head_len, frag_len, last_frag;
3041 	u16 push_len = 0;
3042 	u16 delta = 0;
3043 	int i = 0;
3044 
3045 	skb_head_len = skb_headlen(skb);
3046 	tx_info->skb = skb;
3047 	ena_buf = tx_info->bufs;
3048 
3049 	if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3050 		/* When the device is LLQ mode, the driver will copy
3051 		 * the header into the device memory space.
3052 		 * the ena_com layer assume the header is in a linear
3053 		 * memory space.
3054 		 * This assumption might be wrong since part of the header
3055 		 * can be in the fragmented buffers.
3056 		 * Use skb_header_pointer to make sure the header is in a
3057 		 * linear memory space.
3058 		 */
3059 
3060 		push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
3061 		*push_hdr = skb_header_pointer(skb, 0, push_len,
3062 					       tx_ring->push_buf_intermediate_buf);
3063 		*header_len = push_len;
3064 		if (unlikely(skb->data != *push_hdr)) {
3065 			ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1,
3066 					  &tx_ring->syncp);
3067 
3068 			delta = push_len - skb_head_len;
3069 		}
3070 	} else {
3071 		*push_hdr = NULL;
3072 		*header_len = min_t(u32, skb_head_len,
3073 				    tx_ring->tx_max_header_size);
3074 	}
3075 
3076 	netif_dbg(adapter, tx_queued, adapter->netdev,
3077 		  "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
3078 		  *push_hdr, push_len);
3079 
3080 	if (skb_head_len > push_len) {
3081 		dma = dma_map_single(tx_ring->dev, skb->data + push_len,
3082 				     skb_head_len - push_len, DMA_TO_DEVICE);
3083 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
3084 			goto error_report_dma_error;
3085 
3086 		ena_buf->paddr = dma;
3087 		ena_buf->len = skb_head_len - push_len;
3088 
3089 		ena_buf++;
3090 		tx_info->num_of_bufs++;
3091 		tx_info->map_linear_data = 1;
3092 	} else {
3093 		tx_info->map_linear_data = 0;
3094 	}
3095 
3096 	last_frag = skb_shinfo(skb)->nr_frags;
3097 
3098 	for (i = 0; i < last_frag; i++) {
3099 		const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
3100 
3101 		frag_len = skb_frag_size(frag);
3102 
3103 		if (unlikely(delta >= frag_len)) {
3104 			delta -= frag_len;
3105 			continue;
3106 		}
3107 
3108 		dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
3109 				       frag_len - delta, DMA_TO_DEVICE);
3110 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
3111 			goto error_report_dma_error;
3112 
3113 		ena_buf->paddr = dma;
3114 		ena_buf->len = frag_len - delta;
3115 		ena_buf++;
3116 		tx_info->num_of_bufs++;
3117 		delta = 0;
3118 	}
3119 
3120 	return 0;
3121 
3122 error_report_dma_error:
3123 	ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1,
3124 			  &tx_ring->syncp);
3125 	netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n");
3126 
3127 	tx_info->skb = NULL;
3128 
3129 	tx_info->num_of_bufs += i;
3130 	ena_unmap_tx_buff(tx_ring, tx_info);
3131 
3132 	return -EINVAL;
3133 }
3134 
3135 /* Called with netif_tx_lock. */
3136 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
3137 {
3138 	struct ena_adapter *adapter = netdev_priv(dev);
3139 	struct ena_tx_buffer *tx_info;
3140 	struct ena_com_tx_ctx ena_tx_ctx;
3141 	struct ena_ring *tx_ring;
3142 	struct netdev_queue *txq;
3143 	void *push_hdr;
3144 	u16 next_to_use, req_id, header_len;
3145 	int qid, rc;
3146 
3147 	netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
3148 	/*  Determine which tx ring we will be placed on */
3149 	qid = skb_get_queue_mapping(skb);
3150 	tx_ring = &adapter->tx_ring[qid];
3151 	txq = netdev_get_tx_queue(dev, qid);
3152 
3153 	rc = ena_check_and_linearize_skb(tx_ring, skb);
3154 	if (unlikely(rc))
3155 		goto error_drop_packet;
3156 
3157 	skb_tx_timestamp(skb);
3158 
3159 	next_to_use = tx_ring->next_to_use;
3160 	req_id = tx_ring->free_ids[next_to_use];
3161 	tx_info = &tx_ring->tx_buffer_info[req_id];
3162 	tx_info->num_of_bufs = 0;
3163 
3164 	WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
3165 
3166 	rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
3167 	if (unlikely(rc))
3168 		goto error_drop_packet;
3169 
3170 	memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
3171 	ena_tx_ctx.ena_bufs = tx_info->bufs;
3172 	ena_tx_ctx.push_header = push_hdr;
3173 	ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
3174 	ena_tx_ctx.req_id = req_id;
3175 	ena_tx_ctx.header_len = header_len;
3176 
3177 	/* set flags and meta data */
3178 	ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching);
3179 
3180 	rc = ena_xmit_common(dev,
3181 			     tx_ring,
3182 			     tx_info,
3183 			     &ena_tx_ctx,
3184 			     next_to_use,
3185 			     skb->len);
3186 	if (rc)
3187 		goto error_unmap_dma;
3188 
3189 	netdev_tx_sent_queue(txq, skb->len);
3190 
3191 	/* stop the queue when no more space available, the packet can have up
3192 	 * to sgl_size + 2. one for the meta descriptor and one for header
3193 	 * (if the header is larger than tx_max_header_size).
3194 	 */
3195 	if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3196 						   tx_ring->sgl_size + 2))) {
3197 		netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3198 			  __func__, qid);
3199 
3200 		netif_tx_stop_queue(txq);
3201 		ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1,
3202 				  &tx_ring->syncp);
3203 
3204 		/* There is a rare condition where this function decide to
3205 		 * stop the queue but meanwhile clean_tx_irq updates
3206 		 * next_to_completion and terminates.
3207 		 * The queue will remain stopped forever.
3208 		 * To solve this issue add a mb() to make sure that
3209 		 * netif_tx_stop_queue() write is vissible before checking if
3210 		 * there is additional space in the queue.
3211 		 */
3212 		smp_mb();
3213 
3214 		if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3215 						 ENA_TX_WAKEUP_THRESH)) {
3216 			netif_tx_wake_queue(txq);
3217 			ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
3218 					  &tx_ring->syncp);
3219 		}
3220 	}
3221 
3222 	if (netif_xmit_stopped(txq) || !netdev_xmit_more())
3223 		/* trigger the dma engine. ena_ring_tx_doorbell()
3224 		 * calls a memory barrier inside it.
3225 		 */
3226 		ena_ring_tx_doorbell(tx_ring);
3227 
3228 	return NETDEV_TX_OK;
3229 
3230 error_unmap_dma:
3231 	ena_unmap_tx_buff(tx_ring, tx_info);
3232 	tx_info->skb = NULL;
3233 
3234 error_drop_packet:
3235 	dev_kfree_skb(skb);
3236 	return NETDEV_TX_OK;
3237 }
3238 
3239 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3240 			    struct net_device *sb_dev)
3241 {
3242 	u16 qid;
3243 	/* we suspect that this is good for in--kernel network services that
3244 	 * want to loop incoming skb rx to tx in normal user generated traffic,
3245 	 * most probably we will not get to this
3246 	 */
3247 	if (skb_rx_queue_recorded(skb))
3248 		qid = skb_get_rx_queue(skb);
3249 	else
3250 		qid = netdev_pick_tx(dev, skb, NULL);
3251 
3252 	return qid;
3253 }
3254 
3255 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3256 {
3257 	struct device *dev = &pdev->dev;
3258 	struct ena_admin_host_info *host_info;
3259 	int rc;
3260 
3261 	/* Allocate only the host info */
3262 	rc = ena_com_allocate_host_info(ena_dev);
3263 	if (rc) {
3264 		dev_err(dev, "Cannot allocate host info\n");
3265 		return;
3266 	}
3267 
3268 	host_info = ena_dev->host_attr.host_info;
3269 
3270 	host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3271 	host_info->os_type = ENA_ADMIN_OS_LINUX;
3272 	host_info->kernel_ver = LINUX_VERSION_CODE;
3273 	strscpy(host_info->kernel_ver_str, utsname()->version,
3274 		sizeof(host_info->kernel_ver_str) - 1);
3275 	host_info->os_dist = 0;
3276 	strncpy(host_info->os_dist_str, utsname()->release,
3277 		sizeof(host_info->os_dist_str) - 1);
3278 	host_info->driver_version =
3279 		(DRV_MODULE_GEN_MAJOR) |
3280 		(DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3281 		(DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3282 		("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3283 	host_info->num_cpus = num_online_cpus();
3284 
3285 	host_info->driver_supported_features =
3286 		ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
3287 		ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |
3288 		ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |
3289 		ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK |
3290 		ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK;
3291 
3292 	rc = ena_com_set_host_attributes(ena_dev);
3293 	if (rc) {
3294 		if (rc == -EOPNOTSUPP)
3295 			dev_warn(dev, "Cannot set host attributes\n");
3296 		else
3297 			dev_err(dev, "Cannot set host attributes\n");
3298 
3299 		goto err;
3300 	}
3301 
3302 	return;
3303 
3304 err:
3305 	ena_com_delete_host_info(ena_dev);
3306 }
3307 
3308 static void ena_config_debug_area(struct ena_adapter *adapter)
3309 {
3310 	u32 debug_area_size;
3311 	int rc, ss_count;
3312 
3313 	ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3314 	if (ss_count <= 0) {
3315 		netif_err(adapter, drv, adapter->netdev,
3316 			  "SS count is negative\n");
3317 		return;
3318 	}
3319 
3320 	/* allocate 32 bytes for each string and 64bit for the value */
3321 	debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3322 
3323 	rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3324 	if (rc) {
3325 		netif_err(adapter, drv, adapter->netdev,
3326 			  "Cannot allocate debug area\n");
3327 		return;
3328 	}
3329 
3330 	rc = ena_com_set_host_attributes(adapter->ena_dev);
3331 	if (rc) {
3332 		if (rc == -EOPNOTSUPP)
3333 			netif_warn(adapter, drv, adapter->netdev,
3334 				   "Cannot set host attributes\n");
3335 		else
3336 			netif_err(adapter, drv, adapter->netdev,
3337 				  "Cannot set host attributes\n");
3338 		goto err;
3339 	}
3340 
3341 	return;
3342 err:
3343 	ena_com_delete_debug_area(adapter->ena_dev);
3344 }
3345 
3346 int ena_update_hw_stats(struct ena_adapter *adapter)
3347 {
3348 	int rc;
3349 
3350 	rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats);
3351 	if (rc) {
3352 		netdev_err(adapter->netdev, "Failed to get ENI stats\n");
3353 		return rc;
3354 	}
3355 
3356 	return 0;
3357 }
3358 
3359 static void ena_get_stats64(struct net_device *netdev,
3360 			    struct rtnl_link_stats64 *stats)
3361 {
3362 	struct ena_adapter *adapter = netdev_priv(netdev);
3363 	struct ena_ring *rx_ring, *tx_ring;
3364 	unsigned int start;
3365 	u64 rx_drops;
3366 	u64 tx_drops;
3367 	int i;
3368 
3369 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3370 		return;
3371 
3372 	for (i = 0; i < adapter->num_io_queues; i++) {
3373 		u64 bytes, packets;
3374 
3375 		tx_ring = &adapter->tx_ring[i];
3376 
3377 		do {
3378 			start = u64_stats_fetch_begin(&tx_ring->syncp);
3379 			packets = tx_ring->tx_stats.cnt;
3380 			bytes = tx_ring->tx_stats.bytes;
3381 		} while (u64_stats_fetch_retry(&tx_ring->syncp, start));
3382 
3383 		stats->tx_packets += packets;
3384 		stats->tx_bytes += bytes;
3385 
3386 		rx_ring = &adapter->rx_ring[i];
3387 
3388 		do {
3389 			start = u64_stats_fetch_begin(&rx_ring->syncp);
3390 			packets = rx_ring->rx_stats.cnt;
3391 			bytes = rx_ring->rx_stats.bytes;
3392 		} while (u64_stats_fetch_retry(&rx_ring->syncp, start));
3393 
3394 		stats->rx_packets += packets;
3395 		stats->rx_bytes += bytes;
3396 	}
3397 
3398 	do {
3399 		start = u64_stats_fetch_begin(&adapter->syncp);
3400 		rx_drops = adapter->dev_stats.rx_drops;
3401 		tx_drops = adapter->dev_stats.tx_drops;
3402 	} while (u64_stats_fetch_retry(&adapter->syncp, start));
3403 
3404 	stats->rx_dropped = rx_drops;
3405 	stats->tx_dropped = tx_drops;
3406 
3407 	stats->multicast = 0;
3408 	stats->collisions = 0;
3409 
3410 	stats->rx_length_errors = 0;
3411 	stats->rx_crc_errors = 0;
3412 	stats->rx_frame_errors = 0;
3413 	stats->rx_fifo_errors = 0;
3414 	stats->rx_missed_errors = 0;
3415 	stats->tx_window_errors = 0;
3416 
3417 	stats->rx_errors = 0;
3418 	stats->tx_errors = 0;
3419 }
3420 
3421 static const struct net_device_ops ena_netdev_ops = {
3422 	.ndo_open		= ena_open,
3423 	.ndo_stop		= ena_close,
3424 	.ndo_start_xmit		= ena_start_xmit,
3425 	.ndo_select_queue	= ena_select_queue,
3426 	.ndo_get_stats64	= ena_get_stats64,
3427 	.ndo_tx_timeout		= ena_tx_timeout,
3428 	.ndo_change_mtu		= ena_change_mtu,
3429 	.ndo_set_mac_address	= NULL,
3430 	.ndo_validate_addr	= eth_validate_addr,
3431 	.ndo_bpf		= ena_xdp,
3432 	.ndo_xdp_xmit		= ena_xdp_xmit,
3433 };
3434 
3435 static void ena_calc_io_queue_size(struct ena_adapter *adapter,
3436 				   struct ena_com_dev_get_features_ctx *get_feat_ctx)
3437 {
3438 	struct ena_admin_feature_llq_desc *llq = &get_feat_ctx->llq;
3439 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3440 	u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
3441 	u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
3442 	u32 max_tx_queue_size;
3443 	u32 max_rx_queue_size;
3444 
3445 	/* If this function is called after driver load, the ring sizes have already
3446 	 * been configured. Take it into account when recalculating ring size.
3447 	 */
3448 	if (adapter->tx_ring->ring_size)
3449 		tx_queue_size = adapter->tx_ring->ring_size;
3450 
3451 	if (adapter->rx_ring->ring_size)
3452 		rx_queue_size = adapter->rx_ring->ring_size;
3453 
3454 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3455 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3456 			&get_feat_ctx->max_queue_ext.max_queue_ext;
3457 		max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
3458 					  max_queue_ext->max_rx_sq_depth);
3459 		max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
3460 
3461 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3462 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
3463 						  llq->max_llq_depth);
3464 		else
3465 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
3466 						  max_queue_ext->max_tx_sq_depth);
3467 
3468 		adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3469 						 max_queue_ext->max_per_packet_tx_descs);
3470 		adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3471 						 max_queue_ext->max_per_packet_rx_descs);
3472 	} else {
3473 		struct ena_admin_queue_feature_desc *max_queues =
3474 			&get_feat_ctx->max_queues;
3475 		max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
3476 					  max_queues->max_sq_depth);
3477 		max_tx_queue_size = max_queues->max_cq_depth;
3478 
3479 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3480 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
3481 						  llq->max_llq_depth);
3482 		else
3483 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
3484 						  max_queues->max_sq_depth);
3485 
3486 		adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3487 						 max_queues->max_packet_tx_descs);
3488 		adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3489 						 max_queues->max_packet_rx_descs);
3490 	}
3491 
3492 	max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
3493 	max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
3494 
3495 	/* When forcing large headers, we multiply the entry size by 2, and therefore divide
3496 	 * the queue size by 2, leaving the amount of memory used by the queues unchanged.
3497 	 */
3498 	if (adapter->large_llq_header_enabled) {
3499 		if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) &&
3500 		    ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3501 			max_tx_queue_size /= 2;
3502 			dev_info(&adapter->pdev->dev,
3503 				 "Forcing large headers and decreasing maximum TX queue size to %d\n",
3504 				 max_tx_queue_size);
3505 		} else {
3506 			dev_err(&adapter->pdev->dev,
3507 				"Forcing large headers failed: LLQ is disabled or device does not support large headers\n");
3508 
3509 			adapter->large_llq_header_enabled = false;
3510 		}
3511 	}
3512 
3513 	tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
3514 				  max_tx_queue_size);
3515 	rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
3516 				  max_rx_queue_size);
3517 
3518 	tx_queue_size = rounddown_pow_of_two(tx_queue_size);
3519 	rx_queue_size = rounddown_pow_of_two(rx_queue_size);
3520 
3521 	adapter->max_tx_ring_size  = max_tx_queue_size;
3522 	adapter->max_rx_ring_size = max_rx_queue_size;
3523 	adapter->requested_tx_ring_size = tx_queue_size;
3524 	adapter->requested_rx_ring_size = rx_queue_size;
3525 }
3526 
3527 static int ena_device_validate_params(struct ena_adapter *adapter,
3528 				      struct ena_com_dev_get_features_ctx *get_feat_ctx)
3529 {
3530 	struct net_device *netdev = adapter->netdev;
3531 	int rc;
3532 
3533 	rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3534 			      adapter->mac_addr);
3535 	if (!rc) {
3536 		netif_err(adapter, drv, netdev,
3537 			  "Error, mac address are different\n");
3538 		return -EINVAL;
3539 	}
3540 
3541 	if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3542 		netif_err(adapter, drv, netdev,
3543 			  "Error, device max mtu is smaller than netdev MTU\n");
3544 		return -EINVAL;
3545 	}
3546 
3547 	return 0;
3548 }
3549 
3550 static void set_default_llq_configurations(struct ena_adapter *adapter,
3551 					   struct ena_llq_configurations *llq_config,
3552 					   struct ena_admin_feature_llq_desc *llq)
3553 {
3554 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3555 
3556 	llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3557 	llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3558 	llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3559 
3560 	adapter->large_llq_header_supported =
3561 		!!(ena_dev->supported_features & BIT(ENA_ADMIN_LLQ));
3562 	adapter->large_llq_header_supported &=
3563 		!!(llq->entry_size_ctrl_supported &
3564 			ENA_ADMIN_LIST_ENTRY_SIZE_256B);
3565 
3566 	if ((llq->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) &&
3567 	    adapter->large_llq_header_enabled) {
3568 		llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_256B;
3569 		llq_config->llq_ring_entry_size_value = 256;
3570 	} else {
3571 		llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3572 		llq_config->llq_ring_entry_size_value = 128;
3573 	}
3574 }
3575 
3576 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3577 					   struct ena_com_dev *ena_dev,
3578 					   struct ena_admin_feature_llq_desc *llq,
3579 					   struct ena_llq_configurations *llq_default_configurations)
3580 {
3581 	int rc;
3582 	u32 llq_feature_mask;
3583 
3584 	llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3585 	if (!(ena_dev->supported_features & llq_feature_mask)) {
3586 		dev_warn(&pdev->dev,
3587 			"LLQ is not supported Fallback to host mode policy.\n");
3588 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3589 		return 0;
3590 	}
3591 
3592 	if (!ena_dev->mem_bar) {
3593 		netdev_err(ena_dev->net_device,
3594 			   "LLQ is advertised as supported but device doesn't expose mem bar\n");
3595 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3596 		return 0;
3597 	}
3598 
3599 	rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3600 	if (unlikely(rc)) {
3601 		dev_err(&pdev->dev,
3602 			"Failed to configure the device mode.  Fallback to host mode policy.\n");
3603 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3604 	}
3605 
3606 	return 0;
3607 }
3608 
3609 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3610 			       int bars)
3611 {
3612 	bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR));
3613 
3614 	if (!has_mem_bar)
3615 		return 0;
3616 
3617 	ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3618 					   pci_resource_start(pdev, ENA_MEM_BAR),
3619 					   pci_resource_len(pdev, ENA_MEM_BAR));
3620 
3621 	if (!ena_dev->mem_bar)
3622 		return -EFAULT;
3623 
3624 	return 0;
3625 }
3626 
3627 static int ena_device_init(struct ena_adapter *adapter, struct pci_dev *pdev,
3628 			   struct ena_com_dev_get_features_ctx *get_feat_ctx,
3629 			   bool *wd_state)
3630 {
3631 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3632 	struct ena_llq_configurations llq_config;
3633 	struct device *dev = &pdev->dev;
3634 	bool readless_supported;
3635 	u32 aenq_groups;
3636 	int dma_width;
3637 	int rc;
3638 
3639 	rc = ena_com_mmio_reg_read_request_init(ena_dev);
3640 	if (rc) {
3641 		dev_err(dev, "Failed to init mmio read less\n");
3642 		return rc;
3643 	}
3644 
3645 	/* The PCIe configuration space revision id indicate if mmio reg
3646 	 * read is disabled
3647 	 */
3648 	readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3649 	ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3650 
3651 	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3652 	if (rc) {
3653 		dev_err(dev, "Can not reset device\n");
3654 		goto err_mmio_read_less;
3655 	}
3656 
3657 	rc = ena_com_validate_version(ena_dev);
3658 	if (rc) {
3659 		dev_err(dev, "Device version is too low\n");
3660 		goto err_mmio_read_less;
3661 	}
3662 
3663 	dma_width = ena_com_get_dma_width(ena_dev);
3664 	if (dma_width < 0) {
3665 		dev_err(dev, "Invalid dma width value %d", dma_width);
3666 		rc = dma_width;
3667 		goto err_mmio_read_less;
3668 	}
3669 
3670 	rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
3671 	if (rc) {
3672 		dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
3673 		goto err_mmio_read_less;
3674 	}
3675 
3676 	/* ENA admin level init */
3677 	rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3678 	if (rc) {
3679 		dev_err(dev,
3680 			"Can not initialize ena admin queue with device\n");
3681 		goto err_mmio_read_less;
3682 	}
3683 
3684 	/* To enable the msix interrupts the driver needs to know the number
3685 	 * of queues. So the driver uses polling mode to retrieve this
3686 	 * information
3687 	 */
3688 	ena_com_set_admin_polling_mode(ena_dev, true);
3689 
3690 	ena_config_host_info(ena_dev, pdev);
3691 
3692 	/* Get Device Attributes*/
3693 	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3694 	if (rc) {
3695 		dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3696 		goto err_admin_init;
3697 	}
3698 
3699 	/* Try to turn all the available aenq groups */
3700 	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3701 		BIT(ENA_ADMIN_FATAL_ERROR) |
3702 		BIT(ENA_ADMIN_WARNING) |
3703 		BIT(ENA_ADMIN_NOTIFICATION) |
3704 		BIT(ENA_ADMIN_KEEP_ALIVE);
3705 
3706 	aenq_groups &= get_feat_ctx->aenq.supported_groups;
3707 
3708 	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3709 	if (rc) {
3710 		dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3711 		goto err_admin_init;
3712 	}
3713 
3714 	*wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3715 
3716 	set_default_llq_configurations(adapter, &llq_config, &get_feat_ctx->llq);
3717 
3718 	rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3719 					     &llq_config);
3720 	if (rc) {
3721 		dev_err(dev, "ENA device init failed\n");
3722 		goto err_admin_init;
3723 	}
3724 
3725 	ena_calc_io_queue_size(adapter, get_feat_ctx);
3726 
3727 	return 0;
3728 
3729 err_admin_init:
3730 	ena_com_delete_host_info(ena_dev);
3731 	ena_com_admin_destroy(ena_dev);
3732 err_mmio_read_less:
3733 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3734 
3735 	return rc;
3736 }
3737 
3738 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3739 {
3740 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3741 	struct device *dev = &adapter->pdev->dev;
3742 	int rc;
3743 
3744 	rc = ena_enable_msix(adapter);
3745 	if (rc) {
3746 		dev_err(dev, "Can not reserve msix vectors\n");
3747 		return rc;
3748 	}
3749 
3750 	ena_setup_mgmnt_intr(adapter);
3751 
3752 	rc = ena_request_mgmnt_irq(adapter);
3753 	if (rc) {
3754 		dev_err(dev, "Can not setup management interrupts\n");
3755 		goto err_disable_msix;
3756 	}
3757 
3758 	ena_com_set_admin_polling_mode(ena_dev, false);
3759 
3760 	ena_com_admin_aenq_enable(ena_dev);
3761 
3762 	return 0;
3763 
3764 err_disable_msix:
3765 	ena_disable_msix(adapter);
3766 
3767 	return rc;
3768 }
3769 
3770 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3771 {
3772 	struct net_device *netdev = adapter->netdev;
3773 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3774 	bool dev_up;
3775 
3776 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3777 		return;
3778 
3779 	netif_carrier_off(netdev);
3780 
3781 	del_timer_sync(&adapter->timer_service);
3782 
3783 	dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3784 	adapter->dev_up_before_reset = dev_up;
3785 	if (!graceful)
3786 		ena_com_set_admin_running_state(ena_dev, false);
3787 
3788 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3789 		ena_down(adapter);
3790 
3791 	/* Stop the device from sending AENQ events (in case reset flag is set
3792 	 *  and device is up, ena_down() already reset the device.
3793 	 */
3794 	if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3795 		ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3796 
3797 	ena_free_mgmnt_irq(adapter);
3798 
3799 	ena_disable_msix(adapter);
3800 
3801 	ena_com_abort_admin_commands(ena_dev);
3802 
3803 	ena_com_wait_for_abort_completion(ena_dev);
3804 
3805 	ena_com_admin_destroy(ena_dev);
3806 
3807 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3808 
3809 	/* return reset reason to default value */
3810 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3811 
3812 	clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3813 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3814 }
3815 
3816 static int ena_restore_device(struct ena_adapter *adapter)
3817 {
3818 	struct ena_com_dev_get_features_ctx get_feat_ctx;
3819 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3820 	struct pci_dev *pdev = adapter->pdev;
3821 	struct ena_ring *txr;
3822 	int rc, count, i;
3823 	bool wd_state;
3824 
3825 	set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3826 	rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, &wd_state);
3827 	if (rc) {
3828 		dev_err(&pdev->dev, "Can not initialize device\n");
3829 		goto err;
3830 	}
3831 	adapter->wd_state = wd_state;
3832 
3833 	count =  adapter->xdp_num_queues + adapter->num_io_queues;
3834 	for (i = 0 ; i < count; i++) {
3835 		txr = &adapter->tx_ring[i];
3836 		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
3837 		txr->tx_max_header_size = ena_dev->tx_max_header_size;
3838 	}
3839 
3840 	rc = ena_device_validate_params(adapter, &get_feat_ctx);
3841 	if (rc) {
3842 		dev_err(&pdev->dev, "Validation of device parameters failed\n");
3843 		goto err_device_destroy;
3844 	}
3845 
3846 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3847 	if (rc) {
3848 		dev_err(&pdev->dev, "Enable MSI-X failed\n");
3849 		goto err_device_destroy;
3850 	}
3851 	/* If the interface was up before the reset bring it up */
3852 	if (adapter->dev_up_before_reset) {
3853 		rc = ena_up(adapter);
3854 		if (rc) {
3855 			dev_err(&pdev->dev, "Failed to create I/O queues\n");
3856 			goto err_disable_msix;
3857 		}
3858 	}
3859 
3860 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3861 
3862 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3863 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3864 		netif_carrier_on(adapter->netdev);
3865 
3866 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3867 	adapter->last_keep_alive_jiffies = jiffies;
3868 
3869 	return rc;
3870 err_disable_msix:
3871 	ena_free_mgmnt_irq(adapter);
3872 	ena_disable_msix(adapter);
3873 err_device_destroy:
3874 	ena_com_abort_admin_commands(ena_dev);
3875 	ena_com_wait_for_abort_completion(ena_dev);
3876 	ena_com_admin_destroy(ena_dev);
3877 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3878 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3879 err:
3880 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3881 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3882 	dev_err(&pdev->dev,
3883 		"Reset attempt failed. Can not reset the device\n");
3884 
3885 	return rc;
3886 }
3887 
3888 static void ena_fw_reset_device(struct work_struct *work)
3889 {
3890 	struct ena_adapter *adapter =
3891 		container_of(work, struct ena_adapter, reset_task);
3892 
3893 	rtnl_lock();
3894 
3895 	if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3896 		ena_destroy_device(adapter, false);
3897 		ena_restore_device(adapter);
3898 
3899 		dev_err(&adapter->pdev->dev, "Device reset completed successfully\n");
3900 	}
3901 
3902 	rtnl_unlock();
3903 }
3904 
3905 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3906 					struct ena_ring *rx_ring)
3907 {
3908 	struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi);
3909 
3910 	if (likely(READ_ONCE(ena_napi->first_interrupt)))
3911 		return 0;
3912 
3913 	if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3914 		return 0;
3915 
3916 	rx_ring->no_interrupt_event_cnt++;
3917 
3918 	if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3919 		netif_err(adapter, rx_err, adapter->netdev,
3920 			  "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3921 			  rx_ring->qid);
3922 
3923 		ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT);
3924 		return -EIO;
3925 	}
3926 
3927 	return 0;
3928 }
3929 
3930 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3931 					  struct ena_ring *tx_ring)
3932 {
3933 	struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi);
3934 	unsigned int time_since_last_napi;
3935 	unsigned int missing_tx_comp_to;
3936 	bool is_tx_comp_time_expired;
3937 	struct ena_tx_buffer *tx_buf;
3938 	unsigned long last_jiffies;
3939 	u32 missed_tx = 0;
3940 	int i, rc = 0;
3941 
3942 	for (i = 0; i < tx_ring->ring_size; i++) {
3943 		tx_buf = &tx_ring->tx_buffer_info[i];
3944 		last_jiffies = tx_buf->last_jiffies;
3945 
3946 		if (last_jiffies == 0)
3947 			/* no pending Tx at this location */
3948 			continue;
3949 
3950 		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3951 			 2 * adapter->missing_tx_completion_to);
3952 
3953 		if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) {
3954 			/* If after graceful period interrupt is still not
3955 			 * received, we schedule a reset
3956 			 */
3957 			netif_err(adapter, tx_err, adapter->netdev,
3958 				  "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3959 				  tx_ring->qid);
3960 			ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT);
3961 			return -EIO;
3962 		}
3963 
3964 		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3965 			adapter->missing_tx_completion_to);
3966 
3967 		if (unlikely(is_tx_comp_time_expired)) {
3968 			if (!tx_buf->print_once) {
3969 				time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies);
3970 				missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to);
3971 				netif_notice(adapter, tx_err, adapter->netdev,
3972 					     "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n",
3973 					     tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to);
3974 			}
3975 
3976 			tx_buf->print_once = 1;
3977 			missed_tx++;
3978 		}
3979 	}
3980 
3981 	if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3982 		netif_err(adapter, tx_err, adapter->netdev,
3983 			  "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3984 			  missed_tx,
3985 			  adapter->missing_tx_completion_threshold);
3986 		ena_reset_device(adapter, ENA_REGS_RESET_MISS_TX_CMPL);
3987 		rc = -EIO;
3988 	}
3989 
3990 	ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx,
3991 			  &tx_ring->syncp);
3992 
3993 	return rc;
3994 }
3995 
3996 static void check_for_missing_completions(struct ena_adapter *adapter)
3997 {
3998 	struct ena_ring *tx_ring;
3999 	struct ena_ring *rx_ring;
4000 	int i, budget, rc;
4001 	int io_queue_count;
4002 
4003 	io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
4004 	/* Make sure the driver doesn't turn the device in other process */
4005 	smp_rmb();
4006 
4007 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
4008 		return;
4009 
4010 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
4011 		return;
4012 
4013 	if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
4014 		return;
4015 
4016 	budget = ENA_MONITORED_TX_QUEUES;
4017 
4018 	for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
4019 		tx_ring = &adapter->tx_ring[i];
4020 		rx_ring = &adapter->rx_ring[i];
4021 
4022 		rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
4023 		if (unlikely(rc))
4024 			return;
4025 
4026 		rc =  !ENA_IS_XDP_INDEX(adapter, i) ?
4027 			check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
4028 		if (unlikely(rc))
4029 			return;
4030 
4031 		budget--;
4032 		if (!budget)
4033 			break;
4034 	}
4035 
4036 	adapter->last_monitored_tx_qid = i % io_queue_count;
4037 }
4038 
4039 /* trigger napi schedule after 2 consecutive detections */
4040 #define EMPTY_RX_REFILL 2
4041 /* For the rare case where the device runs out of Rx descriptors and the
4042  * napi handler failed to refill new Rx descriptors (due to a lack of memory
4043  * for example).
4044  * This case will lead to a deadlock:
4045  * The device won't send interrupts since all the new Rx packets will be dropped
4046  * The napi handler won't allocate new Rx descriptors so the device will be
4047  * able to send new packets.
4048  *
4049  * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
4050  * It is recommended to have at least 512MB, with a minimum of 128MB for
4051  * constrained environment).
4052  *
4053  * When such a situation is detected - Reschedule napi
4054  */
4055 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
4056 {
4057 	struct ena_ring *rx_ring;
4058 	int i, refill_required;
4059 
4060 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
4061 		return;
4062 
4063 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
4064 		return;
4065 
4066 	for (i = 0; i < adapter->num_io_queues; i++) {
4067 		rx_ring = &adapter->rx_ring[i];
4068 
4069 		refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
4070 		if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
4071 			rx_ring->empty_rx_queue++;
4072 
4073 			if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
4074 				ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1,
4075 						  &rx_ring->syncp);
4076 
4077 				netif_err(adapter, drv, adapter->netdev,
4078 					  "Trigger refill for ring %d\n", i);
4079 
4080 				napi_schedule(rx_ring->napi);
4081 				rx_ring->empty_rx_queue = 0;
4082 			}
4083 		} else {
4084 			rx_ring->empty_rx_queue = 0;
4085 		}
4086 	}
4087 }
4088 
4089 /* Check for keep alive expiration */
4090 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
4091 {
4092 	unsigned long keep_alive_expired;
4093 
4094 	if (!adapter->wd_state)
4095 		return;
4096 
4097 	if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
4098 		return;
4099 
4100 	keep_alive_expired = adapter->last_keep_alive_jiffies +
4101 			     adapter->keep_alive_timeout;
4102 	if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
4103 		netif_err(adapter, drv, adapter->netdev,
4104 			  "Keep alive watchdog timeout.\n");
4105 		ena_increase_stat(&adapter->dev_stats.wd_expired, 1,
4106 				  &adapter->syncp);
4107 		ena_reset_device(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO);
4108 	}
4109 }
4110 
4111 static void check_for_admin_com_state(struct ena_adapter *adapter)
4112 {
4113 	if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
4114 		netif_err(adapter, drv, adapter->netdev,
4115 			  "ENA admin queue is not in running state!\n");
4116 		ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1,
4117 				  &adapter->syncp);
4118 		ena_reset_device(adapter, ENA_REGS_RESET_ADMIN_TO);
4119 	}
4120 }
4121 
4122 static void ena_update_hints(struct ena_adapter *adapter,
4123 			     struct ena_admin_ena_hw_hints *hints)
4124 {
4125 	struct net_device *netdev = adapter->netdev;
4126 
4127 	if (hints->admin_completion_tx_timeout)
4128 		adapter->ena_dev->admin_queue.completion_timeout =
4129 			hints->admin_completion_tx_timeout * 1000;
4130 
4131 	if (hints->mmio_read_timeout)
4132 		/* convert to usec */
4133 		adapter->ena_dev->mmio_read.reg_read_to =
4134 			hints->mmio_read_timeout * 1000;
4135 
4136 	if (hints->missed_tx_completion_count_threshold_to_reset)
4137 		adapter->missing_tx_completion_threshold =
4138 			hints->missed_tx_completion_count_threshold_to_reset;
4139 
4140 	if (hints->missing_tx_completion_timeout) {
4141 		if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
4142 			adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
4143 		else
4144 			adapter->missing_tx_completion_to =
4145 				msecs_to_jiffies(hints->missing_tx_completion_timeout);
4146 	}
4147 
4148 	if (hints->netdev_wd_timeout)
4149 		netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
4150 
4151 	if (hints->driver_watchdog_timeout) {
4152 		if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
4153 			adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
4154 		else
4155 			adapter->keep_alive_timeout =
4156 				msecs_to_jiffies(hints->driver_watchdog_timeout);
4157 	}
4158 }
4159 
4160 static void ena_update_host_info(struct ena_admin_host_info *host_info,
4161 				 struct net_device *netdev)
4162 {
4163 	host_info->supported_network_features[0] =
4164 		netdev->features & GENMASK_ULL(31, 0);
4165 	host_info->supported_network_features[1] =
4166 		(netdev->features & GENMASK_ULL(63, 32)) >> 32;
4167 }
4168 
4169 static void ena_timer_service(struct timer_list *t)
4170 {
4171 	struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
4172 	u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
4173 	struct ena_admin_host_info *host_info =
4174 		adapter->ena_dev->host_attr.host_info;
4175 
4176 	check_for_missing_keep_alive(adapter);
4177 
4178 	check_for_admin_com_state(adapter);
4179 
4180 	check_for_missing_completions(adapter);
4181 
4182 	check_for_empty_rx_ring(adapter);
4183 
4184 	if (debug_area)
4185 		ena_dump_stats_to_buf(adapter, debug_area);
4186 
4187 	if (host_info)
4188 		ena_update_host_info(host_info, adapter->netdev);
4189 
4190 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4191 		netif_err(adapter, drv, adapter->netdev,
4192 			  "Trigger reset is on\n");
4193 		ena_dump_stats_to_dmesg(adapter);
4194 		queue_work(ena_wq, &adapter->reset_task);
4195 		return;
4196 	}
4197 
4198 	/* Reset the timer */
4199 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4200 }
4201 
4202 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,
4203 				     struct ena_com_dev *ena_dev,
4204 				     struct ena_com_dev_get_features_ctx *get_feat_ctx)
4205 {
4206 	u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
4207 
4208 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4209 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4210 			&get_feat_ctx->max_queue_ext.max_queue_ext;
4211 		io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
4212 				  max_queue_ext->max_rx_cq_num);
4213 
4214 		io_tx_sq_num = max_queue_ext->max_tx_sq_num;
4215 		io_tx_cq_num = max_queue_ext->max_tx_cq_num;
4216 	} else {
4217 		struct ena_admin_queue_feature_desc *max_queues =
4218 			&get_feat_ctx->max_queues;
4219 		io_tx_sq_num = max_queues->max_sq_num;
4220 		io_tx_cq_num = max_queues->max_cq_num;
4221 		io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
4222 	}
4223 
4224 	/* In case of LLQ use the llq fields for the tx SQ/CQ */
4225 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4226 		io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
4227 
4228 	max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
4229 	max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
4230 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
4231 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
4232 	/* 1 IRQ for mgmnt and 1 IRQs for each IO direction */
4233 	max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
4234 
4235 	return max_num_io_queues;
4236 }
4237 
4238 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
4239 				 struct net_device *netdev)
4240 {
4241 	netdev_features_t dev_features = 0;
4242 
4243 	/* Set offload features */
4244 	if (feat->offload.tx &
4245 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
4246 		dev_features |= NETIF_F_IP_CSUM;
4247 
4248 	if (feat->offload.tx &
4249 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
4250 		dev_features |= NETIF_F_IPV6_CSUM;
4251 
4252 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
4253 		dev_features |= NETIF_F_TSO;
4254 
4255 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
4256 		dev_features |= NETIF_F_TSO6;
4257 
4258 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
4259 		dev_features |= NETIF_F_TSO_ECN;
4260 
4261 	if (feat->offload.rx_supported &
4262 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
4263 		dev_features |= NETIF_F_RXCSUM;
4264 
4265 	if (feat->offload.rx_supported &
4266 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
4267 		dev_features |= NETIF_F_RXCSUM;
4268 
4269 	netdev->features =
4270 		dev_features |
4271 		NETIF_F_SG |
4272 		NETIF_F_RXHASH |
4273 		NETIF_F_HIGHDMA;
4274 
4275 	netdev->hw_features |= netdev->features;
4276 	netdev->vlan_features |= netdev->features;
4277 }
4278 
4279 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
4280 				     struct ena_com_dev_get_features_ctx *feat)
4281 {
4282 	struct net_device *netdev = adapter->netdev;
4283 
4284 	/* Copy mac address */
4285 	if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
4286 		eth_hw_addr_random(netdev);
4287 		ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
4288 	} else {
4289 		ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
4290 		eth_hw_addr_set(netdev, adapter->mac_addr);
4291 	}
4292 
4293 	/* Set offload features */
4294 	ena_set_dev_offloads(feat, netdev);
4295 
4296 	adapter->max_mtu = feat->dev_attr.max_mtu;
4297 	netdev->max_mtu = adapter->max_mtu;
4298 	netdev->min_mtu = ENA_MIN_MTU;
4299 }
4300 
4301 static int ena_rss_init_default(struct ena_adapter *adapter)
4302 {
4303 	struct ena_com_dev *ena_dev = adapter->ena_dev;
4304 	struct device *dev = &adapter->pdev->dev;
4305 	int rc, i;
4306 	u32 val;
4307 
4308 	rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
4309 	if (unlikely(rc)) {
4310 		dev_err(dev, "Cannot init indirect table\n");
4311 		goto err_rss_init;
4312 	}
4313 
4314 	for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
4315 		val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
4316 		rc = ena_com_indirect_table_fill_entry(ena_dev, i,
4317 						       ENA_IO_RXQ_IDX(val));
4318 		if (unlikely(rc)) {
4319 			dev_err(dev, "Cannot fill indirect table\n");
4320 			goto err_fill_indir;
4321 		}
4322 	}
4323 
4324 	rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL,
4325 					ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
4326 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4327 		dev_err(dev, "Cannot fill hash function\n");
4328 		goto err_fill_indir;
4329 	}
4330 
4331 	rc = ena_com_set_default_hash_ctrl(ena_dev);
4332 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4333 		dev_err(dev, "Cannot fill hash control\n");
4334 		goto err_fill_indir;
4335 	}
4336 
4337 	return 0;
4338 
4339 err_fill_indir:
4340 	ena_com_rss_destroy(ena_dev);
4341 err_rss_init:
4342 
4343 	return rc;
4344 }
4345 
4346 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4347 {
4348 	int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4349 
4350 	pci_release_selected_regions(pdev, release_bars);
4351 }
4352 
4353 /* ena_probe - Device Initialization Routine
4354  * @pdev: PCI device information struct
4355  * @ent: entry in ena_pci_tbl
4356  *
4357  * Returns 0 on success, negative on failure
4358  *
4359  * ena_probe initializes an adapter identified by a pci_dev structure.
4360  * The OS initialization, configuring of the adapter private structure,
4361  * and a hardware reset occur.
4362  */
4363 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4364 {
4365 	struct ena_com_dev_get_features_ctx get_feat_ctx;
4366 	struct ena_com_dev *ena_dev = NULL;
4367 	struct ena_adapter *adapter;
4368 	struct net_device *netdev;
4369 	static int adapters_found;
4370 	u32 max_num_io_queues;
4371 	bool wd_state;
4372 	int bars, rc;
4373 
4374 	dev_dbg(&pdev->dev, "%s\n", __func__);
4375 
4376 	rc = pci_enable_device_mem(pdev);
4377 	if (rc) {
4378 		dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4379 		return rc;
4380 	}
4381 
4382 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
4383 	if (rc) {
4384 		dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
4385 		goto err_disable_device;
4386 	}
4387 
4388 	pci_set_master(pdev);
4389 
4390 	ena_dev = vzalloc(sizeof(*ena_dev));
4391 	if (!ena_dev) {
4392 		rc = -ENOMEM;
4393 		goto err_disable_device;
4394 	}
4395 
4396 	bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4397 	rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4398 	if (rc) {
4399 		dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4400 			rc);
4401 		goto err_free_ena_dev;
4402 	}
4403 
4404 	ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4405 					pci_resource_start(pdev, ENA_REG_BAR),
4406 					pci_resource_len(pdev, ENA_REG_BAR));
4407 	if (!ena_dev->reg_bar) {
4408 		dev_err(&pdev->dev, "Failed to remap regs bar\n");
4409 		rc = -EFAULT;
4410 		goto err_free_region;
4411 	}
4412 
4413 	ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
4414 
4415 	ena_dev->dmadev = &pdev->dev;
4416 
4417 	netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS);
4418 	if (!netdev) {
4419 		dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4420 		rc = -ENOMEM;
4421 		goto err_free_region;
4422 	}
4423 
4424 	SET_NETDEV_DEV(netdev, &pdev->dev);
4425 	adapter = netdev_priv(netdev);
4426 	adapter->ena_dev = ena_dev;
4427 	adapter->netdev = netdev;
4428 	adapter->pdev = pdev;
4429 	adapter->msg_enable = DEFAULT_MSG_ENABLE;
4430 
4431 	ena_dev->net_device = netdev;
4432 
4433 	pci_set_drvdata(pdev, adapter);
4434 
4435 	rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
4436 	if (rc) {
4437 		dev_err(&pdev->dev, "ENA LLQ bar mapping failed\n");
4438 		goto err_netdev_destroy;
4439 	}
4440 
4441 	rc = ena_device_init(adapter, pdev, &get_feat_ctx, &wd_state);
4442 	if (rc) {
4443 		dev_err(&pdev->dev, "ENA device init failed\n");
4444 		if (rc == -ETIME)
4445 			rc = -EPROBE_DEFER;
4446 		goto err_netdev_destroy;
4447 	}
4448 
4449 	/* Initial TX and RX interrupt delay. Assumes 1 usec granularity.
4450 	 * Updated during device initialization with the real granularity
4451 	 */
4452 	ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4453 	ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4454 	ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4455 	max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4456 	if (unlikely(!max_num_io_queues)) {
4457 		rc = -EFAULT;
4458 		goto err_device_destroy;
4459 	}
4460 
4461 	ena_set_conf_feat_params(adapter, &get_feat_ctx);
4462 
4463 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4464 
4465 	adapter->num_io_queues = max_num_io_queues;
4466 	adapter->max_num_io_queues = max_num_io_queues;
4467 	adapter->last_monitored_tx_qid = 0;
4468 
4469 	adapter->xdp_first_ring = 0;
4470 	adapter->xdp_num_queues = 0;
4471 
4472 	adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4473 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4474 		adapter->disable_meta_caching =
4475 			!!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &
4476 			   BIT(ENA_ADMIN_DISABLE_META_CACHING));
4477 
4478 	adapter->wd_state = wd_state;
4479 
4480 	snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4481 
4482 	rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4483 	if (rc) {
4484 		dev_err(&pdev->dev,
4485 			"Failed to query interrupt moderation feature\n");
4486 		goto err_device_destroy;
4487 	}
4488 
4489 	ena_init_io_rings(adapter,
4490 			  0,
4491 			  adapter->xdp_num_queues +
4492 			  adapter->num_io_queues);
4493 
4494 	netdev->netdev_ops = &ena_netdev_ops;
4495 	netdev->watchdog_timeo = TX_TIMEOUT;
4496 	ena_set_ethtool_ops(netdev);
4497 
4498 	netdev->priv_flags |= IFF_UNICAST_FLT;
4499 
4500 	u64_stats_init(&adapter->syncp);
4501 
4502 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4503 	if (rc) {
4504 		dev_err(&pdev->dev,
4505 			"Failed to enable and set the admin interrupts\n");
4506 		goto err_worker_destroy;
4507 	}
4508 	rc = ena_rss_init_default(adapter);
4509 	if (rc && (rc != -EOPNOTSUPP)) {
4510 		dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4511 		goto err_free_msix;
4512 	}
4513 
4514 	ena_config_debug_area(adapter);
4515 
4516 	if (ena_xdp_legal_queue_count(adapter, adapter->num_io_queues))
4517 		netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
4518 				       NETDEV_XDP_ACT_REDIRECT;
4519 
4520 	memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4521 
4522 	netif_carrier_off(netdev);
4523 
4524 	rc = register_netdev(netdev);
4525 	if (rc) {
4526 		dev_err(&pdev->dev, "Cannot register net device\n");
4527 		goto err_rss;
4528 	}
4529 
4530 	INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4531 
4532 	adapter->last_keep_alive_jiffies = jiffies;
4533 	adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4534 	adapter->missing_tx_completion_to = TX_TIMEOUT;
4535 	adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4536 
4537 	ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4538 
4539 	timer_setup(&adapter->timer_service, ena_timer_service, 0);
4540 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4541 
4542 	dev_info(&pdev->dev,
4543 		 "%s found at mem %lx, mac addr %pM\n",
4544 		 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4545 		 netdev->dev_addr);
4546 
4547 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4548 
4549 	adapters_found++;
4550 
4551 	return 0;
4552 
4553 err_rss:
4554 	ena_com_delete_debug_area(ena_dev);
4555 	ena_com_rss_destroy(ena_dev);
4556 err_free_msix:
4557 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4558 	/* stop submitting admin commands on a device that was reset */
4559 	ena_com_set_admin_running_state(ena_dev, false);
4560 	ena_free_mgmnt_irq(adapter);
4561 	ena_disable_msix(adapter);
4562 err_worker_destroy:
4563 	del_timer(&adapter->timer_service);
4564 err_device_destroy:
4565 	ena_com_delete_host_info(ena_dev);
4566 	ena_com_admin_destroy(ena_dev);
4567 err_netdev_destroy:
4568 	free_netdev(netdev);
4569 err_free_region:
4570 	ena_release_bars(ena_dev, pdev);
4571 err_free_ena_dev:
4572 	vfree(ena_dev);
4573 err_disable_device:
4574 	pci_disable_device(pdev);
4575 	return rc;
4576 }
4577 
4578 /*****************************************************************************/
4579 
4580 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines
4581  * @pdev: PCI device information struct
4582  * @shutdown: Is it a shutdown operation? If false, means it is a removal
4583  *
4584  * __ena_shutoff is a helper routine that does the real work on shutdown and
4585  * removal paths; the difference between those paths is with regards to whether
4586  * dettach or unregister the netdevice.
4587  */
4588 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
4589 {
4590 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4591 	struct ena_com_dev *ena_dev;
4592 	struct net_device *netdev;
4593 
4594 	ena_dev = adapter->ena_dev;
4595 	netdev = adapter->netdev;
4596 
4597 #ifdef CONFIG_RFS_ACCEL
4598 	if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4599 		free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4600 		netdev->rx_cpu_rmap = NULL;
4601 	}
4602 #endif /* CONFIG_RFS_ACCEL */
4603 
4604 	/* Make sure timer and reset routine won't be called after
4605 	 * freeing device resources.
4606 	 */
4607 	del_timer_sync(&adapter->timer_service);
4608 	cancel_work_sync(&adapter->reset_task);
4609 
4610 	rtnl_lock(); /* lock released inside the below if-else block */
4611 	adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN;
4612 	ena_destroy_device(adapter, true);
4613 
4614 	if (shutdown) {
4615 		netif_device_detach(netdev);
4616 		dev_close(netdev);
4617 		rtnl_unlock();
4618 	} else {
4619 		rtnl_unlock();
4620 		unregister_netdev(netdev);
4621 		free_netdev(netdev);
4622 	}
4623 
4624 	ena_com_rss_destroy(ena_dev);
4625 
4626 	ena_com_delete_debug_area(ena_dev);
4627 
4628 	ena_com_delete_host_info(ena_dev);
4629 
4630 	ena_release_bars(ena_dev, pdev);
4631 
4632 	pci_disable_device(pdev);
4633 
4634 	vfree(ena_dev);
4635 }
4636 
4637 /* ena_remove - Device Removal Routine
4638  * @pdev: PCI device information struct
4639  *
4640  * ena_remove is called by the PCI subsystem to alert the driver
4641  * that it should release a PCI device.
4642  */
4643 
4644 static void ena_remove(struct pci_dev *pdev)
4645 {
4646 	__ena_shutoff(pdev, false);
4647 }
4648 
4649 /* ena_shutdown - Device Shutdown Routine
4650  * @pdev: PCI device information struct
4651  *
4652  * ena_shutdown is called by the PCI subsystem to alert the driver that
4653  * a shutdown/reboot (or kexec) is happening and device must be disabled.
4654  */
4655 
4656 static void ena_shutdown(struct pci_dev *pdev)
4657 {
4658 	__ena_shutoff(pdev, true);
4659 }
4660 
4661 /* ena_suspend - PM suspend callback
4662  * @dev_d: Device information struct
4663  */
4664 static int __maybe_unused ena_suspend(struct device *dev_d)
4665 {
4666 	struct pci_dev *pdev = to_pci_dev(dev_d);
4667 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4668 
4669 	ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp);
4670 
4671 	rtnl_lock();
4672 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4673 		dev_err(&pdev->dev,
4674 			"Ignoring device reset request as the device is being suspended\n");
4675 		clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4676 	}
4677 	ena_destroy_device(adapter, true);
4678 	rtnl_unlock();
4679 	return 0;
4680 }
4681 
4682 /* ena_resume - PM resume callback
4683  * @dev_d: Device information struct
4684  */
4685 static int __maybe_unused ena_resume(struct device *dev_d)
4686 {
4687 	struct ena_adapter *adapter = dev_get_drvdata(dev_d);
4688 	int rc;
4689 
4690 	ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp);
4691 
4692 	rtnl_lock();
4693 	rc = ena_restore_device(adapter);
4694 	rtnl_unlock();
4695 	return rc;
4696 }
4697 
4698 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);
4699 
4700 static struct pci_driver ena_pci_driver = {
4701 	.name		= DRV_MODULE_NAME,
4702 	.id_table	= ena_pci_tbl,
4703 	.probe		= ena_probe,
4704 	.remove		= ena_remove,
4705 	.shutdown	= ena_shutdown,
4706 	.driver.pm	= &ena_pm_ops,
4707 	.sriov_configure = pci_sriov_configure_simple,
4708 };
4709 
4710 static int __init ena_init(void)
4711 {
4712 	int ret;
4713 
4714 	ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4715 	if (!ena_wq) {
4716 		pr_err("Failed to create workqueue\n");
4717 		return -ENOMEM;
4718 	}
4719 
4720 	ret = pci_register_driver(&ena_pci_driver);
4721 	if (ret)
4722 		destroy_workqueue(ena_wq);
4723 
4724 	return ret;
4725 }
4726 
4727 static void __exit ena_cleanup(void)
4728 {
4729 	pci_unregister_driver(&ena_pci_driver);
4730 
4731 	if (ena_wq) {
4732 		destroy_workqueue(ena_wq);
4733 		ena_wq = NULL;
4734 	}
4735 }
4736 
4737 /******************************************************************************
4738  ******************************** AENQ Handlers *******************************
4739  *****************************************************************************/
4740 /* ena_update_on_link_change:
4741  * Notify the network interface about the change in link status
4742  */
4743 static void ena_update_on_link_change(void *adapter_data,
4744 				      struct ena_admin_aenq_entry *aenq_e)
4745 {
4746 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4747 	struct ena_admin_aenq_link_change_desc *aenq_desc =
4748 		(struct ena_admin_aenq_link_change_desc *)aenq_e;
4749 	int status = aenq_desc->flags &
4750 		ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4751 
4752 	if (status) {
4753 		netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
4754 		set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4755 		if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4756 			netif_carrier_on(adapter->netdev);
4757 	} else {
4758 		clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4759 		netif_carrier_off(adapter->netdev);
4760 	}
4761 }
4762 
4763 static void ena_keep_alive_wd(void *adapter_data,
4764 			      struct ena_admin_aenq_entry *aenq_e)
4765 {
4766 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4767 	struct ena_admin_aenq_keep_alive_desc *desc;
4768 	u64 rx_drops;
4769 	u64 tx_drops;
4770 
4771 	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4772 	adapter->last_keep_alive_jiffies = jiffies;
4773 
4774 	rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4775 	tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low;
4776 
4777 	u64_stats_update_begin(&adapter->syncp);
4778 	/* These stats are accumulated by the device, so the counters indicate
4779 	 * all drops since last reset.
4780 	 */
4781 	adapter->dev_stats.rx_drops = rx_drops;
4782 	adapter->dev_stats.tx_drops = tx_drops;
4783 	u64_stats_update_end(&adapter->syncp);
4784 }
4785 
4786 static void ena_notification(void *adapter_data,
4787 			     struct ena_admin_aenq_entry *aenq_e)
4788 {
4789 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4790 	struct ena_admin_ena_hw_hints *hints;
4791 
4792 	WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4793 	     "Invalid group(%x) expected %x\n",
4794 	     aenq_e->aenq_common_desc.group,
4795 	     ENA_ADMIN_NOTIFICATION);
4796 
4797 	switch (aenq_e->aenq_common_desc.syndrome) {
4798 	case ENA_ADMIN_UPDATE_HINTS:
4799 		hints = (struct ena_admin_ena_hw_hints *)
4800 			(&aenq_e->inline_data_w4);
4801 		ena_update_hints(adapter, hints);
4802 		break;
4803 	default:
4804 		netif_err(adapter, drv, adapter->netdev,
4805 			  "Invalid aenq notification link state %d\n",
4806 			  aenq_e->aenq_common_desc.syndrome);
4807 	}
4808 }
4809 
4810 /* This handler will called for unknown event group or unimplemented handlers*/
4811 static void unimplemented_aenq_handler(void *data,
4812 				       struct ena_admin_aenq_entry *aenq_e)
4813 {
4814 	struct ena_adapter *adapter = (struct ena_adapter *)data;
4815 
4816 	netif_err(adapter, drv, adapter->netdev,
4817 		  "Unknown event was received or event with unimplemented handler\n");
4818 }
4819 
4820 static struct ena_aenq_handlers aenq_handlers = {
4821 	.handlers = {
4822 		[ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4823 		[ENA_ADMIN_NOTIFICATION] = ena_notification,
4824 		[ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4825 	},
4826 	.unimplemented_handler = unimplemented_aenq_handler
4827 };
4828 
4829 module_init(ena_init);
4830 module_exit(ena_cleanup);
4831