1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define ENA_NAPI_BUDGET 64 35 36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 38 static int debug = -1; 39 module_param(debug, int, 0); 40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 41 42 static struct ena_aenq_handlers aenq_handlers; 43 44 static struct workqueue_struct *ena_wq; 45 46 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 47 48 static int ena_rss_init_default(struct ena_adapter *adapter); 49 static void check_for_admin_com_state(struct ena_adapter *adapter); 50 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 51 static int ena_restore_device(struct ena_adapter *adapter); 52 53 static void ena_init_io_rings(struct ena_adapter *adapter, 54 int first_index, int count); 55 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 56 int count); 57 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 58 int count); 59 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 60 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 61 int first_index, 62 int count); 63 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 64 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 65 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 66 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 67 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 68 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 69 int first_index, int count); 70 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 71 int first_index, int count); 72 static int ena_up(struct ena_adapter *adapter); 73 static void ena_down(struct ena_adapter *adapter); 74 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 75 struct ena_ring *rx_ring); 76 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 77 struct ena_ring *rx_ring); 78 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 79 struct ena_tx_buffer *tx_info); 80 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 81 int first_index, int count); 82 83 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 84 static void ena_increase_stat(u64 *statp, u64 cnt, 85 struct u64_stats_sync *syncp) 86 { 87 u64_stats_update_begin(syncp); 88 (*statp) += cnt; 89 u64_stats_update_end(syncp); 90 } 91 92 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 93 { 94 struct ena_adapter *adapter = netdev_priv(dev); 95 96 /* Change the state of the device to trigger reset 97 * Check that we are not in the middle or a trigger already 98 */ 99 100 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 101 return; 102 103 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 104 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 105 106 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 107 } 108 109 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 110 { 111 int i; 112 113 for (i = 0; i < adapter->num_io_queues; i++) 114 adapter->rx_ring[i].mtu = mtu; 115 } 116 117 static int ena_change_mtu(struct net_device *dev, int new_mtu) 118 { 119 struct ena_adapter *adapter = netdev_priv(dev); 120 int ret; 121 122 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 123 if (!ret) { 124 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 125 update_rx_ring_mtu(adapter, new_mtu); 126 dev->mtu = new_mtu; 127 } else { 128 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 129 new_mtu); 130 } 131 132 return ret; 133 } 134 135 static int ena_xmit_common(struct net_device *dev, 136 struct ena_ring *ring, 137 struct ena_tx_buffer *tx_info, 138 struct ena_com_tx_ctx *ena_tx_ctx, 139 u16 next_to_use, 140 u32 bytes) 141 { 142 struct ena_adapter *adapter = netdev_priv(dev); 143 int rc, nb_hw_desc; 144 145 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 146 ena_tx_ctx))) { 147 netif_dbg(adapter, tx_queued, dev, 148 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 149 ring->qid); 150 ena_com_write_sq_doorbell(ring->ena_com_io_sq); 151 } 152 153 /* prepare the packet's descriptors to dma engine */ 154 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 155 &nb_hw_desc); 156 157 /* In case there isn't enough space in the queue for the packet, 158 * we simply drop it. All other failure reasons of 159 * ena_com_prepare_tx() are fatal and therefore require a device reset. 160 */ 161 if (unlikely(rc)) { 162 netif_err(adapter, tx_queued, dev, 163 "Failed to prepare tx bufs\n"); 164 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 165 &ring->syncp); 166 if (rc != -ENOMEM) { 167 adapter->reset_reason = 168 ENA_REGS_RESET_DRIVER_INVALID_STATE; 169 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 170 } 171 return rc; 172 } 173 174 u64_stats_update_begin(&ring->syncp); 175 ring->tx_stats.cnt++; 176 ring->tx_stats.bytes += bytes; 177 u64_stats_update_end(&ring->syncp); 178 179 tx_info->tx_descs = nb_hw_desc; 180 tx_info->last_jiffies = jiffies; 181 tx_info->print_once = 0; 182 183 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 184 ring->ring_size); 185 return 0; 186 } 187 188 /* This is the XDP napi callback. XDP queues use a separate napi callback 189 * than Rx/Tx queues. 190 */ 191 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 192 { 193 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 194 u32 xdp_work_done, xdp_budget; 195 struct ena_ring *xdp_ring; 196 int napi_comp_call = 0; 197 int ret; 198 199 xdp_ring = ena_napi->xdp_ring; 200 xdp_ring->first_interrupt = ena_napi->first_interrupt; 201 202 xdp_budget = budget; 203 204 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 205 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 206 napi_complete_done(napi, 0); 207 return 0; 208 } 209 210 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 211 212 /* If the device is about to reset or down, avoid unmask 213 * the interrupt and return 0 so NAPI won't reschedule 214 */ 215 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 216 napi_complete_done(napi, 0); 217 ret = 0; 218 } else if (xdp_budget > xdp_work_done) { 219 napi_comp_call = 1; 220 if (napi_complete_done(napi, xdp_work_done)) 221 ena_unmask_interrupt(xdp_ring, NULL); 222 ena_update_ring_numa_node(xdp_ring, NULL); 223 ret = xdp_work_done; 224 } else { 225 ret = xdp_budget; 226 } 227 228 u64_stats_update_begin(&xdp_ring->syncp); 229 xdp_ring->tx_stats.napi_comp += napi_comp_call; 230 xdp_ring->tx_stats.tx_poll++; 231 u64_stats_update_end(&xdp_ring->syncp); 232 233 return ret; 234 } 235 236 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 237 struct ena_tx_buffer *tx_info, 238 struct xdp_frame *xdpf, 239 struct ena_com_tx_ctx *ena_tx_ctx) 240 { 241 struct ena_adapter *adapter = xdp_ring->adapter; 242 struct ena_com_buf *ena_buf; 243 int push_len = 0; 244 dma_addr_t dma; 245 void *data; 246 u32 size; 247 248 tx_info->xdpf = xdpf; 249 data = tx_info->xdpf->data; 250 size = tx_info->xdpf->len; 251 252 if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 253 /* Designate part of the packet for LLQ */ 254 push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 255 256 ena_tx_ctx->push_header = data; 257 258 size -= push_len; 259 data += push_len; 260 } 261 262 ena_tx_ctx->header_len = push_len; 263 264 if (size > 0) { 265 dma = dma_map_single(xdp_ring->dev, 266 data, 267 size, 268 DMA_TO_DEVICE); 269 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 270 goto error_report_dma_error; 271 272 tx_info->map_linear_data = 0; 273 274 ena_buf = tx_info->bufs; 275 ena_buf->paddr = dma; 276 ena_buf->len = size; 277 278 ena_tx_ctx->ena_bufs = ena_buf; 279 ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1; 280 } 281 282 return 0; 283 284 error_report_dma_error: 285 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 286 &xdp_ring->syncp); 287 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 288 289 return -EINVAL; 290 } 291 292 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 293 struct net_device *dev, 294 struct xdp_frame *xdpf, 295 int flags) 296 { 297 struct ena_com_tx_ctx ena_tx_ctx = {}; 298 struct ena_tx_buffer *tx_info; 299 u16 next_to_use, req_id; 300 int rc; 301 302 next_to_use = xdp_ring->next_to_use; 303 req_id = xdp_ring->free_ids[next_to_use]; 304 tx_info = &xdp_ring->tx_buffer_info[req_id]; 305 tx_info->num_of_bufs = 0; 306 307 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx); 308 if (unlikely(rc)) 309 return rc; 310 311 ena_tx_ctx.req_id = req_id; 312 313 rc = ena_xmit_common(dev, 314 xdp_ring, 315 tx_info, 316 &ena_tx_ctx, 317 next_to_use, 318 xdpf->len); 319 if (rc) 320 goto error_unmap_dma; 321 /* trigger the dma engine. ena_com_write_sq_doorbell() 322 * has a mb 323 */ 324 if (flags & XDP_XMIT_FLUSH) { 325 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 326 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 327 &xdp_ring->syncp); 328 } 329 330 return rc; 331 332 error_unmap_dma: 333 ena_unmap_tx_buff(xdp_ring, tx_info); 334 tx_info->xdpf = NULL; 335 return rc; 336 } 337 338 static int ena_xdp_xmit(struct net_device *dev, int n, 339 struct xdp_frame **frames, u32 flags) 340 { 341 struct ena_adapter *adapter = netdev_priv(dev); 342 struct ena_ring *xdp_ring; 343 int qid, i, nxmit = 0; 344 345 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 346 return -EINVAL; 347 348 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 349 return -ENETDOWN; 350 351 /* We assume that all rings have the same XDP program */ 352 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 353 return -ENXIO; 354 355 qid = smp_processor_id() % adapter->xdp_num_queues; 356 qid += adapter->xdp_first_ring; 357 xdp_ring = &adapter->tx_ring[qid]; 358 359 /* Other CPU ids might try to send thorugh this queue */ 360 spin_lock(&xdp_ring->xdp_tx_lock); 361 362 for (i = 0; i < n; i++) { 363 if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0)) 364 break; 365 nxmit++; 366 } 367 368 /* Ring doorbell to make device aware of the packets */ 369 if (flags & XDP_XMIT_FLUSH) { 370 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 371 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 372 &xdp_ring->syncp); 373 } 374 375 spin_unlock(&xdp_ring->xdp_tx_lock); 376 377 /* Return number of packets sent */ 378 return nxmit; 379 } 380 381 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 382 { 383 struct bpf_prog *xdp_prog; 384 struct ena_ring *xdp_ring; 385 u32 verdict = XDP_PASS; 386 struct xdp_frame *xdpf; 387 u64 *xdp_stat; 388 int qid; 389 390 rcu_read_lock(); 391 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 392 393 if (!xdp_prog) 394 goto out; 395 396 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 397 398 switch (verdict) { 399 case XDP_TX: 400 xdpf = xdp_convert_buff_to_frame(xdp); 401 if (unlikely(!xdpf)) { 402 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 403 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 404 verdict = XDP_ABORTED; 405 break; 406 } 407 408 /* Find xmit queue */ 409 qid = rx_ring->qid + rx_ring->adapter->num_io_queues; 410 xdp_ring = &rx_ring->adapter->tx_ring[qid]; 411 412 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 413 spin_lock(&xdp_ring->xdp_tx_lock); 414 415 if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, 416 XDP_XMIT_FLUSH)) 417 xdp_return_frame(xdpf); 418 419 spin_unlock(&xdp_ring->xdp_tx_lock); 420 xdp_stat = &rx_ring->rx_stats.xdp_tx; 421 break; 422 case XDP_REDIRECT: 423 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 424 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 425 break; 426 } 427 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 428 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 429 verdict = XDP_ABORTED; 430 break; 431 case XDP_ABORTED: 432 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 433 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 434 break; 435 case XDP_DROP: 436 xdp_stat = &rx_ring->rx_stats.xdp_drop; 437 break; 438 case XDP_PASS: 439 xdp_stat = &rx_ring->rx_stats.xdp_pass; 440 break; 441 default: 442 bpf_warn_invalid_xdp_action(verdict); 443 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 444 } 445 446 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 447 out: 448 rcu_read_unlock(); 449 450 return verdict; 451 } 452 453 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 454 { 455 adapter->xdp_first_ring = adapter->num_io_queues; 456 adapter->xdp_num_queues = adapter->num_io_queues; 457 458 ena_init_io_rings(adapter, 459 adapter->xdp_first_ring, 460 adapter->xdp_num_queues); 461 } 462 463 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 464 { 465 int rc = 0; 466 467 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 468 adapter->xdp_num_queues); 469 if (rc) 470 goto setup_err; 471 472 rc = ena_create_io_tx_queues_in_range(adapter, 473 adapter->xdp_first_ring, 474 adapter->xdp_num_queues); 475 if (rc) 476 goto create_err; 477 478 return 0; 479 480 create_err: 481 ena_free_all_io_tx_resources(adapter); 482 setup_err: 483 return rc; 484 } 485 486 /* Provides a way for both kernel and bpf-prog to know 487 * more about the RX-queue a given XDP frame arrived on. 488 */ 489 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 490 { 491 int rc; 492 493 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 494 495 if (rc) { 496 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 497 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 498 rx_ring->qid, rc); 499 goto err; 500 } 501 502 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 503 NULL); 504 505 if (rc) { 506 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 507 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 508 rx_ring->qid, rc); 509 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 510 } 511 512 err: 513 return rc; 514 } 515 516 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 517 { 518 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 519 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 520 } 521 522 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 523 struct bpf_prog *prog, 524 int first, int count) 525 { 526 struct ena_ring *rx_ring; 527 int i = 0; 528 529 for (i = first; i < count; i++) { 530 rx_ring = &adapter->rx_ring[i]; 531 xchg(&rx_ring->xdp_bpf_prog, prog); 532 if (prog) { 533 ena_xdp_register_rxq_info(rx_ring); 534 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 535 } else { 536 ena_xdp_unregister_rxq_info(rx_ring); 537 rx_ring->rx_headroom = 0; 538 } 539 } 540 } 541 542 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 543 struct bpf_prog *prog) 544 { 545 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 546 547 ena_xdp_exchange_program_rx_in_range(adapter, 548 prog, 549 0, 550 adapter->num_io_queues); 551 552 if (old_bpf_prog) 553 bpf_prog_put(old_bpf_prog); 554 } 555 556 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 557 { 558 bool was_up; 559 int rc; 560 561 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 562 563 if (was_up) 564 ena_down(adapter); 565 566 adapter->xdp_first_ring = 0; 567 adapter->xdp_num_queues = 0; 568 ena_xdp_exchange_program(adapter, NULL); 569 if (was_up) { 570 rc = ena_up(adapter); 571 if (rc) 572 return rc; 573 } 574 return 0; 575 } 576 577 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 578 { 579 struct ena_adapter *adapter = netdev_priv(netdev); 580 struct bpf_prog *prog = bpf->prog; 581 struct bpf_prog *old_bpf_prog; 582 int rc, prev_mtu; 583 bool is_up; 584 585 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 586 rc = ena_xdp_allowed(adapter); 587 if (rc == ENA_XDP_ALLOWED) { 588 old_bpf_prog = adapter->xdp_bpf_prog; 589 if (prog) { 590 if (!is_up) { 591 ena_init_all_xdp_queues(adapter); 592 } else if (!old_bpf_prog) { 593 ena_down(adapter); 594 ena_init_all_xdp_queues(adapter); 595 } 596 ena_xdp_exchange_program(adapter, prog); 597 598 if (is_up && !old_bpf_prog) { 599 rc = ena_up(adapter); 600 if (rc) 601 return rc; 602 } 603 } else if (old_bpf_prog) { 604 rc = ena_destroy_and_free_all_xdp_queues(adapter); 605 if (rc) 606 return rc; 607 } 608 609 prev_mtu = netdev->max_mtu; 610 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 611 612 if (!old_bpf_prog) 613 netif_info(adapter, drv, adapter->netdev, 614 "XDP program is set, changing the max_mtu from %d to %d", 615 prev_mtu, netdev->max_mtu); 616 617 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 618 netif_err(adapter, drv, adapter->netdev, 619 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 620 netdev->mtu, ENA_XDP_MAX_MTU); 621 NL_SET_ERR_MSG_MOD(bpf->extack, 622 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 623 return -EINVAL; 624 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 625 netif_err(adapter, drv, adapter->netdev, 626 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 627 adapter->num_io_queues, adapter->max_num_io_queues); 628 NL_SET_ERR_MSG_MOD(bpf->extack, 629 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 630 return -EINVAL; 631 } 632 633 return 0; 634 } 635 636 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 637 * program as well as to query the current xdp program id. 638 */ 639 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 640 { 641 switch (bpf->command) { 642 case XDP_SETUP_PROG: 643 return ena_xdp_set(netdev, bpf); 644 default: 645 return -EINVAL; 646 } 647 return 0; 648 } 649 650 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 651 { 652 #ifdef CONFIG_RFS_ACCEL 653 u32 i; 654 int rc; 655 656 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 657 if (!adapter->netdev->rx_cpu_rmap) 658 return -ENOMEM; 659 for (i = 0; i < adapter->num_io_queues; i++) { 660 int irq_idx = ENA_IO_IRQ_IDX(i); 661 662 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 663 pci_irq_vector(adapter->pdev, irq_idx)); 664 if (rc) { 665 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 666 adapter->netdev->rx_cpu_rmap = NULL; 667 return rc; 668 } 669 } 670 #endif /* CONFIG_RFS_ACCEL */ 671 return 0; 672 } 673 674 static void ena_init_io_rings_common(struct ena_adapter *adapter, 675 struct ena_ring *ring, u16 qid) 676 { 677 ring->qid = qid; 678 ring->pdev = adapter->pdev; 679 ring->dev = &adapter->pdev->dev; 680 ring->netdev = adapter->netdev; 681 ring->napi = &adapter->ena_napi[qid].napi; 682 ring->adapter = adapter; 683 ring->ena_dev = adapter->ena_dev; 684 ring->per_napi_packets = 0; 685 ring->cpu = 0; 686 ring->first_interrupt = false; 687 ring->no_interrupt_event_cnt = 0; 688 u64_stats_init(&ring->syncp); 689 } 690 691 static void ena_init_io_rings(struct ena_adapter *adapter, 692 int first_index, int count) 693 { 694 struct ena_com_dev *ena_dev; 695 struct ena_ring *txr, *rxr; 696 int i; 697 698 ena_dev = adapter->ena_dev; 699 700 for (i = first_index; i < first_index + count; i++) { 701 txr = &adapter->tx_ring[i]; 702 rxr = &adapter->rx_ring[i]; 703 704 /* TX common ring state */ 705 ena_init_io_rings_common(adapter, txr, i); 706 707 /* TX specific ring state */ 708 txr->ring_size = adapter->requested_tx_ring_size; 709 txr->tx_max_header_size = ena_dev->tx_max_header_size; 710 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 711 txr->sgl_size = adapter->max_tx_sgl_size; 712 txr->smoothed_interval = 713 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 714 txr->disable_meta_caching = adapter->disable_meta_caching; 715 spin_lock_init(&txr->xdp_tx_lock); 716 717 /* Don't init RX queues for xdp queues */ 718 if (!ENA_IS_XDP_INDEX(adapter, i)) { 719 /* RX common ring state */ 720 ena_init_io_rings_common(adapter, rxr, i); 721 722 /* RX specific ring state */ 723 rxr->ring_size = adapter->requested_rx_ring_size; 724 rxr->rx_copybreak = adapter->rx_copybreak; 725 rxr->sgl_size = adapter->max_rx_sgl_size; 726 rxr->smoothed_interval = 727 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 728 rxr->empty_rx_queue = 0; 729 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 730 } 731 } 732 } 733 734 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 735 * @adapter: network interface device structure 736 * @qid: queue index 737 * 738 * Return 0 on success, negative on failure 739 */ 740 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 741 { 742 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 743 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 744 int size, i, node; 745 746 if (tx_ring->tx_buffer_info) { 747 netif_err(adapter, ifup, 748 adapter->netdev, "tx_buffer_info info is not NULL"); 749 return -EEXIST; 750 } 751 752 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 753 node = cpu_to_node(ena_irq->cpu); 754 755 tx_ring->tx_buffer_info = vzalloc_node(size, node); 756 if (!tx_ring->tx_buffer_info) { 757 tx_ring->tx_buffer_info = vzalloc(size); 758 if (!tx_ring->tx_buffer_info) 759 goto err_tx_buffer_info; 760 } 761 762 size = sizeof(u16) * tx_ring->ring_size; 763 tx_ring->free_ids = vzalloc_node(size, node); 764 if (!tx_ring->free_ids) { 765 tx_ring->free_ids = vzalloc(size); 766 if (!tx_ring->free_ids) 767 goto err_tx_free_ids; 768 } 769 770 size = tx_ring->tx_max_header_size; 771 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 772 if (!tx_ring->push_buf_intermediate_buf) { 773 tx_ring->push_buf_intermediate_buf = vzalloc(size); 774 if (!tx_ring->push_buf_intermediate_buf) 775 goto err_push_buf_intermediate_buf; 776 } 777 778 /* Req id ring for TX out of order completions */ 779 for (i = 0; i < tx_ring->ring_size; i++) 780 tx_ring->free_ids[i] = i; 781 782 /* Reset tx statistics */ 783 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 784 785 tx_ring->next_to_use = 0; 786 tx_ring->next_to_clean = 0; 787 tx_ring->cpu = ena_irq->cpu; 788 return 0; 789 790 err_push_buf_intermediate_buf: 791 vfree(tx_ring->free_ids); 792 tx_ring->free_ids = NULL; 793 err_tx_free_ids: 794 vfree(tx_ring->tx_buffer_info); 795 tx_ring->tx_buffer_info = NULL; 796 err_tx_buffer_info: 797 return -ENOMEM; 798 } 799 800 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 801 * @adapter: network interface device structure 802 * @qid: queue index 803 * 804 * Free all transmit software resources 805 */ 806 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 807 { 808 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 809 810 vfree(tx_ring->tx_buffer_info); 811 tx_ring->tx_buffer_info = NULL; 812 813 vfree(tx_ring->free_ids); 814 tx_ring->free_ids = NULL; 815 816 vfree(tx_ring->push_buf_intermediate_buf); 817 tx_ring->push_buf_intermediate_buf = NULL; 818 } 819 820 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 821 int first_index, 822 int count) 823 { 824 int i, rc = 0; 825 826 for (i = first_index; i < first_index + count; i++) { 827 rc = ena_setup_tx_resources(adapter, i); 828 if (rc) 829 goto err_setup_tx; 830 } 831 832 return 0; 833 834 err_setup_tx: 835 836 netif_err(adapter, ifup, adapter->netdev, 837 "Tx queue %d: allocation failed\n", i); 838 839 /* rewind the index freeing the rings as we go */ 840 while (first_index < i--) 841 ena_free_tx_resources(adapter, i); 842 return rc; 843 } 844 845 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 846 int first_index, int count) 847 { 848 int i; 849 850 for (i = first_index; i < first_index + count; i++) 851 ena_free_tx_resources(adapter, i); 852 } 853 854 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 855 * @adapter: board private structure 856 * 857 * Free all transmit software resources 858 */ 859 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 860 { 861 ena_free_all_io_tx_resources_in_range(adapter, 862 0, 863 adapter->xdp_num_queues + 864 adapter->num_io_queues); 865 } 866 867 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 868 * @adapter: network interface device structure 869 * @qid: queue index 870 * 871 * Returns 0 on success, negative on failure 872 */ 873 static int ena_setup_rx_resources(struct ena_adapter *adapter, 874 u32 qid) 875 { 876 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 877 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 878 int size, node, i; 879 880 if (rx_ring->rx_buffer_info) { 881 netif_err(adapter, ifup, adapter->netdev, 882 "rx_buffer_info is not NULL"); 883 return -EEXIST; 884 } 885 886 /* alloc extra element so in rx path 887 * we can always prefetch rx_info + 1 888 */ 889 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 890 node = cpu_to_node(ena_irq->cpu); 891 892 rx_ring->rx_buffer_info = vzalloc_node(size, node); 893 if (!rx_ring->rx_buffer_info) { 894 rx_ring->rx_buffer_info = vzalloc(size); 895 if (!rx_ring->rx_buffer_info) 896 return -ENOMEM; 897 } 898 899 size = sizeof(u16) * rx_ring->ring_size; 900 rx_ring->free_ids = vzalloc_node(size, node); 901 if (!rx_ring->free_ids) { 902 rx_ring->free_ids = vzalloc(size); 903 if (!rx_ring->free_ids) { 904 vfree(rx_ring->rx_buffer_info); 905 rx_ring->rx_buffer_info = NULL; 906 return -ENOMEM; 907 } 908 } 909 910 /* Req id ring for receiving RX pkts out of order */ 911 for (i = 0; i < rx_ring->ring_size; i++) 912 rx_ring->free_ids[i] = i; 913 914 /* Reset rx statistics */ 915 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 916 917 rx_ring->next_to_clean = 0; 918 rx_ring->next_to_use = 0; 919 rx_ring->cpu = ena_irq->cpu; 920 921 return 0; 922 } 923 924 /* ena_free_rx_resources - Free I/O Rx Resources 925 * @adapter: network interface device structure 926 * @qid: queue index 927 * 928 * Free all receive software resources 929 */ 930 static void ena_free_rx_resources(struct ena_adapter *adapter, 931 u32 qid) 932 { 933 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 934 935 vfree(rx_ring->rx_buffer_info); 936 rx_ring->rx_buffer_info = NULL; 937 938 vfree(rx_ring->free_ids); 939 rx_ring->free_ids = NULL; 940 } 941 942 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 943 * @adapter: board private structure 944 * 945 * Return 0 on success, negative on failure 946 */ 947 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 948 { 949 int i, rc = 0; 950 951 for (i = 0; i < adapter->num_io_queues; i++) { 952 rc = ena_setup_rx_resources(adapter, i); 953 if (rc) 954 goto err_setup_rx; 955 } 956 957 return 0; 958 959 err_setup_rx: 960 961 netif_err(adapter, ifup, adapter->netdev, 962 "Rx queue %d: allocation failed\n", i); 963 964 /* rewind the index freeing the rings as we go */ 965 while (i--) 966 ena_free_rx_resources(adapter, i); 967 return rc; 968 } 969 970 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 971 * @adapter: board private structure 972 * 973 * Free all receive software resources 974 */ 975 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 976 { 977 int i; 978 979 for (i = 0; i < adapter->num_io_queues; i++) 980 ena_free_rx_resources(adapter, i); 981 } 982 983 static int ena_alloc_rx_page(struct ena_ring *rx_ring, 984 struct ena_rx_buffer *rx_info, gfp_t gfp) 985 { 986 int headroom = rx_ring->rx_headroom; 987 struct ena_com_buf *ena_buf; 988 struct page *page; 989 dma_addr_t dma; 990 991 /* restore page offset value in case it has been changed by device */ 992 rx_info->page_offset = headroom; 993 994 /* if previous allocated page is not used */ 995 if (unlikely(rx_info->page)) 996 return 0; 997 998 page = alloc_page(gfp); 999 if (unlikely(!page)) { 1000 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 1001 &rx_ring->syncp); 1002 return -ENOMEM; 1003 } 1004 1005 /* To enable NIC-side port-mirroring, AKA SPAN port, 1006 * we make the buffer readable from the nic as well 1007 */ 1008 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 1009 DMA_BIDIRECTIONAL); 1010 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 1011 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 1012 &rx_ring->syncp); 1013 1014 __free_page(page); 1015 return -EIO; 1016 } 1017 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1018 "Allocate page %p, rx_info %p\n", page, rx_info); 1019 1020 rx_info->page = page; 1021 ena_buf = &rx_info->ena_buf; 1022 ena_buf->paddr = dma + headroom; 1023 ena_buf->len = ENA_PAGE_SIZE - headroom; 1024 1025 return 0; 1026 } 1027 1028 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1029 struct ena_rx_buffer *rx_info) 1030 { 1031 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1032 1033 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1034 ENA_PAGE_SIZE, 1035 DMA_BIDIRECTIONAL); 1036 } 1037 1038 static void ena_free_rx_page(struct ena_ring *rx_ring, 1039 struct ena_rx_buffer *rx_info) 1040 { 1041 struct page *page = rx_info->page; 1042 1043 if (unlikely(!page)) { 1044 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1045 "Trying to free unallocated buffer\n"); 1046 return; 1047 } 1048 1049 ena_unmap_rx_buff(rx_ring, rx_info); 1050 1051 __free_page(page); 1052 rx_info->page = NULL; 1053 } 1054 1055 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1056 { 1057 u16 next_to_use, req_id; 1058 u32 i; 1059 int rc; 1060 1061 next_to_use = rx_ring->next_to_use; 1062 1063 for (i = 0; i < num; i++) { 1064 struct ena_rx_buffer *rx_info; 1065 1066 req_id = rx_ring->free_ids[next_to_use]; 1067 1068 rx_info = &rx_ring->rx_buffer_info[req_id]; 1069 1070 rc = ena_alloc_rx_page(rx_ring, rx_info, 1071 GFP_ATOMIC | __GFP_COMP); 1072 if (unlikely(rc < 0)) { 1073 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1074 "Failed to allocate buffer for rx queue %d\n", 1075 rx_ring->qid); 1076 break; 1077 } 1078 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1079 &rx_info->ena_buf, 1080 req_id); 1081 if (unlikely(rc)) { 1082 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1083 "Failed to add buffer for rx queue %d\n", 1084 rx_ring->qid); 1085 break; 1086 } 1087 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1088 rx_ring->ring_size); 1089 } 1090 1091 if (unlikely(i < num)) { 1092 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1093 &rx_ring->syncp); 1094 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1095 "Refilled rx qid %d with only %d buffers (from %d)\n", 1096 rx_ring->qid, i, num); 1097 } 1098 1099 /* ena_com_write_sq_doorbell issues a wmb() */ 1100 if (likely(i)) 1101 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1102 1103 rx_ring->next_to_use = next_to_use; 1104 1105 return i; 1106 } 1107 1108 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1109 u32 qid) 1110 { 1111 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1112 u32 i; 1113 1114 for (i = 0; i < rx_ring->ring_size; i++) { 1115 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1116 1117 if (rx_info->page) 1118 ena_free_rx_page(rx_ring, rx_info); 1119 } 1120 } 1121 1122 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1123 * @adapter: board private structure 1124 */ 1125 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1126 { 1127 struct ena_ring *rx_ring; 1128 int i, rc, bufs_num; 1129 1130 for (i = 0; i < adapter->num_io_queues; i++) { 1131 rx_ring = &adapter->rx_ring[i]; 1132 bufs_num = rx_ring->ring_size - 1; 1133 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1134 1135 if (unlikely(rc != bufs_num)) 1136 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1137 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1138 i, rc, bufs_num); 1139 } 1140 } 1141 1142 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1143 { 1144 int i; 1145 1146 for (i = 0; i < adapter->num_io_queues; i++) 1147 ena_free_rx_bufs(adapter, i); 1148 } 1149 1150 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1151 struct ena_tx_buffer *tx_info) 1152 { 1153 struct ena_com_buf *ena_buf; 1154 u32 cnt; 1155 int i; 1156 1157 ena_buf = tx_info->bufs; 1158 cnt = tx_info->num_of_bufs; 1159 1160 if (unlikely(!cnt)) 1161 return; 1162 1163 if (tx_info->map_linear_data) { 1164 dma_unmap_single(tx_ring->dev, 1165 dma_unmap_addr(ena_buf, paddr), 1166 dma_unmap_len(ena_buf, len), 1167 DMA_TO_DEVICE); 1168 ena_buf++; 1169 cnt--; 1170 } 1171 1172 /* unmap remaining mapped pages */ 1173 for (i = 0; i < cnt; i++) { 1174 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1175 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1176 ena_buf++; 1177 } 1178 } 1179 1180 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1181 * @tx_ring: TX ring for which buffers be freed 1182 */ 1183 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1184 { 1185 bool print_once = true; 1186 u32 i; 1187 1188 for (i = 0; i < tx_ring->ring_size; i++) { 1189 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1190 1191 if (!tx_info->skb) 1192 continue; 1193 1194 if (print_once) { 1195 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1196 "Free uncompleted tx skb qid %d idx 0x%x\n", 1197 tx_ring->qid, i); 1198 print_once = false; 1199 } else { 1200 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1201 "Free uncompleted tx skb qid %d idx 0x%x\n", 1202 tx_ring->qid, i); 1203 } 1204 1205 ena_unmap_tx_buff(tx_ring, tx_info); 1206 1207 dev_kfree_skb_any(tx_info->skb); 1208 } 1209 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1210 tx_ring->qid)); 1211 } 1212 1213 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1214 { 1215 struct ena_ring *tx_ring; 1216 int i; 1217 1218 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1219 tx_ring = &adapter->tx_ring[i]; 1220 ena_free_tx_bufs(tx_ring); 1221 } 1222 } 1223 1224 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1225 { 1226 u16 ena_qid; 1227 int i; 1228 1229 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1230 ena_qid = ENA_IO_TXQ_IDX(i); 1231 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1232 } 1233 } 1234 1235 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1236 { 1237 u16 ena_qid; 1238 int i; 1239 1240 for (i = 0; i < adapter->num_io_queues; i++) { 1241 ena_qid = ENA_IO_RXQ_IDX(i); 1242 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1243 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1244 } 1245 } 1246 1247 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1248 { 1249 ena_destroy_all_tx_queues(adapter); 1250 ena_destroy_all_rx_queues(adapter); 1251 } 1252 1253 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1254 struct ena_tx_buffer *tx_info, bool is_xdp) 1255 { 1256 if (tx_info) 1257 netif_err(ring->adapter, 1258 tx_done, 1259 ring->netdev, 1260 "tx_info doesn't have valid %s", 1261 is_xdp ? "xdp frame" : "skb"); 1262 else 1263 netif_err(ring->adapter, 1264 tx_done, 1265 ring->netdev, 1266 "Invalid req_id: %hu\n", 1267 req_id); 1268 1269 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1270 1271 /* Trigger device reset */ 1272 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1273 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1274 return -EFAULT; 1275 } 1276 1277 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1278 { 1279 struct ena_tx_buffer *tx_info = NULL; 1280 1281 if (likely(req_id < tx_ring->ring_size)) { 1282 tx_info = &tx_ring->tx_buffer_info[req_id]; 1283 if (likely(tx_info->skb)) 1284 return 0; 1285 } 1286 1287 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1288 } 1289 1290 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1291 { 1292 struct ena_tx_buffer *tx_info = NULL; 1293 1294 if (likely(req_id < xdp_ring->ring_size)) { 1295 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1296 if (likely(tx_info->xdpf)) 1297 return 0; 1298 } 1299 1300 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1301 } 1302 1303 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1304 { 1305 struct netdev_queue *txq; 1306 bool above_thresh; 1307 u32 tx_bytes = 0; 1308 u32 total_done = 0; 1309 u16 next_to_clean; 1310 u16 req_id; 1311 int tx_pkts = 0; 1312 int rc; 1313 1314 next_to_clean = tx_ring->next_to_clean; 1315 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1316 1317 while (tx_pkts < budget) { 1318 struct ena_tx_buffer *tx_info; 1319 struct sk_buff *skb; 1320 1321 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1322 &req_id); 1323 if (rc) 1324 break; 1325 1326 rc = validate_tx_req_id(tx_ring, req_id); 1327 if (rc) 1328 break; 1329 1330 tx_info = &tx_ring->tx_buffer_info[req_id]; 1331 skb = tx_info->skb; 1332 1333 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1334 prefetch(&skb->end); 1335 1336 tx_info->skb = NULL; 1337 tx_info->last_jiffies = 0; 1338 1339 ena_unmap_tx_buff(tx_ring, tx_info); 1340 1341 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1342 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1343 skb); 1344 1345 tx_bytes += skb->len; 1346 dev_kfree_skb(skb); 1347 tx_pkts++; 1348 total_done += tx_info->tx_descs; 1349 1350 tx_ring->free_ids[next_to_clean] = req_id; 1351 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1352 tx_ring->ring_size); 1353 } 1354 1355 tx_ring->next_to_clean = next_to_clean; 1356 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1357 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1358 1359 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1360 1361 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1362 "tx_poll: q %d done. total pkts: %d\n", 1363 tx_ring->qid, tx_pkts); 1364 1365 /* need to make the rings circular update visible to 1366 * ena_start_xmit() before checking for netif_queue_stopped(). 1367 */ 1368 smp_mb(); 1369 1370 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1371 ENA_TX_WAKEUP_THRESH); 1372 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1373 __netif_tx_lock(txq, smp_processor_id()); 1374 above_thresh = 1375 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1376 ENA_TX_WAKEUP_THRESH); 1377 if (netif_tx_queue_stopped(txq) && above_thresh && 1378 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1379 netif_tx_wake_queue(txq); 1380 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1381 &tx_ring->syncp); 1382 } 1383 __netif_tx_unlock(txq); 1384 } 1385 1386 return tx_pkts; 1387 } 1388 1389 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 1390 { 1391 struct sk_buff *skb; 1392 1393 if (frags) 1394 skb = napi_get_frags(rx_ring->napi); 1395 else 1396 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1397 rx_ring->rx_copybreak); 1398 1399 if (unlikely(!skb)) { 1400 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1401 &rx_ring->syncp); 1402 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1403 "Failed to allocate skb. frags: %d\n", frags); 1404 return NULL; 1405 } 1406 1407 return skb; 1408 } 1409 1410 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1411 struct ena_com_rx_buf_info *ena_bufs, 1412 u32 descs, 1413 u16 *next_to_clean) 1414 { 1415 struct sk_buff *skb; 1416 struct ena_rx_buffer *rx_info; 1417 u16 len, req_id, buf = 0; 1418 void *va; 1419 1420 len = ena_bufs[buf].len; 1421 req_id = ena_bufs[buf].req_id; 1422 1423 rx_info = &rx_ring->rx_buffer_info[req_id]; 1424 1425 if (unlikely(!rx_info->page)) { 1426 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1427 "Page is NULL\n"); 1428 return NULL; 1429 } 1430 1431 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1432 "rx_info %p page %p\n", 1433 rx_info, rx_info->page); 1434 1435 /* save virt address of first buffer */ 1436 va = page_address(rx_info->page) + rx_info->page_offset; 1437 1438 prefetch(va); 1439 1440 if (len <= rx_ring->rx_copybreak) { 1441 skb = ena_alloc_skb(rx_ring, false); 1442 if (unlikely(!skb)) 1443 return NULL; 1444 1445 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1446 "RX allocated small packet. len %d. data_len %d\n", 1447 skb->len, skb->data_len); 1448 1449 /* sync this buffer for CPU use */ 1450 dma_sync_single_for_cpu(rx_ring->dev, 1451 dma_unmap_addr(&rx_info->ena_buf, paddr), 1452 len, 1453 DMA_FROM_DEVICE); 1454 skb_copy_to_linear_data(skb, va, len); 1455 dma_sync_single_for_device(rx_ring->dev, 1456 dma_unmap_addr(&rx_info->ena_buf, paddr), 1457 len, 1458 DMA_FROM_DEVICE); 1459 1460 skb_put(skb, len); 1461 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1462 rx_ring->free_ids[*next_to_clean] = req_id; 1463 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1464 rx_ring->ring_size); 1465 return skb; 1466 } 1467 1468 skb = ena_alloc_skb(rx_ring, true); 1469 if (unlikely(!skb)) 1470 return NULL; 1471 1472 do { 1473 ena_unmap_rx_buff(rx_ring, rx_info); 1474 1475 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1476 rx_info->page_offset, len, ENA_PAGE_SIZE); 1477 1478 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1479 "RX skb updated. len %d. data_len %d\n", 1480 skb->len, skb->data_len); 1481 1482 rx_info->page = NULL; 1483 1484 rx_ring->free_ids[*next_to_clean] = req_id; 1485 *next_to_clean = 1486 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1487 rx_ring->ring_size); 1488 if (likely(--descs == 0)) 1489 break; 1490 1491 buf++; 1492 len = ena_bufs[buf].len; 1493 req_id = ena_bufs[buf].req_id; 1494 1495 rx_info = &rx_ring->rx_buffer_info[req_id]; 1496 } while (1); 1497 1498 return skb; 1499 } 1500 1501 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1502 * @adapter: structure containing adapter specific data 1503 * @ena_rx_ctx: received packet context/metadata 1504 * @skb: skb currently being received and modified 1505 */ 1506 static void ena_rx_checksum(struct ena_ring *rx_ring, 1507 struct ena_com_rx_ctx *ena_rx_ctx, 1508 struct sk_buff *skb) 1509 { 1510 /* Rx csum disabled */ 1511 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1512 skb->ip_summed = CHECKSUM_NONE; 1513 return; 1514 } 1515 1516 /* For fragmented packets the checksum isn't valid */ 1517 if (ena_rx_ctx->frag) { 1518 skb->ip_summed = CHECKSUM_NONE; 1519 return; 1520 } 1521 1522 /* if IP and error */ 1523 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1524 (ena_rx_ctx->l3_csum_err))) { 1525 /* ipv4 checksum error */ 1526 skb->ip_summed = CHECKSUM_NONE; 1527 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1528 &rx_ring->syncp); 1529 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1530 "RX IPv4 header checksum error\n"); 1531 return; 1532 } 1533 1534 /* if TCP/UDP */ 1535 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1536 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1537 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1538 /* TCP/UDP checksum error */ 1539 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1540 &rx_ring->syncp); 1541 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1542 "RX L4 checksum error\n"); 1543 skb->ip_summed = CHECKSUM_NONE; 1544 return; 1545 } 1546 1547 if (likely(ena_rx_ctx->l4_csum_checked)) { 1548 skb->ip_summed = CHECKSUM_UNNECESSARY; 1549 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1550 &rx_ring->syncp); 1551 } else { 1552 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1553 &rx_ring->syncp); 1554 skb->ip_summed = CHECKSUM_NONE; 1555 } 1556 } else { 1557 skb->ip_summed = CHECKSUM_NONE; 1558 return; 1559 } 1560 1561 } 1562 1563 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1564 struct ena_com_rx_ctx *ena_rx_ctx, 1565 struct sk_buff *skb) 1566 { 1567 enum pkt_hash_types hash_type; 1568 1569 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1570 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1571 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1572 1573 hash_type = PKT_HASH_TYPE_L4; 1574 else 1575 hash_type = PKT_HASH_TYPE_NONE; 1576 1577 /* Override hash type if the packet is fragmented */ 1578 if (ena_rx_ctx->frag) 1579 hash_type = PKT_HASH_TYPE_NONE; 1580 1581 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1582 } 1583 } 1584 1585 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1586 { 1587 struct ena_rx_buffer *rx_info; 1588 int ret; 1589 1590 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1591 xdp_prepare_buff(xdp, page_address(rx_info->page), 1592 rx_info->page_offset, 1593 rx_ring->ena_bufs[0].len, false); 1594 /* If for some reason we received a bigger packet than 1595 * we expect, then we simply drop it 1596 */ 1597 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1598 return XDP_DROP; 1599 1600 ret = ena_xdp_execute(rx_ring, xdp); 1601 1602 /* The xdp program might expand the headers */ 1603 if (ret == XDP_PASS) { 1604 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1605 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1606 } 1607 1608 return ret; 1609 } 1610 /* ena_clean_rx_irq - Cleanup RX irq 1611 * @rx_ring: RX ring to clean 1612 * @napi: napi handler 1613 * @budget: how many packets driver is allowed to clean 1614 * 1615 * Returns the number of cleaned buffers. 1616 */ 1617 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1618 u32 budget) 1619 { 1620 u16 next_to_clean = rx_ring->next_to_clean; 1621 struct ena_com_rx_ctx ena_rx_ctx; 1622 struct ena_rx_buffer *rx_info; 1623 struct ena_adapter *adapter; 1624 u32 res_budget, work_done; 1625 int rx_copybreak_pkt = 0; 1626 int refill_threshold; 1627 struct sk_buff *skb; 1628 int refill_required; 1629 struct xdp_buff xdp; 1630 int xdp_flags = 0; 1631 int total_len = 0; 1632 int xdp_verdict; 1633 int rc = 0; 1634 int i; 1635 1636 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1637 "%s qid %d\n", __func__, rx_ring->qid); 1638 res_budget = budget; 1639 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq); 1640 1641 do { 1642 xdp_verdict = XDP_PASS; 1643 skb = NULL; 1644 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1645 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1646 ena_rx_ctx.descs = 0; 1647 ena_rx_ctx.pkt_offset = 0; 1648 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1649 rx_ring->ena_com_io_sq, 1650 &ena_rx_ctx); 1651 if (unlikely(rc)) 1652 goto error; 1653 1654 if (unlikely(ena_rx_ctx.descs == 0)) 1655 break; 1656 1657 /* First descriptor might have an offset set by the device */ 1658 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1659 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1660 1661 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1662 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1663 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1664 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1665 1666 if (ena_xdp_present_ring(rx_ring)) 1667 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1668 1669 /* allocate skb and fill it */ 1670 if (xdp_verdict == XDP_PASS) 1671 skb = ena_rx_skb(rx_ring, 1672 rx_ring->ena_bufs, 1673 ena_rx_ctx.descs, 1674 &next_to_clean); 1675 1676 if (unlikely(!skb)) { 1677 for (i = 0; i < ena_rx_ctx.descs; i++) { 1678 int req_id = rx_ring->ena_bufs[i].req_id; 1679 1680 rx_ring->free_ids[next_to_clean] = req_id; 1681 next_to_clean = 1682 ENA_RX_RING_IDX_NEXT(next_to_clean, 1683 rx_ring->ring_size); 1684 1685 /* Packets was passed for transmission, unmap it 1686 * from RX side. 1687 */ 1688 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) { 1689 ena_unmap_rx_buff(rx_ring, 1690 &rx_ring->rx_buffer_info[req_id]); 1691 rx_ring->rx_buffer_info[req_id].page = NULL; 1692 } 1693 } 1694 if (xdp_verdict != XDP_PASS) { 1695 xdp_flags |= xdp_verdict; 1696 res_budget--; 1697 continue; 1698 } 1699 break; 1700 } 1701 1702 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1703 1704 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1705 1706 skb_record_rx_queue(skb, rx_ring->qid); 1707 1708 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1709 total_len += rx_ring->ena_bufs[0].len; 1710 rx_copybreak_pkt++; 1711 napi_gro_receive(napi, skb); 1712 } else { 1713 total_len += skb->len; 1714 napi_gro_frags(napi); 1715 } 1716 1717 res_budget--; 1718 } while (likely(res_budget)); 1719 1720 work_done = budget - res_budget; 1721 rx_ring->per_napi_packets += work_done; 1722 u64_stats_update_begin(&rx_ring->syncp); 1723 rx_ring->rx_stats.bytes += total_len; 1724 rx_ring->rx_stats.cnt += work_done; 1725 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1726 u64_stats_update_end(&rx_ring->syncp); 1727 1728 rx_ring->next_to_clean = next_to_clean; 1729 1730 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1731 refill_threshold = 1732 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1733 ENA_RX_REFILL_THRESH_PACKET); 1734 1735 /* Optimization, try to batch new rx buffers */ 1736 if (refill_required > refill_threshold) { 1737 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1738 ena_refill_rx_bufs(rx_ring, refill_required); 1739 } 1740 1741 if (xdp_flags & XDP_REDIRECT) 1742 xdp_do_flush_map(); 1743 1744 return work_done; 1745 1746 error: 1747 adapter = netdev_priv(rx_ring->netdev); 1748 1749 if (rc == -ENOSPC) { 1750 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1751 &rx_ring->syncp); 1752 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1753 } else { 1754 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1755 &rx_ring->syncp); 1756 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 1757 } 1758 1759 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1760 1761 return 0; 1762 } 1763 1764 static void ena_dim_work(struct work_struct *w) 1765 { 1766 struct dim *dim = container_of(w, struct dim, work); 1767 struct dim_cq_moder cur_moder = 1768 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1769 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1770 1771 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1772 dim->state = DIM_START_MEASURE; 1773 } 1774 1775 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1776 { 1777 struct dim_sample dim_sample; 1778 struct ena_ring *rx_ring = ena_napi->rx_ring; 1779 1780 if (!rx_ring->per_napi_packets) 1781 return; 1782 1783 rx_ring->non_empty_napi_events++; 1784 1785 dim_update_sample(rx_ring->non_empty_napi_events, 1786 rx_ring->rx_stats.cnt, 1787 rx_ring->rx_stats.bytes, 1788 &dim_sample); 1789 1790 net_dim(&ena_napi->dim, dim_sample); 1791 1792 rx_ring->per_napi_packets = 0; 1793 } 1794 1795 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1796 struct ena_ring *rx_ring) 1797 { 1798 struct ena_eth_io_intr_reg intr_reg; 1799 u32 rx_interval = 0; 1800 /* Rx ring can be NULL when for XDP tx queues which don't have an 1801 * accompanying rx_ring pair. 1802 */ 1803 if (rx_ring) 1804 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1805 rx_ring->smoothed_interval : 1806 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1807 1808 /* Update intr register: rx intr delay, 1809 * tx intr delay and interrupt unmask 1810 */ 1811 ena_com_update_intr_reg(&intr_reg, 1812 rx_interval, 1813 tx_ring->smoothed_interval, 1814 true); 1815 1816 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1817 &tx_ring->syncp); 1818 1819 /* It is a shared MSI-X. 1820 * Tx and Rx CQ have pointer to it. 1821 * So we use one of them to reach the intr reg 1822 * The Tx ring is used because the rx_ring is NULL for XDP queues 1823 */ 1824 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1825 } 1826 1827 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1828 struct ena_ring *rx_ring) 1829 { 1830 int cpu = get_cpu(); 1831 int numa_node; 1832 1833 /* Check only one ring since the 2 rings are running on the same cpu */ 1834 if (likely(tx_ring->cpu == cpu)) 1835 goto out; 1836 1837 numa_node = cpu_to_node(cpu); 1838 put_cpu(); 1839 1840 if (numa_node != NUMA_NO_NODE) { 1841 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1842 if (rx_ring) 1843 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1844 numa_node); 1845 } 1846 1847 tx_ring->cpu = cpu; 1848 if (rx_ring) 1849 rx_ring->cpu = cpu; 1850 1851 return; 1852 out: 1853 put_cpu(); 1854 } 1855 1856 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1857 { 1858 u32 total_done = 0; 1859 u16 next_to_clean; 1860 u32 tx_bytes = 0; 1861 int tx_pkts = 0; 1862 u16 req_id; 1863 int rc; 1864 1865 if (unlikely(!xdp_ring)) 1866 return 0; 1867 next_to_clean = xdp_ring->next_to_clean; 1868 1869 while (tx_pkts < budget) { 1870 struct ena_tx_buffer *tx_info; 1871 struct xdp_frame *xdpf; 1872 1873 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1874 &req_id); 1875 if (rc) 1876 break; 1877 1878 rc = validate_xdp_req_id(xdp_ring, req_id); 1879 if (rc) 1880 break; 1881 1882 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1883 xdpf = tx_info->xdpf; 1884 1885 tx_info->xdpf = NULL; 1886 tx_info->last_jiffies = 0; 1887 ena_unmap_tx_buff(xdp_ring, tx_info); 1888 1889 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1890 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1891 xdpf); 1892 1893 tx_bytes += xdpf->len; 1894 tx_pkts++; 1895 total_done += tx_info->tx_descs; 1896 1897 xdp_return_frame(xdpf); 1898 xdp_ring->free_ids[next_to_clean] = req_id; 1899 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1900 xdp_ring->ring_size); 1901 } 1902 1903 xdp_ring->next_to_clean = next_to_clean; 1904 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1905 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1906 1907 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1908 "tx_poll: q %d done. total pkts: %d\n", 1909 xdp_ring->qid, tx_pkts); 1910 1911 return tx_pkts; 1912 } 1913 1914 static int ena_io_poll(struct napi_struct *napi, int budget) 1915 { 1916 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1917 struct ena_ring *tx_ring, *rx_ring; 1918 int tx_work_done; 1919 int rx_work_done = 0; 1920 int tx_budget; 1921 int napi_comp_call = 0; 1922 int ret; 1923 1924 tx_ring = ena_napi->tx_ring; 1925 rx_ring = ena_napi->rx_ring; 1926 1927 tx_ring->first_interrupt = ena_napi->first_interrupt; 1928 rx_ring->first_interrupt = ena_napi->first_interrupt; 1929 1930 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1931 1932 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1933 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1934 napi_complete_done(napi, 0); 1935 return 0; 1936 } 1937 1938 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1939 /* On netpoll the budget is zero and the handler should only clean the 1940 * tx completions. 1941 */ 1942 if (likely(budget)) 1943 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1944 1945 /* If the device is about to reset or down, avoid unmask 1946 * the interrupt and return 0 so NAPI won't reschedule 1947 */ 1948 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1949 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1950 napi_complete_done(napi, 0); 1951 ret = 0; 1952 1953 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1954 napi_comp_call = 1; 1955 1956 /* Update numa and unmask the interrupt only when schedule 1957 * from the interrupt context (vs from sk_busy_loop) 1958 */ 1959 if (napi_complete_done(napi, rx_work_done) && 1960 READ_ONCE(ena_napi->interrupts_masked)) { 1961 smp_rmb(); /* make sure interrupts_masked is read */ 1962 WRITE_ONCE(ena_napi->interrupts_masked, false); 1963 /* We apply adaptive moderation on Rx path only. 1964 * Tx uses static interrupt moderation. 1965 */ 1966 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1967 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1968 1969 ena_unmask_interrupt(tx_ring, rx_ring); 1970 } 1971 1972 ena_update_ring_numa_node(tx_ring, rx_ring); 1973 1974 ret = rx_work_done; 1975 } else { 1976 ret = budget; 1977 } 1978 1979 u64_stats_update_begin(&tx_ring->syncp); 1980 tx_ring->tx_stats.napi_comp += napi_comp_call; 1981 tx_ring->tx_stats.tx_poll++; 1982 u64_stats_update_end(&tx_ring->syncp); 1983 1984 return ret; 1985 } 1986 1987 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1988 { 1989 struct ena_adapter *adapter = (struct ena_adapter *)data; 1990 1991 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1992 1993 /* Don't call the aenq handler before probe is done */ 1994 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1995 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1996 1997 return IRQ_HANDLED; 1998 } 1999 2000 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 2001 * @irq: interrupt number 2002 * @data: pointer to a network interface private napi device structure 2003 */ 2004 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2005 { 2006 struct ena_napi *ena_napi = data; 2007 2008 ena_napi->first_interrupt = true; 2009 2010 WRITE_ONCE(ena_napi->interrupts_masked, true); 2011 smp_wmb(); /* write interrupts_masked before calling napi */ 2012 2013 napi_schedule_irqoff(&ena_napi->napi); 2014 2015 return IRQ_HANDLED; 2016 } 2017 2018 /* Reserve a single MSI-X vector for management (admin + aenq). 2019 * plus reserve one vector for each potential io queue. 2020 * the number of potential io queues is the minimum of what the device 2021 * supports and the number of vCPUs. 2022 */ 2023 static int ena_enable_msix(struct ena_adapter *adapter) 2024 { 2025 int msix_vecs, irq_cnt; 2026 2027 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2028 netif_err(adapter, probe, adapter->netdev, 2029 "Error, MSI-X is already enabled\n"); 2030 return -EPERM; 2031 } 2032 2033 /* Reserved the max msix vectors we might need */ 2034 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2035 netif_dbg(adapter, probe, adapter->netdev, 2036 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2037 2038 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2039 msix_vecs, PCI_IRQ_MSIX); 2040 2041 if (irq_cnt < 0) { 2042 netif_err(adapter, probe, adapter->netdev, 2043 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2044 return -ENOSPC; 2045 } 2046 2047 if (irq_cnt != msix_vecs) { 2048 netif_notice(adapter, probe, adapter->netdev, 2049 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2050 irq_cnt, msix_vecs); 2051 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2052 } 2053 2054 if (ena_init_rx_cpu_rmap(adapter)) 2055 netif_warn(adapter, probe, adapter->netdev, 2056 "Failed to map IRQs to CPUs\n"); 2057 2058 adapter->msix_vecs = irq_cnt; 2059 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2060 2061 return 0; 2062 } 2063 2064 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2065 { 2066 u32 cpu; 2067 2068 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2069 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2070 pci_name(adapter->pdev)); 2071 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2072 ena_intr_msix_mgmnt; 2073 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2074 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2075 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2076 cpu = cpumask_first(cpu_online_mask); 2077 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2078 cpumask_set_cpu(cpu, 2079 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2080 } 2081 2082 static void ena_setup_io_intr(struct ena_adapter *adapter) 2083 { 2084 struct net_device *netdev; 2085 int irq_idx, i, cpu; 2086 int io_queue_count; 2087 2088 netdev = adapter->netdev; 2089 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2090 2091 for (i = 0; i < io_queue_count; i++) { 2092 irq_idx = ENA_IO_IRQ_IDX(i); 2093 cpu = i % num_online_cpus(); 2094 2095 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2096 "%s-Tx-Rx-%d", netdev->name, i); 2097 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2098 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2099 adapter->irq_tbl[irq_idx].vector = 2100 pci_irq_vector(adapter->pdev, irq_idx); 2101 adapter->irq_tbl[irq_idx].cpu = cpu; 2102 2103 cpumask_set_cpu(cpu, 2104 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2105 } 2106 } 2107 2108 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2109 { 2110 unsigned long flags = 0; 2111 struct ena_irq *irq; 2112 int rc; 2113 2114 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2115 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2116 irq->data); 2117 if (rc) { 2118 netif_err(adapter, probe, adapter->netdev, 2119 "Failed to request admin irq\n"); 2120 return rc; 2121 } 2122 2123 netif_dbg(adapter, probe, adapter->netdev, 2124 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2125 irq->affinity_hint_mask.bits[0], irq->vector); 2126 2127 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2128 2129 return rc; 2130 } 2131 2132 static int ena_request_io_irq(struct ena_adapter *adapter) 2133 { 2134 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2135 unsigned long flags = 0; 2136 struct ena_irq *irq; 2137 int rc = 0, i, k; 2138 2139 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2140 netif_err(adapter, ifup, adapter->netdev, 2141 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2142 return -EINVAL; 2143 } 2144 2145 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2146 irq = &adapter->irq_tbl[i]; 2147 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2148 irq->data); 2149 if (rc) { 2150 netif_err(adapter, ifup, adapter->netdev, 2151 "Failed to request I/O IRQ. index %d rc %d\n", 2152 i, rc); 2153 goto err; 2154 } 2155 2156 netif_dbg(adapter, ifup, adapter->netdev, 2157 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2158 i, irq->affinity_hint_mask.bits[0], irq->vector); 2159 2160 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2161 } 2162 2163 return rc; 2164 2165 err: 2166 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2167 irq = &adapter->irq_tbl[k]; 2168 free_irq(irq->vector, irq->data); 2169 } 2170 2171 return rc; 2172 } 2173 2174 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2175 { 2176 struct ena_irq *irq; 2177 2178 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2179 synchronize_irq(irq->vector); 2180 irq_set_affinity_hint(irq->vector, NULL); 2181 free_irq(irq->vector, irq->data); 2182 } 2183 2184 static void ena_free_io_irq(struct ena_adapter *adapter) 2185 { 2186 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2187 struct ena_irq *irq; 2188 int i; 2189 2190 #ifdef CONFIG_RFS_ACCEL 2191 if (adapter->msix_vecs >= 1) { 2192 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2193 adapter->netdev->rx_cpu_rmap = NULL; 2194 } 2195 #endif /* CONFIG_RFS_ACCEL */ 2196 2197 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2198 irq = &adapter->irq_tbl[i]; 2199 irq_set_affinity_hint(irq->vector, NULL); 2200 free_irq(irq->vector, irq->data); 2201 } 2202 } 2203 2204 static void ena_disable_msix(struct ena_adapter *adapter) 2205 { 2206 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2207 pci_free_irq_vectors(adapter->pdev); 2208 } 2209 2210 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2211 { 2212 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2213 int i; 2214 2215 if (!netif_running(adapter->netdev)) 2216 return; 2217 2218 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2219 synchronize_irq(adapter->irq_tbl[i].vector); 2220 } 2221 2222 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2223 int first_index, 2224 int count) 2225 { 2226 int i; 2227 2228 for (i = first_index; i < first_index + count; i++) { 2229 netif_napi_del(&adapter->ena_napi[i].napi); 2230 2231 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2232 adapter->ena_napi[i].xdp_ring); 2233 } 2234 } 2235 2236 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2237 int first_index, int count) 2238 { 2239 int i; 2240 2241 for (i = first_index; i < first_index + count; i++) { 2242 struct ena_napi *napi = &adapter->ena_napi[i]; 2243 2244 netif_napi_add(adapter->netdev, 2245 &napi->napi, 2246 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2247 ENA_NAPI_BUDGET); 2248 2249 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2250 napi->rx_ring = &adapter->rx_ring[i]; 2251 napi->tx_ring = &adapter->tx_ring[i]; 2252 } else { 2253 napi->xdp_ring = &adapter->tx_ring[i]; 2254 } 2255 napi->qid = i; 2256 } 2257 } 2258 2259 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2260 int first_index, 2261 int count) 2262 { 2263 int i; 2264 2265 for (i = first_index; i < first_index + count; i++) 2266 napi_disable(&adapter->ena_napi[i].napi); 2267 } 2268 2269 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2270 int first_index, 2271 int count) 2272 { 2273 int i; 2274 2275 for (i = first_index; i < first_index + count; i++) 2276 napi_enable(&adapter->ena_napi[i].napi); 2277 } 2278 2279 /* Configure the Rx forwarding */ 2280 static int ena_rss_configure(struct ena_adapter *adapter) 2281 { 2282 struct ena_com_dev *ena_dev = adapter->ena_dev; 2283 int rc; 2284 2285 /* In case the RSS table wasn't initialized by probe */ 2286 if (!ena_dev->rss.tbl_log_size) { 2287 rc = ena_rss_init_default(adapter); 2288 if (rc && (rc != -EOPNOTSUPP)) { 2289 netif_err(adapter, ifup, adapter->netdev, 2290 "Failed to init RSS rc: %d\n", rc); 2291 return rc; 2292 } 2293 } 2294 2295 /* Set indirect table */ 2296 rc = ena_com_indirect_table_set(ena_dev); 2297 if (unlikely(rc && rc != -EOPNOTSUPP)) 2298 return rc; 2299 2300 /* Configure hash function (if supported) */ 2301 rc = ena_com_set_hash_function(ena_dev); 2302 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2303 return rc; 2304 2305 /* Configure hash inputs (if supported) */ 2306 rc = ena_com_set_hash_ctrl(ena_dev); 2307 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2308 return rc; 2309 2310 return 0; 2311 } 2312 2313 static int ena_up_complete(struct ena_adapter *adapter) 2314 { 2315 int rc; 2316 2317 rc = ena_rss_configure(adapter); 2318 if (rc) 2319 return rc; 2320 2321 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2322 2323 ena_refill_all_rx_bufs(adapter); 2324 2325 /* enable transmits */ 2326 netif_tx_start_all_queues(adapter->netdev); 2327 2328 ena_napi_enable_in_range(adapter, 2329 0, 2330 adapter->xdp_num_queues + adapter->num_io_queues); 2331 2332 return 0; 2333 } 2334 2335 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2336 { 2337 struct ena_com_create_io_ctx ctx; 2338 struct ena_com_dev *ena_dev; 2339 struct ena_ring *tx_ring; 2340 u32 msix_vector; 2341 u16 ena_qid; 2342 int rc; 2343 2344 ena_dev = adapter->ena_dev; 2345 2346 tx_ring = &adapter->tx_ring[qid]; 2347 msix_vector = ENA_IO_IRQ_IDX(qid); 2348 ena_qid = ENA_IO_TXQ_IDX(qid); 2349 2350 memset(&ctx, 0x0, sizeof(ctx)); 2351 2352 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2353 ctx.qid = ena_qid; 2354 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2355 ctx.msix_vector = msix_vector; 2356 ctx.queue_size = tx_ring->ring_size; 2357 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2358 2359 rc = ena_com_create_io_queue(ena_dev, &ctx); 2360 if (rc) { 2361 netif_err(adapter, ifup, adapter->netdev, 2362 "Failed to create I/O TX queue num %d rc: %d\n", 2363 qid, rc); 2364 return rc; 2365 } 2366 2367 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2368 &tx_ring->ena_com_io_sq, 2369 &tx_ring->ena_com_io_cq); 2370 if (rc) { 2371 netif_err(adapter, ifup, adapter->netdev, 2372 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2373 qid, rc); 2374 ena_com_destroy_io_queue(ena_dev, ena_qid); 2375 return rc; 2376 } 2377 2378 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2379 return rc; 2380 } 2381 2382 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2383 int first_index, int count) 2384 { 2385 struct ena_com_dev *ena_dev = adapter->ena_dev; 2386 int rc, i; 2387 2388 for (i = first_index; i < first_index + count; i++) { 2389 rc = ena_create_io_tx_queue(adapter, i); 2390 if (rc) 2391 goto create_err; 2392 } 2393 2394 return 0; 2395 2396 create_err: 2397 while (i-- > first_index) 2398 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2399 2400 return rc; 2401 } 2402 2403 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2404 { 2405 struct ena_com_dev *ena_dev; 2406 struct ena_com_create_io_ctx ctx; 2407 struct ena_ring *rx_ring; 2408 u32 msix_vector; 2409 u16 ena_qid; 2410 int rc; 2411 2412 ena_dev = adapter->ena_dev; 2413 2414 rx_ring = &adapter->rx_ring[qid]; 2415 msix_vector = ENA_IO_IRQ_IDX(qid); 2416 ena_qid = ENA_IO_RXQ_IDX(qid); 2417 2418 memset(&ctx, 0x0, sizeof(ctx)); 2419 2420 ctx.qid = ena_qid; 2421 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2422 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2423 ctx.msix_vector = msix_vector; 2424 ctx.queue_size = rx_ring->ring_size; 2425 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2426 2427 rc = ena_com_create_io_queue(ena_dev, &ctx); 2428 if (rc) { 2429 netif_err(adapter, ifup, adapter->netdev, 2430 "Failed to create I/O RX queue num %d rc: %d\n", 2431 qid, rc); 2432 return rc; 2433 } 2434 2435 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2436 &rx_ring->ena_com_io_sq, 2437 &rx_ring->ena_com_io_cq); 2438 if (rc) { 2439 netif_err(adapter, ifup, adapter->netdev, 2440 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2441 qid, rc); 2442 goto err; 2443 } 2444 2445 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2446 2447 return rc; 2448 err: 2449 ena_com_destroy_io_queue(ena_dev, ena_qid); 2450 return rc; 2451 } 2452 2453 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2454 { 2455 struct ena_com_dev *ena_dev = adapter->ena_dev; 2456 int rc, i; 2457 2458 for (i = 0; i < adapter->num_io_queues; i++) { 2459 rc = ena_create_io_rx_queue(adapter, i); 2460 if (rc) 2461 goto create_err; 2462 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2463 } 2464 2465 return 0; 2466 2467 create_err: 2468 while (i--) { 2469 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2470 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2471 } 2472 2473 return rc; 2474 } 2475 2476 static void set_io_rings_size(struct ena_adapter *adapter, 2477 int new_tx_size, 2478 int new_rx_size) 2479 { 2480 int i; 2481 2482 for (i = 0; i < adapter->num_io_queues; i++) { 2483 adapter->tx_ring[i].ring_size = new_tx_size; 2484 adapter->rx_ring[i].ring_size = new_rx_size; 2485 } 2486 } 2487 2488 /* This function allows queue allocation to backoff when the system is 2489 * low on memory. If there is not enough memory to allocate io queues 2490 * the driver will try to allocate smaller queues. 2491 * 2492 * The backoff algorithm is as follows: 2493 * 1. Try to allocate TX and RX and if successful. 2494 * 1.1. return success 2495 * 2496 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2497 * 2498 * 3. If TX or RX is smaller than 256 2499 * 3.1. return failure. 2500 * 4. else 2501 * 4.1. go back to 1. 2502 */ 2503 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2504 { 2505 int rc, cur_rx_ring_size, cur_tx_ring_size; 2506 int new_rx_ring_size, new_tx_ring_size; 2507 2508 /* current queue sizes might be set to smaller than the requested 2509 * ones due to past queue allocation failures. 2510 */ 2511 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2512 adapter->requested_rx_ring_size); 2513 2514 while (1) { 2515 if (ena_xdp_present(adapter)) { 2516 rc = ena_setup_and_create_all_xdp_queues(adapter); 2517 2518 if (rc) 2519 goto err_setup_tx; 2520 } 2521 rc = ena_setup_tx_resources_in_range(adapter, 2522 0, 2523 adapter->num_io_queues); 2524 if (rc) 2525 goto err_setup_tx; 2526 2527 rc = ena_create_io_tx_queues_in_range(adapter, 2528 0, 2529 adapter->num_io_queues); 2530 if (rc) 2531 goto err_create_tx_queues; 2532 2533 rc = ena_setup_all_rx_resources(adapter); 2534 if (rc) 2535 goto err_setup_rx; 2536 2537 rc = ena_create_all_io_rx_queues(adapter); 2538 if (rc) 2539 goto err_create_rx_queues; 2540 2541 return 0; 2542 2543 err_create_rx_queues: 2544 ena_free_all_io_rx_resources(adapter); 2545 err_setup_rx: 2546 ena_destroy_all_tx_queues(adapter); 2547 err_create_tx_queues: 2548 ena_free_all_io_tx_resources(adapter); 2549 err_setup_tx: 2550 if (rc != -ENOMEM) { 2551 netif_err(adapter, ifup, adapter->netdev, 2552 "Queue creation failed with error code %d\n", 2553 rc); 2554 return rc; 2555 } 2556 2557 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2558 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2559 2560 netif_err(adapter, ifup, adapter->netdev, 2561 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2562 cur_tx_ring_size, cur_rx_ring_size); 2563 2564 new_tx_ring_size = cur_tx_ring_size; 2565 new_rx_ring_size = cur_rx_ring_size; 2566 2567 /* Decrease the size of the larger queue, or 2568 * decrease both if they are the same size. 2569 */ 2570 if (cur_rx_ring_size <= cur_tx_ring_size) 2571 new_tx_ring_size = cur_tx_ring_size / 2; 2572 if (cur_rx_ring_size >= cur_tx_ring_size) 2573 new_rx_ring_size = cur_rx_ring_size / 2; 2574 2575 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2576 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2577 netif_err(adapter, ifup, adapter->netdev, 2578 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2579 ENA_MIN_RING_SIZE); 2580 return rc; 2581 } 2582 2583 netif_err(adapter, ifup, adapter->netdev, 2584 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2585 new_tx_ring_size, 2586 new_rx_ring_size); 2587 2588 set_io_rings_size(adapter, new_tx_ring_size, 2589 new_rx_ring_size); 2590 } 2591 } 2592 2593 static int ena_up(struct ena_adapter *adapter) 2594 { 2595 int io_queue_count, rc, i; 2596 2597 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2598 2599 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2600 ena_setup_io_intr(adapter); 2601 2602 /* napi poll functions should be initialized before running 2603 * request_irq(), to handle a rare condition where there is a pending 2604 * interrupt, causing the ISR to fire immediately while the poll 2605 * function wasn't set yet, causing a null dereference 2606 */ 2607 ena_init_napi_in_range(adapter, 0, io_queue_count); 2608 2609 rc = ena_request_io_irq(adapter); 2610 if (rc) 2611 goto err_req_irq; 2612 2613 rc = create_queues_with_size_backoff(adapter); 2614 if (rc) 2615 goto err_create_queues_with_backoff; 2616 2617 rc = ena_up_complete(adapter); 2618 if (rc) 2619 goto err_up; 2620 2621 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2622 netif_carrier_on(adapter->netdev); 2623 2624 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2625 &adapter->syncp); 2626 2627 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2628 2629 /* Enable completion queues interrupt */ 2630 for (i = 0; i < adapter->num_io_queues; i++) 2631 ena_unmask_interrupt(&adapter->tx_ring[i], 2632 &adapter->rx_ring[i]); 2633 2634 /* schedule napi in case we had pending packets 2635 * from the last time we disable napi 2636 */ 2637 for (i = 0; i < io_queue_count; i++) 2638 napi_schedule(&adapter->ena_napi[i].napi); 2639 2640 return rc; 2641 2642 err_up: 2643 ena_destroy_all_tx_queues(adapter); 2644 ena_free_all_io_tx_resources(adapter); 2645 ena_destroy_all_rx_queues(adapter); 2646 ena_free_all_io_rx_resources(adapter); 2647 err_create_queues_with_backoff: 2648 ena_free_io_irq(adapter); 2649 err_req_irq: 2650 ena_del_napi_in_range(adapter, 0, io_queue_count); 2651 2652 return rc; 2653 } 2654 2655 static void ena_down(struct ena_adapter *adapter) 2656 { 2657 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2658 2659 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2660 2661 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2662 2663 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2664 &adapter->syncp); 2665 2666 netif_carrier_off(adapter->netdev); 2667 netif_tx_disable(adapter->netdev); 2668 2669 /* After this point the napi handler won't enable the tx queue */ 2670 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2671 2672 /* After destroy the queue there won't be any new interrupts */ 2673 2674 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2675 int rc; 2676 2677 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2678 if (rc) 2679 netif_err(adapter, ifdown, adapter->netdev, 2680 "Device reset failed\n"); 2681 /* stop submitting admin commands on a device that was reset */ 2682 ena_com_set_admin_running_state(adapter->ena_dev, false); 2683 } 2684 2685 ena_destroy_all_io_queues(adapter); 2686 2687 ena_disable_io_intr_sync(adapter); 2688 ena_free_io_irq(adapter); 2689 ena_del_napi_in_range(adapter, 0, io_queue_count); 2690 2691 ena_free_all_tx_bufs(adapter); 2692 ena_free_all_rx_bufs(adapter); 2693 ena_free_all_io_tx_resources(adapter); 2694 ena_free_all_io_rx_resources(adapter); 2695 } 2696 2697 /* ena_open - Called when a network interface is made active 2698 * @netdev: network interface device structure 2699 * 2700 * Returns 0 on success, negative value on failure 2701 * 2702 * The open entry point is called when a network interface is made 2703 * active by the system (IFF_UP). At this point all resources needed 2704 * for transmit and receive operations are allocated, the interrupt 2705 * handler is registered with the OS, the watchdog timer is started, 2706 * and the stack is notified that the interface is ready. 2707 */ 2708 static int ena_open(struct net_device *netdev) 2709 { 2710 struct ena_adapter *adapter = netdev_priv(netdev); 2711 int rc; 2712 2713 /* Notify the stack of the actual queue counts. */ 2714 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2715 if (rc) { 2716 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2717 return rc; 2718 } 2719 2720 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2721 if (rc) { 2722 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2723 return rc; 2724 } 2725 2726 rc = ena_up(adapter); 2727 if (rc) 2728 return rc; 2729 2730 return rc; 2731 } 2732 2733 /* ena_close - Disables a network interface 2734 * @netdev: network interface device structure 2735 * 2736 * Returns 0, this is not allowed to fail 2737 * 2738 * The close entry point is called when an interface is de-activated 2739 * by the OS. The hardware is still under the drivers control, but 2740 * needs to be disabled. A global MAC reset is issued to stop the 2741 * hardware, and all transmit and receive resources are freed. 2742 */ 2743 static int ena_close(struct net_device *netdev) 2744 { 2745 struct ena_adapter *adapter = netdev_priv(netdev); 2746 2747 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2748 2749 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2750 return 0; 2751 2752 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2753 ena_down(adapter); 2754 2755 /* Check for device status and issue reset if needed*/ 2756 check_for_admin_com_state(adapter); 2757 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2758 netif_err(adapter, ifdown, adapter->netdev, 2759 "Destroy failure, restarting device\n"); 2760 ena_dump_stats_to_dmesg(adapter); 2761 /* rtnl lock already obtained in dev_ioctl() layer */ 2762 ena_destroy_device(adapter, false); 2763 ena_restore_device(adapter); 2764 } 2765 2766 return 0; 2767 } 2768 2769 int ena_update_queue_sizes(struct ena_adapter *adapter, 2770 u32 new_tx_size, 2771 u32 new_rx_size) 2772 { 2773 bool dev_was_up; 2774 2775 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2776 ena_close(adapter->netdev); 2777 adapter->requested_tx_ring_size = new_tx_size; 2778 adapter->requested_rx_ring_size = new_rx_size; 2779 ena_init_io_rings(adapter, 2780 0, 2781 adapter->xdp_num_queues + 2782 adapter->num_io_queues); 2783 return dev_was_up ? ena_up(adapter) : 0; 2784 } 2785 2786 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2787 { 2788 struct ena_com_dev *ena_dev = adapter->ena_dev; 2789 int prev_channel_count; 2790 bool dev_was_up; 2791 2792 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2793 ena_close(adapter->netdev); 2794 prev_channel_count = adapter->num_io_queues; 2795 adapter->num_io_queues = new_channel_count; 2796 if (ena_xdp_present(adapter) && 2797 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2798 adapter->xdp_first_ring = new_channel_count; 2799 adapter->xdp_num_queues = new_channel_count; 2800 if (prev_channel_count > new_channel_count) 2801 ena_xdp_exchange_program_rx_in_range(adapter, 2802 NULL, 2803 new_channel_count, 2804 prev_channel_count); 2805 else 2806 ena_xdp_exchange_program_rx_in_range(adapter, 2807 adapter->xdp_bpf_prog, 2808 prev_channel_count, 2809 new_channel_count); 2810 } 2811 2812 /* We need to destroy the rss table so that the indirection 2813 * table will be reinitialized by ena_up() 2814 */ 2815 ena_com_rss_destroy(ena_dev); 2816 ena_init_io_rings(adapter, 2817 0, 2818 adapter->xdp_num_queues + 2819 adapter->num_io_queues); 2820 return dev_was_up ? ena_open(adapter->netdev) : 0; 2821 } 2822 2823 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2824 struct sk_buff *skb, 2825 bool disable_meta_caching) 2826 { 2827 u32 mss = skb_shinfo(skb)->gso_size; 2828 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2829 u8 l4_protocol = 0; 2830 2831 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2832 ena_tx_ctx->l4_csum_enable = 1; 2833 if (mss) { 2834 ena_tx_ctx->tso_enable = 1; 2835 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2836 ena_tx_ctx->l4_csum_partial = 0; 2837 } else { 2838 ena_tx_ctx->tso_enable = 0; 2839 ena_meta->l4_hdr_len = 0; 2840 ena_tx_ctx->l4_csum_partial = 1; 2841 } 2842 2843 switch (ip_hdr(skb)->version) { 2844 case IPVERSION: 2845 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2846 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2847 ena_tx_ctx->df = 1; 2848 if (mss) 2849 ena_tx_ctx->l3_csum_enable = 1; 2850 l4_protocol = ip_hdr(skb)->protocol; 2851 break; 2852 case 6: 2853 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2854 l4_protocol = ipv6_hdr(skb)->nexthdr; 2855 break; 2856 default: 2857 break; 2858 } 2859 2860 if (l4_protocol == IPPROTO_TCP) 2861 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2862 else 2863 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2864 2865 ena_meta->mss = mss; 2866 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2867 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2868 ena_tx_ctx->meta_valid = 1; 2869 } else if (disable_meta_caching) { 2870 memset(ena_meta, 0, sizeof(*ena_meta)); 2871 ena_tx_ctx->meta_valid = 1; 2872 } else { 2873 ena_tx_ctx->meta_valid = 0; 2874 } 2875 } 2876 2877 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2878 struct sk_buff *skb) 2879 { 2880 int num_frags, header_len, rc; 2881 2882 num_frags = skb_shinfo(skb)->nr_frags; 2883 header_len = skb_headlen(skb); 2884 2885 if (num_frags < tx_ring->sgl_size) 2886 return 0; 2887 2888 if ((num_frags == tx_ring->sgl_size) && 2889 (header_len < tx_ring->tx_max_header_size)) 2890 return 0; 2891 2892 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2893 2894 rc = skb_linearize(skb); 2895 if (unlikely(rc)) { 2896 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2897 &tx_ring->syncp); 2898 } 2899 2900 return rc; 2901 } 2902 2903 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2904 struct ena_tx_buffer *tx_info, 2905 struct sk_buff *skb, 2906 void **push_hdr, 2907 u16 *header_len) 2908 { 2909 struct ena_adapter *adapter = tx_ring->adapter; 2910 struct ena_com_buf *ena_buf; 2911 dma_addr_t dma; 2912 u32 skb_head_len, frag_len, last_frag; 2913 u16 push_len = 0; 2914 u16 delta = 0; 2915 int i = 0; 2916 2917 skb_head_len = skb_headlen(skb); 2918 tx_info->skb = skb; 2919 ena_buf = tx_info->bufs; 2920 2921 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2922 /* When the device is LLQ mode, the driver will copy 2923 * the header into the device memory space. 2924 * the ena_com layer assume the header is in a linear 2925 * memory space. 2926 * This assumption might be wrong since part of the header 2927 * can be in the fragmented buffers. 2928 * Use skb_header_pointer to make sure the header is in a 2929 * linear memory space. 2930 */ 2931 2932 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2933 *push_hdr = skb_header_pointer(skb, 0, push_len, 2934 tx_ring->push_buf_intermediate_buf); 2935 *header_len = push_len; 2936 if (unlikely(skb->data != *push_hdr)) { 2937 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 2938 &tx_ring->syncp); 2939 2940 delta = push_len - skb_head_len; 2941 } 2942 } else { 2943 *push_hdr = NULL; 2944 *header_len = min_t(u32, skb_head_len, 2945 tx_ring->tx_max_header_size); 2946 } 2947 2948 netif_dbg(adapter, tx_queued, adapter->netdev, 2949 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2950 *push_hdr, push_len); 2951 2952 if (skb_head_len > push_len) { 2953 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2954 skb_head_len - push_len, DMA_TO_DEVICE); 2955 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2956 goto error_report_dma_error; 2957 2958 ena_buf->paddr = dma; 2959 ena_buf->len = skb_head_len - push_len; 2960 2961 ena_buf++; 2962 tx_info->num_of_bufs++; 2963 tx_info->map_linear_data = 1; 2964 } else { 2965 tx_info->map_linear_data = 0; 2966 } 2967 2968 last_frag = skb_shinfo(skb)->nr_frags; 2969 2970 for (i = 0; i < last_frag; i++) { 2971 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2972 2973 frag_len = skb_frag_size(frag); 2974 2975 if (unlikely(delta >= frag_len)) { 2976 delta -= frag_len; 2977 continue; 2978 } 2979 2980 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 2981 frag_len - delta, DMA_TO_DEVICE); 2982 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2983 goto error_report_dma_error; 2984 2985 ena_buf->paddr = dma; 2986 ena_buf->len = frag_len - delta; 2987 ena_buf++; 2988 tx_info->num_of_bufs++; 2989 delta = 0; 2990 } 2991 2992 return 0; 2993 2994 error_report_dma_error: 2995 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 2996 &tx_ring->syncp); 2997 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 2998 2999 tx_info->skb = NULL; 3000 3001 tx_info->num_of_bufs += i; 3002 ena_unmap_tx_buff(tx_ring, tx_info); 3003 3004 return -EINVAL; 3005 } 3006 3007 /* Called with netif_tx_lock. */ 3008 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3009 { 3010 struct ena_adapter *adapter = netdev_priv(dev); 3011 struct ena_tx_buffer *tx_info; 3012 struct ena_com_tx_ctx ena_tx_ctx; 3013 struct ena_ring *tx_ring; 3014 struct netdev_queue *txq; 3015 void *push_hdr; 3016 u16 next_to_use, req_id, header_len; 3017 int qid, rc; 3018 3019 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3020 /* Determine which tx ring we will be placed on */ 3021 qid = skb_get_queue_mapping(skb); 3022 tx_ring = &adapter->tx_ring[qid]; 3023 txq = netdev_get_tx_queue(dev, qid); 3024 3025 rc = ena_check_and_linearize_skb(tx_ring, skb); 3026 if (unlikely(rc)) 3027 goto error_drop_packet; 3028 3029 skb_tx_timestamp(skb); 3030 3031 next_to_use = tx_ring->next_to_use; 3032 req_id = tx_ring->free_ids[next_to_use]; 3033 tx_info = &tx_ring->tx_buffer_info[req_id]; 3034 tx_info->num_of_bufs = 0; 3035 3036 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3037 3038 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3039 if (unlikely(rc)) 3040 goto error_drop_packet; 3041 3042 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3043 ena_tx_ctx.ena_bufs = tx_info->bufs; 3044 ena_tx_ctx.push_header = push_hdr; 3045 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3046 ena_tx_ctx.req_id = req_id; 3047 ena_tx_ctx.header_len = header_len; 3048 3049 /* set flags and meta data */ 3050 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3051 3052 rc = ena_xmit_common(dev, 3053 tx_ring, 3054 tx_info, 3055 &ena_tx_ctx, 3056 next_to_use, 3057 skb->len); 3058 if (rc) 3059 goto error_unmap_dma; 3060 3061 netdev_tx_sent_queue(txq, skb->len); 3062 3063 /* stop the queue when no more space available, the packet can have up 3064 * to sgl_size + 2. one for the meta descriptor and one for header 3065 * (if the header is larger than tx_max_header_size). 3066 */ 3067 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3068 tx_ring->sgl_size + 2))) { 3069 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3070 __func__, qid); 3071 3072 netif_tx_stop_queue(txq); 3073 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3074 &tx_ring->syncp); 3075 3076 /* There is a rare condition where this function decide to 3077 * stop the queue but meanwhile clean_tx_irq updates 3078 * next_to_completion and terminates. 3079 * The queue will remain stopped forever. 3080 * To solve this issue add a mb() to make sure that 3081 * netif_tx_stop_queue() write is vissible before checking if 3082 * there is additional space in the queue. 3083 */ 3084 smp_mb(); 3085 3086 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3087 ENA_TX_WAKEUP_THRESH)) { 3088 netif_tx_wake_queue(txq); 3089 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3090 &tx_ring->syncp); 3091 } 3092 } 3093 3094 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) { 3095 /* trigger the dma engine. ena_com_write_sq_doorbell() 3096 * has a mb 3097 */ 3098 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 3099 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, 3100 &tx_ring->syncp); 3101 } 3102 3103 return NETDEV_TX_OK; 3104 3105 error_unmap_dma: 3106 ena_unmap_tx_buff(tx_ring, tx_info); 3107 tx_info->skb = NULL; 3108 3109 error_drop_packet: 3110 dev_kfree_skb(skb); 3111 return NETDEV_TX_OK; 3112 } 3113 3114 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3115 struct net_device *sb_dev) 3116 { 3117 u16 qid; 3118 /* we suspect that this is good for in--kernel network services that 3119 * want to loop incoming skb rx to tx in normal user generated traffic, 3120 * most probably we will not get to this 3121 */ 3122 if (skb_rx_queue_recorded(skb)) 3123 qid = skb_get_rx_queue(skb); 3124 else 3125 qid = netdev_pick_tx(dev, skb, NULL); 3126 3127 return qid; 3128 } 3129 3130 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3131 { 3132 struct device *dev = &pdev->dev; 3133 struct ena_admin_host_info *host_info; 3134 int rc; 3135 3136 /* Allocate only the host info */ 3137 rc = ena_com_allocate_host_info(ena_dev); 3138 if (rc) { 3139 dev_err(dev, "Cannot allocate host info\n"); 3140 return; 3141 } 3142 3143 host_info = ena_dev->host_attr.host_info; 3144 3145 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3146 host_info->os_type = ENA_ADMIN_OS_LINUX; 3147 host_info->kernel_ver = LINUX_VERSION_CODE; 3148 strlcpy(host_info->kernel_ver_str, utsname()->version, 3149 sizeof(host_info->kernel_ver_str) - 1); 3150 host_info->os_dist = 0; 3151 strncpy(host_info->os_dist_str, utsname()->release, 3152 sizeof(host_info->os_dist_str) - 1); 3153 host_info->driver_version = 3154 (DRV_MODULE_GEN_MAJOR) | 3155 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3156 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3157 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3158 host_info->num_cpus = num_online_cpus(); 3159 3160 host_info->driver_supported_features = 3161 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3162 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3163 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3164 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3165 3166 rc = ena_com_set_host_attributes(ena_dev); 3167 if (rc) { 3168 if (rc == -EOPNOTSUPP) 3169 dev_warn(dev, "Cannot set host attributes\n"); 3170 else 3171 dev_err(dev, "Cannot set host attributes\n"); 3172 3173 goto err; 3174 } 3175 3176 return; 3177 3178 err: 3179 ena_com_delete_host_info(ena_dev); 3180 } 3181 3182 static void ena_config_debug_area(struct ena_adapter *adapter) 3183 { 3184 u32 debug_area_size; 3185 int rc, ss_count; 3186 3187 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3188 if (ss_count <= 0) { 3189 netif_err(adapter, drv, adapter->netdev, 3190 "SS count is negative\n"); 3191 return; 3192 } 3193 3194 /* allocate 32 bytes for each string and 64bit for the value */ 3195 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3196 3197 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3198 if (rc) { 3199 netif_err(adapter, drv, adapter->netdev, 3200 "Cannot allocate debug area\n"); 3201 return; 3202 } 3203 3204 rc = ena_com_set_host_attributes(adapter->ena_dev); 3205 if (rc) { 3206 if (rc == -EOPNOTSUPP) 3207 netif_warn(adapter, drv, adapter->netdev, 3208 "Cannot set host attributes\n"); 3209 else 3210 netif_err(adapter, drv, adapter->netdev, 3211 "Cannot set host attributes\n"); 3212 goto err; 3213 } 3214 3215 return; 3216 err: 3217 ena_com_delete_debug_area(adapter->ena_dev); 3218 } 3219 3220 int ena_update_hw_stats(struct ena_adapter *adapter) 3221 { 3222 int rc = 0; 3223 3224 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3225 if (rc) { 3226 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n"); 3227 return rc; 3228 } 3229 3230 return 0; 3231 } 3232 3233 static void ena_get_stats64(struct net_device *netdev, 3234 struct rtnl_link_stats64 *stats) 3235 { 3236 struct ena_adapter *adapter = netdev_priv(netdev); 3237 struct ena_ring *rx_ring, *tx_ring; 3238 unsigned int start; 3239 u64 rx_drops; 3240 u64 tx_drops; 3241 int i; 3242 3243 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3244 return; 3245 3246 for (i = 0; i < adapter->num_io_queues; i++) { 3247 u64 bytes, packets; 3248 3249 tx_ring = &adapter->tx_ring[i]; 3250 3251 do { 3252 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3253 packets = tx_ring->tx_stats.cnt; 3254 bytes = tx_ring->tx_stats.bytes; 3255 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3256 3257 stats->tx_packets += packets; 3258 stats->tx_bytes += bytes; 3259 3260 rx_ring = &adapter->rx_ring[i]; 3261 3262 do { 3263 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3264 packets = rx_ring->rx_stats.cnt; 3265 bytes = rx_ring->rx_stats.bytes; 3266 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3267 3268 stats->rx_packets += packets; 3269 stats->rx_bytes += bytes; 3270 } 3271 3272 do { 3273 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3274 rx_drops = adapter->dev_stats.rx_drops; 3275 tx_drops = adapter->dev_stats.tx_drops; 3276 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3277 3278 stats->rx_dropped = rx_drops; 3279 stats->tx_dropped = tx_drops; 3280 3281 stats->multicast = 0; 3282 stats->collisions = 0; 3283 3284 stats->rx_length_errors = 0; 3285 stats->rx_crc_errors = 0; 3286 stats->rx_frame_errors = 0; 3287 stats->rx_fifo_errors = 0; 3288 stats->rx_missed_errors = 0; 3289 stats->tx_window_errors = 0; 3290 3291 stats->rx_errors = 0; 3292 stats->tx_errors = 0; 3293 } 3294 3295 static const struct net_device_ops ena_netdev_ops = { 3296 .ndo_open = ena_open, 3297 .ndo_stop = ena_close, 3298 .ndo_start_xmit = ena_start_xmit, 3299 .ndo_select_queue = ena_select_queue, 3300 .ndo_get_stats64 = ena_get_stats64, 3301 .ndo_tx_timeout = ena_tx_timeout, 3302 .ndo_change_mtu = ena_change_mtu, 3303 .ndo_set_mac_address = NULL, 3304 .ndo_validate_addr = eth_validate_addr, 3305 .ndo_bpf = ena_xdp, 3306 .ndo_xdp_xmit = ena_xdp_xmit, 3307 }; 3308 3309 static int ena_device_validate_params(struct ena_adapter *adapter, 3310 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3311 { 3312 struct net_device *netdev = adapter->netdev; 3313 int rc; 3314 3315 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3316 adapter->mac_addr); 3317 if (!rc) { 3318 netif_err(adapter, drv, netdev, 3319 "Error, mac address are different\n"); 3320 return -EINVAL; 3321 } 3322 3323 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3324 netif_err(adapter, drv, netdev, 3325 "Error, device max mtu is smaller than netdev MTU\n"); 3326 return -EINVAL; 3327 } 3328 3329 return 0; 3330 } 3331 3332 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 3333 { 3334 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3335 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3336 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3337 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3338 llq_config->llq_ring_entry_size_value = 128; 3339 } 3340 3341 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3342 struct ena_com_dev *ena_dev, 3343 struct ena_admin_feature_llq_desc *llq, 3344 struct ena_llq_configurations *llq_default_configurations) 3345 { 3346 int rc; 3347 u32 llq_feature_mask; 3348 3349 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3350 if (!(ena_dev->supported_features & llq_feature_mask)) { 3351 dev_err(&pdev->dev, 3352 "LLQ is not supported Fallback to host mode policy.\n"); 3353 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3354 return 0; 3355 } 3356 3357 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3358 if (unlikely(rc)) { 3359 dev_err(&pdev->dev, 3360 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3361 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3362 } 3363 3364 return 0; 3365 } 3366 3367 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3368 int bars) 3369 { 3370 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3371 3372 if (!has_mem_bar) { 3373 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3374 dev_err(&pdev->dev, 3375 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3376 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3377 } 3378 3379 return 0; 3380 } 3381 3382 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3383 pci_resource_start(pdev, ENA_MEM_BAR), 3384 pci_resource_len(pdev, ENA_MEM_BAR)); 3385 3386 if (!ena_dev->mem_bar) 3387 return -EFAULT; 3388 3389 return 0; 3390 } 3391 3392 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3393 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3394 bool *wd_state) 3395 { 3396 struct ena_llq_configurations llq_config; 3397 struct device *dev = &pdev->dev; 3398 bool readless_supported; 3399 u32 aenq_groups; 3400 int dma_width; 3401 int rc; 3402 3403 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3404 if (rc) { 3405 dev_err(dev, "Failed to init mmio read less\n"); 3406 return rc; 3407 } 3408 3409 /* The PCIe configuration space revision id indicate if mmio reg 3410 * read is disabled 3411 */ 3412 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3413 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3414 3415 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3416 if (rc) { 3417 dev_err(dev, "Can not reset device\n"); 3418 goto err_mmio_read_less; 3419 } 3420 3421 rc = ena_com_validate_version(ena_dev); 3422 if (rc) { 3423 dev_err(dev, "Device version is too low\n"); 3424 goto err_mmio_read_less; 3425 } 3426 3427 dma_width = ena_com_get_dma_width(ena_dev); 3428 if (dma_width < 0) { 3429 dev_err(dev, "Invalid dma width value %d", dma_width); 3430 rc = dma_width; 3431 goto err_mmio_read_less; 3432 } 3433 3434 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3435 if (rc) { 3436 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3437 goto err_mmio_read_less; 3438 } 3439 3440 /* ENA admin level init */ 3441 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3442 if (rc) { 3443 dev_err(dev, 3444 "Can not initialize ena admin queue with device\n"); 3445 goto err_mmio_read_less; 3446 } 3447 3448 /* To enable the msix interrupts the driver needs to know the number 3449 * of queues. So the driver uses polling mode to retrieve this 3450 * information 3451 */ 3452 ena_com_set_admin_polling_mode(ena_dev, true); 3453 3454 ena_config_host_info(ena_dev, pdev); 3455 3456 /* Get Device Attributes*/ 3457 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3458 if (rc) { 3459 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3460 goto err_admin_init; 3461 } 3462 3463 /* Try to turn all the available aenq groups */ 3464 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3465 BIT(ENA_ADMIN_FATAL_ERROR) | 3466 BIT(ENA_ADMIN_WARNING) | 3467 BIT(ENA_ADMIN_NOTIFICATION) | 3468 BIT(ENA_ADMIN_KEEP_ALIVE); 3469 3470 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3471 3472 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3473 if (rc) { 3474 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3475 goto err_admin_init; 3476 } 3477 3478 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3479 3480 set_default_llq_configurations(&llq_config); 3481 3482 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3483 &llq_config); 3484 if (rc) { 3485 dev_err(dev, "ENA device init failed\n"); 3486 goto err_admin_init; 3487 } 3488 3489 return 0; 3490 3491 err_admin_init: 3492 ena_com_delete_host_info(ena_dev); 3493 ena_com_admin_destroy(ena_dev); 3494 err_mmio_read_less: 3495 ena_com_mmio_reg_read_request_destroy(ena_dev); 3496 3497 return rc; 3498 } 3499 3500 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3501 { 3502 struct ena_com_dev *ena_dev = adapter->ena_dev; 3503 struct device *dev = &adapter->pdev->dev; 3504 int rc; 3505 3506 rc = ena_enable_msix(adapter); 3507 if (rc) { 3508 dev_err(dev, "Can not reserve msix vectors\n"); 3509 return rc; 3510 } 3511 3512 ena_setup_mgmnt_intr(adapter); 3513 3514 rc = ena_request_mgmnt_irq(adapter); 3515 if (rc) { 3516 dev_err(dev, "Can not setup management interrupts\n"); 3517 goto err_disable_msix; 3518 } 3519 3520 ena_com_set_admin_polling_mode(ena_dev, false); 3521 3522 ena_com_admin_aenq_enable(ena_dev); 3523 3524 return 0; 3525 3526 err_disable_msix: 3527 ena_disable_msix(adapter); 3528 3529 return rc; 3530 } 3531 3532 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3533 { 3534 struct net_device *netdev = adapter->netdev; 3535 struct ena_com_dev *ena_dev = adapter->ena_dev; 3536 bool dev_up; 3537 3538 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3539 return; 3540 3541 netif_carrier_off(netdev); 3542 3543 del_timer_sync(&adapter->timer_service); 3544 3545 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3546 adapter->dev_up_before_reset = dev_up; 3547 if (!graceful) 3548 ena_com_set_admin_running_state(ena_dev, false); 3549 3550 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3551 ena_down(adapter); 3552 3553 /* Stop the device from sending AENQ events (in case reset flag is set 3554 * and device is up, ena_down() already reset the device. 3555 */ 3556 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3557 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3558 3559 ena_free_mgmnt_irq(adapter); 3560 3561 ena_disable_msix(adapter); 3562 3563 ena_com_abort_admin_commands(ena_dev); 3564 3565 ena_com_wait_for_abort_completion(ena_dev); 3566 3567 ena_com_admin_destroy(ena_dev); 3568 3569 ena_com_mmio_reg_read_request_destroy(ena_dev); 3570 3571 /* return reset reason to default value */ 3572 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3573 3574 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3575 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3576 } 3577 3578 static int ena_restore_device(struct ena_adapter *adapter) 3579 { 3580 struct ena_com_dev_get_features_ctx get_feat_ctx; 3581 struct ena_com_dev *ena_dev = adapter->ena_dev; 3582 struct pci_dev *pdev = adapter->pdev; 3583 bool wd_state; 3584 int rc; 3585 3586 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3587 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3588 if (rc) { 3589 dev_err(&pdev->dev, "Can not initialize device\n"); 3590 goto err; 3591 } 3592 adapter->wd_state = wd_state; 3593 3594 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3595 if (rc) { 3596 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3597 goto err_device_destroy; 3598 } 3599 3600 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3601 if (rc) { 3602 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3603 goto err_device_destroy; 3604 } 3605 /* If the interface was up before the reset bring it up */ 3606 if (adapter->dev_up_before_reset) { 3607 rc = ena_up(adapter); 3608 if (rc) { 3609 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3610 goto err_disable_msix; 3611 } 3612 } 3613 3614 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3615 3616 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3617 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3618 netif_carrier_on(adapter->netdev); 3619 3620 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3621 adapter->last_keep_alive_jiffies = jiffies; 3622 3623 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3624 3625 return rc; 3626 err_disable_msix: 3627 ena_free_mgmnt_irq(adapter); 3628 ena_disable_msix(adapter); 3629 err_device_destroy: 3630 ena_com_abort_admin_commands(ena_dev); 3631 ena_com_wait_for_abort_completion(ena_dev); 3632 ena_com_admin_destroy(ena_dev); 3633 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3634 ena_com_mmio_reg_read_request_destroy(ena_dev); 3635 err: 3636 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3637 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3638 dev_err(&pdev->dev, 3639 "Reset attempt failed. Can not reset the device\n"); 3640 3641 return rc; 3642 } 3643 3644 static void ena_fw_reset_device(struct work_struct *work) 3645 { 3646 struct ena_adapter *adapter = 3647 container_of(work, struct ena_adapter, reset_task); 3648 3649 rtnl_lock(); 3650 3651 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3652 ena_destroy_device(adapter, false); 3653 ena_restore_device(adapter); 3654 } 3655 3656 rtnl_unlock(); 3657 } 3658 3659 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3660 struct ena_ring *rx_ring) 3661 { 3662 if (likely(rx_ring->first_interrupt)) 3663 return 0; 3664 3665 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3666 return 0; 3667 3668 rx_ring->no_interrupt_event_cnt++; 3669 3670 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3671 netif_err(adapter, rx_err, adapter->netdev, 3672 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3673 rx_ring->qid); 3674 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3675 smp_mb__before_atomic(); 3676 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3677 return -EIO; 3678 } 3679 3680 return 0; 3681 } 3682 3683 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3684 struct ena_ring *tx_ring) 3685 { 3686 struct ena_tx_buffer *tx_buf; 3687 unsigned long last_jiffies; 3688 u32 missed_tx = 0; 3689 int i, rc = 0; 3690 3691 for (i = 0; i < tx_ring->ring_size; i++) { 3692 tx_buf = &tx_ring->tx_buffer_info[i]; 3693 last_jiffies = tx_buf->last_jiffies; 3694 3695 if (last_jiffies == 0) 3696 /* no pending Tx at this location */ 3697 continue; 3698 3699 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 3700 2 * adapter->missing_tx_completion_to))) { 3701 /* If after graceful period interrupt is still not 3702 * received, we schedule a reset 3703 */ 3704 netif_err(adapter, tx_err, adapter->netdev, 3705 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3706 tx_ring->qid); 3707 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3708 smp_mb__before_atomic(); 3709 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3710 return -EIO; 3711 } 3712 3713 if (unlikely(time_is_before_jiffies(last_jiffies + 3714 adapter->missing_tx_completion_to))) { 3715 if (!tx_buf->print_once) 3716 netif_notice(adapter, tx_err, adapter->netdev, 3717 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 3718 tx_ring->qid, i); 3719 3720 tx_buf->print_once = 1; 3721 missed_tx++; 3722 } 3723 } 3724 3725 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3726 netif_err(adapter, tx_err, adapter->netdev, 3727 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3728 missed_tx, 3729 adapter->missing_tx_completion_threshold); 3730 adapter->reset_reason = 3731 ENA_REGS_RESET_MISS_TX_CMPL; 3732 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3733 rc = -EIO; 3734 } 3735 3736 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3737 &tx_ring->syncp); 3738 3739 return rc; 3740 } 3741 3742 static void check_for_missing_completions(struct ena_adapter *adapter) 3743 { 3744 struct ena_ring *tx_ring; 3745 struct ena_ring *rx_ring; 3746 int i, budget, rc; 3747 int io_queue_count; 3748 3749 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3750 /* Make sure the driver doesn't turn the device in other process */ 3751 smp_rmb(); 3752 3753 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3754 return; 3755 3756 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3757 return; 3758 3759 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3760 return; 3761 3762 budget = ENA_MONITORED_TX_QUEUES; 3763 3764 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3765 tx_ring = &adapter->tx_ring[i]; 3766 rx_ring = &adapter->rx_ring[i]; 3767 3768 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3769 if (unlikely(rc)) 3770 return; 3771 3772 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3773 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3774 if (unlikely(rc)) 3775 return; 3776 3777 budget--; 3778 if (!budget) 3779 break; 3780 } 3781 3782 adapter->last_monitored_tx_qid = i % io_queue_count; 3783 } 3784 3785 /* trigger napi schedule after 2 consecutive detections */ 3786 #define EMPTY_RX_REFILL 2 3787 /* For the rare case where the device runs out of Rx descriptors and the 3788 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3789 * for example). 3790 * This case will lead to a deadlock: 3791 * The device won't send interrupts since all the new Rx packets will be dropped 3792 * The napi handler won't allocate new Rx descriptors so the device will be 3793 * able to send new packets. 3794 * 3795 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3796 * It is recommended to have at least 512MB, with a minimum of 128MB for 3797 * constrained environment). 3798 * 3799 * When such a situation is detected - Reschedule napi 3800 */ 3801 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3802 { 3803 struct ena_ring *rx_ring; 3804 int i, refill_required; 3805 3806 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3807 return; 3808 3809 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3810 return; 3811 3812 for (i = 0; i < adapter->num_io_queues; i++) { 3813 rx_ring = &adapter->rx_ring[i]; 3814 3815 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3816 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3817 rx_ring->empty_rx_queue++; 3818 3819 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3820 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 3821 &rx_ring->syncp); 3822 3823 netif_err(adapter, drv, adapter->netdev, 3824 "Trigger refill for ring %d\n", i); 3825 3826 napi_schedule(rx_ring->napi); 3827 rx_ring->empty_rx_queue = 0; 3828 } 3829 } else { 3830 rx_ring->empty_rx_queue = 0; 3831 } 3832 } 3833 } 3834 3835 /* Check for keep alive expiration */ 3836 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3837 { 3838 unsigned long keep_alive_expired; 3839 3840 if (!adapter->wd_state) 3841 return; 3842 3843 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3844 return; 3845 3846 keep_alive_expired = adapter->last_keep_alive_jiffies + 3847 adapter->keep_alive_timeout; 3848 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3849 netif_err(adapter, drv, adapter->netdev, 3850 "Keep alive watchdog timeout.\n"); 3851 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 3852 &adapter->syncp); 3853 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3854 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3855 } 3856 } 3857 3858 static void check_for_admin_com_state(struct ena_adapter *adapter) 3859 { 3860 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3861 netif_err(adapter, drv, adapter->netdev, 3862 "ENA admin queue is not in running state!\n"); 3863 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 3864 &adapter->syncp); 3865 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3866 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3867 } 3868 } 3869 3870 static void ena_update_hints(struct ena_adapter *adapter, 3871 struct ena_admin_ena_hw_hints *hints) 3872 { 3873 struct net_device *netdev = adapter->netdev; 3874 3875 if (hints->admin_completion_tx_timeout) 3876 adapter->ena_dev->admin_queue.completion_timeout = 3877 hints->admin_completion_tx_timeout * 1000; 3878 3879 if (hints->mmio_read_timeout) 3880 /* convert to usec */ 3881 adapter->ena_dev->mmio_read.reg_read_to = 3882 hints->mmio_read_timeout * 1000; 3883 3884 if (hints->missed_tx_completion_count_threshold_to_reset) 3885 adapter->missing_tx_completion_threshold = 3886 hints->missed_tx_completion_count_threshold_to_reset; 3887 3888 if (hints->missing_tx_completion_timeout) { 3889 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3890 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3891 else 3892 adapter->missing_tx_completion_to = 3893 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3894 } 3895 3896 if (hints->netdev_wd_timeout) 3897 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3898 3899 if (hints->driver_watchdog_timeout) { 3900 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3901 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3902 else 3903 adapter->keep_alive_timeout = 3904 msecs_to_jiffies(hints->driver_watchdog_timeout); 3905 } 3906 } 3907 3908 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3909 struct net_device *netdev) 3910 { 3911 host_info->supported_network_features[0] = 3912 netdev->features & GENMASK_ULL(31, 0); 3913 host_info->supported_network_features[1] = 3914 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3915 } 3916 3917 static void ena_timer_service(struct timer_list *t) 3918 { 3919 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3920 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3921 struct ena_admin_host_info *host_info = 3922 adapter->ena_dev->host_attr.host_info; 3923 3924 check_for_missing_keep_alive(adapter); 3925 3926 check_for_admin_com_state(adapter); 3927 3928 check_for_missing_completions(adapter); 3929 3930 check_for_empty_rx_ring(adapter); 3931 3932 if (debug_area) 3933 ena_dump_stats_to_buf(adapter, debug_area); 3934 3935 if (host_info) 3936 ena_update_host_info(host_info, adapter->netdev); 3937 3938 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3939 netif_err(adapter, drv, adapter->netdev, 3940 "Trigger reset is on\n"); 3941 ena_dump_stats_to_dmesg(adapter); 3942 queue_work(ena_wq, &adapter->reset_task); 3943 return; 3944 } 3945 3946 /* Reset the timer */ 3947 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3948 } 3949 3950 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 3951 struct ena_com_dev *ena_dev, 3952 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3953 { 3954 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3955 3956 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3957 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3958 &get_feat_ctx->max_queue_ext.max_queue_ext; 3959 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3960 max_queue_ext->max_rx_cq_num); 3961 3962 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3963 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3964 } else { 3965 struct ena_admin_queue_feature_desc *max_queues = 3966 &get_feat_ctx->max_queues; 3967 io_tx_sq_num = max_queues->max_sq_num; 3968 io_tx_cq_num = max_queues->max_cq_num; 3969 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3970 } 3971 3972 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 3973 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3974 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 3975 3976 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 3977 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 3978 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 3979 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 3980 /* 1 IRQ for mgmnt and 1 IRQs for each IO direction */ 3981 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 3982 if (unlikely(!max_num_io_queues)) { 3983 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 3984 return -EFAULT; 3985 } 3986 3987 return max_num_io_queues; 3988 } 3989 3990 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 3991 struct net_device *netdev) 3992 { 3993 netdev_features_t dev_features = 0; 3994 3995 /* Set offload features */ 3996 if (feat->offload.tx & 3997 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 3998 dev_features |= NETIF_F_IP_CSUM; 3999 4000 if (feat->offload.tx & 4001 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 4002 dev_features |= NETIF_F_IPV6_CSUM; 4003 4004 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4005 dev_features |= NETIF_F_TSO; 4006 4007 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4008 dev_features |= NETIF_F_TSO6; 4009 4010 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4011 dev_features |= NETIF_F_TSO_ECN; 4012 4013 if (feat->offload.rx_supported & 4014 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4015 dev_features |= NETIF_F_RXCSUM; 4016 4017 if (feat->offload.rx_supported & 4018 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4019 dev_features |= NETIF_F_RXCSUM; 4020 4021 netdev->features = 4022 dev_features | 4023 NETIF_F_SG | 4024 NETIF_F_RXHASH | 4025 NETIF_F_HIGHDMA; 4026 4027 netdev->hw_features |= netdev->features; 4028 netdev->vlan_features |= netdev->features; 4029 } 4030 4031 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4032 struct ena_com_dev_get_features_ctx *feat) 4033 { 4034 struct net_device *netdev = adapter->netdev; 4035 4036 /* Copy mac address */ 4037 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4038 eth_hw_addr_random(netdev); 4039 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4040 } else { 4041 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4042 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 4043 } 4044 4045 /* Set offload features */ 4046 ena_set_dev_offloads(feat, netdev); 4047 4048 adapter->max_mtu = feat->dev_attr.max_mtu; 4049 netdev->max_mtu = adapter->max_mtu; 4050 netdev->min_mtu = ENA_MIN_MTU; 4051 } 4052 4053 static int ena_rss_init_default(struct ena_adapter *adapter) 4054 { 4055 struct ena_com_dev *ena_dev = adapter->ena_dev; 4056 struct device *dev = &adapter->pdev->dev; 4057 int rc, i; 4058 u32 val; 4059 4060 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4061 if (unlikely(rc)) { 4062 dev_err(dev, "Cannot init indirect table\n"); 4063 goto err_rss_init; 4064 } 4065 4066 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4067 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4068 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4069 ENA_IO_RXQ_IDX(val)); 4070 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4071 dev_err(dev, "Cannot fill indirect table\n"); 4072 goto err_fill_indir; 4073 } 4074 } 4075 4076 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4077 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4078 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4079 dev_err(dev, "Cannot fill hash function\n"); 4080 goto err_fill_indir; 4081 } 4082 4083 rc = ena_com_set_default_hash_ctrl(ena_dev); 4084 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4085 dev_err(dev, "Cannot fill hash control\n"); 4086 goto err_fill_indir; 4087 } 4088 4089 return 0; 4090 4091 err_fill_indir: 4092 ena_com_rss_destroy(ena_dev); 4093 err_rss_init: 4094 4095 return rc; 4096 } 4097 4098 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4099 { 4100 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4101 4102 pci_release_selected_regions(pdev, release_bars); 4103 } 4104 4105 4106 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4107 { 4108 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4109 struct ena_com_dev *ena_dev = ctx->ena_dev; 4110 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4111 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4112 u32 max_tx_queue_size; 4113 u32 max_rx_queue_size; 4114 4115 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4116 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4117 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4118 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4119 max_queue_ext->max_rx_sq_depth); 4120 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4121 4122 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4123 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4124 llq->max_llq_depth); 4125 else 4126 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4127 max_queue_ext->max_tx_sq_depth); 4128 4129 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4130 max_queue_ext->max_per_packet_tx_descs); 4131 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4132 max_queue_ext->max_per_packet_rx_descs); 4133 } else { 4134 struct ena_admin_queue_feature_desc *max_queues = 4135 &ctx->get_feat_ctx->max_queues; 4136 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4137 max_queues->max_sq_depth); 4138 max_tx_queue_size = max_queues->max_cq_depth; 4139 4140 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4141 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4142 llq->max_llq_depth); 4143 else 4144 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4145 max_queues->max_sq_depth); 4146 4147 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4148 max_queues->max_packet_tx_descs); 4149 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4150 max_queues->max_packet_rx_descs); 4151 } 4152 4153 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4154 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4155 4156 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4157 max_tx_queue_size); 4158 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4159 max_rx_queue_size); 4160 4161 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4162 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4163 4164 ctx->max_tx_queue_size = max_tx_queue_size; 4165 ctx->max_rx_queue_size = max_rx_queue_size; 4166 ctx->tx_queue_size = tx_queue_size; 4167 ctx->rx_queue_size = rx_queue_size; 4168 4169 return 0; 4170 } 4171 4172 /* ena_probe - Device Initialization Routine 4173 * @pdev: PCI device information struct 4174 * @ent: entry in ena_pci_tbl 4175 * 4176 * Returns 0 on success, negative on failure 4177 * 4178 * ena_probe initializes an adapter identified by a pci_dev structure. 4179 * The OS initialization, configuring of the adapter private structure, 4180 * and a hardware reset occur. 4181 */ 4182 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4183 { 4184 struct ena_calc_queue_size_ctx calc_queue_ctx = {}; 4185 struct ena_com_dev_get_features_ctx get_feat_ctx; 4186 struct ena_com_dev *ena_dev = NULL; 4187 struct ena_adapter *adapter; 4188 struct net_device *netdev; 4189 static int adapters_found; 4190 u32 max_num_io_queues; 4191 bool wd_state; 4192 int bars, rc; 4193 4194 dev_dbg(&pdev->dev, "%s\n", __func__); 4195 4196 rc = pci_enable_device_mem(pdev); 4197 if (rc) { 4198 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4199 return rc; 4200 } 4201 4202 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4203 if (rc) { 4204 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4205 goto err_disable_device; 4206 } 4207 4208 pci_set_master(pdev); 4209 4210 ena_dev = vzalloc(sizeof(*ena_dev)); 4211 if (!ena_dev) { 4212 rc = -ENOMEM; 4213 goto err_disable_device; 4214 } 4215 4216 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4217 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4218 if (rc) { 4219 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4220 rc); 4221 goto err_free_ena_dev; 4222 } 4223 4224 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4225 pci_resource_start(pdev, ENA_REG_BAR), 4226 pci_resource_len(pdev, ENA_REG_BAR)); 4227 if (!ena_dev->reg_bar) { 4228 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4229 rc = -EFAULT; 4230 goto err_free_region; 4231 } 4232 4233 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4234 4235 ena_dev->dmadev = &pdev->dev; 4236 4237 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4238 if (!netdev) { 4239 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4240 rc = -ENOMEM; 4241 goto err_free_region; 4242 } 4243 4244 SET_NETDEV_DEV(netdev, &pdev->dev); 4245 adapter = netdev_priv(netdev); 4246 adapter->ena_dev = ena_dev; 4247 adapter->netdev = netdev; 4248 adapter->pdev = pdev; 4249 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4250 4251 ena_dev->net_device = netdev; 4252 4253 pci_set_drvdata(pdev, adapter); 4254 4255 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4256 if (rc) { 4257 dev_err(&pdev->dev, "ENA device init failed\n"); 4258 if (rc == -ETIME) 4259 rc = -EPROBE_DEFER; 4260 goto err_netdev_destroy; 4261 } 4262 4263 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4264 if (rc) { 4265 dev_err(&pdev->dev, "ENA llq bar mapping failed\n"); 4266 goto err_device_destroy; 4267 } 4268 4269 calc_queue_ctx.ena_dev = ena_dev; 4270 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4271 calc_queue_ctx.pdev = pdev; 4272 4273 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4274 * Updated during device initialization with the real granularity 4275 */ 4276 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4277 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4278 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4279 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4280 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4281 if (rc || !max_num_io_queues) { 4282 rc = -EFAULT; 4283 goto err_device_destroy; 4284 } 4285 4286 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4287 4288 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4289 4290 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4291 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4292 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4293 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4294 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4295 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4296 4297 adapter->num_io_queues = max_num_io_queues; 4298 adapter->max_num_io_queues = max_num_io_queues; 4299 adapter->last_monitored_tx_qid = 0; 4300 4301 adapter->xdp_first_ring = 0; 4302 adapter->xdp_num_queues = 0; 4303 4304 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4305 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4306 adapter->disable_meta_caching = 4307 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4308 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4309 4310 adapter->wd_state = wd_state; 4311 4312 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4313 4314 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4315 if (rc) { 4316 dev_err(&pdev->dev, 4317 "Failed to query interrupt moderation feature\n"); 4318 goto err_device_destroy; 4319 } 4320 ena_init_io_rings(adapter, 4321 0, 4322 adapter->xdp_num_queues + 4323 adapter->num_io_queues); 4324 4325 netdev->netdev_ops = &ena_netdev_ops; 4326 netdev->watchdog_timeo = TX_TIMEOUT; 4327 ena_set_ethtool_ops(netdev); 4328 4329 netdev->priv_flags |= IFF_UNICAST_FLT; 4330 4331 u64_stats_init(&adapter->syncp); 4332 4333 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4334 if (rc) { 4335 dev_err(&pdev->dev, 4336 "Failed to enable and set the admin interrupts\n"); 4337 goto err_worker_destroy; 4338 } 4339 rc = ena_rss_init_default(adapter); 4340 if (rc && (rc != -EOPNOTSUPP)) { 4341 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4342 goto err_free_msix; 4343 } 4344 4345 ena_config_debug_area(adapter); 4346 4347 if (!ena_update_hw_stats(adapter)) 4348 adapter->eni_stats_supported = true; 4349 else 4350 adapter->eni_stats_supported = false; 4351 4352 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4353 4354 netif_carrier_off(netdev); 4355 4356 rc = register_netdev(netdev); 4357 if (rc) { 4358 dev_err(&pdev->dev, "Cannot register net device\n"); 4359 goto err_rss; 4360 } 4361 4362 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4363 4364 adapter->last_keep_alive_jiffies = jiffies; 4365 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4366 adapter->missing_tx_completion_to = TX_TIMEOUT; 4367 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4368 4369 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4370 4371 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4372 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4373 4374 dev_info(&pdev->dev, 4375 "%s found at mem %lx, mac addr %pM\n", 4376 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4377 netdev->dev_addr); 4378 4379 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4380 4381 adapters_found++; 4382 4383 return 0; 4384 4385 err_rss: 4386 ena_com_delete_debug_area(ena_dev); 4387 ena_com_rss_destroy(ena_dev); 4388 err_free_msix: 4389 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4390 /* stop submitting admin commands on a device that was reset */ 4391 ena_com_set_admin_running_state(ena_dev, false); 4392 ena_free_mgmnt_irq(adapter); 4393 ena_disable_msix(adapter); 4394 err_worker_destroy: 4395 del_timer(&adapter->timer_service); 4396 err_device_destroy: 4397 ena_com_delete_host_info(ena_dev); 4398 ena_com_admin_destroy(ena_dev); 4399 err_netdev_destroy: 4400 free_netdev(netdev); 4401 err_free_region: 4402 ena_release_bars(ena_dev, pdev); 4403 err_free_ena_dev: 4404 vfree(ena_dev); 4405 err_disable_device: 4406 pci_disable_device(pdev); 4407 return rc; 4408 } 4409 4410 /*****************************************************************************/ 4411 4412 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4413 * @pdev: PCI device information struct 4414 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4415 * 4416 * __ena_shutoff is a helper routine that does the real work on shutdown and 4417 * removal paths; the difference between those paths is with regards to whether 4418 * dettach or unregister the netdevice. 4419 */ 4420 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4421 { 4422 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4423 struct ena_com_dev *ena_dev; 4424 struct net_device *netdev; 4425 4426 ena_dev = adapter->ena_dev; 4427 netdev = adapter->netdev; 4428 4429 #ifdef CONFIG_RFS_ACCEL 4430 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4431 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4432 netdev->rx_cpu_rmap = NULL; 4433 } 4434 #endif /* CONFIG_RFS_ACCEL */ 4435 4436 /* Make sure timer and reset routine won't be called after 4437 * freeing device resources. 4438 */ 4439 del_timer_sync(&adapter->timer_service); 4440 cancel_work_sync(&adapter->reset_task); 4441 4442 rtnl_lock(); /* lock released inside the below if-else block */ 4443 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4444 ena_destroy_device(adapter, true); 4445 if (shutdown) { 4446 netif_device_detach(netdev); 4447 dev_close(netdev); 4448 rtnl_unlock(); 4449 } else { 4450 rtnl_unlock(); 4451 unregister_netdev(netdev); 4452 free_netdev(netdev); 4453 } 4454 4455 ena_com_rss_destroy(ena_dev); 4456 4457 ena_com_delete_debug_area(ena_dev); 4458 4459 ena_com_delete_host_info(ena_dev); 4460 4461 ena_release_bars(ena_dev, pdev); 4462 4463 pci_disable_device(pdev); 4464 4465 vfree(ena_dev); 4466 } 4467 4468 /* ena_remove - Device Removal Routine 4469 * @pdev: PCI device information struct 4470 * 4471 * ena_remove is called by the PCI subsystem to alert the driver 4472 * that it should release a PCI device. 4473 */ 4474 4475 static void ena_remove(struct pci_dev *pdev) 4476 { 4477 __ena_shutoff(pdev, false); 4478 } 4479 4480 /* ena_shutdown - Device Shutdown Routine 4481 * @pdev: PCI device information struct 4482 * 4483 * ena_shutdown is called by the PCI subsystem to alert the driver that 4484 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4485 */ 4486 4487 static void ena_shutdown(struct pci_dev *pdev) 4488 { 4489 __ena_shutoff(pdev, true); 4490 } 4491 4492 /* ena_suspend - PM suspend callback 4493 * @dev_d: Device information struct 4494 */ 4495 static int __maybe_unused ena_suspend(struct device *dev_d) 4496 { 4497 struct pci_dev *pdev = to_pci_dev(dev_d); 4498 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4499 4500 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4501 4502 rtnl_lock(); 4503 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4504 dev_err(&pdev->dev, 4505 "Ignoring device reset request as the device is being suspended\n"); 4506 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4507 } 4508 ena_destroy_device(adapter, true); 4509 rtnl_unlock(); 4510 return 0; 4511 } 4512 4513 /* ena_resume - PM resume callback 4514 * @dev_d: Device information struct 4515 */ 4516 static int __maybe_unused ena_resume(struct device *dev_d) 4517 { 4518 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4519 int rc; 4520 4521 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4522 4523 rtnl_lock(); 4524 rc = ena_restore_device(adapter); 4525 rtnl_unlock(); 4526 return rc; 4527 } 4528 4529 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4530 4531 static struct pci_driver ena_pci_driver = { 4532 .name = DRV_MODULE_NAME, 4533 .id_table = ena_pci_tbl, 4534 .probe = ena_probe, 4535 .remove = ena_remove, 4536 .shutdown = ena_shutdown, 4537 .driver.pm = &ena_pm_ops, 4538 .sriov_configure = pci_sriov_configure_simple, 4539 }; 4540 4541 static int __init ena_init(void) 4542 { 4543 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4544 if (!ena_wq) { 4545 pr_err("Failed to create workqueue\n"); 4546 return -ENOMEM; 4547 } 4548 4549 return pci_register_driver(&ena_pci_driver); 4550 } 4551 4552 static void __exit ena_cleanup(void) 4553 { 4554 pci_unregister_driver(&ena_pci_driver); 4555 4556 if (ena_wq) { 4557 destroy_workqueue(ena_wq); 4558 ena_wq = NULL; 4559 } 4560 } 4561 4562 /****************************************************************************** 4563 ******************************** AENQ Handlers ******************************* 4564 *****************************************************************************/ 4565 /* ena_update_on_link_change: 4566 * Notify the network interface about the change in link status 4567 */ 4568 static void ena_update_on_link_change(void *adapter_data, 4569 struct ena_admin_aenq_entry *aenq_e) 4570 { 4571 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4572 struct ena_admin_aenq_link_change_desc *aenq_desc = 4573 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4574 int status = aenq_desc->flags & 4575 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4576 4577 if (status) { 4578 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4579 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4580 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4581 netif_carrier_on(adapter->netdev); 4582 } else { 4583 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4584 netif_carrier_off(adapter->netdev); 4585 } 4586 } 4587 4588 static void ena_keep_alive_wd(void *adapter_data, 4589 struct ena_admin_aenq_entry *aenq_e) 4590 { 4591 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4592 struct ena_admin_aenq_keep_alive_desc *desc; 4593 u64 rx_drops; 4594 u64 tx_drops; 4595 4596 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4597 adapter->last_keep_alive_jiffies = jiffies; 4598 4599 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4600 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4601 4602 u64_stats_update_begin(&adapter->syncp); 4603 /* These stats are accumulated by the device, so the counters indicate 4604 * all drops since last reset. 4605 */ 4606 adapter->dev_stats.rx_drops = rx_drops; 4607 adapter->dev_stats.tx_drops = tx_drops; 4608 u64_stats_update_end(&adapter->syncp); 4609 } 4610 4611 static void ena_notification(void *adapter_data, 4612 struct ena_admin_aenq_entry *aenq_e) 4613 { 4614 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4615 struct ena_admin_ena_hw_hints *hints; 4616 4617 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4618 "Invalid group(%x) expected %x\n", 4619 aenq_e->aenq_common_desc.group, 4620 ENA_ADMIN_NOTIFICATION); 4621 4622 switch (aenq_e->aenq_common_desc.syndrome) { 4623 case ENA_ADMIN_UPDATE_HINTS: 4624 hints = (struct ena_admin_ena_hw_hints *) 4625 (&aenq_e->inline_data_w4); 4626 ena_update_hints(adapter, hints); 4627 break; 4628 default: 4629 netif_err(adapter, drv, adapter->netdev, 4630 "Invalid aenq notification link state %d\n", 4631 aenq_e->aenq_common_desc.syndrome); 4632 } 4633 } 4634 4635 /* This handler will called for unknown event group or unimplemented handlers*/ 4636 static void unimplemented_aenq_handler(void *data, 4637 struct ena_admin_aenq_entry *aenq_e) 4638 { 4639 struct ena_adapter *adapter = (struct ena_adapter *)data; 4640 4641 netif_err(adapter, drv, adapter->netdev, 4642 "Unknown event was received or event with unimplemented handler\n"); 4643 } 4644 4645 static struct ena_aenq_handlers aenq_handlers = { 4646 .handlers = { 4647 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4648 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4649 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4650 }, 4651 .unimplemented_handler = unimplemented_aenq_handler 4652 }; 4653 4654 module_init(ena_init); 4655 module_exit(ena_cleanup); 4656