1 /* 2 * Copyright 2015 Amazon.com, Inc. or its affiliates. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35 #ifdef CONFIG_RFS_ACCEL 36 #include <linux/cpu_rmap.h> 37 #endif /* CONFIG_RFS_ACCEL */ 38 #include <linux/ethtool.h> 39 #include <linux/if_vlan.h> 40 #include <linux/kernel.h> 41 #include <linux/module.h> 42 #include <linux/moduleparam.h> 43 #include <linux/numa.h> 44 #include <linux/pci.h> 45 #include <linux/utsname.h> 46 #include <linux/version.h> 47 #include <linux/vmalloc.h> 48 #include <net/ip.h> 49 50 #include "ena_netdev.h" 51 #include "ena_pci_id_tbl.h" 52 53 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n"; 54 55 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 56 MODULE_DESCRIPTION(DEVICE_NAME); 57 MODULE_LICENSE("GPL"); 58 MODULE_VERSION(DRV_MODULE_VERSION); 59 60 /* Time in jiffies before concluding the transmitter is hung. */ 61 #define TX_TIMEOUT (5 * HZ) 62 63 #define ENA_NAPI_BUDGET 64 64 65 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 66 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 67 static int debug = -1; 68 module_param(debug, int, 0); 69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 70 71 static struct ena_aenq_handlers aenq_handlers; 72 73 static struct workqueue_struct *ena_wq; 74 75 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 76 77 static int ena_rss_init_default(struct ena_adapter *adapter); 78 static void check_for_admin_com_state(struct ena_adapter *adapter); 79 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 80 static int ena_restore_device(struct ena_adapter *adapter); 81 82 static void ena_tx_timeout(struct net_device *dev) 83 { 84 struct ena_adapter *adapter = netdev_priv(dev); 85 86 /* Change the state of the device to trigger reset 87 * Check that we are not in the middle or a trigger already 88 */ 89 90 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 91 return; 92 93 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 94 u64_stats_update_begin(&adapter->syncp); 95 adapter->dev_stats.tx_timeout++; 96 u64_stats_update_end(&adapter->syncp); 97 98 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 99 } 100 101 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 102 { 103 int i; 104 105 for (i = 0; i < adapter->num_queues; i++) 106 adapter->rx_ring[i].mtu = mtu; 107 } 108 109 static int ena_change_mtu(struct net_device *dev, int new_mtu) 110 { 111 struct ena_adapter *adapter = netdev_priv(dev); 112 int ret; 113 114 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 115 if (!ret) { 116 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu); 117 update_rx_ring_mtu(adapter, new_mtu); 118 dev->mtu = new_mtu; 119 } else { 120 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 121 new_mtu); 122 } 123 124 return ret; 125 } 126 127 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 128 { 129 #ifdef CONFIG_RFS_ACCEL 130 u32 i; 131 int rc; 132 133 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues); 134 if (!adapter->netdev->rx_cpu_rmap) 135 return -ENOMEM; 136 for (i = 0; i < adapter->num_queues; i++) { 137 int irq_idx = ENA_IO_IRQ_IDX(i); 138 139 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 140 pci_irq_vector(adapter->pdev, irq_idx)); 141 if (rc) { 142 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 143 adapter->netdev->rx_cpu_rmap = NULL; 144 return rc; 145 } 146 } 147 #endif /* CONFIG_RFS_ACCEL */ 148 return 0; 149 } 150 151 static void ena_init_io_rings_common(struct ena_adapter *adapter, 152 struct ena_ring *ring, u16 qid) 153 { 154 ring->qid = qid; 155 ring->pdev = adapter->pdev; 156 ring->dev = &adapter->pdev->dev; 157 ring->netdev = adapter->netdev; 158 ring->napi = &adapter->ena_napi[qid].napi; 159 ring->adapter = adapter; 160 ring->ena_dev = adapter->ena_dev; 161 ring->per_napi_packets = 0; 162 ring->per_napi_bytes = 0; 163 ring->cpu = 0; 164 ring->first_interrupt = false; 165 ring->no_interrupt_event_cnt = 0; 166 u64_stats_init(&ring->syncp); 167 } 168 169 static void ena_init_io_rings(struct ena_adapter *adapter) 170 { 171 struct ena_com_dev *ena_dev; 172 struct ena_ring *txr, *rxr; 173 int i; 174 175 ena_dev = adapter->ena_dev; 176 177 for (i = 0; i < adapter->num_queues; i++) { 178 txr = &adapter->tx_ring[i]; 179 rxr = &adapter->rx_ring[i]; 180 181 /* TX/RX common ring state */ 182 ena_init_io_rings_common(adapter, txr, i); 183 ena_init_io_rings_common(adapter, rxr, i); 184 185 /* TX specific ring state */ 186 txr->ring_size = adapter->tx_ring_size; 187 txr->tx_max_header_size = ena_dev->tx_max_header_size; 188 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 189 txr->sgl_size = adapter->max_tx_sgl_size; 190 txr->smoothed_interval = 191 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 192 193 /* RX specific ring state */ 194 rxr->ring_size = adapter->rx_ring_size; 195 rxr->rx_copybreak = adapter->rx_copybreak; 196 rxr->sgl_size = adapter->max_rx_sgl_size; 197 rxr->smoothed_interval = 198 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 199 rxr->empty_rx_queue = 0; 200 } 201 } 202 203 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 204 * @adapter: network interface device structure 205 * @qid: queue index 206 * 207 * Return 0 on success, negative on failure 208 */ 209 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 210 { 211 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 212 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 213 int size, i, node; 214 215 if (tx_ring->tx_buffer_info) { 216 netif_err(adapter, ifup, 217 adapter->netdev, "tx_buffer_info info is not NULL"); 218 return -EEXIST; 219 } 220 221 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 222 node = cpu_to_node(ena_irq->cpu); 223 224 tx_ring->tx_buffer_info = vzalloc_node(size, node); 225 if (!tx_ring->tx_buffer_info) { 226 tx_ring->tx_buffer_info = vzalloc(size); 227 if (!tx_ring->tx_buffer_info) 228 return -ENOMEM; 229 } 230 231 size = sizeof(u16) * tx_ring->ring_size; 232 tx_ring->free_tx_ids = vzalloc_node(size, node); 233 if (!tx_ring->free_tx_ids) { 234 tx_ring->free_tx_ids = vzalloc(size); 235 if (!tx_ring->free_tx_ids) { 236 vfree(tx_ring->tx_buffer_info); 237 return -ENOMEM; 238 } 239 } 240 241 /* Req id ring for TX out of order completions */ 242 for (i = 0; i < tx_ring->ring_size; i++) 243 tx_ring->free_tx_ids[i] = i; 244 245 /* Reset tx statistics */ 246 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 247 248 tx_ring->next_to_use = 0; 249 tx_ring->next_to_clean = 0; 250 tx_ring->cpu = ena_irq->cpu; 251 return 0; 252 } 253 254 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 255 * @adapter: network interface device structure 256 * @qid: queue index 257 * 258 * Free all transmit software resources 259 */ 260 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 261 { 262 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 263 264 vfree(tx_ring->tx_buffer_info); 265 tx_ring->tx_buffer_info = NULL; 266 267 vfree(tx_ring->free_tx_ids); 268 tx_ring->free_tx_ids = NULL; 269 } 270 271 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues 272 * @adapter: private structure 273 * 274 * Return 0 on success, negative on failure 275 */ 276 static int ena_setup_all_tx_resources(struct ena_adapter *adapter) 277 { 278 int i, rc = 0; 279 280 for (i = 0; i < adapter->num_queues; i++) { 281 rc = ena_setup_tx_resources(adapter, i); 282 if (rc) 283 goto err_setup_tx; 284 } 285 286 return 0; 287 288 err_setup_tx: 289 290 netif_err(adapter, ifup, adapter->netdev, 291 "Tx queue %d: allocation failed\n", i); 292 293 /* rewind the index freeing the rings as we go */ 294 while (i--) 295 ena_free_tx_resources(adapter, i); 296 return rc; 297 } 298 299 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 300 * @adapter: board private structure 301 * 302 * Free all transmit software resources 303 */ 304 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 305 { 306 int i; 307 308 for (i = 0; i < adapter->num_queues; i++) 309 ena_free_tx_resources(adapter, i); 310 } 311 312 static inline int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id) 313 { 314 if (likely(req_id < rx_ring->ring_size)) 315 return 0; 316 317 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 318 "Invalid rx req_id: %hu\n", req_id); 319 320 u64_stats_update_begin(&rx_ring->syncp); 321 rx_ring->rx_stats.bad_req_id++; 322 u64_stats_update_end(&rx_ring->syncp); 323 324 /* Trigger device reset */ 325 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 326 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags); 327 return -EFAULT; 328 } 329 330 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 331 * @adapter: network interface device structure 332 * @qid: queue index 333 * 334 * Returns 0 on success, negative on failure 335 */ 336 static int ena_setup_rx_resources(struct ena_adapter *adapter, 337 u32 qid) 338 { 339 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 340 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 341 int size, node, i; 342 343 if (rx_ring->rx_buffer_info) { 344 netif_err(adapter, ifup, adapter->netdev, 345 "rx_buffer_info is not NULL"); 346 return -EEXIST; 347 } 348 349 /* alloc extra element so in rx path 350 * we can always prefetch rx_info + 1 351 */ 352 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 353 node = cpu_to_node(ena_irq->cpu); 354 355 rx_ring->rx_buffer_info = vzalloc_node(size, node); 356 if (!rx_ring->rx_buffer_info) { 357 rx_ring->rx_buffer_info = vzalloc(size); 358 if (!rx_ring->rx_buffer_info) 359 return -ENOMEM; 360 } 361 362 size = sizeof(u16) * rx_ring->ring_size; 363 rx_ring->free_rx_ids = vzalloc_node(size, node); 364 if (!rx_ring->free_rx_ids) { 365 rx_ring->free_rx_ids = vzalloc(size); 366 if (!rx_ring->free_rx_ids) { 367 vfree(rx_ring->rx_buffer_info); 368 return -ENOMEM; 369 } 370 } 371 372 /* Req id ring for receiving RX pkts out of order */ 373 for (i = 0; i < rx_ring->ring_size; i++) 374 rx_ring->free_rx_ids[i] = i; 375 376 /* Reset rx statistics */ 377 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 378 379 rx_ring->next_to_clean = 0; 380 rx_ring->next_to_use = 0; 381 rx_ring->cpu = ena_irq->cpu; 382 383 return 0; 384 } 385 386 /* ena_free_rx_resources - Free I/O Rx Resources 387 * @adapter: network interface device structure 388 * @qid: queue index 389 * 390 * Free all receive software resources 391 */ 392 static void ena_free_rx_resources(struct ena_adapter *adapter, 393 u32 qid) 394 { 395 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 396 397 vfree(rx_ring->rx_buffer_info); 398 rx_ring->rx_buffer_info = NULL; 399 400 vfree(rx_ring->free_rx_ids); 401 rx_ring->free_rx_ids = NULL; 402 } 403 404 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 405 * @adapter: board private structure 406 * 407 * Return 0 on success, negative on failure 408 */ 409 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 410 { 411 int i, rc = 0; 412 413 for (i = 0; i < adapter->num_queues; i++) { 414 rc = ena_setup_rx_resources(adapter, i); 415 if (rc) 416 goto err_setup_rx; 417 } 418 419 return 0; 420 421 err_setup_rx: 422 423 netif_err(adapter, ifup, adapter->netdev, 424 "Rx queue %d: allocation failed\n", i); 425 426 /* rewind the index freeing the rings as we go */ 427 while (i--) 428 ena_free_rx_resources(adapter, i); 429 return rc; 430 } 431 432 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 433 * @adapter: board private structure 434 * 435 * Free all receive software resources 436 */ 437 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 438 { 439 int i; 440 441 for (i = 0; i < adapter->num_queues; i++) 442 ena_free_rx_resources(adapter, i); 443 } 444 445 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring, 446 struct ena_rx_buffer *rx_info, gfp_t gfp) 447 { 448 struct ena_com_buf *ena_buf; 449 struct page *page; 450 dma_addr_t dma; 451 452 /* if previous allocated page is not used */ 453 if (unlikely(rx_info->page)) 454 return 0; 455 456 page = alloc_page(gfp); 457 if (unlikely(!page)) { 458 u64_stats_update_begin(&rx_ring->syncp); 459 rx_ring->rx_stats.page_alloc_fail++; 460 u64_stats_update_end(&rx_ring->syncp); 461 return -ENOMEM; 462 } 463 464 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 465 DMA_FROM_DEVICE); 466 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 467 u64_stats_update_begin(&rx_ring->syncp); 468 rx_ring->rx_stats.dma_mapping_err++; 469 u64_stats_update_end(&rx_ring->syncp); 470 471 __free_page(page); 472 return -EIO; 473 } 474 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 475 "alloc page %p, rx_info %p\n", page, rx_info); 476 477 rx_info->page = page; 478 rx_info->page_offset = 0; 479 ena_buf = &rx_info->ena_buf; 480 ena_buf->paddr = dma; 481 ena_buf->len = ENA_PAGE_SIZE; 482 483 return 0; 484 } 485 486 static void ena_free_rx_page(struct ena_ring *rx_ring, 487 struct ena_rx_buffer *rx_info) 488 { 489 struct page *page = rx_info->page; 490 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 491 492 if (unlikely(!page)) { 493 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 494 "Trying to free unallocated buffer\n"); 495 return; 496 } 497 498 dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE, 499 DMA_FROM_DEVICE); 500 501 __free_page(page); 502 rx_info->page = NULL; 503 } 504 505 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 506 { 507 u16 next_to_use, req_id; 508 u32 i; 509 int rc; 510 511 next_to_use = rx_ring->next_to_use; 512 513 for (i = 0; i < num; i++) { 514 struct ena_rx_buffer *rx_info; 515 516 req_id = rx_ring->free_rx_ids[next_to_use]; 517 rc = validate_rx_req_id(rx_ring, req_id); 518 if (unlikely(rc < 0)) 519 break; 520 521 rx_info = &rx_ring->rx_buffer_info[req_id]; 522 523 524 rc = ena_alloc_rx_page(rx_ring, rx_info, 525 GFP_ATOMIC | __GFP_COMP); 526 if (unlikely(rc < 0)) { 527 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 528 "failed to alloc buffer for rx queue %d\n", 529 rx_ring->qid); 530 break; 531 } 532 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 533 &rx_info->ena_buf, 534 req_id); 535 if (unlikely(rc)) { 536 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 537 "failed to add buffer for rx queue %d\n", 538 rx_ring->qid); 539 break; 540 } 541 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 542 rx_ring->ring_size); 543 } 544 545 if (unlikely(i < num)) { 546 u64_stats_update_begin(&rx_ring->syncp); 547 rx_ring->rx_stats.refil_partial++; 548 u64_stats_update_end(&rx_ring->syncp); 549 netdev_warn(rx_ring->netdev, 550 "refilled rx qid %d with only %d buffers (from %d)\n", 551 rx_ring->qid, i, num); 552 } 553 554 /* ena_com_write_sq_doorbell issues a wmb() */ 555 if (likely(i)) 556 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 557 558 rx_ring->next_to_use = next_to_use; 559 560 return i; 561 } 562 563 static void ena_free_rx_bufs(struct ena_adapter *adapter, 564 u32 qid) 565 { 566 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 567 u32 i; 568 569 for (i = 0; i < rx_ring->ring_size; i++) { 570 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 571 572 if (rx_info->page) 573 ena_free_rx_page(rx_ring, rx_info); 574 } 575 } 576 577 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 578 * @adapter: board private structure 579 * 580 */ 581 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 582 { 583 struct ena_ring *rx_ring; 584 int i, rc, bufs_num; 585 586 for (i = 0; i < adapter->num_queues; i++) { 587 rx_ring = &adapter->rx_ring[i]; 588 bufs_num = rx_ring->ring_size - 1; 589 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 590 591 if (unlikely(rc != bufs_num)) 592 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 593 "refilling Queue %d failed. allocated %d buffers from: %d\n", 594 i, rc, bufs_num); 595 } 596 } 597 598 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 599 { 600 int i; 601 602 for (i = 0; i < adapter->num_queues; i++) 603 ena_free_rx_bufs(adapter, i); 604 } 605 606 /* ena_free_tx_bufs - Free Tx Buffers per Queue 607 * @tx_ring: TX ring for which buffers be freed 608 */ 609 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 610 { 611 bool print_once = true; 612 u32 i; 613 614 for (i = 0; i < tx_ring->ring_size; i++) { 615 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 616 struct ena_com_buf *ena_buf; 617 int nr_frags; 618 int j; 619 620 if (!tx_info->skb) 621 continue; 622 623 if (print_once) { 624 netdev_notice(tx_ring->netdev, 625 "free uncompleted tx skb qid %d idx 0x%x\n", 626 tx_ring->qid, i); 627 print_once = false; 628 } else { 629 netdev_dbg(tx_ring->netdev, 630 "free uncompleted tx skb qid %d idx 0x%x\n", 631 tx_ring->qid, i); 632 } 633 634 ena_buf = tx_info->bufs; 635 dma_unmap_single(tx_ring->dev, 636 ena_buf->paddr, 637 ena_buf->len, 638 DMA_TO_DEVICE); 639 640 /* unmap remaining mapped pages */ 641 nr_frags = tx_info->num_of_bufs - 1; 642 for (j = 0; j < nr_frags; j++) { 643 ena_buf++; 644 dma_unmap_page(tx_ring->dev, 645 ena_buf->paddr, 646 ena_buf->len, 647 DMA_TO_DEVICE); 648 } 649 650 dev_kfree_skb_any(tx_info->skb); 651 } 652 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 653 tx_ring->qid)); 654 } 655 656 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 657 { 658 struct ena_ring *tx_ring; 659 int i; 660 661 for (i = 0; i < adapter->num_queues; i++) { 662 tx_ring = &adapter->tx_ring[i]; 663 ena_free_tx_bufs(tx_ring); 664 } 665 } 666 667 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 668 { 669 u16 ena_qid; 670 int i; 671 672 for (i = 0; i < adapter->num_queues; i++) { 673 ena_qid = ENA_IO_TXQ_IDX(i); 674 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 675 } 676 } 677 678 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 679 { 680 u16 ena_qid; 681 int i; 682 683 for (i = 0; i < adapter->num_queues; i++) { 684 ena_qid = ENA_IO_RXQ_IDX(i); 685 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 686 } 687 } 688 689 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 690 { 691 ena_destroy_all_tx_queues(adapter); 692 ena_destroy_all_rx_queues(adapter); 693 } 694 695 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 696 { 697 struct ena_tx_buffer *tx_info = NULL; 698 699 if (likely(req_id < tx_ring->ring_size)) { 700 tx_info = &tx_ring->tx_buffer_info[req_id]; 701 if (likely(tx_info->skb)) 702 return 0; 703 } 704 705 if (tx_info) 706 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev, 707 "tx_info doesn't have valid skb\n"); 708 else 709 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev, 710 "Invalid req_id: %hu\n", req_id); 711 712 u64_stats_update_begin(&tx_ring->syncp); 713 tx_ring->tx_stats.bad_req_id++; 714 u64_stats_update_end(&tx_ring->syncp); 715 716 /* Trigger device reset */ 717 tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 718 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags); 719 return -EFAULT; 720 } 721 722 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 723 { 724 struct netdev_queue *txq; 725 bool above_thresh; 726 u32 tx_bytes = 0; 727 u32 total_done = 0; 728 u16 next_to_clean; 729 u16 req_id; 730 int tx_pkts = 0; 731 int rc; 732 733 next_to_clean = tx_ring->next_to_clean; 734 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 735 736 while (tx_pkts < budget) { 737 struct ena_tx_buffer *tx_info; 738 struct sk_buff *skb; 739 struct ena_com_buf *ena_buf; 740 int i, nr_frags; 741 742 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 743 &req_id); 744 if (rc) 745 break; 746 747 rc = validate_tx_req_id(tx_ring, req_id); 748 if (rc) 749 break; 750 751 tx_info = &tx_ring->tx_buffer_info[req_id]; 752 skb = tx_info->skb; 753 754 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 755 prefetch(&skb->end); 756 757 tx_info->skb = NULL; 758 tx_info->last_jiffies = 0; 759 760 if (likely(tx_info->num_of_bufs != 0)) { 761 ena_buf = tx_info->bufs; 762 763 dma_unmap_single(tx_ring->dev, 764 dma_unmap_addr(ena_buf, paddr), 765 dma_unmap_len(ena_buf, len), 766 DMA_TO_DEVICE); 767 768 /* unmap remaining mapped pages */ 769 nr_frags = tx_info->num_of_bufs - 1; 770 for (i = 0; i < nr_frags; i++) { 771 ena_buf++; 772 dma_unmap_page(tx_ring->dev, 773 dma_unmap_addr(ena_buf, paddr), 774 dma_unmap_len(ena_buf, len), 775 DMA_TO_DEVICE); 776 } 777 } 778 779 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 780 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 781 skb); 782 783 tx_bytes += skb->len; 784 dev_kfree_skb(skb); 785 tx_pkts++; 786 total_done += tx_info->tx_descs; 787 788 tx_ring->free_tx_ids[next_to_clean] = req_id; 789 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 790 tx_ring->ring_size); 791 } 792 793 tx_ring->next_to_clean = next_to_clean; 794 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 795 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 796 797 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 798 799 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 800 "tx_poll: q %d done. total pkts: %d\n", 801 tx_ring->qid, tx_pkts); 802 803 /* need to make the rings circular update visible to 804 * ena_start_xmit() before checking for netif_queue_stopped(). 805 */ 806 smp_mb(); 807 808 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) > 809 ENA_TX_WAKEUP_THRESH; 810 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 811 __netif_tx_lock(txq, smp_processor_id()); 812 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) > 813 ENA_TX_WAKEUP_THRESH; 814 if (netif_tx_queue_stopped(txq) && above_thresh) { 815 netif_tx_wake_queue(txq); 816 u64_stats_update_begin(&tx_ring->syncp); 817 tx_ring->tx_stats.queue_wakeup++; 818 u64_stats_update_end(&tx_ring->syncp); 819 } 820 __netif_tx_unlock(txq); 821 } 822 823 tx_ring->per_napi_bytes += tx_bytes; 824 tx_ring->per_napi_packets += tx_pkts; 825 826 return tx_pkts; 827 } 828 829 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 830 { 831 struct sk_buff *skb; 832 833 if (frags) 834 skb = napi_get_frags(rx_ring->napi); 835 else 836 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 837 rx_ring->rx_copybreak); 838 839 if (unlikely(!skb)) { 840 u64_stats_update_begin(&rx_ring->syncp); 841 rx_ring->rx_stats.skb_alloc_fail++; 842 u64_stats_update_end(&rx_ring->syncp); 843 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 844 "Failed to allocate skb. frags: %d\n", frags); 845 return NULL; 846 } 847 848 return skb; 849 } 850 851 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 852 struct ena_com_rx_buf_info *ena_bufs, 853 u32 descs, 854 u16 *next_to_clean) 855 { 856 struct sk_buff *skb; 857 struct ena_rx_buffer *rx_info; 858 u16 len, req_id, buf = 0; 859 void *va; 860 861 len = ena_bufs[buf].len; 862 req_id = ena_bufs[buf].req_id; 863 rx_info = &rx_ring->rx_buffer_info[req_id]; 864 865 if (unlikely(!rx_info->page)) { 866 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 867 "Page is NULL\n"); 868 return NULL; 869 } 870 871 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 872 "rx_info %p page %p\n", 873 rx_info, rx_info->page); 874 875 /* save virt address of first buffer */ 876 va = page_address(rx_info->page) + rx_info->page_offset; 877 prefetch(va + NET_IP_ALIGN); 878 879 if (len <= rx_ring->rx_copybreak) { 880 skb = ena_alloc_skb(rx_ring, false); 881 if (unlikely(!skb)) 882 return NULL; 883 884 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 885 "rx allocated small packet. len %d. data_len %d\n", 886 skb->len, skb->data_len); 887 888 /* sync this buffer for CPU use */ 889 dma_sync_single_for_cpu(rx_ring->dev, 890 dma_unmap_addr(&rx_info->ena_buf, paddr), 891 len, 892 DMA_FROM_DEVICE); 893 skb_copy_to_linear_data(skb, va, len); 894 dma_sync_single_for_device(rx_ring->dev, 895 dma_unmap_addr(&rx_info->ena_buf, paddr), 896 len, 897 DMA_FROM_DEVICE); 898 899 skb_put(skb, len); 900 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 901 rx_ring->free_rx_ids[*next_to_clean] = req_id; 902 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 903 rx_ring->ring_size); 904 return skb; 905 } 906 907 skb = ena_alloc_skb(rx_ring, true); 908 if (unlikely(!skb)) 909 return NULL; 910 911 do { 912 dma_unmap_page(rx_ring->dev, 913 dma_unmap_addr(&rx_info->ena_buf, paddr), 914 ENA_PAGE_SIZE, DMA_FROM_DEVICE); 915 916 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 917 rx_info->page_offset, len, ENA_PAGE_SIZE); 918 919 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 920 "rx skb updated. len %d. data_len %d\n", 921 skb->len, skb->data_len); 922 923 rx_info->page = NULL; 924 925 rx_ring->free_rx_ids[*next_to_clean] = req_id; 926 *next_to_clean = 927 ENA_RX_RING_IDX_NEXT(*next_to_clean, 928 rx_ring->ring_size); 929 if (likely(--descs == 0)) 930 break; 931 932 buf++; 933 len = ena_bufs[buf].len; 934 req_id = ena_bufs[buf].req_id; 935 rx_info = &rx_ring->rx_buffer_info[req_id]; 936 } while (1); 937 938 return skb; 939 } 940 941 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 942 * @adapter: structure containing adapter specific data 943 * @ena_rx_ctx: received packet context/metadata 944 * @skb: skb currently being received and modified 945 */ 946 static inline void ena_rx_checksum(struct ena_ring *rx_ring, 947 struct ena_com_rx_ctx *ena_rx_ctx, 948 struct sk_buff *skb) 949 { 950 /* Rx csum disabled */ 951 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 952 skb->ip_summed = CHECKSUM_NONE; 953 return; 954 } 955 956 /* For fragmented packets the checksum isn't valid */ 957 if (ena_rx_ctx->frag) { 958 skb->ip_summed = CHECKSUM_NONE; 959 return; 960 } 961 962 /* if IP and error */ 963 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 964 (ena_rx_ctx->l3_csum_err))) { 965 /* ipv4 checksum error */ 966 skb->ip_summed = CHECKSUM_NONE; 967 u64_stats_update_begin(&rx_ring->syncp); 968 rx_ring->rx_stats.bad_csum++; 969 u64_stats_update_end(&rx_ring->syncp); 970 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 971 "RX IPv4 header checksum error\n"); 972 return; 973 } 974 975 /* if TCP/UDP */ 976 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 977 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 978 if (unlikely(ena_rx_ctx->l4_csum_err)) { 979 /* TCP/UDP checksum error */ 980 u64_stats_update_begin(&rx_ring->syncp); 981 rx_ring->rx_stats.bad_csum++; 982 u64_stats_update_end(&rx_ring->syncp); 983 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 984 "RX L4 checksum error\n"); 985 skb->ip_summed = CHECKSUM_NONE; 986 return; 987 } 988 989 skb->ip_summed = CHECKSUM_UNNECESSARY; 990 } 991 } 992 993 static void ena_set_rx_hash(struct ena_ring *rx_ring, 994 struct ena_com_rx_ctx *ena_rx_ctx, 995 struct sk_buff *skb) 996 { 997 enum pkt_hash_types hash_type; 998 999 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1000 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1001 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1002 1003 hash_type = PKT_HASH_TYPE_L4; 1004 else 1005 hash_type = PKT_HASH_TYPE_NONE; 1006 1007 /* Override hash type if the packet is fragmented */ 1008 if (ena_rx_ctx->frag) 1009 hash_type = PKT_HASH_TYPE_NONE; 1010 1011 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1012 } 1013 } 1014 1015 /* ena_clean_rx_irq - Cleanup RX irq 1016 * @rx_ring: RX ring to clean 1017 * @napi: napi handler 1018 * @budget: how many packets driver is allowed to clean 1019 * 1020 * Returns the number of cleaned buffers. 1021 */ 1022 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1023 u32 budget) 1024 { 1025 u16 next_to_clean = rx_ring->next_to_clean; 1026 u32 res_budget, work_done; 1027 1028 struct ena_com_rx_ctx ena_rx_ctx; 1029 struct ena_adapter *adapter; 1030 struct sk_buff *skb; 1031 int refill_required; 1032 int refill_threshold; 1033 int rc = 0; 1034 int total_len = 0; 1035 int rx_copybreak_pkt = 0; 1036 int i; 1037 1038 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1039 "%s qid %d\n", __func__, rx_ring->qid); 1040 res_budget = budget; 1041 1042 do { 1043 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1044 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1045 ena_rx_ctx.descs = 0; 1046 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1047 rx_ring->ena_com_io_sq, 1048 &ena_rx_ctx); 1049 if (unlikely(rc)) 1050 goto error; 1051 1052 if (unlikely(ena_rx_ctx.descs == 0)) 1053 break; 1054 1055 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1056 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1057 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1058 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1059 1060 /* allocate skb and fill it */ 1061 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs, 1062 &next_to_clean); 1063 1064 /* exit if we failed to retrieve a buffer */ 1065 if (unlikely(!skb)) { 1066 for (i = 0; i < ena_rx_ctx.descs; i++) { 1067 rx_ring->free_tx_ids[next_to_clean] = 1068 rx_ring->ena_bufs[i].req_id; 1069 next_to_clean = 1070 ENA_RX_RING_IDX_NEXT(next_to_clean, 1071 rx_ring->ring_size); 1072 } 1073 break; 1074 } 1075 1076 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1077 1078 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1079 1080 skb_record_rx_queue(skb, rx_ring->qid); 1081 1082 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1083 total_len += rx_ring->ena_bufs[0].len; 1084 rx_copybreak_pkt++; 1085 napi_gro_receive(napi, skb); 1086 } else { 1087 total_len += skb->len; 1088 napi_gro_frags(napi); 1089 } 1090 1091 res_budget--; 1092 } while (likely(res_budget)); 1093 1094 work_done = budget - res_budget; 1095 rx_ring->per_napi_bytes += total_len; 1096 rx_ring->per_napi_packets += work_done; 1097 u64_stats_update_begin(&rx_ring->syncp); 1098 rx_ring->rx_stats.bytes += total_len; 1099 rx_ring->rx_stats.cnt += work_done; 1100 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1101 u64_stats_update_end(&rx_ring->syncp); 1102 1103 rx_ring->next_to_clean = next_to_clean; 1104 1105 refill_required = ena_com_sq_empty_space(rx_ring->ena_com_io_sq); 1106 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER; 1107 1108 /* Optimization, try to batch new rx buffers */ 1109 if (refill_required > refill_threshold) { 1110 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1111 ena_refill_rx_bufs(rx_ring, refill_required); 1112 } 1113 1114 return work_done; 1115 1116 error: 1117 adapter = netdev_priv(rx_ring->netdev); 1118 1119 u64_stats_update_begin(&rx_ring->syncp); 1120 rx_ring->rx_stats.bad_desc_num++; 1121 u64_stats_update_end(&rx_ring->syncp); 1122 1123 /* Too many desc from the device. Trigger reset */ 1124 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1125 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1126 1127 return 0; 1128 } 1129 1130 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring, 1131 struct ena_ring *tx_ring) 1132 { 1133 /* We apply adaptive moderation on Rx path only. 1134 * Tx uses static interrupt moderation. 1135 */ 1136 ena_com_calculate_interrupt_delay(rx_ring->ena_dev, 1137 rx_ring->per_napi_packets, 1138 rx_ring->per_napi_bytes, 1139 &rx_ring->smoothed_interval, 1140 &rx_ring->moder_tbl_idx); 1141 1142 /* Reset per napi packets/bytes */ 1143 tx_ring->per_napi_packets = 0; 1144 tx_ring->per_napi_bytes = 0; 1145 rx_ring->per_napi_packets = 0; 1146 rx_ring->per_napi_bytes = 0; 1147 } 1148 1149 static inline void ena_unmask_interrupt(struct ena_ring *tx_ring, 1150 struct ena_ring *rx_ring) 1151 { 1152 struct ena_eth_io_intr_reg intr_reg; 1153 1154 /* Update intr register: rx intr delay, 1155 * tx intr delay and interrupt unmask 1156 */ 1157 ena_com_update_intr_reg(&intr_reg, 1158 rx_ring->smoothed_interval, 1159 tx_ring->smoothed_interval, 1160 true); 1161 1162 /* It is a shared MSI-X. 1163 * Tx and Rx CQ have pointer to it. 1164 * So we use one of them to reach the intr reg 1165 */ 1166 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg); 1167 } 1168 1169 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1170 struct ena_ring *rx_ring) 1171 { 1172 int cpu = get_cpu(); 1173 int numa_node; 1174 1175 /* Check only one ring since the 2 rings are running on the same cpu */ 1176 if (likely(tx_ring->cpu == cpu)) 1177 goto out; 1178 1179 numa_node = cpu_to_node(cpu); 1180 put_cpu(); 1181 1182 if (numa_node != NUMA_NO_NODE) { 1183 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1184 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node); 1185 } 1186 1187 tx_ring->cpu = cpu; 1188 rx_ring->cpu = cpu; 1189 1190 return; 1191 out: 1192 put_cpu(); 1193 } 1194 1195 static int ena_io_poll(struct napi_struct *napi, int budget) 1196 { 1197 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1198 struct ena_ring *tx_ring, *rx_ring; 1199 1200 u32 tx_work_done; 1201 u32 rx_work_done; 1202 int tx_budget; 1203 int napi_comp_call = 0; 1204 int ret; 1205 1206 tx_ring = ena_napi->tx_ring; 1207 rx_ring = ena_napi->rx_ring; 1208 1209 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1210 1211 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1212 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1213 napi_complete_done(napi, 0); 1214 return 0; 1215 } 1216 1217 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1218 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1219 1220 /* If the device is about to reset or down, avoid unmask 1221 * the interrupt and return 0 so NAPI won't reschedule 1222 */ 1223 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1224 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1225 napi_complete_done(napi, 0); 1226 ret = 0; 1227 1228 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1229 napi_comp_call = 1; 1230 1231 /* Update numa and unmask the interrupt only when schedule 1232 * from the interrupt context (vs from sk_busy_loop) 1233 */ 1234 if (napi_complete_done(napi, rx_work_done)) { 1235 /* Tx and Rx share the same interrupt vector */ 1236 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1237 ena_adjust_intr_moderation(rx_ring, tx_ring); 1238 1239 ena_unmask_interrupt(tx_ring, rx_ring); 1240 } 1241 1242 ena_update_ring_numa_node(tx_ring, rx_ring); 1243 1244 ret = rx_work_done; 1245 } else { 1246 ret = budget; 1247 } 1248 1249 u64_stats_update_begin(&tx_ring->syncp); 1250 tx_ring->tx_stats.napi_comp += napi_comp_call; 1251 tx_ring->tx_stats.tx_poll++; 1252 u64_stats_update_end(&tx_ring->syncp); 1253 1254 return ret; 1255 } 1256 1257 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1258 { 1259 struct ena_adapter *adapter = (struct ena_adapter *)data; 1260 1261 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1262 1263 /* Don't call the aenq handler before probe is done */ 1264 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1265 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1266 1267 return IRQ_HANDLED; 1268 } 1269 1270 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 1271 * @irq: interrupt number 1272 * @data: pointer to a network interface private napi device structure 1273 */ 1274 static irqreturn_t ena_intr_msix_io(int irq, void *data) 1275 { 1276 struct ena_napi *ena_napi = data; 1277 1278 ena_napi->tx_ring->first_interrupt = true; 1279 ena_napi->rx_ring->first_interrupt = true; 1280 1281 napi_schedule_irqoff(&ena_napi->napi); 1282 1283 return IRQ_HANDLED; 1284 } 1285 1286 /* Reserve a single MSI-X vector for management (admin + aenq). 1287 * plus reserve one vector for each potential io queue. 1288 * the number of potential io queues is the minimum of what the device 1289 * supports and the number of vCPUs. 1290 */ 1291 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues) 1292 { 1293 int msix_vecs, irq_cnt; 1294 1295 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1296 netif_err(adapter, probe, adapter->netdev, 1297 "Error, MSI-X is already enabled\n"); 1298 return -EPERM; 1299 } 1300 1301 /* Reserved the max msix vectors we might need */ 1302 msix_vecs = ENA_MAX_MSIX_VEC(num_queues); 1303 1304 netif_dbg(adapter, probe, adapter->netdev, 1305 "trying to enable MSI-X, vectors %d\n", msix_vecs); 1306 1307 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 1308 msix_vecs, PCI_IRQ_MSIX); 1309 1310 if (irq_cnt < 0) { 1311 netif_err(adapter, probe, adapter->netdev, 1312 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 1313 return -ENOSPC; 1314 } 1315 1316 if (irq_cnt != msix_vecs) { 1317 netif_notice(adapter, probe, adapter->netdev, 1318 "enable only %d MSI-X (out of %d), reduce the number of queues\n", 1319 irq_cnt, msix_vecs); 1320 adapter->num_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 1321 } 1322 1323 if (ena_init_rx_cpu_rmap(adapter)) 1324 netif_warn(adapter, probe, adapter->netdev, 1325 "Failed to map IRQs to CPUs\n"); 1326 1327 adapter->msix_vecs = irq_cnt; 1328 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 1329 1330 return 0; 1331 } 1332 1333 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1334 { 1335 u32 cpu; 1336 1337 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1338 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1339 pci_name(adapter->pdev)); 1340 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 1341 ena_intr_msix_mgmnt; 1342 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1343 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1344 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 1345 cpu = cpumask_first(cpu_online_mask); 1346 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 1347 cpumask_set_cpu(cpu, 1348 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 1349 } 1350 1351 static void ena_setup_io_intr(struct ena_adapter *adapter) 1352 { 1353 struct net_device *netdev; 1354 int irq_idx, i, cpu; 1355 1356 netdev = adapter->netdev; 1357 1358 for (i = 0; i < adapter->num_queues; i++) { 1359 irq_idx = ENA_IO_IRQ_IDX(i); 1360 cpu = i % num_online_cpus(); 1361 1362 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1363 "%s-Tx-Rx-%d", netdev->name, i); 1364 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 1365 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 1366 adapter->irq_tbl[irq_idx].vector = 1367 pci_irq_vector(adapter->pdev, irq_idx); 1368 adapter->irq_tbl[irq_idx].cpu = cpu; 1369 1370 cpumask_set_cpu(cpu, 1371 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 1372 } 1373 } 1374 1375 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 1376 { 1377 unsigned long flags = 0; 1378 struct ena_irq *irq; 1379 int rc; 1380 1381 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1382 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 1383 irq->data); 1384 if (rc) { 1385 netif_err(adapter, probe, adapter->netdev, 1386 "failed to request admin irq\n"); 1387 return rc; 1388 } 1389 1390 netif_dbg(adapter, probe, adapter->netdev, 1391 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 1392 irq->affinity_hint_mask.bits[0], irq->vector); 1393 1394 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 1395 1396 return rc; 1397 } 1398 1399 static int ena_request_io_irq(struct ena_adapter *adapter) 1400 { 1401 unsigned long flags = 0; 1402 struct ena_irq *irq; 1403 int rc = 0, i, k; 1404 1405 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 1406 netif_err(adapter, ifup, adapter->netdev, 1407 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 1408 return -EINVAL; 1409 } 1410 1411 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1412 irq = &adapter->irq_tbl[i]; 1413 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 1414 irq->data); 1415 if (rc) { 1416 netif_err(adapter, ifup, adapter->netdev, 1417 "Failed to request I/O IRQ. index %d rc %d\n", 1418 i, rc); 1419 goto err; 1420 } 1421 1422 netif_dbg(adapter, ifup, adapter->netdev, 1423 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 1424 i, irq->affinity_hint_mask.bits[0], irq->vector); 1425 1426 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 1427 } 1428 1429 return rc; 1430 1431 err: 1432 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 1433 irq = &adapter->irq_tbl[k]; 1434 free_irq(irq->vector, irq->data); 1435 } 1436 1437 return rc; 1438 } 1439 1440 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 1441 { 1442 struct ena_irq *irq; 1443 1444 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1445 synchronize_irq(irq->vector); 1446 irq_set_affinity_hint(irq->vector, NULL); 1447 free_irq(irq->vector, irq->data); 1448 } 1449 1450 static void ena_free_io_irq(struct ena_adapter *adapter) 1451 { 1452 struct ena_irq *irq; 1453 int i; 1454 1455 #ifdef CONFIG_RFS_ACCEL 1456 if (adapter->msix_vecs >= 1) { 1457 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 1458 adapter->netdev->rx_cpu_rmap = NULL; 1459 } 1460 #endif /* CONFIG_RFS_ACCEL */ 1461 1462 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1463 irq = &adapter->irq_tbl[i]; 1464 irq_set_affinity_hint(irq->vector, NULL); 1465 free_irq(irq->vector, irq->data); 1466 } 1467 } 1468 1469 static void ena_disable_msix(struct ena_adapter *adapter) 1470 { 1471 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 1472 pci_free_irq_vectors(adapter->pdev); 1473 } 1474 1475 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 1476 { 1477 int i; 1478 1479 if (!netif_running(adapter->netdev)) 1480 return; 1481 1482 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) 1483 synchronize_irq(adapter->irq_tbl[i].vector); 1484 } 1485 1486 static void ena_del_napi(struct ena_adapter *adapter) 1487 { 1488 int i; 1489 1490 for (i = 0; i < adapter->num_queues; i++) 1491 netif_napi_del(&adapter->ena_napi[i].napi); 1492 } 1493 1494 static void ena_init_napi(struct ena_adapter *adapter) 1495 { 1496 struct ena_napi *napi; 1497 int i; 1498 1499 for (i = 0; i < adapter->num_queues; i++) { 1500 napi = &adapter->ena_napi[i]; 1501 1502 netif_napi_add(adapter->netdev, 1503 &adapter->ena_napi[i].napi, 1504 ena_io_poll, 1505 ENA_NAPI_BUDGET); 1506 napi->rx_ring = &adapter->rx_ring[i]; 1507 napi->tx_ring = &adapter->tx_ring[i]; 1508 napi->qid = i; 1509 } 1510 } 1511 1512 static void ena_napi_disable_all(struct ena_adapter *adapter) 1513 { 1514 int i; 1515 1516 for (i = 0; i < adapter->num_queues; i++) 1517 napi_disable(&adapter->ena_napi[i].napi); 1518 } 1519 1520 static void ena_napi_enable_all(struct ena_adapter *adapter) 1521 { 1522 int i; 1523 1524 for (i = 0; i < adapter->num_queues; i++) 1525 napi_enable(&adapter->ena_napi[i].napi); 1526 } 1527 1528 static void ena_restore_ethtool_params(struct ena_adapter *adapter) 1529 { 1530 adapter->tx_usecs = 0; 1531 adapter->rx_usecs = 0; 1532 adapter->tx_frames = 1; 1533 adapter->rx_frames = 1; 1534 } 1535 1536 /* Configure the Rx forwarding */ 1537 static int ena_rss_configure(struct ena_adapter *adapter) 1538 { 1539 struct ena_com_dev *ena_dev = adapter->ena_dev; 1540 int rc; 1541 1542 /* In case the RSS table wasn't initialized by probe */ 1543 if (!ena_dev->rss.tbl_log_size) { 1544 rc = ena_rss_init_default(adapter); 1545 if (rc && (rc != -EOPNOTSUPP)) { 1546 netif_err(adapter, ifup, adapter->netdev, 1547 "Failed to init RSS rc: %d\n", rc); 1548 return rc; 1549 } 1550 } 1551 1552 /* Set indirect table */ 1553 rc = ena_com_indirect_table_set(ena_dev); 1554 if (unlikely(rc && rc != -EOPNOTSUPP)) 1555 return rc; 1556 1557 /* Configure hash function (if supported) */ 1558 rc = ena_com_set_hash_function(ena_dev); 1559 if (unlikely(rc && (rc != -EOPNOTSUPP))) 1560 return rc; 1561 1562 /* Configure hash inputs (if supported) */ 1563 rc = ena_com_set_hash_ctrl(ena_dev); 1564 if (unlikely(rc && (rc != -EOPNOTSUPP))) 1565 return rc; 1566 1567 return 0; 1568 } 1569 1570 static int ena_up_complete(struct ena_adapter *adapter) 1571 { 1572 int rc; 1573 1574 rc = ena_rss_configure(adapter); 1575 if (rc) 1576 return rc; 1577 1578 ena_init_napi(adapter); 1579 1580 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 1581 1582 ena_refill_all_rx_bufs(adapter); 1583 1584 /* enable transmits */ 1585 netif_tx_start_all_queues(adapter->netdev); 1586 1587 ena_restore_ethtool_params(adapter); 1588 1589 ena_napi_enable_all(adapter); 1590 1591 return 0; 1592 } 1593 1594 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 1595 { 1596 struct ena_com_create_io_ctx ctx = { 0 }; 1597 struct ena_com_dev *ena_dev; 1598 struct ena_ring *tx_ring; 1599 u32 msix_vector; 1600 u16 ena_qid; 1601 int rc; 1602 1603 ena_dev = adapter->ena_dev; 1604 1605 tx_ring = &adapter->tx_ring[qid]; 1606 msix_vector = ENA_IO_IRQ_IDX(qid); 1607 ena_qid = ENA_IO_TXQ_IDX(qid); 1608 1609 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1610 ctx.qid = ena_qid; 1611 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1612 ctx.msix_vector = msix_vector; 1613 ctx.queue_size = adapter->tx_ring_size; 1614 ctx.numa_node = cpu_to_node(tx_ring->cpu); 1615 1616 rc = ena_com_create_io_queue(ena_dev, &ctx); 1617 if (rc) { 1618 netif_err(adapter, ifup, adapter->netdev, 1619 "Failed to create I/O TX queue num %d rc: %d\n", 1620 qid, rc); 1621 return rc; 1622 } 1623 1624 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1625 &tx_ring->ena_com_io_sq, 1626 &tx_ring->ena_com_io_cq); 1627 if (rc) { 1628 netif_err(adapter, ifup, adapter->netdev, 1629 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 1630 qid, rc); 1631 ena_com_destroy_io_queue(ena_dev, ena_qid); 1632 return rc; 1633 } 1634 1635 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 1636 return rc; 1637 } 1638 1639 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter) 1640 { 1641 struct ena_com_dev *ena_dev = adapter->ena_dev; 1642 int rc, i; 1643 1644 for (i = 0; i < adapter->num_queues; i++) { 1645 rc = ena_create_io_tx_queue(adapter, i); 1646 if (rc) 1647 goto create_err; 1648 } 1649 1650 return 0; 1651 1652 create_err: 1653 while (i--) 1654 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1655 1656 return rc; 1657 } 1658 1659 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 1660 { 1661 struct ena_com_dev *ena_dev; 1662 struct ena_com_create_io_ctx ctx = { 0 }; 1663 struct ena_ring *rx_ring; 1664 u32 msix_vector; 1665 u16 ena_qid; 1666 int rc; 1667 1668 ena_dev = adapter->ena_dev; 1669 1670 rx_ring = &adapter->rx_ring[qid]; 1671 msix_vector = ENA_IO_IRQ_IDX(qid); 1672 ena_qid = ENA_IO_RXQ_IDX(qid); 1673 1674 ctx.qid = ena_qid; 1675 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1676 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1677 ctx.msix_vector = msix_vector; 1678 ctx.queue_size = adapter->rx_ring_size; 1679 ctx.numa_node = cpu_to_node(rx_ring->cpu); 1680 1681 rc = ena_com_create_io_queue(ena_dev, &ctx); 1682 if (rc) { 1683 netif_err(adapter, ifup, adapter->netdev, 1684 "Failed to create I/O RX queue num %d rc: %d\n", 1685 qid, rc); 1686 return rc; 1687 } 1688 1689 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1690 &rx_ring->ena_com_io_sq, 1691 &rx_ring->ena_com_io_cq); 1692 if (rc) { 1693 netif_err(adapter, ifup, adapter->netdev, 1694 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 1695 qid, rc); 1696 ena_com_destroy_io_queue(ena_dev, ena_qid); 1697 return rc; 1698 } 1699 1700 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 1701 1702 return rc; 1703 } 1704 1705 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 1706 { 1707 struct ena_com_dev *ena_dev = adapter->ena_dev; 1708 int rc, i; 1709 1710 for (i = 0; i < adapter->num_queues; i++) { 1711 rc = ena_create_io_rx_queue(adapter, i); 1712 if (rc) 1713 goto create_err; 1714 } 1715 1716 return 0; 1717 1718 create_err: 1719 while (i--) 1720 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1721 1722 return rc; 1723 } 1724 1725 static int ena_up(struct ena_adapter *adapter) 1726 { 1727 int rc, i; 1728 1729 netdev_dbg(adapter->netdev, "%s\n", __func__); 1730 1731 ena_setup_io_intr(adapter); 1732 1733 rc = ena_request_io_irq(adapter); 1734 if (rc) 1735 goto err_req_irq; 1736 1737 /* allocate transmit descriptors */ 1738 rc = ena_setup_all_tx_resources(adapter); 1739 if (rc) 1740 goto err_setup_tx; 1741 1742 /* allocate receive descriptors */ 1743 rc = ena_setup_all_rx_resources(adapter); 1744 if (rc) 1745 goto err_setup_rx; 1746 1747 /* Create TX queues */ 1748 rc = ena_create_all_io_tx_queues(adapter); 1749 if (rc) 1750 goto err_create_tx_queues; 1751 1752 /* Create RX queues */ 1753 rc = ena_create_all_io_rx_queues(adapter); 1754 if (rc) 1755 goto err_create_rx_queues; 1756 1757 rc = ena_up_complete(adapter); 1758 if (rc) 1759 goto err_up; 1760 1761 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 1762 netif_carrier_on(adapter->netdev); 1763 1764 u64_stats_update_begin(&adapter->syncp); 1765 adapter->dev_stats.interface_up++; 1766 u64_stats_update_end(&adapter->syncp); 1767 1768 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 1769 1770 /* Enable completion queues interrupt */ 1771 for (i = 0; i < adapter->num_queues; i++) 1772 ena_unmask_interrupt(&adapter->tx_ring[i], 1773 &adapter->rx_ring[i]); 1774 1775 /* schedule napi in case we had pending packets 1776 * from the last time we disable napi 1777 */ 1778 for (i = 0; i < adapter->num_queues; i++) 1779 napi_schedule(&adapter->ena_napi[i].napi); 1780 1781 return rc; 1782 1783 err_up: 1784 ena_destroy_all_rx_queues(adapter); 1785 err_create_rx_queues: 1786 ena_destroy_all_tx_queues(adapter); 1787 err_create_tx_queues: 1788 ena_free_all_io_rx_resources(adapter); 1789 err_setup_rx: 1790 ena_free_all_io_tx_resources(adapter); 1791 err_setup_tx: 1792 ena_free_io_irq(adapter); 1793 err_req_irq: 1794 1795 return rc; 1796 } 1797 1798 static void ena_down(struct ena_adapter *adapter) 1799 { 1800 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 1801 1802 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 1803 1804 u64_stats_update_begin(&adapter->syncp); 1805 adapter->dev_stats.interface_down++; 1806 u64_stats_update_end(&adapter->syncp); 1807 1808 netif_carrier_off(adapter->netdev); 1809 netif_tx_disable(adapter->netdev); 1810 1811 /* After this point the napi handler won't enable the tx queue */ 1812 ena_napi_disable_all(adapter); 1813 1814 /* After destroy the queue there won't be any new interrupts */ 1815 1816 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 1817 int rc; 1818 1819 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 1820 if (rc) 1821 dev_err(&adapter->pdev->dev, "Device reset failed\n"); 1822 } 1823 1824 ena_destroy_all_io_queues(adapter); 1825 1826 ena_disable_io_intr_sync(adapter); 1827 ena_free_io_irq(adapter); 1828 ena_del_napi(adapter); 1829 1830 ena_free_all_tx_bufs(adapter); 1831 ena_free_all_rx_bufs(adapter); 1832 ena_free_all_io_tx_resources(adapter); 1833 ena_free_all_io_rx_resources(adapter); 1834 } 1835 1836 /* ena_open - Called when a network interface is made active 1837 * @netdev: network interface device structure 1838 * 1839 * Returns 0 on success, negative value on failure 1840 * 1841 * The open entry point is called when a network interface is made 1842 * active by the system (IFF_UP). At this point all resources needed 1843 * for transmit and receive operations are allocated, the interrupt 1844 * handler is registered with the OS, the watchdog timer is started, 1845 * and the stack is notified that the interface is ready. 1846 */ 1847 static int ena_open(struct net_device *netdev) 1848 { 1849 struct ena_adapter *adapter = netdev_priv(netdev); 1850 int rc; 1851 1852 /* Notify the stack of the actual queue counts. */ 1853 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues); 1854 if (rc) { 1855 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 1856 return rc; 1857 } 1858 1859 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues); 1860 if (rc) { 1861 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 1862 return rc; 1863 } 1864 1865 rc = ena_up(adapter); 1866 if (rc) 1867 return rc; 1868 1869 return rc; 1870 } 1871 1872 /* ena_close - Disables a network interface 1873 * @netdev: network interface device structure 1874 * 1875 * Returns 0, this is not allowed to fail 1876 * 1877 * The close entry point is called when an interface is de-activated 1878 * by the OS. The hardware is still under the drivers control, but 1879 * needs to be disabled. A global MAC reset is issued to stop the 1880 * hardware, and all transmit and receive resources are freed. 1881 */ 1882 static int ena_close(struct net_device *netdev) 1883 { 1884 struct ena_adapter *adapter = netdev_priv(netdev); 1885 1886 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 1887 1888 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 1889 ena_down(adapter); 1890 1891 /* Check for device status and issue reset if needed*/ 1892 check_for_admin_com_state(adapter); 1893 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 1894 netif_err(adapter, ifdown, adapter->netdev, 1895 "Destroy failure, restarting device\n"); 1896 ena_dump_stats_to_dmesg(adapter); 1897 /* rtnl lock already obtained in dev_ioctl() layer */ 1898 ena_destroy_device(adapter, false); 1899 ena_restore_device(adapter); 1900 } 1901 1902 return 0; 1903 } 1904 1905 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb) 1906 { 1907 u32 mss = skb_shinfo(skb)->gso_size; 1908 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 1909 u8 l4_protocol = 0; 1910 1911 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 1912 ena_tx_ctx->l4_csum_enable = 1; 1913 if (mss) { 1914 ena_tx_ctx->tso_enable = 1; 1915 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 1916 ena_tx_ctx->l4_csum_partial = 0; 1917 } else { 1918 ena_tx_ctx->tso_enable = 0; 1919 ena_meta->l4_hdr_len = 0; 1920 ena_tx_ctx->l4_csum_partial = 1; 1921 } 1922 1923 switch (ip_hdr(skb)->version) { 1924 case IPVERSION: 1925 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 1926 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 1927 ena_tx_ctx->df = 1; 1928 if (mss) 1929 ena_tx_ctx->l3_csum_enable = 1; 1930 l4_protocol = ip_hdr(skb)->protocol; 1931 break; 1932 case 6: 1933 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 1934 l4_protocol = ipv6_hdr(skb)->nexthdr; 1935 break; 1936 default: 1937 break; 1938 } 1939 1940 if (l4_protocol == IPPROTO_TCP) 1941 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 1942 else 1943 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 1944 1945 ena_meta->mss = mss; 1946 ena_meta->l3_hdr_len = skb_network_header_len(skb); 1947 ena_meta->l3_hdr_offset = skb_network_offset(skb); 1948 ena_tx_ctx->meta_valid = 1; 1949 1950 } else { 1951 ena_tx_ctx->meta_valid = 0; 1952 } 1953 } 1954 1955 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 1956 struct sk_buff *skb) 1957 { 1958 int num_frags, header_len, rc; 1959 1960 num_frags = skb_shinfo(skb)->nr_frags; 1961 header_len = skb_headlen(skb); 1962 1963 if (num_frags < tx_ring->sgl_size) 1964 return 0; 1965 1966 if ((num_frags == tx_ring->sgl_size) && 1967 (header_len < tx_ring->tx_max_header_size)) 1968 return 0; 1969 1970 u64_stats_update_begin(&tx_ring->syncp); 1971 tx_ring->tx_stats.linearize++; 1972 u64_stats_update_end(&tx_ring->syncp); 1973 1974 rc = skb_linearize(skb); 1975 if (unlikely(rc)) { 1976 u64_stats_update_begin(&tx_ring->syncp); 1977 tx_ring->tx_stats.linearize_failed++; 1978 u64_stats_update_end(&tx_ring->syncp); 1979 } 1980 1981 return rc; 1982 } 1983 1984 /* Called with netif_tx_lock. */ 1985 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 1986 { 1987 struct ena_adapter *adapter = netdev_priv(dev); 1988 struct ena_tx_buffer *tx_info; 1989 struct ena_com_tx_ctx ena_tx_ctx; 1990 struct ena_ring *tx_ring; 1991 struct netdev_queue *txq; 1992 struct ena_com_buf *ena_buf; 1993 void *push_hdr; 1994 u32 len, last_frag; 1995 u16 next_to_use; 1996 u16 req_id; 1997 u16 push_len; 1998 u16 header_len; 1999 dma_addr_t dma; 2000 int qid, rc, nb_hw_desc; 2001 int i = -1; 2002 2003 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 2004 /* Determine which tx ring we will be placed on */ 2005 qid = skb_get_queue_mapping(skb); 2006 tx_ring = &adapter->tx_ring[qid]; 2007 txq = netdev_get_tx_queue(dev, qid); 2008 2009 rc = ena_check_and_linearize_skb(tx_ring, skb); 2010 if (unlikely(rc)) 2011 goto error_drop_packet; 2012 2013 skb_tx_timestamp(skb); 2014 len = skb_headlen(skb); 2015 2016 next_to_use = tx_ring->next_to_use; 2017 req_id = tx_ring->free_tx_ids[next_to_use]; 2018 tx_info = &tx_ring->tx_buffer_info[req_id]; 2019 tx_info->num_of_bufs = 0; 2020 2021 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 2022 ena_buf = tx_info->bufs; 2023 tx_info->skb = skb; 2024 2025 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2026 /* prepared the push buffer */ 2027 push_len = min_t(u32, len, tx_ring->tx_max_header_size); 2028 header_len = push_len; 2029 push_hdr = skb->data; 2030 } else { 2031 push_len = 0; 2032 header_len = min_t(u32, len, tx_ring->tx_max_header_size); 2033 push_hdr = NULL; 2034 } 2035 2036 netif_dbg(adapter, tx_queued, dev, 2037 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2038 push_hdr, push_len); 2039 2040 if (len > push_len) { 2041 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2042 len - push_len, DMA_TO_DEVICE); 2043 if (dma_mapping_error(tx_ring->dev, dma)) 2044 goto error_report_dma_error; 2045 2046 ena_buf->paddr = dma; 2047 ena_buf->len = len - push_len; 2048 2049 ena_buf++; 2050 tx_info->num_of_bufs++; 2051 } 2052 2053 last_frag = skb_shinfo(skb)->nr_frags; 2054 2055 for (i = 0; i < last_frag; i++) { 2056 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2057 2058 len = skb_frag_size(frag); 2059 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len, 2060 DMA_TO_DEVICE); 2061 if (dma_mapping_error(tx_ring->dev, dma)) 2062 goto error_report_dma_error; 2063 2064 ena_buf->paddr = dma; 2065 ena_buf->len = len; 2066 ena_buf++; 2067 } 2068 2069 tx_info->num_of_bufs += last_frag; 2070 2071 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2072 ena_tx_ctx.ena_bufs = tx_info->bufs; 2073 ena_tx_ctx.push_header = push_hdr; 2074 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2075 ena_tx_ctx.req_id = req_id; 2076 ena_tx_ctx.header_len = header_len; 2077 2078 /* set flags and meta data */ 2079 ena_tx_csum(&ena_tx_ctx, skb); 2080 2081 /* prepare the packet's descriptors to dma engine */ 2082 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx, 2083 &nb_hw_desc); 2084 2085 if (unlikely(rc)) { 2086 netif_err(adapter, tx_queued, dev, 2087 "failed to prepare tx bufs\n"); 2088 u64_stats_update_begin(&tx_ring->syncp); 2089 tx_ring->tx_stats.queue_stop++; 2090 tx_ring->tx_stats.prepare_ctx_err++; 2091 u64_stats_update_end(&tx_ring->syncp); 2092 netif_tx_stop_queue(txq); 2093 goto error_unmap_dma; 2094 } 2095 2096 netdev_tx_sent_queue(txq, skb->len); 2097 2098 u64_stats_update_begin(&tx_ring->syncp); 2099 tx_ring->tx_stats.cnt++; 2100 tx_ring->tx_stats.bytes += skb->len; 2101 u64_stats_update_end(&tx_ring->syncp); 2102 2103 tx_info->tx_descs = nb_hw_desc; 2104 tx_info->last_jiffies = jiffies; 2105 tx_info->print_once = 0; 2106 2107 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2108 tx_ring->ring_size); 2109 2110 /* stop the queue when no more space available, the packet can have up 2111 * to sgl_size + 2. one for the meta descriptor and one for header 2112 * (if the header is larger than tx_max_header_size). 2113 */ 2114 if (unlikely(ena_com_sq_empty_space(tx_ring->ena_com_io_sq) < 2115 (tx_ring->sgl_size + 2))) { 2116 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 2117 __func__, qid); 2118 2119 netif_tx_stop_queue(txq); 2120 u64_stats_update_begin(&tx_ring->syncp); 2121 tx_ring->tx_stats.queue_stop++; 2122 u64_stats_update_end(&tx_ring->syncp); 2123 2124 /* There is a rare condition where this function decide to 2125 * stop the queue but meanwhile clean_tx_irq updates 2126 * next_to_completion and terminates. 2127 * The queue will remain stopped forever. 2128 * To solve this issue add a mb() to make sure that 2129 * netif_tx_stop_queue() write is vissible before checking if 2130 * there is additional space in the queue. 2131 */ 2132 smp_mb(); 2133 2134 if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq) 2135 > ENA_TX_WAKEUP_THRESH) { 2136 netif_tx_wake_queue(txq); 2137 u64_stats_update_begin(&tx_ring->syncp); 2138 tx_ring->tx_stats.queue_wakeup++; 2139 u64_stats_update_end(&tx_ring->syncp); 2140 } 2141 } 2142 2143 if (netif_xmit_stopped(txq) || !skb->xmit_more) { 2144 /* trigger the dma engine. ena_com_write_sq_doorbell() 2145 * has a mb 2146 */ 2147 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 2148 u64_stats_update_begin(&tx_ring->syncp); 2149 tx_ring->tx_stats.doorbells++; 2150 u64_stats_update_end(&tx_ring->syncp); 2151 } 2152 2153 return NETDEV_TX_OK; 2154 2155 error_report_dma_error: 2156 u64_stats_update_begin(&tx_ring->syncp); 2157 tx_ring->tx_stats.dma_mapping_err++; 2158 u64_stats_update_end(&tx_ring->syncp); 2159 netdev_warn(adapter->netdev, "failed to map skb\n"); 2160 2161 tx_info->skb = NULL; 2162 2163 error_unmap_dma: 2164 if (i >= 0) { 2165 /* save value of frag that failed */ 2166 last_frag = i; 2167 2168 /* start back at beginning and unmap skb */ 2169 tx_info->skb = NULL; 2170 ena_buf = tx_info->bufs; 2171 dma_unmap_single(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 2172 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 2173 2174 /* unmap remaining mapped pages */ 2175 for (i = 0; i < last_frag; i++) { 2176 ena_buf++; 2177 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 2178 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 2179 } 2180 } 2181 2182 error_drop_packet: 2183 2184 dev_kfree_skb(skb); 2185 return NETDEV_TX_OK; 2186 } 2187 2188 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 2189 struct net_device *sb_dev, 2190 select_queue_fallback_t fallback) 2191 { 2192 u16 qid; 2193 /* we suspect that this is good for in--kernel network services that 2194 * want to loop incoming skb rx to tx in normal user generated traffic, 2195 * most probably we will not get to this 2196 */ 2197 if (skb_rx_queue_recorded(skb)) 2198 qid = skb_get_rx_queue(skb); 2199 else 2200 qid = fallback(dev, skb, NULL); 2201 2202 return qid; 2203 } 2204 2205 static void ena_config_host_info(struct ena_com_dev *ena_dev) 2206 { 2207 struct ena_admin_host_info *host_info; 2208 int rc; 2209 2210 /* Allocate only the host info */ 2211 rc = ena_com_allocate_host_info(ena_dev); 2212 if (rc) { 2213 pr_err("Cannot allocate host info\n"); 2214 return; 2215 } 2216 2217 host_info = ena_dev->host_attr.host_info; 2218 2219 host_info->os_type = ENA_ADMIN_OS_LINUX; 2220 host_info->kernel_ver = LINUX_VERSION_CODE; 2221 strncpy(host_info->kernel_ver_str, utsname()->version, 2222 sizeof(host_info->kernel_ver_str) - 1); 2223 host_info->os_dist = 0; 2224 strncpy(host_info->os_dist_str, utsname()->release, 2225 sizeof(host_info->os_dist_str) - 1); 2226 host_info->driver_version = 2227 (DRV_MODULE_VER_MAJOR) | 2228 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 2229 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 2230 2231 rc = ena_com_set_host_attributes(ena_dev); 2232 if (rc) { 2233 if (rc == -EOPNOTSUPP) 2234 pr_warn("Cannot set host attributes\n"); 2235 else 2236 pr_err("Cannot set host attributes\n"); 2237 2238 goto err; 2239 } 2240 2241 return; 2242 2243 err: 2244 ena_com_delete_host_info(ena_dev); 2245 } 2246 2247 static void ena_config_debug_area(struct ena_adapter *adapter) 2248 { 2249 u32 debug_area_size; 2250 int rc, ss_count; 2251 2252 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 2253 if (ss_count <= 0) { 2254 netif_err(adapter, drv, adapter->netdev, 2255 "SS count is negative\n"); 2256 return; 2257 } 2258 2259 /* allocate 32 bytes for each string and 64bit for the value */ 2260 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 2261 2262 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 2263 if (rc) { 2264 pr_err("Cannot allocate debug area\n"); 2265 return; 2266 } 2267 2268 rc = ena_com_set_host_attributes(adapter->ena_dev); 2269 if (rc) { 2270 if (rc == -EOPNOTSUPP) 2271 netif_warn(adapter, drv, adapter->netdev, 2272 "Cannot set host attributes\n"); 2273 else 2274 netif_err(adapter, drv, adapter->netdev, 2275 "Cannot set host attributes\n"); 2276 goto err; 2277 } 2278 2279 return; 2280 err: 2281 ena_com_delete_debug_area(adapter->ena_dev); 2282 } 2283 2284 static void ena_get_stats64(struct net_device *netdev, 2285 struct rtnl_link_stats64 *stats) 2286 { 2287 struct ena_adapter *adapter = netdev_priv(netdev); 2288 struct ena_ring *rx_ring, *tx_ring; 2289 unsigned int start; 2290 u64 rx_drops; 2291 int i; 2292 2293 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2294 return; 2295 2296 for (i = 0; i < adapter->num_queues; i++) { 2297 u64 bytes, packets; 2298 2299 tx_ring = &adapter->tx_ring[i]; 2300 2301 do { 2302 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 2303 packets = tx_ring->tx_stats.cnt; 2304 bytes = tx_ring->tx_stats.bytes; 2305 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 2306 2307 stats->tx_packets += packets; 2308 stats->tx_bytes += bytes; 2309 2310 rx_ring = &adapter->rx_ring[i]; 2311 2312 do { 2313 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 2314 packets = rx_ring->rx_stats.cnt; 2315 bytes = rx_ring->rx_stats.bytes; 2316 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 2317 2318 stats->rx_packets += packets; 2319 stats->rx_bytes += bytes; 2320 } 2321 2322 do { 2323 start = u64_stats_fetch_begin_irq(&adapter->syncp); 2324 rx_drops = adapter->dev_stats.rx_drops; 2325 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 2326 2327 stats->rx_dropped = rx_drops; 2328 2329 stats->multicast = 0; 2330 stats->collisions = 0; 2331 2332 stats->rx_length_errors = 0; 2333 stats->rx_crc_errors = 0; 2334 stats->rx_frame_errors = 0; 2335 stats->rx_fifo_errors = 0; 2336 stats->rx_missed_errors = 0; 2337 stats->tx_window_errors = 0; 2338 2339 stats->rx_errors = 0; 2340 stats->tx_errors = 0; 2341 } 2342 2343 static const struct net_device_ops ena_netdev_ops = { 2344 .ndo_open = ena_open, 2345 .ndo_stop = ena_close, 2346 .ndo_start_xmit = ena_start_xmit, 2347 .ndo_select_queue = ena_select_queue, 2348 .ndo_get_stats64 = ena_get_stats64, 2349 .ndo_tx_timeout = ena_tx_timeout, 2350 .ndo_change_mtu = ena_change_mtu, 2351 .ndo_set_mac_address = NULL, 2352 .ndo_validate_addr = eth_validate_addr, 2353 }; 2354 2355 static int ena_device_validate_params(struct ena_adapter *adapter, 2356 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2357 { 2358 struct net_device *netdev = adapter->netdev; 2359 int rc; 2360 2361 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 2362 adapter->mac_addr); 2363 if (!rc) { 2364 netif_err(adapter, drv, netdev, 2365 "Error, mac address are different\n"); 2366 return -EINVAL; 2367 } 2368 2369 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) || 2370 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) { 2371 netif_err(adapter, drv, netdev, 2372 "Error, device doesn't support enough queues\n"); 2373 return -EINVAL; 2374 } 2375 2376 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 2377 netif_err(adapter, drv, netdev, 2378 "Error, device max mtu is smaller than netdev MTU\n"); 2379 return -EINVAL; 2380 } 2381 2382 return 0; 2383 } 2384 2385 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 2386 struct ena_com_dev_get_features_ctx *get_feat_ctx, 2387 bool *wd_state) 2388 { 2389 struct device *dev = &pdev->dev; 2390 bool readless_supported; 2391 u32 aenq_groups; 2392 int dma_width; 2393 int rc; 2394 2395 rc = ena_com_mmio_reg_read_request_init(ena_dev); 2396 if (rc) { 2397 dev_err(dev, "failed to init mmio read less\n"); 2398 return rc; 2399 } 2400 2401 /* The PCIe configuration space revision id indicate if mmio reg 2402 * read is disabled 2403 */ 2404 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 2405 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 2406 2407 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 2408 if (rc) { 2409 dev_err(dev, "Can not reset device\n"); 2410 goto err_mmio_read_less; 2411 } 2412 2413 rc = ena_com_validate_version(ena_dev); 2414 if (rc) { 2415 dev_err(dev, "device version is too low\n"); 2416 goto err_mmio_read_less; 2417 } 2418 2419 dma_width = ena_com_get_dma_width(ena_dev); 2420 if (dma_width < 0) { 2421 dev_err(dev, "Invalid dma width value %d", dma_width); 2422 rc = dma_width; 2423 goto err_mmio_read_less; 2424 } 2425 2426 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 2427 if (rc) { 2428 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc); 2429 goto err_mmio_read_less; 2430 } 2431 2432 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width)); 2433 if (rc) { 2434 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n", 2435 rc); 2436 goto err_mmio_read_less; 2437 } 2438 2439 /* ENA admin level init */ 2440 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 2441 if (rc) { 2442 dev_err(dev, 2443 "Can not initialize ena admin queue with device\n"); 2444 goto err_mmio_read_less; 2445 } 2446 2447 /* To enable the msix interrupts the driver needs to know the number 2448 * of queues. So the driver uses polling mode to retrieve this 2449 * information 2450 */ 2451 ena_com_set_admin_polling_mode(ena_dev, true); 2452 2453 ena_config_host_info(ena_dev); 2454 2455 /* Get Device Attributes*/ 2456 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 2457 if (rc) { 2458 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 2459 goto err_admin_init; 2460 } 2461 2462 /* Try to turn all the available aenq groups */ 2463 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 2464 BIT(ENA_ADMIN_FATAL_ERROR) | 2465 BIT(ENA_ADMIN_WARNING) | 2466 BIT(ENA_ADMIN_NOTIFICATION) | 2467 BIT(ENA_ADMIN_KEEP_ALIVE); 2468 2469 aenq_groups &= get_feat_ctx->aenq.supported_groups; 2470 2471 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 2472 if (rc) { 2473 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 2474 goto err_admin_init; 2475 } 2476 2477 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 2478 2479 return 0; 2480 2481 err_admin_init: 2482 ena_com_delete_host_info(ena_dev); 2483 ena_com_admin_destroy(ena_dev); 2484 err_mmio_read_less: 2485 ena_com_mmio_reg_read_request_destroy(ena_dev); 2486 2487 return rc; 2488 } 2489 2490 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 2491 int io_vectors) 2492 { 2493 struct ena_com_dev *ena_dev = adapter->ena_dev; 2494 struct device *dev = &adapter->pdev->dev; 2495 int rc; 2496 2497 rc = ena_enable_msix(adapter, io_vectors); 2498 if (rc) { 2499 dev_err(dev, "Can not reserve msix vectors\n"); 2500 return rc; 2501 } 2502 2503 ena_setup_mgmnt_intr(adapter); 2504 2505 rc = ena_request_mgmnt_irq(adapter); 2506 if (rc) { 2507 dev_err(dev, "Can not setup management interrupts\n"); 2508 goto err_disable_msix; 2509 } 2510 2511 ena_com_set_admin_polling_mode(ena_dev, false); 2512 2513 ena_com_admin_aenq_enable(ena_dev); 2514 2515 return 0; 2516 2517 err_disable_msix: 2518 ena_disable_msix(adapter); 2519 2520 return rc; 2521 } 2522 2523 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 2524 { 2525 struct net_device *netdev = adapter->netdev; 2526 struct ena_com_dev *ena_dev = adapter->ena_dev; 2527 bool dev_up; 2528 2529 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2530 return; 2531 2532 netif_carrier_off(netdev); 2533 2534 del_timer_sync(&adapter->timer_service); 2535 2536 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2537 adapter->dev_up_before_reset = dev_up; 2538 2539 if (!graceful) 2540 ena_com_set_admin_running_state(ena_dev, false); 2541 2542 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2543 ena_down(adapter); 2544 2545 /* Before releasing the ENA resources, a device reset is required. 2546 * (to prevent the device from accessing them). 2547 * In case the reset flag is set and the device is up, ena_down() 2548 * already perform the reset, so it can be skipped. 2549 */ 2550 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 2551 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2552 2553 ena_free_mgmnt_irq(adapter); 2554 2555 ena_disable_msix(adapter); 2556 2557 ena_com_abort_admin_commands(ena_dev); 2558 2559 ena_com_wait_for_abort_completion(ena_dev); 2560 2561 ena_com_admin_destroy(ena_dev); 2562 2563 ena_com_mmio_reg_read_request_destroy(ena_dev); 2564 2565 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 2566 2567 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2568 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2569 } 2570 2571 static int ena_restore_device(struct ena_adapter *adapter) 2572 { 2573 struct ena_com_dev_get_features_ctx get_feat_ctx; 2574 struct ena_com_dev *ena_dev = adapter->ena_dev; 2575 struct pci_dev *pdev = adapter->pdev; 2576 bool wd_state; 2577 int rc; 2578 2579 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2580 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 2581 if (rc) { 2582 dev_err(&pdev->dev, "Can not initialize device\n"); 2583 goto err; 2584 } 2585 adapter->wd_state = wd_state; 2586 2587 rc = ena_device_validate_params(adapter, &get_feat_ctx); 2588 if (rc) { 2589 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 2590 goto err_device_destroy; 2591 } 2592 2593 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2594 /* Make sure we don't have a race with AENQ Links state handler */ 2595 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2596 netif_carrier_on(adapter->netdev); 2597 2598 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 2599 adapter->num_queues); 2600 if (rc) { 2601 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 2602 goto err_device_destroy; 2603 } 2604 /* If the interface was up before the reset bring it up */ 2605 if (adapter->dev_up_before_reset) { 2606 rc = ena_up(adapter); 2607 if (rc) { 2608 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 2609 goto err_disable_msix; 2610 } 2611 } 2612 2613 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2614 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 2615 dev_err(&pdev->dev, "Device reset completed successfully\n"); 2616 2617 return rc; 2618 err_disable_msix: 2619 ena_free_mgmnt_irq(adapter); 2620 ena_disable_msix(adapter); 2621 err_device_destroy: 2622 ena_com_admin_destroy(ena_dev); 2623 err: 2624 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 2625 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 2626 dev_err(&pdev->dev, 2627 "Reset attempt failed. Can not reset the device\n"); 2628 2629 return rc; 2630 } 2631 2632 static void ena_fw_reset_device(struct work_struct *work) 2633 { 2634 struct ena_adapter *adapter = 2635 container_of(work, struct ena_adapter, reset_task); 2636 struct pci_dev *pdev = adapter->pdev; 2637 2638 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2639 dev_err(&pdev->dev, 2640 "device reset schedule while reset bit is off\n"); 2641 return; 2642 } 2643 rtnl_lock(); 2644 ena_destroy_device(adapter, false); 2645 ena_restore_device(adapter); 2646 rtnl_unlock(); 2647 } 2648 2649 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 2650 struct ena_ring *rx_ring) 2651 { 2652 if (likely(rx_ring->first_interrupt)) 2653 return 0; 2654 2655 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 2656 return 0; 2657 2658 rx_ring->no_interrupt_event_cnt++; 2659 2660 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 2661 netif_err(adapter, rx_err, adapter->netdev, 2662 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 2663 rx_ring->qid); 2664 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 2665 smp_mb__before_atomic(); 2666 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2667 return -EIO; 2668 } 2669 2670 return 0; 2671 } 2672 2673 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 2674 struct ena_ring *tx_ring) 2675 { 2676 struct ena_tx_buffer *tx_buf; 2677 unsigned long last_jiffies; 2678 u32 missed_tx = 0; 2679 int i, rc = 0; 2680 2681 for (i = 0; i < tx_ring->ring_size; i++) { 2682 tx_buf = &tx_ring->tx_buffer_info[i]; 2683 last_jiffies = tx_buf->last_jiffies; 2684 2685 if (last_jiffies == 0) 2686 /* no pending Tx at this location */ 2687 continue; 2688 2689 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 2690 2 * adapter->missing_tx_completion_to))) { 2691 /* If after graceful period interrupt is still not 2692 * received, we schedule a reset 2693 */ 2694 netif_err(adapter, tx_err, adapter->netdev, 2695 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 2696 tx_ring->qid); 2697 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 2698 smp_mb__before_atomic(); 2699 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2700 return -EIO; 2701 } 2702 2703 if (unlikely(time_is_before_jiffies(last_jiffies + 2704 adapter->missing_tx_completion_to))) { 2705 if (!tx_buf->print_once) 2706 netif_notice(adapter, tx_err, adapter->netdev, 2707 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 2708 tx_ring->qid, i); 2709 2710 tx_buf->print_once = 1; 2711 missed_tx++; 2712 } 2713 } 2714 2715 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 2716 netif_err(adapter, tx_err, adapter->netdev, 2717 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 2718 missed_tx, 2719 adapter->missing_tx_completion_threshold); 2720 adapter->reset_reason = 2721 ENA_REGS_RESET_MISS_TX_CMPL; 2722 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2723 rc = -EIO; 2724 } 2725 2726 u64_stats_update_begin(&tx_ring->syncp); 2727 tx_ring->tx_stats.missed_tx = missed_tx; 2728 u64_stats_update_end(&tx_ring->syncp); 2729 2730 return rc; 2731 } 2732 2733 static void check_for_missing_completions(struct ena_adapter *adapter) 2734 { 2735 struct ena_ring *tx_ring; 2736 struct ena_ring *rx_ring; 2737 int i, budget, rc; 2738 2739 /* Make sure the driver doesn't turn the device in other process */ 2740 smp_rmb(); 2741 2742 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2743 return; 2744 2745 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 2746 return; 2747 2748 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 2749 return; 2750 2751 budget = ENA_MONITORED_TX_QUEUES; 2752 2753 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) { 2754 tx_ring = &adapter->tx_ring[i]; 2755 rx_ring = &adapter->rx_ring[i]; 2756 2757 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 2758 if (unlikely(rc)) 2759 return; 2760 2761 rc = check_for_rx_interrupt_queue(adapter, rx_ring); 2762 if (unlikely(rc)) 2763 return; 2764 2765 budget--; 2766 if (!budget) 2767 break; 2768 } 2769 2770 adapter->last_monitored_tx_qid = i % adapter->num_queues; 2771 } 2772 2773 /* trigger napi schedule after 2 consecutive detections */ 2774 #define EMPTY_RX_REFILL 2 2775 /* For the rare case where the device runs out of Rx descriptors and the 2776 * napi handler failed to refill new Rx descriptors (due to a lack of memory 2777 * for example). 2778 * This case will lead to a deadlock: 2779 * The device won't send interrupts since all the new Rx packets will be dropped 2780 * The napi handler won't allocate new Rx descriptors so the device will be 2781 * able to send new packets. 2782 * 2783 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 2784 * It is recommended to have at least 512MB, with a minimum of 128MB for 2785 * constrained environment). 2786 * 2787 * When such a situation is detected - Reschedule napi 2788 */ 2789 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 2790 { 2791 struct ena_ring *rx_ring; 2792 int i, refill_required; 2793 2794 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2795 return; 2796 2797 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 2798 return; 2799 2800 for (i = 0; i < adapter->num_queues; i++) { 2801 rx_ring = &adapter->rx_ring[i]; 2802 2803 refill_required = 2804 ena_com_sq_empty_space(rx_ring->ena_com_io_sq); 2805 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 2806 rx_ring->empty_rx_queue++; 2807 2808 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 2809 u64_stats_update_begin(&rx_ring->syncp); 2810 rx_ring->rx_stats.empty_rx_ring++; 2811 u64_stats_update_end(&rx_ring->syncp); 2812 2813 netif_err(adapter, drv, adapter->netdev, 2814 "trigger refill for ring %d\n", i); 2815 2816 napi_schedule(rx_ring->napi); 2817 rx_ring->empty_rx_queue = 0; 2818 } 2819 } else { 2820 rx_ring->empty_rx_queue = 0; 2821 } 2822 } 2823 } 2824 2825 /* Check for keep alive expiration */ 2826 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 2827 { 2828 unsigned long keep_alive_expired; 2829 2830 if (!adapter->wd_state) 2831 return; 2832 2833 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2834 return; 2835 2836 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies + 2837 adapter->keep_alive_timeout); 2838 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 2839 netif_err(adapter, drv, adapter->netdev, 2840 "Keep alive watchdog timeout.\n"); 2841 u64_stats_update_begin(&adapter->syncp); 2842 adapter->dev_stats.wd_expired++; 2843 u64_stats_update_end(&adapter->syncp); 2844 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 2845 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2846 } 2847 } 2848 2849 static void check_for_admin_com_state(struct ena_adapter *adapter) 2850 { 2851 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 2852 netif_err(adapter, drv, adapter->netdev, 2853 "ENA admin queue is not in running state!\n"); 2854 u64_stats_update_begin(&adapter->syncp); 2855 adapter->dev_stats.admin_q_pause++; 2856 u64_stats_update_end(&adapter->syncp); 2857 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 2858 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 2859 } 2860 } 2861 2862 static void ena_update_hints(struct ena_adapter *adapter, 2863 struct ena_admin_ena_hw_hints *hints) 2864 { 2865 struct net_device *netdev = adapter->netdev; 2866 2867 if (hints->admin_completion_tx_timeout) 2868 adapter->ena_dev->admin_queue.completion_timeout = 2869 hints->admin_completion_tx_timeout * 1000; 2870 2871 if (hints->mmio_read_timeout) 2872 /* convert to usec */ 2873 adapter->ena_dev->mmio_read.reg_read_to = 2874 hints->mmio_read_timeout * 1000; 2875 2876 if (hints->missed_tx_completion_count_threshold_to_reset) 2877 adapter->missing_tx_completion_threshold = 2878 hints->missed_tx_completion_count_threshold_to_reset; 2879 2880 if (hints->missing_tx_completion_timeout) { 2881 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2882 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 2883 else 2884 adapter->missing_tx_completion_to = 2885 msecs_to_jiffies(hints->missing_tx_completion_timeout); 2886 } 2887 2888 if (hints->netdev_wd_timeout) 2889 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 2890 2891 if (hints->driver_watchdog_timeout) { 2892 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 2893 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 2894 else 2895 adapter->keep_alive_timeout = 2896 msecs_to_jiffies(hints->driver_watchdog_timeout); 2897 } 2898 } 2899 2900 static void ena_update_host_info(struct ena_admin_host_info *host_info, 2901 struct net_device *netdev) 2902 { 2903 host_info->supported_network_features[0] = 2904 netdev->features & GENMASK_ULL(31, 0); 2905 host_info->supported_network_features[1] = 2906 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 2907 } 2908 2909 static void ena_timer_service(struct timer_list *t) 2910 { 2911 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 2912 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 2913 struct ena_admin_host_info *host_info = 2914 adapter->ena_dev->host_attr.host_info; 2915 2916 check_for_missing_keep_alive(adapter); 2917 2918 check_for_admin_com_state(adapter); 2919 2920 check_for_missing_completions(adapter); 2921 2922 check_for_empty_rx_ring(adapter); 2923 2924 if (debug_area) 2925 ena_dump_stats_to_buf(adapter, debug_area); 2926 2927 if (host_info) 2928 ena_update_host_info(host_info, adapter->netdev); 2929 2930 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2931 netif_err(adapter, drv, adapter->netdev, 2932 "Trigger reset is on\n"); 2933 ena_dump_stats_to_dmesg(adapter); 2934 queue_work(ena_wq, &adapter->reset_task); 2935 return; 2936 } 2937 2938 /* Reset the timer */ 2939 mod_timer(&adapter->timer_service, jiffies + HZ); 2940 } 2941 2942 static int ena_calc_io_queue_num(struct pci_dev *pdev, 2943 struct ena_com_dev *ena_dev, 2944 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2945 { 2946 int io_sq_num, io_queue_num; 2947 2948 /* In case of LLQ use the llq number in the get feature cmd */ 2949 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2950 io_sq_num = get_feat_ctx->max_queues.max_llq_num; 2951 2952 if (io_sq_num == 0) { 2953 dev_err(&pdev->dev, 2954 "Trying to use LLQ but llq_num is 0. Fall back into regular queues\n"); 2955 2956 ena_dev->tx_mem_queue_type = 2957 ENA_ADMIN_PLACEMENT_POLICY_HOST; 2958 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2959 } 2960 } else { 2961 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2962 } 2963 2964 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 2965 io_queue_num = min_t(int, io_queue_num, io_sq_num); 2966 io_queue_num = min_t(int, io_queue_num, 2967 get_feat_ctx->max_queues.max_cq_num); 2968 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 2969 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1); 2970 if (unlikely(!io_queue_num)) { 2971 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 2972 return -EFAULT; 2973 } 2974 2975 return io_queue_num; 2976 } 2977 2978 static void ena_set_push_mode(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 2979 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2980 { 2981 bool has_mem_bar; 2982 2983 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR); 2984 2985 /* Enable push mode if device supports LLQ */ 2986 if (has_mem_bar && (get_feat_ctx->max_queues.max_llq_num > 0)) 2987 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV; 2988 else 2989 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2990 } 2991 2992 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 2993 struct net_device *netdev) 2994 { 2995 netdev_features_t dev_features = 0; 2996 2997 /* Set offload features */ 2998 if (feat->offload.tx & 2999 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 3000 dev_features |= NETIF_F_IP_CSUM; 3001 3002 if (feat->offload.tx & 3003 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 3004 dev_features |= NETIF_F_IPV6_CSUM; 3005 3006 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 3007 dev_features |= NETIF_F_TSO; 3008 3009 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 3010 dev_features |= NETIF_F_TSO6; 3011 3012 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 3013 dev_features |= NETIF_F_TSO_ECN; 3014 3015 if (feat->offload.rx_supported & 3016 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 3017 dev_features |= NETIF_F_RXCSUM; 3018 3019 if (feat->offload.rx_supported & 3020 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 3021 dev_features |= NETIF_F_RXCSUM; 3022 3023 netdev->features = 3024 dev_features | 3025 NETIF_F_SG | 3026 NETIF_F_RXHASH | 3027 NETIF_F_HIGHDMA; 3028 3029 netdev->hw_features |= netdev->features; 3030 netdev->vlan_features |= netdev->features; 3031 } 3032 3033 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 3034 struct ena_com_dev_get_features_ctx *feat) 3035 { 3036 struct net_device *netdev = adapter->netdev; 3037 3038 /* Copy mac address */ 3039 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 3040 eth_hw_addr_random(netdev); 3041 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 3042 } else { 3043 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 3044 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 3045 } 3046 3047 /* Set offload features */ 3048 ena_set_dev_offloads(feat, netdev); 3049 3050 adapter->max_mtu = feat->dev_attr.max_mtu; 3051 netdev->max_mtu = adapter->max_mtu; 3052 netdev->min_mtu = ENA_MIN_MTU; 3053 } 3054 3055 static int ena_rss_init_default(struct ena_adapter *adapter) 3056 { 3057 struct ena_com_dev *ena_dev = adapter->ena_dev; 3058 struct device *dev = &adapter->pdev->dev; 3059 int rc, i; 3060 u32 val; 3061 3062 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 3063 if (unlikely(rc)) { 3064 dev_err(dev, "Cannot init indirect table\n"); 3065 goto err_rss_init; 3066 } 3067 3068 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 3069 val = ethtool_rxfh_indir_default(i, adapter->num_queues); 3070 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 3071 ENA_IO_RXQ_IDX(val)); 3072 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3073 dev_err(dev, "Cannot fill indirect table\n"); 3074 goto err_fill_indir; 3075 } 3076 } 3077 3078 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3079 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3080 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3081 dev_err(dev, "Cannot fill hash function\n"); 3082 goto err_fill_indir; 3083 } 3084 3085 rc = ena_com_set_default_hash_ctrl(ena_dev); 3086 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 3087 dev_err(dev, "Cannot fill hash control\n"); 3088 goto err_fill_indir; 3089 } 3090 3091 return 0; 3092 3093 err_fill_indir: 3094 ena_com_rss_destroy(ena_dev); 3095 err_rss_init: 3096 3097 return rc; 3098 } 3099 3100 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3101 { 3102 int release_bars; 3103 3104 if (ena_dev->mem_bar) 3105 devm_iounmap(&pdev->dev, ena_dev->mem_bar); 3106 3107 if (ena_dev->reg_bar) 3108 devm_iounmap(&pdev->dev, ena_dev->reg_bar); 3109 3110 release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 3111 pci_release_selected_regions(pdev, release_bars); 3112 } 3113 3114 static int ena_calc_queue_size(struct pci_dev *pdev, 3115 struct ena_com_dev *ena_dev, 3116 u16 *max_tx_sgl_size, 3117 u16 *max_rx_sgl_size, 3118 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3119 { 3120 u32 queue_size = ENA_DEFAULT_RING_SIZE; 3121 3122 queue_size = min_t(u32, queue_size, 3123 get_feat_ctx->max_queues.max_cq_depth); 3124 queue_size = min_t(u32, queue_size, 3125 get_feat_ctx->max_queues.max_sq_depth); 3126 3127 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3128 queue_size = min_t(u32, queue_size, 3129 get_feat_ctx->max_queues.max_llq_depth); 3130 3131 queue_size = rounddown_pow_of_two(queue_size); 3132 3133 if (unlikely(!queue_size)) { 3134 dev_err(&pdev->dev, "Invalid queue size\n"); 3135 return -EFAULT; 3136 } 3137 3138 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3139 get_feat_ctx->max_queues.max_packet_tx_descs); 3140 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 3141 get_feat_ctx->max_queues.max_packet_rx_descs); 3142 3143 return queue_size; 3144 } 3145 3146 /* ena_probe - Device Initialization Routine 3147 * @pdev: PCI device information struct 3148 * @ent: entry in ena_pci_tbl 3149 * 3150 * Returns 0 on success, negative on failure 3151 * 3152 * ena_probe initializes an adapter identified by a pci_dev structure. 3153 * The OS initialization, configuring of the adapter private structure, 3154 * and a hardware reset occur. 3155 */ 3156 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3157 { 3158 struct ena_com_dev_get_features_ctx get_feat_ctx; 3159 static int version_printed; 3160 struct net_device *netdev; 3161 struct ena_adapter *adapter; 3162 struct ena_com_dev *ena_dev = NULL; 3163 static int adapters_found; 3164 int io_queue_num, bars, rc; 3165 int queue_size; 3166 u16 tx_sgl_size = 0; 3167 u16 rx_sgl_size = 0; 3168 bool wd_state; 3169 3170 dev_dbg(&pdev->dev, "%s\n", __func__); 3171 3172 if (version_printed++ == 0) 3173 dev_info(&pdev->dev, "%s", version); 3174 3175 rc = pci_enable_device_mem(pdev); 3176 if (rc) { 3177 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 3178 return rc; 3179 } 3180 3181 pci_set_master(pdev); 3182 3183 ena_dev = vzalloc(sizeof(*ena_dev)); 3184 if (!ena_dev) { 3185 rc = -ENOMEM; 3186 goto err_disable_device; 3187 } 3188 3189 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 3190 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 3191 if (rc) { 3192 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 3193 rc); 3194 goto err_free_ena_dev; 3195 } 3196 3197 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 3198 pci_resource_start(pdev, ENA_REG_BAR), 3199 pci_resource_len(pdev, ENA_REG_BAR)); 3200 if (!ena_dev->reg_bar) { 3201 dev_err(&pdev->dev, "failed to remap regs bar\n"); 3202 rc = -EFAULT; 3203 goto err_free_region; 3204 } 3205 3206 ena_dev->dmadev = &pdev->dev; 3207 3208 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 3209 if (rc) { 3210 dev_err(&pdev->dev, "ena device init failed\n"); 3211 if (rc == -ETIME) 3212 rc = -EPROBE_DEFER; 3213 goto err_free_region; 3214 } 3215 3216 ena_set_push_mode(pdev, ena_dev, &get_feat_ctx); 3217 3218 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3219 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3220 pci_resource_start(pdev, ENA_MEM_BAR), 3221 pci_resource_len(pdev, ENA_MEM_BAR)); 3222 if (!ena_dev->mem_bar) { 3223 rc = -EFAULT; 3224 goto err_device_destroy; 3225 } 3226 } 3227 3228 /* initial Tx interrupt delay, Assumes 1 usec granularity. 3229 * Updated during device initialization with the real granularity 3230 */ 3231 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 3232 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx); 3233 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size, 3234 &rx_sgl_size, &get_feat_ctx); 3235 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3236 rc = -EFAULT; 3237 goto err_device_destroy; 3238 } 3239 3240 dev_info(&pdev->dev, "creating %d io queues. queue size: %d\n", 3241 io_queue_num, queue_size); 3242 3243 /* dev zeroed in init_etherdev */ 3244 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num); 3245 if (!netdev) { 3246 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 3247 rc = -ENOMEM; 3248 goto err_device_destroy; 3249 } 3250 3251 SET_NETDEV_DEV(netdev, &pdev->dev); 3252 3253 adapter = netdev_priv(netdev); 3254 pci_set_drvdata(pdev, adapter); 3255 3256 adapter->ena_dev = ena_dev; 3257 adapter->netdev = netdev; 3258 adapter->pdev = pdev; 3259 3260 ena_set_conf_feat_params(adapter, &get_feat_ctx); 3261 3262 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3263 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3264 3265 adapter->tx_ring_size = queue_size; 3266 adapter->rx_ring_size = queue_size; 3267 3268 adapter->max_tx_sgl_size = tx_sgl_size; 3269 adapter->max_rx_sgl_size = rx_sgl_size; 3270 3271 adapter->num_queues = io_queue_num; 3272 adapter->last_monitored_tx_qid = 0; 3273 3274 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 3275 adapter->wd_state = wd_state; 3276 3277 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 3278 3279 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 3280 if (rc) { 3281 dev_err(&pdev->dev, 3282 "Failed to query interrupt moderation feature\n"); 3283 goto err_netdev_destroy; 3284 } 3285 ena_init_io_rings(adapter); 3286 3287 netdev->netdev_ops = &ena_netdev_ops; 3288 netdev->watchdog_timeo = TX_TIMEOUT; 3289 ena_set_ethtool_ops(netdev); 3290 3291 netdev->priv_flags |= IFF_UNICAST_FLT; 3292 3293 u64_stats_init(&adapter->syncp); 3294 3295 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3296 if (rc) { 3297 dev_err(&pdev->dev, 3298 "Failed to enable and set the admin interrupts\n"); 3299 goto err_worker_destroy; 3300 } 3301 rc = ena_rss_init_default(adapter); 3302 if (rc && (rc != -EOPNOTSUPP)) { 3303 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 3304 goto err_free_msix; 3305 } 3306 3307 ena_config_debug_area(adapter); 3308 3309 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 3310 3311 netif_carrier_off(netdev); 3312 3313 rc = register_netdev(netdev); 3314 if (rc) { 3315 dev_err(&pdev->dev, "Cannot register net device\n"); 3316 goto err_rss; 3317 } 3318 3319 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 3320 3321 adapter->last_keep_alive_jiffies = jiffies; 3322 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 3323 adapter->missing_tx_completion_to = TX_TIMEOUT; 3324 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 3325 3326 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 3327 3328 timer_setup(&adapter->timer_service, ena_timer_service, 0); 3329 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3330 3331 dev_info(&pdev->dev, "%s found at mem %lx, mac addr %pM Queues %d\n", 3332 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 3333 netdev->dev_addr, io_queue_num); 3334 3335 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3336 3337 adapters_found++; 3338 3339 return 0; 3340 3341 err_rss: 3342 ena_com_delete_debug_area(ena_dev); 3343 ena_com_rss_destroy(ena_dev); 3344 err_free_msix: 3345 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 3346 ena_free_mgmnt_irq(adapter); 3347 ena_disable_msix(adapter); 3348 err_worker_destroy: 3349 ena_com_destroy_interrupt_moderation(ena_dev); 3350 del_timer(&adapter->timer_service); 3351 err_netdev_destroy: 3352 free_netdev(netdev); 3353 err_device_destroy: 3354 ena_com_delete_host_info(ena_dev); 3355 ena_com_admin_destroy(ena_dev); 3356 err_free_region: 3357 ena_release_bars(ena_dev, pdev); 3358 err_free_ena_dev: 3359 vfree(ena_dev); 3360 err_disable_device: 3361 pci_disable_device(pdev); 3362 return rc; 3363 } 3364 3365 /*****************************************************************************/ 3366 3367 /* ena_remove - Device Removal Routine 3368 * @pdev: PCI device information struct 3369 * 3370 * ena_remove is called by the PCI subsystem to alert the driver 3371 * that it should release a PCI device. 3372 */ 3373 static void ena_remove(struct pci_dev *pdev) 3374 { 3375 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3376 struct ena_com_dev *ena_dev; 3377 struct net_device *netdev; 3378 3379 ena_dev = adapter->ena_dev; 3380 netdev = adapter->netdev; 3381 3382 #ifdef CONFIG_RFS_ACCEL 3383 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 3384 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 3385 netdev->rx_cpu_rmap = NULL; 3386 } 3387 #endif /* CONFIG_RFS_ACCEL */ 3388 del_timer_sync(&adapter->timer_service); 3389 3390 cancel_work_sync(&adapter->reset_task); 3391 3392 unregister_netdev(netdev); 3393 3394 /* If the device is running then we want to make sure the device will be 3395 * reset to make sure no more events will be issued by the device. 3396 */ 3397 if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3398 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3399 3400 rtnl_lock(); 3401 ena_destroy_device(adapter, true); 3402 rtnl_unlock(); 3403 3404 free_netdev(netdev); 3405 3406 ena_com_rss_destroy(ena_dev); 3407 3408 ena_com_delete_debug_area(ena_dev); 3409 3410 ena_com_delete_host_info(ena_dev); 3411 3412 ena_release_bars(ena_dev, pdev); 3413 3414 pci_disable_device(pdev); 3415 3416 ena_com_destroy_interrupt_moderation(ena_dev); 3417 3418 vfree(ena_dev); 3419 } 3420 3421 #ifdef CONFIG_PM 3422 /* ena_suspend - PM suspend callback 3423 * @pdev: PCI device information struct 3424 * @state:power state 3425 */ 3426 static int ena_suspend(struct pci_dev *pdev, pm_message_t state) 3427 { 3428 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3429 3430 u64_stats_update_begin(&adapter->syncp); 3431 adapter->dev_stats.suspend++; 3432 u64_stats_update_end(&adapter->syncp); 3433 3434 rtnl_lock(); 3435 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3436 dev_err(&pdev->dev, 3437 "ignoring device reset request as the device is being suspended\n"); 3438 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3439 } 3440 ena_destroy_device(adapter, true); 3441 rtnl_unlock(); 3442 return 0; 3443 } 3444 3445 /* ena_resume - PM resume callback 3446 * @pdev: PCI device information struct 3447 * 3448 */ 3449 static int ena_resume(struct pci_dev *pdev) 3450 { 3451 struct ena_adapter *adapter = pci_get_drvdata(pdev); 3452 int rc; 3453 3454 u64_stats_update_begin(&adapter->syncp); 3455 adapter->dev_stats.resume++; 3456 u64_stats_update_end(&adapter->syncp); 3457 3458 rtnl_lock(); 3459 rc = ena_restore_device(adapter); 3460 rtnl_unlock(); 3461 return rc; 3462 } 3463 #endif 3464 3465 static struct pci_driver ena_pci_driver = { 3466 .name = DRV_MODULE_NAME, 3467 .id_table = ena_pci_tbl, 3468 .probe = ena_probe, 3469 .remove = ena_remove, 3470 #ifdef CONFIG_PM 3471 .suspend = ena_suspend, 3472 .resume = ena_resume, 3473 #endif 3474 .sriov_configure = pci_sriov_configure_simple, 3475 }; 3476 3477 static int __init ena_init(void) 3478 { 3479 pr_info("%s", version); 3480 3481 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 3482 if (!ena_wq) { 3483 pr_err("Failed to create workqueue\n"); 3484 return -ENOMEM; 3485 } 3486 3487 return pci_register_driver(&ena_pci_driver); 3488 } 3489 3490 static void __exit ena_cleanup(void) 3491 { 3492 pci_unregister_driver(&ena_pci_driver); 3493 3494 if (ena_wq) { 3495 destroy_workqueue(ena_wq); 3496 ena_wq = NULL; 3497 } 3498 } 3499 3500 /****************************************************************************** 3501 ******************************** AENQ Handlers ******************************* 3502 *****************************************************************************/ 3503 /* ena_update_on_link_change: 3504 * Notify the network interface about the change in link status 3505 */ 3506 static void ena_update_on_link_change(void *adapter_data, 3507 struct ena_admin_aenq_entry *aenq_e) 3508 { 3509 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3510 struct ena_admin_aenq_link_change_desc *aenq_desc = 3511 (struct ena_admin_aenq_link_change_desc *)aenq_e; 3512 int status = aenq_desc->flags & 3513 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3514 3515 if (status) { 3516 netdev_dbg(adapter->netdev, "%s\n", __func__); 3517 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 3518 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 3519 netif_carrier_on(adapter->netdev); 3520 } else { 3521 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 3522 netif_carrier_off(adapter->netdev); 3523 } 3524 } 3525 3526 static void ena_keep_alive_wd(void *adapter_data, 3527 struct ena_admin_aenq_entry *aenq_e) 3528 { 3529 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3530 struct ena_admin_aenq_keep_alive_desc *desc; 3531 u64 rx_drops; 3532 3533 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 3534 adapter->last_keep_alive_jiffies = jiffies; 3535 3536 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 3537 3538 u64_stats_update_begin(&adapter->syncp); 3539 adapter->dev_stats.rx_drops = rx_drops; 3540 u64_stats_update_end(&adapter->syncp); 3541 } 3542 3543 static void ena_notification(void *adapter_data, 3544 struct ena_admin_aenq_entry *aenq_e) 3545 { 3546 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3547 struct ena_admin_ena_hw_hints *hints; 3548 3549 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 3550 "Invalid group(%x) expected %x\n", 3551 aenq_e->aenq_common_desc.group, 3552 ENA_ADMIN_NOTIFICATION); 3553 3554 switch (aenq_e->aenq_common_desc.syndrom) { 3555 case ENA_ADMIN_UPDATE_HINTS: 3556 hints = (struct ena_admin_ena_hw_hints *) 3557 (&aenq_e->inline_data_w4); 3558 ena_update_hints(adapter, hints); 3559 break; 3560 default: 3561 netif_err(adapter, drv, adapter->netdev, 3562 "Invalid aenq notification link state %d\n", 3563 aenq_e->aenq_common_desc.syndrom); 3564 } 3565 } 3566 3567 /* This handler will called for unknown event group or unimplemented handlers*/ 3568 static void unimplemented_aenq_handler(void *data, 3569 struct ena_admin_aenq_entry *aenq_e) 3570 { 3571 struct ena_adapter *adapter = (struct ena_adapter *)data; 3572 3573 netif_err(adapter, drv, adapter->netdev, 3574 "Unknown event was received or event with unimplemented handler\n"); 3575 } 3576 3577 static struct ena_aenq_handlers aenq_handlers = { 3578 .handlers = { 3579 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3580 [ENA_ADMIN_NOTIFICATION] = ena_notification, 3581 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3582 }, 3583 .unimplemented_handler = unimplemented_aenq_handler 3584 }; 3585 3586 module_init(ena_init); 3587 module_exit(ena_cleanup); 3588