1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define ENA_NAPI_BUDGET 64 35 36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 38 39 static struct ena_aenq_handlers aenq_handlers; 40 41 static struct workqueue_struct *ena_wq; 42 43 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 44 45 static int ena_rss_init_default(struct ena_adapter *adapter); 46 static void check_for_admin_com_state(struct ena_adapter *adapter); 47 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 48 static int ena_restore_device(struct ena_adapter *adapter); 49 50 static void ena_init_io_rings(struct ena_adapter *adapter, 51 int first_index, int count); 52 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 53 int count); 54 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 55 int count); 56 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 57 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 58 int first_index, 59 int count); 60 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 61 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 62 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 63 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 64 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 65 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 66 int first_index, int count); 67 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 68 int first_index, int count); 69 static int ena_up(struct ena_adapter *adapter); 70 static void ena_down(struct ena_adapter *adapter); 71 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 72 struct ena_ring *rx_ring); 73 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 74 struct ena_ring *rx_ring); 75 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 76 struct ena_tx_buffer *tx_info); 77 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 78 int first_index, int count); 79 80 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 81 static void ena_increase_stat(u64 *statp, u64 cnt, 82 struct u64_stats_sync *syncp) 83 { 84 u64_stats_update_begin(syncp); 85 (*statp) += cnt; 86 u64_stats_update_end(syncp); 87 } 88 89 static void ena_ring_tx_doorbell(struct ena_ring *tx_ring) 90 { 91 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 92 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp); 93 } 94 95 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 96 { 97 struct ena_adapter *adapter = netdev_priv(dev); 98 99 /* Change the state of the device to trigger reset 100 * Check that we are not in the middle or a trigger already 101 */ 102 103 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 104 return; 105 106 ena_reset_device(adapter, ENA_REGS_RESET_OS_NETDEV_WD); 107 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 108 109 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 110 } 111 112 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 113 { 114 int i; 115 116 for (i = 0; i < adapter->num_io_queues; i++) 117 adapter->rx_ring[i].mtu = mtu; 118 } 119 120 static int ena_change_mtu(struct net_device *dev, int new_mtu) 121 { 122 struct ena_adapter *adapter = netdev_priv(dev); 123 int ret; 124 125 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 126 if (!ret) { 127 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 128 update_rx_ring_mtu(adapter, new_mtu); 129 dev->mtu = new_mtu; 130 } else { 131 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 132 new_mtu); 133 } 134 135 return ret; 136 } 137 138 static int ena_xmit_common(struct net_device *dev, 139 struct ena_ring *ring, 140 struct ena_tx_buffer *tx_info, 141 struct ena_com_tx_ctx *ena_tx_ctx, 142 u16 next_to_use, 143 u32 bytes) 144 { 145 struct ena_adapter *adapter = netdev_priv(dev); 146 int rc, nb_hw_desc; 147 148 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 149 ena_tx_ctx))) { 150 netif_dbg(adapter, tx_queued, dev, 151 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 152 ring->qid); 153 ena_ring_tx_doorbell(ring); 154 } 155 156 /* prepare the packet's descriptors to dma engine */ 157 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 158 &nb_hw_desc); 159 160 /* In case there isn't enough space in the queue for the packet, 161 * we simply drop it. All other failure reasons of 162 * ena_com_prepare_tx() are fatal and therefore require a device reset. 163 */ 164 if (unlikely(rc)) { 165 netif_err(adapter, tx_queued, dev, 166 "Failed to prepare tx bufs\n"); 167 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 168 &ring->syncp); 169 if (rc != -ENOMEM) 170 ena_reset_device(adapter, 171 ENA_REGS_RESET_DRIVER_INVALID_STATE); 172 return rc; 173 } 174 175 u64_stats_update_begin(&ring->syncp); 176 ring->tx_stats.cnt++; 177 ring->tx_stats.bytes += bytes; 178 u64_stats_update_end(&ring->syncp); 179 180 tx_info->tx_descs = nb_hw_desc; 181 tx_info->last_jiffies = jiffies; 182 tx_info->print_once = 0; 183 184 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 185 ring->ring_size); 186 return 0; 187 } 188 189 /* This is the XDP napi callback. XDP queues use a separate napi callback 190 * than Rx/Tx queues. 191 */ 192 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 193 { 194 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 195 u32 xdp_work_done, xdp_budget; 196 struct ena_ring *xdp_ring; 197 int napi_comp_call = 0; 198 int ret; 199 200 xdp_ring = ena_napi->xdp_ring; 201 202 xdp_budget = budget; 203 204 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 205 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 206 napi_complete_done(napi, 0); 207 return 0; 208 } 209 210 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 211 212 /* If the device is about to reset or down, avoid unmask 213 * the interrupt and return 0 so NAPI won't reschedule 214 */ 215 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 216 napi_complete_done(napi, 0); 217 ret = 0; 218 } else if (xdp_budget > xdp_work_done) { 219 napi_comp_call = 1; 220 if (napi_complete_done(napi, xdp_work_done)) 221 ena_unmask_interrupt(xdp_ring, NULL); 222 ena_update_ring_numa_node(xdp_ring, NULL); 223 ret = xdp_work_done; 224 } else { 225 ret = xdp_budget; 226 } 227 228 u64_stats_update_begin(&xdp_ring->syncp); 229 xdp_ring->tx_stats.napi_comp += napi_comp_call; 230 xdp_ring->tx_stats.tx_poll++; 231 u64_stats_update_end(&xdp_ring->syncp); 232 xdp_ring->tx_stats.last_napi_jiffies = jiffies; 233 234 return ret; 235 } 236 237 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 238 struct ena_tx_buffer *tx_info, 239 struct xdp_frame *xdpf, 240 struct ena_com_tx_ctx *ena_tx_ctx) 241 { 242 struct ena_adapter *adapter = xdp_ring->adapter; 243 struct ena_com_buf *ena_buf; 244 int push_len = 0; 245 dma_addr_t dma; 246 void *data; 247 u32 size; 248 249 tx_info->xdpf = xdpf; 250 data = tx_info->xdpf->data; 251 size = tx_info->xdpf->len; 252 253 if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 254 /* Designate part of the packet for LLQ */ 255 push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 256 257 ena_tx_ctx->push_header = data; 258 259 size -= push_len; 260 data += push_len; 261 } 262 263 ena_tx_ctx->header_len = push_len; 264 265 if (size > 0) { 266 dma = dma_map_single(xdp_ring->dev, 267 data, 268 size, 269 DMA_TO_DEVICE); 270 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 271 goto error_report_dma_error; 272 273 tx_info->map_linear_data = 0; 274 275 ena_buf = tx_info->bufs; 276 ena_buf->paddr = dma; 277 ena_buf->len = size; 278 279 ena_tx_ctx->ena_bufs = ena_buf; 280 ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1; 281 } 282 283 return 0; 284 285 error_report_dma_error: 286 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 287 &xdp_ring->syncp); 288 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 289 290 return -EINVAL; 291 } 292 293 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 294 struct net_device *dev, 295 struct xdp_frame *xdpf, 296 int flags) 297 { 298 struct ena_com_tx_ctx ena_tx_ctx = {}; 299 struct ena_tx_buffer *tx_info; 300 u16 next_to_use, req_id; 301 int rc; 302 303 next_to_use = xdp_ring->next_to_use; 304 req_id = xdp_ring->free_ids[next_to_use]; 305 tx_info = &xdp_ring->tx_buffer_info[req_id]; 306 tx_info->num_of_bufs = 0; 307 308 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx); 309 if (unlikely(rc)) 310 return rc; 311 312 ena_tx_ctx.req_id = req_id; 313 314 rc = ena_xmit_common(dev, 315 xdp_ring, 316 tx_info, 317 &ena_tx_ctx, 318 next_to_use, 319 xdpf->len); 320 if (rc) 321 goto error_unmap_dma; 322 323 /* trigger the dma engine. ena_ring_tx_doorbell() 324 * calls a memory barrier inside it. 325 */ 326 if (flags & XDP_XMIT_FLUSH) 327 ena_ring_tx_doorbell(xdp_ring); 328 329 return rc; 330 331 error_unmap_dma: 332 ena_unmap_tx_buff(xdp_ring, tx_info); 333 tx_info->xdpf = NULL; 334 return rc; 335 } 336 337 static int ena_xdp_xmit(struct net_device *dev, int n, 338 struct xdp_frame **frames, u32 flags) 339 { 340 struct ena_adapter *adapter = netdev_priv(dev); 341 struct ena_ring *xdp_ring; 342 int qid, i, nxmit = 0; 343 344 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 345 return -EINVAL; 346 347 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 348 return -ENETDOWN; 349 350 /* We assume that all rings have the same XDP program */ 351 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 352 return -ENXIO; 353 354 qid = smp_processor_id() % adapter->xdp_num_queues; 355 qid += adapter->xdp_first_ring; 356 xdp_ring = &adapter->tx_ring[qid]; 357 358 /* Other CPU ids might try to send thorugh this queue */ 359 spin_lock(&xdp_ring->xdp_tx_lock); 360 361 for (i = 0; i < n; i++) { 362 if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0)) 363 break; 364 nxmit++; 365 } 366 367 /* Ring doorbell to make device aware of the packets */ 368 if (flags & XDP_XMIT_FLUSH) 369 ena_ring_tx_doorbell(xdp_ring); 370 371 spin_unlock(&xdp_ring->xdp_tx_lock); 372 373 /* Return number of packets sent */ 374 return nxmit; 375 } 376 377 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 378 { 379 struct bpf_prog *xdp_prog; 380 struct ena_ring *xdp_ring; 381 u32 verdict = XDP_PASS; 382 struct xdp_frame *xdpf; 383 u64 *xdp_stat; 384 385 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 386 387 if (!xdp_prog) 388 goto out; 389 390 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 391 392 switch (verdict) { 393 case XDP_TX: 394 xdpf = xdp_convert_buff_to_frame(xdp); 395 if (unlikely(!xdpf)) { 396 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 397 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 398 verdict = XDP_ABORTED; 399 break; 400 } 401 402 /* Find xmit queue */ 403 xdp_ring = rx_ring->xdp_ring; 404 405 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 406 spin_lock(&xdp_ring->xdp_tx_lock); 407 408 if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, 409 XDP_XMIT_FLUSH)) 410 xdp_return_frame(xdpf); 411 412 spin_unlock(&xdp_ring->xdp_tx_lock); 413 xdp_stat = &rx_ring->rx_stats.xdp_tx; 414 break; 415 case XDP_REDIRECT: 416 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 417 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 418 break; 419 } 420 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 421 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 422 verdict = XDP_ABORTED; 423 break; 424 case XDP_ABORTED: 425 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 426 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 427 break; 428 case XDP_DROP: 429 xdp_stat = &rx_ring->rx_stats.xdp_drop; 430 break; 431 case XDP_PASS: 432 xdp_stat = &rx_ring->rx_stats.xdp_pass; 433 break; 434 default: 435 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, verdict); 436 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 437 } 438 439 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 440 out: 441 return verdict; 442 } 443 444 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 445 { 446 adapter->xdp_first_ring = adapter->num_io_queues; 447 adapter->xdp_num_queues = adapter->num_io_queues; 448 449 ena_init_io_rings(adapter, 450 adapter->xdp_first_ring, 451 adapter->xdp_num_queues); 452 } 453 454 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 455 { 456 int rc = 0; 457 458 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 459 adapter->xdp_num_queues); 460 if (rc) 461 goto setup_err; 462 463 rc = ena_create_io_tx_queues_in_range(adapter, 464 adapter->xdp_first_ring, 465 adapter->xdp_num_queues); 466 if (rc) 467 goto create_err; 468 469 return 0; 470 471 create_err: 472 ena_free_all_io_tx_resources(adapter); 473 setup_err: 474 return rc; 475 } 476 477 /* Provides a way for both kernel and bpf-prog to know 478 * more about the RX-queue a given XDP frame arrived on. 479 */ 480 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 481 { 482 int rc; 483 484 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 485 486 if (rc) { 487 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 488 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 489 rx_ring->qid, rc); 490 goto err; 491 } 492 493 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 494 NULL); 495 496 if (rc) { 497 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 498 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 499 rx_ring->qid, rc); 500 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 501 } 502 503 err: 504 return rc; 505 } 506 507 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 508 { 509 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 510 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 511 } 512 513 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 514 struct bpf_prog *prog, 515 int first, int count) 516 { 517 struct ena_ring *rx_ring; 518 int i = 0; 519 520 for (i = first; i < count; i++) { 521 rx_ring = &adapter->rx_ring[i]; 522 xchg(&rx_ring->xdp_bpf_prog, prog); 523 if (prog) { 524 ena_xdp_register_rxq_info(rx_ring); 525 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 526 } else { 527 ena_xdp_unregister_rxq_info(rx_ring); 528 rx_ring->rx_headroom = NET_SKB_PAD; 529 } 530 } 531 } 532 533 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 534 struct bpf_prog *prog) 535 { 536 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 537 538 ena_xdp_exchange_program_rx_in_range(adapter, 539 prog, 540 0, 541 adapter->num_io_queues); 542 543 if (old_bpf_prog) 544 bpf_prog_put(old_bpf_prog); 545 } 546 547 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 548 { 549 bool was_up; 550 int rc; 551 552 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 553 554 if (was_up) 555 ena_down(adapter); 556 557 adapter->xdp_first_ring = 0; 558 adapter->xdp_num_queues = 0; 559 ena_xdp_exchange_program(adapter, NULL); 560 if (was_up) { 561 rc = ena_up(adapter); 562 if (rc) 563 return rc; 564 } 565 return 0; 566 } 567 568 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 569 { 570 struct ena_adapter *adapter = netdev_priv(netdev); 571 struct bpf_prog *prog = bpf->prog; 572 struct bpf_prog *old_bpf_prog; 573 int rc, prev_mtu; 574 bool is_up; 575 576 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 577 rc = ena_xdp_allowed(adapter); 578 if (rc == ENA_XDP_ALLOWED) { 579 old_bpf_prog = adapter->xdp_bpf_prog; 580 if (prog) { 581 if (!is_up) { 582 ena_init_all_xdp_queues(adapter); 583 } else if (!old_bpf_prog) { 584 ena_down(adapter); 585 ena_init_all_xdp_queues(adapter); 586 } 587 ena_xdp_exchange_program(adapter, prog); 588 589 if (is_up && !old_bpf_prog) { 590 rc = ena_up(adapter); 591 if (rc) 592 return rc; 593 } 594 } else if (old_bpf_prog) { 595 rc = ena_destroy_and_free_all_xdp_queues(adapter); 596 if (rc) 597 return rc; 598 } 599 600 prev_mtu = netdev->max_mtu; 601 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 602 603 if (!old_bpf_prog) 604 netif_info(adapter, drv, adapter->netdev, 605 "XDP program is set, changing the max_mtu from %d to %d", 606 prev_mtu, netdev->max_mtu); 607 608 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 609 netif_err(adapter, drv, adapter->netdev, 610 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 611 netdev->mtu, ENA_XDP_MAX_MTU); 612 NL_SET_ERR_MSG_MOD(bpf->extack, 613 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 614 return -EINVAL; 615 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 616 netif_err(adapter, drv, adapter->netdev, 617 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 618 adapter->num_io_queues, adapter->max_num_io_queues); 619 NL_SET_ERR_MSG_MOD(bpf->extack, 620 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 621 return -EINVAL; 622 } 623 624 return 0; 625 } 626 627 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 628 * program as well as to query the current xdp program id. 629 */ 630 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 631 { 632 switch (bpf->command) { 633 case XDP_SETUP_PROG: 634 return ena_xdp_set(netdev, bpf); 635 default: 636 return -EINVAL; 637 } 638 return 0; 639 } 640 641 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 642 { 643 #ifdef CONFIG_RFS_ACCEL 644 u32 i; 645 int rc; 646 647 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 648 if (!adapter->netdev->rx_cpu_rmap) 649 return -ENOMEM; 650 for (i = 0; i < adapter->num_io_queues; i++) { 651 int irq_idx = ENA_IO_IRQ_IDX(i); 652 653 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 654 pci_irq_vector(adapter->pdev, irq_idx)); 655 if (rc) { 656 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 657 adapter->netdev->rx_cpu_rmap = NULL; 658 return rc; 659 } 660 } 661 #endif /* CONFIG_RFS_ACCEL */ 662 return 0; 663 } 664 665 static void ena_init_io_rings_common(struct ena_adapter *adapter, 666 struct ena_ring *ring, u16 qid) 667 { 668 ring->qid = qid; 669 ring->pdev = adapter->pdev; 670 ring->dev = &adapter->pdev->dev; 671 ring->netdev = adapter->netdev; 672 ring->napi = &adapter->ena_napi[qid].napi; 673 ring->adapter = adapter; 674 ring->ena_dev = adapter->ena_dev; 675 ring->per_napi_packets = 0; 676 ring->cpu = 0; 677 ring->no_interrupt_event_cnt = 0; 678 u64_stats_init(&ring->syncp); 679 } 680 681 static void ena_init_io_rings(struct ena_adapter *adapter, 682 int first_index, int count) 683 { 684 struct ena_com_dev *ena_dev; 685 struct ena_ring *txr, *rxr; 686 int i; 687 688 ena_dev = adapter->ena_dev; 689 690 for (i = first_index; i < first_index + count; i++) { 691 txr = &adapter->tx_ring[i]; 692 rxr = &adapter->rx_ring[i]; 693 694 /* TX common ring state */ 695 ena_init_io_rings_common(adapter, txr, i); 696 697 /* TX specific ring state */ 698 txr->ring_size = adapter->requested_tx_ring_size; 699 txr->tx_max_header_size = ena_dev->tx_max_header_size; 700 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 701 txr->sgl_size = adapter->max_tx_sgl_size; 702 txr->smoothed_interval = 703 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 704 txr->disable_meta_caching = adapter->disable_meta_caching; 705 spin_lock_init(&txr->xdp_tx_lock); 706 707 /* Don't init RX queues for xdp queues */ 708 if (!ENA_IS_XDP_INDEX(adapter, i)) { 709 /* RX common ring state */ 710 ena_init_io_rings_common(adapter, rxr, i); 711 712 /* RX specific ring state */ 713 rxr->ring_size = adapter->requested_rx_ring_size; 714 rxr->rx_copybreak = adapter->rx_copybreak; 715 rxr->sgl_size = adapter->max_rx_sgl_size; 716 rxr->smoothed_interval = 717 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 718 rxr->empty_rx_queue = 0; 719 rxr->rx_headroom = NET_SKB_PAD; 720 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 721 rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues]; 722 } 723 } 724 } 725 726 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 727 * @adapter: network interface device structure 728 * @qid: queue index 729 * 730 * Return 0 on success, negative on failure 731 */ 732 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 733 { 734 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 735 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 736 int size, i, node; 737 738 if (tx_ring->tx_buffer_info) { 739 netif_err(adapter, ifup, 740 adapter->netdev, "tx_buffer_info info is not NULL"); 741 return -EEXIST; 742 } 743 744 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 745 node = cpu_to_node(ena_irq->cpu); 746 747 tx_ring->tx_buffer_info = vzalloc_node(size, node); 748 if (!tx_ring->tx_buffer_info) { 749 tx_ring->tx_buffer_info = vzalloc(size); 750 if (!tx_ring->tx_buffer_info) 751 goto err_tx_buffer_info; 752 } 753 754 size = sizeof(u16) * tx_ring->ring_size; 755 tx_ring->free_ids = vzalloc_node(size, node); 756 if (!tx_ring->free_ids) { 757 tx_ring->free_ids = vzalloc(size); 758 if (!tx_ring->free_ids) 759 goto err_tx_free_ids; 760 } 761 762 size = tx_ring->tx_max_header_size; 763 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 764 if (!tx_ring->push_buf_intermediate_buf) { 765 tx_ring->push_buf_intermediate_buf = vzalloc(size); 766 if (!tx_ring->push_buf_intermediate_buf) 767 goto err_push_buf_intermediate_buf; 768 } 769 770 /* Req id ring for TX out of order completions */ 771 for (i = 0; i < tx_ring->ring_size; i++) 772 tx_ring->free_ids[i] = i; 773 774 /* Reset tx statistics */ 775 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 776 777 tx_ring->next_to_use = 0; 778 tx_ring->next_to_clean = 0; 779 tx_ring->cpu = ena_irq->cpu; 780 return 0; 781 782 err_push_buf_intermediate_buf: 783 vfree(tx_ring->free_ids); 784 tx_ring->free_ids = NULL; 785 err_tx_free_ids: 786 vfree(tx_ring->tx_buffer_info); 787 tx_ring->tx_buffer_info = NULL; 788 err_tx_buffer_info: 789 return -ENOMEM; 790 } 791 792 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 793 * @adapter: network interface device structure 794 * @qid: queue index 795 * 796 * Free all transmit software resources 797 */ 798 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 799 { 800 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 801 802 vfree(tx_ring->tx_buffer_info); 803 tx_ring->tx_buffer_info = NULL; 804 805 vfree(tx_ring->free_ids); 806 tx_ring->free_ids = NULL; 807 808 vfree(tx_ring->push_buf_intermediate_buf); 809 tx_ring->push_buf_intermediate_buf = NULL; 810 } 811 812 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 813 int first_index, 814 int count) 815 { 816 int i, rc = 0; 817 818 for (i = first_index; i < first_index + count; i++) { 819 rc = ena_setup_tx_resources(adapter, i); 820 if (rc) 821 goto err_setup_tx; 822 } 823 824 return 0; 825 826 err_setup_tx: 827 828 netif_err(adapter, ifup, adapter->netdev, 829 "Tx queue %d: allocation failed\n", i); 830 831 /* rewind the index freeing the rings as we go */ 832 while (first_index < i--) 833 ena_free_tx_resources(adapter, i); 834 return rc; 835 } 836 837 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 838 int first_index, int count) 839 { 840 int i; 841 842 for (i = first_index; i < first_index + count; i++) 843 ena_free_tx_resources(adapter, i); 844 } 845 846 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 847 * @adapter: board private structure 848 * 849 * Free all transmit software resources 850 */ 851 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 852 { 853 ena_free_all_io_tx_resources_in_range(adapter, 854 0, 855 adapter->xdp_num_queues + 856 adapter->num_io_queues); 857 } 858 859 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 860 * @adapter: network interface device structure 861 * @qid: queue index 862 * 863 * Returns 0 on success, negative on failure 864 */ 865 static int ena_setup_rx_resources(struct ena_adapter *adapter, 866 u32 qid) 867 { 868 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 869 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 870 int size, node, i; 871 872 if (rx_ring->rx_buffer_info) { 873 netif_err(adapter, ifup, adapter->netdev, 874 "rx_buffer_info is not NULL"); 875 return -EEXIST; 876 } 877 878 /* alloc extra element so in rx path 879 * we can always prefetch rx_info + 1 880 */ 881 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 882 node = cpu_to_node(ena_irq->cpu); 883 884 rx_ring->rx_buffer_info = vzalloc_node(size, node); 885 if (!rx_ring->rx_buffer_info) { 886 rx_ring->rx_buffer_info = vzalloc(size); 887 if (!rx_ring->rx_buffer_info) 888 return -ENOMEM; 889 } 890 891 size = sizeof(u16) * rx_ring->ring_size; 892 rx_ring->free_ids = vzalloc_node(size, node); 893 if (!rx_ring->free_ids) { 894 rx_ring->free_ids = vzalloc(size); 895 if (!rx_ring->free_ids) { 896 vfree(rx_ring->rx_buffer_info); 897 rx_ring->rx_buffer_info = NULL; 898 return -ENOMEM; 899 } 900 } 901 902 /* Req id ring for receiving RX pkts out of order */ 903 for (i = 0; i < rx_ring->ring_size; i++) 904 rx_ring->free_ids[i] = i; 905 906 /* Reset rx statistics */ 907 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 908 909 rx_ring->next_to_clean = 0; 910 rx_ring->next_to_use = 0; 911 rx_ring->cpu = ena_irq->cpu; 912 913 return 0; 914 } 915 916 /* ena_free_rx_resources - Free I/O Rx Resources 917 * @adapter: network interface device structure 918 * @qid: queue index 919 * 920 * Free all receive software resources 921 */ 922 static void ena_free_rx_resources(struct ena_adapter *adapter, 923 u32 qid) 924 { 925 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 926 927 vfree(rx_ring->rx_buffer_info); 928 rx_ring->rx_buffer_info = NULL; 929 930 vfree(rx_ring->free_ids); 931 rx_ring->free_ids = NULL; 932 } 933 934 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 935 * @adapter: board private structure 936 * 937 * Return 0 on success, negative on failure 938 */ 939 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 940 { 941 int i, rc = 0; 942 943 for (i = 0; i < adapter->num_io_queues; i++) { 944 rc = ena_setup_rx_resources(adapter, i); 945 if (rc) 946 goto err_setup_rx; 947 } 948 949 return 0; 950 951 err_setup_rx: 952 953 netif_err(adapter, ifup, adapter->netdev, 954 "Rx queue %d: allocation failed\n", i); 955 956 /* rewind the index freeing the rings as we go */ 957 while (i--) 958 ena_free_rx_resources(adapter, i); 959 return rc; 960 } 961 962 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 963 * @adapter: board private structure 964 * 965 * Free all receive software resources 966 */ 967 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 968 { 969 int i; 970 971 for (i = 0; i < adapter->num_io_queues; i++) 972 ena_free_rx_resources(adapter, i); 973 } 974 975 static struct page *ena_alloc_map_page(struct ena_ring *rx_ring, 976 dma_addr_t *dma) 977 { 978 struct page *page; 979 980 /* This would allocate the page on the same NUMA node the executing code 981 * is running on. 982 */ 983 page = dev_alloc_page(); 984 if (!page) { 985 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 986 &rx_ring->syncp); 987 return ERR_PTR(-ENOSPC); 988 } 989 990 /* To enable NIC-side port-mirroring, AKA SPAN port, 991 * we make the buffer readable from the nic as well 992 */ 993 *dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 994 DMA_BIDIRECTIONAL); 995 if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) { 996 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 997 &rx_ring->syncp); 998 __free_page(page); 999 return ERR_PTR(-EIO); 1000 } 1001 1002 return page; 1003 } 1004 1005 static int ena_alloc_rx_buffer(struct ena_ring *rx_ring, 1006 struct ena_rx_buffer *rx_info) 1007 { 1008 int headroom = rx_ring->rx_headroom; 1009 struct ena_com_buf *ena_buf; 1010 struct page *page; 1011 dma_addr_t dma; 1012 int tailroom; 1013 1014 /* restore page offset value in case it has been changed by device */ 1015 rx_info->page_offset = headroom; 1016 1017 /* if previous allocated page is not used */ 1018 if (unlikely(rx_info->page)) 1019 return 0; 1020 1021 /* We handle DMA here */ 1022 page = ena_alloc_map_page(rx_ring, &dma); 1023 if (unlikely(IS_ERR(page))) 1024 return PTR_ERR(page); 1025 1026 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1027 "Allocate page %p, rx_info %p\n", page, rx_info); 1028 1029 tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1030 1031 rx_info->page = page; 1032 ena_buf = &rx_info->ena_buf; 1033 ena_buf->paddr = dma + headroom; 1034 ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom; 1035 1036 return 0; 1037 } 1038 1039 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1040 struct ena_rx_buffer *rx_info) 1041 { 1042 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1043 1044 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1045 ENA_PAGE_SIZE, 1046 DMA_BIDIRECTIONAL); 1047 } 1048 1049 static void ena_free_rx_page(struct ena_ring *rx_ring, 1050 struct ena_rx_buffer *rx_info) 1051 { 1052 struct page *page = rx_info->page; 1053 1054 if (unlikely(!page)) { 1055 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1056 "Trying to free unallocated buffer\n"); 1057 return; 1058 } 1059 1060 ena_unmap_rx_buff(rx_ring, rx_info); 1061 1062 __free_page(page); 1063 rx_info->page = NULL; 1064 } 1065 1066 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1067 { 1068 u16 next_to_use, req_id; 1069 u32 i; 1070 int rc; 1071 1072 next_to_use = rx_ring->next_to_use; 1073 1074 for (i = 0; i < num; i++) { 1075 struct ena_rx_buffer *rx_info; 1076 1077 req_id = rx_ring->free_ids[next_to_use]; 1078 1079 rx_info = &rx_ring->rx_buffer_info[req_id]; 1080 1081 rc = ena_alloc_rx_buffer(rx_ring, rx_info); 1082 if (unlikely(rc < 0)) { 1083 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1084 "Failed to allocate buffer for rx queue %d\n", 1085 rx_ring->qid); 1086 break; 1087 } 1088 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1089 &rx_info->ena_buf, 1090 req_id); 1091 if (unlikely(rc)) { 1092 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1093 "Failed to add buffer for rx queue %d\n", 1094 rx_ring->qid); 1095 break; 1096 } 1097 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1098 rx_ring->ring_size); 1099 } 1100 1101 if (unlikely(i < num)) { 1102 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1103 &rx_ring->syncp); 1104 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1105 "Refilled rx qid %d with only %d buffers (from %d)\n", 1106 rx_ring->qid, i, num); 1107 } 1108 1109 /* ena_com_write_sq_doorbell issues a wmb() */ 1110 if (likely(i)) 1111 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1112 1113 rx_ring->next_to_use = next_to_use; 1114 1115 return i; 1116 } 1117 1118 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1119 u32 qid) 1120 { 1121 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1122 u32 i; 1123 1124 for (i = 0; i < rx_ring->ring_size; i++) { 1125 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1126 1127 if (rx_info->page) 1128 ena_free_rx_page(rx_ring, rx_info); 1129 } 1130 } 1131 1132 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1133 * @adapter: board private structure 1134 */ 1135 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1136 { 1137 struct ena_ring *rx_ring; 1138 int i, rc, bufs_num; 1139 1140 for (i = 0; i < adapter->num_io_queues; i++) { 1141 rx_ring = &adapter->rx_ring[i]; 1142 bufs_num = rx_ring->ring_size - 1; 1143 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1144 1145 if (unlikely(rc != bufs_num)) 1146 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1147 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1148 i, rc, bufs_num); 1149 } 1150 } 1151 1152 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1153 { 1154 int i; 1155 1156 for (i = 0; i < adapter->num_io_queues; i++) 1157 ena_free_rx_bufs(adapter, i); 1158 } 1159 1160 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1161 struct ena_tx_buffer *tx_info) 1162 { 1163 struct ena_com_buf *ena_buf; 1164 u32 cnt; 1165 int i; 1166 1167 ena_buf = tx_info->bufs; 1168 cnt = tx_info->num_of_bufs; 1169 1170 if (unlikely(!cnt)) 1171 return; 1172 1173 if (tx_info->map_linear_data) { 1174 dma_unmap_single(tx_ring->dev, 1175 dma_unmap_addr(ena_buf, paddr), 1176 dma_unmap_len(ena_buf, len), 1177 DMA_TO_DEVICE); 1178 ena_buf++; 1179 cnt--; 1180 } 1181 1182 /* unmap remaining mapped pages */ 1183 for (i = 0; i < cnt; i++) { 1184 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1185 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1186 ena_buf++; 1187 } 1188 } 1189 1190 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1191 * @tx_ring: TX ring for which buffers be freed 1192 */ 1193 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1194 { 1195 bool print_once = true; 1196 u32 i; 1197 1198 for (i = 0; i < tx_ring->ring_size; i++) { 1199 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1200 1201 if (!tx_info->skb) 1202 continue; 1203 1204 if (print_once) { 1205 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1206 "Free uncompleted tx skb qid %d idx 0x%x\n", 1207 tx_ring->qid, i); 1208 print_once = false; 1209 } else { 1210 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1211 "Free uncompleted tx skb qid %d idx 0x%x\n", 1212 tx_ring->qid, i); 1213 } 1214 1215 ena_unmap_tx_buff(tx_ring, tx_info); 1216 1217 dev_kfree_skb_any(tx_info->skb); 1218 } 1219 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1220 tx_ring->qid)); 1221 } 1222 1223 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1224 { 1225 struct ena_ring *tx_ring; 1226 int i; 1227 1228 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1229 tx_ring = &adapter->tx_ring[i]; 1230 ena_free_tx_bufs(tx_ring); 1231 } 1232 } 1233 1234 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1235 { 1236 u16 ena_qid; 1237 int i; 1238 1239 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1240 ena_qid = ENA_IO_TXQ_IDX(i); 1241 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1242 } 1243 } 1244 1245 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1246 { 1247 u16 ena_qid; 1248 int i; 1249 1250 for (i = 0; i < adapter->num_io_queues; i++) { 1251 ena_qid = ENA_IO_RXQ_IDX(i); 1252 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1253 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1254 } 1255 } 1256 1257 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1258 { 1259 ena_destroy_all_tx_queues(adapter); 1260 ena_destroy_all_rx_queues(adapter); 1261 } 1262 1263 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1264 struct ena_tx_buffer *tx_info, bool is_xdp) 1265 { 1266 if (tx_info) 1267 netif_err(ring->adapter, 1268 tx_done, 1269 ring->netdev, 1270 "tx_info doesn't have valid %s. qid %u req_id %u", 1271 is_xdp ? "xdp frame" : "skb", ring->qid, req_id); 1272 else 1273 netif_err(ring->adapter, 1274 tx_done, 1275 ring->netdev, 1276 "Invalid req_id %u in qid %u\n", 1277 req_id, ring->qid); 1278 1279 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1280 ena_reset_device(ring->adapter, ENA_REGS_RESET_INV_TX_REQ_ID); 1281 1282 return -EFAULT; 1283 } 1284 1285 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1286 { 1287 struct ena_tx_buffer *tx_info; 1288 1289 tx_info = &tx_ring->tx_buffer_info[req_id]; 1290 if (likely(tx_info->skb)) 1291 return 0; 1292 1293 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1294 } 1295 1296 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1297 { 1298 struct ena_tx_buffer *tx_info; 1299 1300 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1301 if (likely(tx_info->xdpf)) 1302 return 0; 1303 1304 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1305 } 1306 1307 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1308 { 1309 struct netdev_queue *txq; 1310 bool above_thresh; 1311 u32 tx_bytes = 0; 1312 u32 total_done = 0; 1313 u16 next_to_clean; 1314 u16 req_id; 1315 int tx_pkts = 0; 1316 int rc; 1317 1318 next_to_clean = tx_ring->next_to_clean; 1319 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1320 1321 while (tx_pkts < budget) { 1322 struct ena_tx_buffer *tx_info; 1323 struct sk_buff *skb; 1324 1325 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1326 &req_id); 1327 if (rc) { 1328 if (unlikely(rc == -EINVAL)) 1329 handle_invalid_req_id(tx_ring, req_id, NULL, 1330 false); 1331 break; 1332 } 1333 1334 /* validate that the request id points to a valid skb */ 1335 rc = validate_tx_req_id(tx_ring, req_id); 1336 if (rc) 1337 break; 1338 1339 tx_info = &tx_ring->tx_buffer_info[req_id]; 1340 skb = tx_info->skb; 1341 1342 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1343 prefetch(&skb->end); 1344 1345 tx_info->skb = NULL; 1346 tx_info->last_jiffies = 0; 1347 1348 ena_unmap_tx_buff(tx_ring, tx_info); 1349 1350 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1351 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1352 skb); 1353 1354 tx_bytes += skb->len; 1355 dev_kfree_skb(skb); 1356 tx_pkts++; 1357 total_done += tx_info->tx_descs; 1358 1359 tx_ring->free_ids[next_to_clean] = req_id; 1360 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1361 tx_ring->ring_size); 1362 } 1363 1364 tx_ring->next_to_clean = next_to_clean; 1365 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1366 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1367 1368 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1369 1370 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1371 "tx_poll: q %d done. total pkts: %d\n", 1372 tx_ring->qid, tx_pkts); 1373 1374 /* need to make the rings circular update visible to 1375 * ena_start_xmit() before checking for netif_queue_stopped(). 1376 */ 1377 smp_mb(); 1378 1379 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1380 ENA_TX_WAKEUP_THRESH); 1381 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1382 __netif_tx_lock(txq, smp_processor_id()); 1383 above_thresh = 1384 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1385 ENA_TX_WAKEUP_THRESH); 1386 if (netif_tx_queue_stopped(txq) && above_thresh && 1387 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1388 netif_tx_wake_queue(txq); 1389 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1390 &tx_ring->syncp); 1391 } 1392 __netif_tx_unlock(txq); 1393 } 1394 1395 return tx_pkts; 1396 } 1397 1398 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag) 1399 { 1400 struct sk_buff *skb; 1401 1402 if (!first_frag) 1403 skb = napi_alloc_skb(rx_ring->napi, rx_ring->rx_copybreak); 1404 else 1405 skb = napi_build_skb(first_frag, ENA_PAGE_SIZE); 1406 1407 if (unlikely(!skb)) { 1408 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1409 &rx_ring->syncp); 1410 1411 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1412 "Failed to allocate skb. first_frag %s\n", 1413 first_frag ? "provided" : "not provided"); 1414 return NULL; 1415 } 1416 1417 return skb; 1418 } 1419 1420 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1421 struct ena_com_rx_buf_info *ena_bufs, 1422 u32 descs, 1423 u16 *next_to_clean) 1424 { 1425 struct ena_rx_buffer *rx_info; 1426 struct ena_adapter *adapter; 1427 u16 len, req_id, buf = 0; 1428 struct sk_buff *skb; 1429 void *page_addr; 1430 u32 page_offset; 1431 void *data_addr; 1432 1433 len = ena_bufs[buf].len; 1434 req_id = ena_bufs[buf].req_id; 1435 1436 rx_info = &rx_ring->rx_buffer_info[req_id]; 1437 1438 if (unlikely(!rx_info->page)) { 1439 adapter = rx_ring->adapter; 1440 netif_err(adapter, rx_err, rx_ring->netdev, 1441 "Page is NULL. qid %u req_id %u\n", rx_ring->qid, req_id); 1442 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, &rx_ring->syncp); 1443 ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID); 1444 return NULL; 1445 } 1446 1447 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1448 "rx_info %p page %p\n", 1449 rx_info, rx_info->page); 1450 1451 /* save virt address of first buffer */ 1452 page_addr = page_address(rx_info->page); 1453 page_offset = rx_info->page_offset; 1454 data_addr = page_addr + page_offset; 1455 1456 prefetch(data_addr); 1457 1458 if (len <= rx_ring->rx_copybreak) { 1459 skb = ena_alloc_skb(rx_ring, NULL); 1460 if (unlikely(!skb)) 1461 return NULL; 1462 1463 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1464 "RX allocated small packet. len %d. data_len %d\n", 1465 skb->len, skb->data_len); 1466 1467 /* sync this buffer for CPU use */ 1468 dma_sync_single_for_cpu(rx_ring->dev, 1469 dma_unmap_addr(&rx_info->ena_buf, paddr), 1470 len, 1471 DMA_FROM_DEVICE); 1472 skb_copy_to_linear_data(skb, data_addr, len); 1473 dma_sync_single_for_device(rx_ring->dev, 1474 dma_unmap_addr(&rx_info->ena_buf, paddr), 1475 len, 1476 DMA_FROM_DEVICE); 1477 1478 skb_put(skb, len); 1479 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1480 rx_ring->free_ids[*next_to_clean] = req_id; 1481 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1482 rx_ring->ring_size); 1483 return skb; 1484 } 1485 1486 ena_unmap_rx_buff(rx_ring, rx_info); 1487 1488 skb = ena_alloc_skb(rx_ring, page_addr); 1489 if (unlikely(!skb)) 1490 return NULL; 1491 1492 /* Populate skb's linear part */ 1493 skb_reserve(skb, page_offset); 1494 skb_put(skb, len); 1495 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1496 1497 do { 1498 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1499 "RX skb updated. len %d. data_len %d\n", 1500 skb->len, skb->data_len); 1501 1502 rx_info->page = NULL; 1503 1504 rx_ring->free_ids[*next_to_clean] = req_id; 1505 *next_to_clean = 1506 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1507 rx_ring->ring_size); 1508 if (likely(--descs == 0)) 1509 break; 1510 1511 buf++; 1512 len = ena_bufs[buf].len; 1513 req_id = ena_bufs[buf].req_id; 1514 1515 rx_info = &rx_ring->rx_buffer_info[req_id]; 1516 1517 ena_unmap_rx_buff(rx_ring, rx_info); 1518 1519 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1520 rx_info->page_offset, len, ENA_PAGE_SIZE); 1521 1522 } while (1); 1523 1524 return skb; 1525 } 1526 1527 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1528 * @adapter: structure containing adapter specific data 1529 * @ena_rx_ctx: received packet context/metadata 1530 * @skb: skb currently being received and modified 1531 */ 1532 static void ena_rx_checksum(struct ena_ring *rx_ring, 1533 struct ena_com_rx_ctx *ena_rx_ctx, 1534 struct sk_buff *skb) 1535 { 1536 /* Rx csum disabled */ 1537 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1538 skb->ip_summed = CHECKSUM_NONE; 1539 return; 1540 } 1541 1542 /* For fragmented packets the checksum isn't valid */ 1543 if (ena_rx_ctx->frag) { 1544 skb->ip_summed = CHECKSUM_NONE; 1545 return; 1546 } 1547 1548 /* if IP and error */ 1549 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1550 (ena_rx_ctx->l3_csum_err))) { 1551 /* ipv4 checksum error */ 1552 skb->ip_summed = CHECKSUM_NONE; 1553 ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1, 1554 &rx_ring->syncp); 1555 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1556 "RX IPv4 header checksum error\n"); 1557 return; 1558 } 1559 1560 /* if TCP/UDP */ 1561 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1562 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1563 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1564 /* TCP/UDP checksum error */ 1565 ena_increase_stat(&rx_ring->rx_stats.csum_bad, 1, 1566 &rx_ring->syncp); 1567 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1568 "RX L4 checksum error\n"); 1569 skb->ip_summed = CHECKSUM_NONE; 1570 return; 1571 } 1572 1573 if (likely(ena_rx_ctx->l4_csum_checked)) { 1574 skb->ip_summed = CHECKSUM_UNNECESSARY; 1575 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1576 &rx_ring->syncp); 1577 } else { 1578 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1579 &rx_ring->syncp); 1580 skb->ip_summed = CHECKSUM_NONE; 1581 } 1582 } else { 1583 skb->ip_summed = CHECKSUM_NONE; 1584 return; 1585 } 1586 1587 } 1588 1589 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1590 struct ena_com_rx_ctx *ena_rx_ctx, 1591 struct sk_buff *skb) 1592 { 1593 enum pkt_hash_types hash_type; 1594 1595 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1596 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1597 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1598 1599 hash_type = PKT_HASH_TYPE_L4; 1600 else 1601 hash_type = PKT_HASH_TYPE_NONE; 1602 1603 /* Override hash type if the packet is fragmented */ 1604 if (ena_rx_ctx->frag) 1605 hash_type = PKT_HASH_TYPE_NONE; 1606 1607 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1608 } 1609 } 1610 1611 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1612 { 1613 struct ena_rx_buffer *rx_info; 1614 int ret; 1615 1616 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1617 xdp_prepare_buff(xdp, page_address(rx_info->page), 1618 rx_info->page_offset, 1619 rx_ring->ena_bufs[0].len, false); 1620 /* If for some reason we received a bigger packet than 1621 * we expect, then we simply drop it 1622 */ 1623 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1624 return XDP_DROP; 1625 1626 ret = ena_xdp_execute(rx_ring, xdp); 1627 1628 /* The xdp program might expand the headers */ 1629 if (ret == XDP_PASS) { 1630 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1631 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1632 } 1633 1634 return ret; 1635 } 1636 /* ena_clean_rx_irq - Cleanup RX irq 1637 * @rx_ring: RX ring to clean 1638 * @napi: napi handler 1639 * @budget: how many packets driver is allowed to clean 1640 * 1641 * Returns the number of cleaned buffers. 1642 */ 1643 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1644 u32 budget) 1645 { 1646 u16 next_to_clean = rx_ring->next_to_clean; 1647 struct ena_com_rx_ctx ena_rx_ctx; 1648 struct ena_rx_buffer *rx_info; 1649 struct ena_adapter *adapter; 1650 u32 res_budget, work_done; 1651 int rx_copybreak_pkt = 0; 1652 int refill_threshold; 1653 struct sk_buff *skb; 1654 int refill_required; 1655 struct xdp_buff xdp; 1656 int xdp_flags = 0; 1657 int total_len = 0; 1658 int xdp_verdict; 1659 int rc = 0; 1660 int i; 1661 1662 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1663 "%s qid %d\n", __func__, rx_ring->qid); 1664 res_budget = budget; 1665 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq); 1666 1667 do { 1668 xdp_verdict = XDP_PASS; 1669 skb = NULL; 1670 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1671 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1672 ena_rx_ctx.descs = 0; 1673 ena_rx_ctx.pkt_offset = 0; 1674 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1675 rx_ring->ena_com_io_sq, 1676 &ena_rx_ctx); 1677 if (unlikely(rc)) 1678 goto error; 1679 1680 if (unlikely(ena_rx_ctx.descs == 0)) 1681 break; 1682 1683 /* First descriptor might have an offset set by the device */ 1684 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1685 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1686 1687 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1688 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1689 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1690 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1691 1692 if (ena_xdp_present_ring(rx_ring)) 1693 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1694 1695 /* allocate skb and fill it */ 1696 if (xdp_verdict == XDP_PASS) 1697 skb = ena_rx_skb(rx_ring, 1698 rx_ring->ena_bufs, 1699 ena_rx_ctx.descs, 1700 &next_to_clean); 1701 1702 if (unlikely(!skb)) { 1703 for (i = 0; i < ena_rx_ctx.descs; i++) { 1704 int req_id = rx_ring->ena_bufs[i].req_id; 1705 1706 rx_ring->free_ids[next_to_clean] = req_id; 1707 next_to_clean = 1708 ENA_RX_RING_IDX_NEXT(next_to_clean, 1709 rx_ring->ring_size); 1710 1711 /* Packets was passed for transmission, unmap it 1712 * from RX side. 1713 */ 1714 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) { 1715 ena_unmap_rx_buff(rx_ring, 1716 &rx_ring->rx_buffer_info[req_id]); 1717 rx_ring->rx_buffer_info[req_id].page = NULL; 1718 } 1719 } 1720 if (xdp_verdict != XDP_PASS) { 1721 xdp_flags |= xdp_verdict; 1722 res_budget--; 1723 continue; 1724 } 1725 break; 1726 } 1727 1728 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1729 1730 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1731 1732 skb_record_rx_queue(skb, rx_ring->qid); 1733 1734 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) 1735 rx_copybreak_pkt++; 1736 1737 total_len += skb->len; 1738 1739 napi_gro_receive(napi, skb); 1740 1741 res_budget--; 1742 } while (likely(res_budget)); 1743 1744 work_done = budget - res_budget; 1745 rx_ring->per_napi_packets += work_done; 1746 u64_stats_update_begin(&rx_ring->syncp); 1747 rx_ring->rx_stats.bytes += total_len; 1748 rx_ring->rx_stats.cnt += work_done; 1749 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1750 u64_stats_update_end(&rx_ring->syncp); 1751 1752 rx_ring->next_to_clean = next_to_clean; 1753 1754 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1755 refill_threshold = 1756 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1757 ENA_RX_REFILL_THRESH_PACKET); 1758 1759 /* Optimization, try to batch new rx buffers */ 1760 if (refill_required > refill_threshold) { 1761 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1762 ena_refill_rx_bufs(rx_ring, refill_required); 1763 } 1764 1765 if (xdp_flags & XDP_REDIRECT) 1766 xdp_do_flush_map(); 1767 1768 return work_done; 1769 1770 error: 1771 adapter = netdev_priv(rx_ring->netdev); 1772 1773 if (rc == -ENOSPC) { 1774 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1775 &rx_ring->syncp); 1776 ena_reset_device(adapter, ENA_REGS_RESET_TOO_MANY_RX_DESCS); 1777 } else { 1778 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1779 &rx_ring->syncp); 1780 ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID); 1781 } 1782 return 0; 1783 } 1784 1785 static void ena_dim_work(struct work_struct *w) 1786 { 1787 struct dim *dim = container_of(w, struct dim, work); 1788 struct dim_cq_moder cur_moder = 1789 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1790 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1791 1792 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1793 dim->state = DIM_START_MEASURE; 1794 } 1795 1796 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1797 { 1798 struct dim_sample dim_sample; 1799 struct ena_ring *rx_ring = ena_napi->rx_ring; 1800 1801 if (!rx_ring->per_napi_packets) 1802 return; 1803 1804 rx_ring->non_empty_napi_events++; 1805 1806 dim_update_sample(rx_ring->non_empty_napi_events, 1807 rx_ring->rx_stats.cnt, 1808 rx_ring->rx_stats.bytes, 1809 &dim_sample); 1810 1811 net_dim(&ena_napi->dim, dim_sample); 1812 1813 rx_ring->per_napi_packets = 0; 1814 } 1815 1816 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1817 struct ena_ring *rx_ring) 1818 { 1819 struct ena_eth_io_intr_reg intr_reg; 1820 u32 rx_interval = 0; 1821 /* Rx ring can be NULL when for XDP tx queues which don't have an 1822 * accompanying rx_ring pair. 1823 */ 1824 if (rx_ring) 1825 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1826 rx_ring->smoothed_interval : 1827 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1828 1829 /* Update intr register: rx intr delay, 1830 * tx intr delay and interrupt unmask 1831 */ 1832 ena_com_update_intr_reg(&intr_reg, 1833 rx_interval, 1834 tx_ring->smoothed_interval, 1835 true); 1836 1837 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1838 &tx_ring->syncp); 1839 1840 /* It is a shared MSI-X. 1841 * Tx and Rx CQ have pointer to it. 1842 * So we use one of them to reach the intr reg 1843 * The Tx ring is used because the rx_ring is NULL for XDP queues 1844 */ 1845 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1846 } 1847 1848 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1849 struct ena_ring *rx_ring) 1850 { 1851 int cpu = get_cpu(); 1852 int numa_node; 1853 1854 /* Check only one ring since the 2 rings are running on the same cpu */ 1855 if (likely(tx_ring->cpu == cpu)) 1856 goto out; 1857 1858 numa_node = cpu_to_node(cpu); 1859 put_cpu(); 1860 1861 if (numa_node != NUMA_NO_NODE) { 1862 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1863 if (rx_ring) 1864 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1865 numa_node); 1866 } 1867 1868 tx_ring->cpu = cpu; 1869 if (rx_ring) 1870 rx_ring->cpu = cpu; 1871 1872 return; 1873 out: 1874 put_cpu(); 1875 } 1876 1877 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1878 { 1879 u32 total_done = 0; 1880 u16 next_to_clean; 1881 u32 tx_bytes = 0; 1882 int tx_pkts = 0; 1883 u16 req_id; 1884 int rc; 1885 1886 if (unlikely(!xdp_ring)) 1887 return 0; 1888 next_to_clean = xdp_ring->next_to_clean; 1889 1890 while (tx_pkts < budget) { 1891 struct ena_tx_buffer *tx_info; 1892 struct xdp_frame *xdpf; 1893 1894 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1895 &req_id); 1896 if (rc) { 1897 if (unlikely(rc == -EINVAL)) 1898 handle_invalid_req_id(xdp_ring, req_id, NULL, 1899 true); 1900 break; 1901 } 1902 1903 /* validate that the request id points to a valid xdp_frame */ 1904 rc = validate_xdp_req_id(xdp_ring, req_id); 1905 if (rc) 1906 break; 1907 1908 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1909 xdpf = tx_info->xdpf; 1910 1911 tx_info->xdpf = NULL; 1912 tx_info->last_jiffies = 0; 1913 ena_unmap_tx_buff(xdp_ring, tx_info); 1914 1915 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1916 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1917 xdpf); 1918 1919 tx_bytes += xdpf->len; 1920 tx_pkts++; 1921 total_done += tx_info->tx_descs; 1922 1923 xdp_return_frame(xdpf); 1924 xdp_ring->free_ids[next_to_clean] = req_id; 1925 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1926 xdp_ring->ring_size); 1927 } 1928 1929 xdp_ring->next_to_clean = next_to_clean; 1930 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1931 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1932 1933 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1934 "tx_poll: q %d done. total pkts: %d\n", 1935 xdp_ring->qid, tx_pkts); 1936 1937 return tx_pkts; 1938 } 1939 1940 static int ena_io_poll(struct napi_struct *napi, int budget) 1941 { 1942 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1943 struct ena_ring *tx_ring, *rx_ring; 1944 int tx_work_done; 1945 int rx_work_done = 0; 1946 int tx_budget; 1947 int napi_comp_call = 0; 1948 int ret; 1949 1950 tx_ring = ena_napi->tx_ring; 1951 rx_ring = ena_napi->rx_ring; 1952 1953 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1954 1955 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1956 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1957 napi_complete_done(napi, 0); 1958 return 0; 1959 } 1960 1961 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1962 /* On netpoll the budget is zero and the handler should only clean the 1963 * tx completions. 1964 */ 1965 if (likely(budget)) 1966 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1967 1968 /* If the device is about to reset or down, avoid unmask 1969 * the interrupt and return 0 so NAPI won't reschedule 1970 */ 1971 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1972 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1973 napi_complete_done(napi, 0); 1974 ret = 0; 1975 1976 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1977 napi_comp_call = 1; 1978 1979 /* Update numa and unmask the interrupt only when schedule 1980 * from the interrupt context (vs from sk_busy_loop) 1981 */ 1982 if (napi_complete_done(napi, rx_work_done) && 1983 READ_ONCE(ena_napi->interrupts_masked)) { 1984 smp_rmb(); /* make sure interrupts_masked is read */ 1985 WRITE_ONCE(ena_napi->interrupts_masked, false); 1986 /* We apply adaptive moderation on Rx path only. 1987 * Tx uses static interrupt moderation. 1988 */ 1989 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1990 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1991 1992 ena_unmask_interrupt(tx_ring, rx_ring); 1993 } 1994 1995 ena_update_ring_numa_node(tx_ring, rx_ring); 1996 1997 ret = rx_work_done; 1998 } else { 1999 ret = budget; 2000 } 2001 2002 u64_stats_update_begin(&tx_ring->syncp); 2003 tx_ring->tx_stats.napi_comp += napi_comp_call; 2004 tx_ring->tx_stats.tx_poll++; 2005 u64_stats_update_end(&tx_ring->syncp); 2006 2007 tx_ring->tx_stats.last_napi_jiffies = jiffies; 2008 2009 return ret; 2010 } 2011 2012 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 2013 { 2014 struct ena_adapter *adapter = (struct ena_adapter *)data; 2015 2016 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 2017 2018 /* Don't call the aenq handler before probe is done */ 2019 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 2020 ena_com_aenq_intr_handler(adapter->ena_dev, data); 2021 2022 return IRQ_HANDLED; 2023 } 2024 2025 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 2026 * @irq: interrupt number 2027 * @data: pointer to a network interface private napi device structure 2028 */ 2029 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2030 { 2031 struct ena_napi *ena_napi = data; 2032 2033 /* Used to check HW health */ 2034 WRITE_ONCE(ena_napi->first_interrupt, true); 2035 2036 WRITE_ONCE(ena_napi->interrupts_masked, true); 2037 smp_wmb(); /* write interrupts_masked before calling napi */ 2038 2039 napi_schedule_irqoff(&ena_napi->napi); 2040 2041 return IRQ_HANDLED; 2042 } 2043 2044 /* Reserve a single MSI-X vector for management (admin + aenq). 2045 * plus reserve one vector for each potential io queue. 2046 * the number of potential io queues is the minimum of what the device 2047 * supports and the number of vCPUs. 2048 */ 2049 static int ena_enable_msix(struct ena_adapter *adapter) 2050 { 2051 int msix_vecs, irq_cnt; 2052 2053 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2054 netif_err(adapter, probe, adapter->netdev, 2055 "Error, MSI-X is already enabled\n"); 2056 return -EPERM; 2057 } 2058 2059 /* Reserved the max msix vectors we might need */ 2060 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2061 netif_dbg(adapter, probe, adapter->netdev, 2062 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2063 2064 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2065 msix_vecs, PCI_IRQ_MSIX); 2066 2067 if (irq_cnt < 0) { 2068 netif_err(adapter, probe, adapter->netdev, 2069 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2070 return -ENOSPC; 2071 } 2072 2073 if (irq_cnt != msix_vecs) { 2074 netif_notice(adapter, probe, adapter->netdev, 2075 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2076 irq_cnt, msix_vecs); 2077 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2078 } 2079 2080 if (ena_init_rx_cpu_rmap(adapter)) 2081 netif_warn(adapter, probe, adapter->netdev, 2082 "Failed to map IRQs to CPUs\n"); 2083 2084 adapter->msix_vecs = irq_cnt; 2085 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2086 2087 return 0; 2088 } 2089 2090 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2091 { 2092 u32 cpu; 2093 2094 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2095 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2096 pci_name(adapter->pdev)); 2097 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2098 ena_intr_msix_mgmnt; 2099 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2100 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2101 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2102 cpu = cpumask_first(cpu_online_mask); 2103 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2104 cpumask_set_cpu(cpu, 2105 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2106 } 2107 2108 static void ena_setup_io_intr(struct ena_adapter *adapter) 2109 { 2110 struct net_device *netdev; 2111 int irq_idx, i, cpu; 2112 int io_queue_count; 2113 2114 netdev = adapter->netdev; 2115 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2116 2117 for (i = 0; i < io_queue_count; i++) { 2118 irq_idx = ENA_IO_IRQ_IDX(i); 2119 cpu = i % num_online_cpus(); 2120 2121 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2122 "%s-Tx-Rx-%d", netdev->name, i); 2123 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2124 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2125 adapter->irq_tbl[irq_idx].vector = 2126 pci_irq_vector(adapter->pdev, irq_idx); 2127 adapter->irq_tbl[irq_idx].cpu = cpu; 2128 2129 cpumask_set_cpu(cpu, 2130 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2131 } 2132 } 2133 2134 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2135 { 2136 unsigned long flags = 0; 2137 struct ena_irq *irq; 2138 int rc; 2139 2140 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2141 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2142 irq->data); 2143 if (rc) { 2144 netif_err(adapter, probe, adapter->netdev, 2145 "Failed to request admin irq\n"); 2146 return rc; 2147 } 2148 2149 netif_dbg(adapter, probe, adapter->netdev, 2150 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2151 irq->affinity_hint_mask.bits[0], irq->vector); 2152 2153 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2154 2155 return rc; 2156 } 2157 2158 static int ena_request_io_irq(struct ena_adapter *adapter) 2159 { 2160 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2161 unsigned long flags = 0; 2162 struct ena_irq *irq; 2163 int rc = 0, i, k; 2164 2165 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2166 netif_err(adapter, ifup, adapter->netdev, 2167 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2168 return -EINVAL; 2169 } 2170 2171 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2172 irq = &adapter->irq_tbl[i]; 2173 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2174 irq->data); 2175 if (rc) { 2176 netif_err(adapter, ifup, adapter->netdev, 2177 "Failed to request I/O IRQ. index %d rc %d\n", 2178 i, rc); 2179 goto err; 2180 } 2181 2182 netif_dbg(adapter, ifup, adapter->netdev, 2183 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2184 i, irq->affinity_hint_mask.bits[0], irq->vector); 2185 2186 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2187 } 2188 2189 return rc; 2190 2191 err: 2192 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2193 irq = &adapter->irq_tbl[k]; 2194 free_irq(irq->vector, irq->data); 2195 } 2196 2197 return rc; 2198 } 2199 2200 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2201 { 2202 struct ena_irq *irq; 2203 2204 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2205 synchronize_irq(irq->vector); 2206 irq_set_affinity_hint(irq->vector, NULL); 2207 free_irq(irq->vector, irq->data); 2208 } 2209 2210 static void ena_free_io_irq(struct ena_adapter *adapter) 2211 { 2212 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2213 struct ena_irq *irq; 2214 int i; 2215 2216 #ifdef CONFIG_RFS_ACCEL 2217 if (adapter->msix_vecs >= 1) { 2218 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2219 adapter->netdev->rx_cpu_rmap = NULL; 2220 } 2221 #endif /* CONFIG_RFS_ACCEL */ 2222 2223 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2224 irq = &adapter->irq_tbl[i]; 2225 irq_set_affinity_hint(irq->vector, NULL); 2226 free_irq(irq->vector, irq->data); 2227 } 2228 } 2229 2230 static void ena_disable_msix(struct ena_adapter *adapter) 2231 { 2232 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2233 pci_free_irq_vectors(adapter->pdev); 2234 } 2235 2236 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2237 { 2238 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2239 int i; 2240 2241 if (!netif_running(adapter->netdev)) 2242 return; 2243 2244 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2245 synchronize_irq(adapter->irq_tbl[i].vector); 2246 } 2247 2248 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2249 int first_index, 2250 int count) 2251 { 2252 int i; 2253 2254 for (i = first_index; i < first_index + count; i++) { 2255 netif_napi_del(&adapter->ena_napi[i].napi); 2256 2257 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2258 adapter->ena_napi[i].xdp_ring); 2259 } 2260 } 2261 2262 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2263 int first_index, int count) 2264 { 2265 int i; 2266 2267 for (i = first_index; i < first_index + count; i++) { 2268 struct ena_napi *napi = &adapter->ena_napi[i]; 2269 2270 netif_napi_add(adapter->netdev, 2271 &napi->napi, 2272 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2273 ENA_NAPI_BUDGET); 2274 2275 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2276 napi->rx_ring = &adapter->rx_ring[i]; 2277 napi->tx_ring = &adapter->tx_ring[i]; 2278 } else { 2279 napi->xdp_ring = &adapter->tx_ring[i]; 2280 } 2281 napi->qid = i; 2282 } 2283 } 2284 2285 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2286 int first_index, 2287 int count) 2288 { 2289 int i; 2290 2291 for (i = first_index; i < first_index + count; i++) 2292 napi_disable(&adapter->ena_napi[i].napi); 2293 } 2294 2295 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2296 int first_index, 2297 int count) 2298 { 2299 int i; 2300 2301 for (i = first_index; i < first_index + count; i++) 2302 napi_enable(&adapter->ena_napi[i].napi); 2303 } 2304 2305 /* Configure the Rx forwarding */ 2306 static int ena_rss_configure(struct ena_adapter *adapter) 2307 { 2308 struct ena_com_dev *ena_dev = adapter->ena_dev; 2309 int rc; 2310 2311 /* In case the RSS table wasn't initialized by probe */ 2312 if (!ena_dev->rss.tbl_log_size) { 2313 rc = ena_rss_init_default(adapter); 2314 if (rc && (rc != -EOPNOTSUPP)) { 2315 netif_err(adapter, ifup, adapter->netdev, 2316 "Failed to init RSS rc: %d\n", rc); 2317 return rc; 2318 } 2319 } 2320 2321 /* Set indirect table */ 2322 rc = ena_com_indirect_table_set(ena_dev); 2323 if (unlikely(rc && rc != -EOPNOTSUPP)) 2324 return rc; 2325 2326 /* Configure hash function (if supported) */ 2327 rc = ena_com_set_hash_function(ena_dev); 2328 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2329 return rc; 2330 2331 /* Configure hash inputs (if supported) */ 2332 rc = ena_com_set_hash_ctrl(ena_dev); 2333 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2334 return rc; 2335 2336 return 0; 2337 } 2338 2339 static int ena_up_complete(struct ena_adapter *adapter) 2340 { 2341 int rc; 2342 2343 rc = ena_rss_configure(adapter); 2344 if (rc) 2345 return rc; 2346 2347 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2348 2349 ena_refill_all_rx_bufs(adapter); 2350 2351 /* enable transmits */ 2352 netif_tx_start_all_queues(adapter->netdev); 2353 2354 ena_napi_enable_in_range(adapter, 2355 0, 2356 adapter->xdp_num_queues + adapter->num_io_queues); 2357 2358 return 0; 2359 } 2360 2361 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2362 { 2363 struct ena_com_create_io_ctx ctx; 2364 struct ena_com_dev *ena_dev; 2365 struct ena_ring *tx_ring; 2366 u32 msix_vector; 2367 u16 ena_qid; 2368 int rc; 2369 2370 ena_dev = adapter->ena_dev; 2371 2372 tx_ring = &adapter->tx_ring[qid]; 2373 msix_vector = ENA_IO_IRQ_IDX(qid); 2374 ena_qid = ENA_IO_TXQ_IDX(qid); 2375 2376 memset(&ctx, 0x0, sizeof(ctx)); 2377 2378 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2379 ctx.qid = ena_qid; 2380 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2381 ctx.msix_vector = msix_vector; 2382 ctx.queue_size = tx_ring->ring_size; 2383 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2384 2385 rc = ena_com_create_io_queue(ena_dev, &ctx); 2386 if (rc) { 2387 netif_err(adapter, ifup, adapter->netdev, 2388 "Failed to create I/O TX queue num %d rc: %d\n", 2389 qid, rc); 2390 return rc; 2391 } 2392 2393 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2394 &tx_ring->ena_com_io_sq, 2395 &tx_ring->ena_com_io_cq); 2396 if (rc) { 2397 netif_err(adapter, ifup, adapter->netdev, 2398 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2399 qid, rc); 2400 ena_com_destroy_io_queue(ena_dev, ena_qid); 2401 return rc; 2402 } 2403 2404 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2405 return rc; 2406 } 2407 2408 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2409 int first_index, int count) 2410 { 2411 struct ena_com_dev *ena_dev = adapter->ena_dev; 2412 int rc, i; 2413 2414 for (i = first_index; i < first_index + count; i++) { 2415 rc = ena_create_io_tx_queue(adapter, i); 2416 if (rc) 2417 goto create_err; 2418 } 2419 2420 return 0; 2421 2422 create_err: 2423 while (i-- > first_index) 2424 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2425 2426 return rc; 2427 } 2428 2429 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2430 { 2431 struct ena_com_dev *ena_dev; 2432 struct ena_com_create_io_ctx ctx; 2433 struct ena_ring *rx_ring; 2434 u32 msix_vector; 2435 u16 ena_qid; 2436 int rc; 2437 2438 ena_dev = adapter->ena_dev; 2439 2440 rx_ring = &adapter->rx_ring[qid]; 2441 msix_vector = ENA_IO_IRQ_IDX(qid); 2442 ena_qid = ENA_IO_RXQ_IDX(qid); 2443 2444 memset(&ctx, 0x0, sizeof(ctx)); 2445 2446 ctx.qid = ena_qid; 2447 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2448 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2449 ctx.msix_vector = msix_vector; 2450 ctx.queue_size = rx_ring->ring_size; 2451 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2452 2453 rc = ena_com_create_io_queue(ena_dev, &ctx); 2454 if (rc) { 2455 netif_err(adapter, ifup, adapter->netdev, 2456 "Failed to create I/O RX queue num %d rc: %d\n", 2457 qid, rc); 2458 return rc; 2459 } 2460 2461 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2462 &rx_ring->ena_com_io_sq, 2463 &rx_ring->ena_com_io_cq); 2464 if (rc) { 2465 netif_err(adapter, ifup, adapter->netdev, 2466 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2467 qid, rc); 2468 goto err; 2469 } 2470 2471 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2472 2473 return rc; 2474 err: 2475 ena_com_destroy_io_queue(ena_dev, ena_qid); 2476 return rc; 2477 } 2478 2479 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2480 { 2481 struct ena_com_dev *ena_dev = adapter->ena_dev; 2482 int rc, i; 2483 2484 for (i = 0; i < adapter->num_io_queues; i++) { 2485 rc = ena_create_io_rx_queue(adapter, i); 2486 if (rc) 2487 goto create_err; 2488 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2489 } 2490 2491 return 0; 2492 2493 create_err: 2494 while (i--) { 2495 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2496 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2497 } 2498 2499 return rc; 2500 } 2501 2502 static void set_io_rings_size(struct ena_adapter *adapter, 2503 int new_tx_size, 2504 int new_rx_size) 2505 { 2506 int i; 2507 2508 for (i = 0; i < adapter->num_io_queues; i++) { 2509 adapter->tx_ring[i].ring_size = new_tx_size; 2510 adapter->rx_ring[i].ring_size = new_rx_size; 2511 } 2512 } 2513 2514 /* This function allows queue allocation to backoff when the system is 2515 * low on memory. If there is not enough memory to allocate io queues 2516 * the driver will try to allocate smaller queues. 2517 * 2518 * The backoff algorithm is as follows: 2519 * 1. Try to allocate TX and RX and if successful. 2520 * 1.1. return success 2521 * 2522 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2523 * 2524 * 3. If TX or RX is smaller than 256 2525 * 3.1. return failure. 2526 * 4. else 2527 * 4.1. go back to 1. 2528 */ 2529 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2530 { 2531 int rc, cur_rx_ring_size, cur_tx_ring_size; 2532 int new_rx_ring_size, new_tx_ring_size; 2533 2534 /* current queue sizes might be set to smaller than the requested 2535 * ones due to past queue allocation failures. 2536 */ 2537 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2538 adapter->requested_rx_ring_size); 2539 2540 while (1) { 2541 if (ena_xdp_present(adapter)) { 2542 rc = ena_setup_and_create_all_xdp_queues(adapter); 2543 2544 if (rc) 2545 goto err_setup_tx; 2546 } 2547 rc = ena_setup_tx_resources_in_range(adapter, 2548 0, 2549 adapter->num_io_queues); 2550 if (rc) 2551 goto err_setup_tx; 2552 2553 rc = ena_create_io_tx_queues_in_range(adapter, 2554 0, 2555 adapter->num_io_queues); 2556 if (rc) 2557 goto err_create_tx_queues; 2558 2559 rc = ena_setup_all_rx_resources(adapter); 2560 if (rc) 2561 goto err_setup_rx; 2562 2563 rc = ena_create_all_io_rx_queues(adapter); 2564 if (rc) 2565 goto err_create_rx_queues; 2566 2567 return 0; 2568 2569 err_create_rx_queues: 2570 ena_free_all_io_rx_resources(adapter); 2571 err_setup_rx: 2572 ena_destroy_all_tx_queues(adapter); 2573 err_create_tx_queues: 2574 ena_free_all_io_tx_resources(adapter); 2575 err_setup_tx: 2576 if (rc != -ENOMEM) { 2577 netif_err(adapter, ifup, adapter->netdev, 2578 "Queue creation failed with error code %d\n", 2579 rc); 2580 return rc; 2581 } 2582 2583 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2584 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2585 2586 netif_err(adapter, ifup, adapter->netdev, 2587 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2588 cur_tx_ring_size, cur_rx_ring_size); 2589 2590 new_tx_ring_size = cur_tx_ring_size; 2591 new_rx_ring_size = cur_rx_ring_size; 2592 2593 /* Decrease the size of the larger queue, or 2594 * decrease both if they are the same size. 2595 */ 2596 if (cur_rx_ring_size <= cur_tx_ring_size) 2597 new_tx_ring_size = cur_tx_ring_size / 2; 2598 if (cur_rx_ring_size >= cur_tx_ring_size) 2599 new_rx_ring_size = cur_rx_ring_size / 2; 2600 2601 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2602 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2603 netif_err(adapter, ifup, adapter->netdev, 2604 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2605 ENA_MIN_RING_SIZE); 2606 return rc; 2607 } 2608 2609 netif_err(adapter, ifup, adapter->netdev, 2610 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2611 new_tx_ring_size, 2612 new_rx_ring_size); 2613 2614 set_io_rings_size(adapter, new_tx_ring_size, 2615 new_rx_ring_size); 2616 } 2617 } 2618 2619 static int ena_up(struct ena_adapter *adapter) 2620 { 2621 int io_queue_count, rc, i; 2622 2623 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2624 2625 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2626 ena_setup_io_intr(adapter); 2627 2628 /* napi poll functions should be initialized before running 2629 * request_irq(), to handle a rare condition where there is a pending 2630 * interrupt, causing the ISR to fire immediately while the poll 2631 * function wasn't set yet, causing a null dereference 2632 */ 2633 ena_init_napi_in_range(adapter, 0, io_queue_count); 2634 2635 rc = ena_request_io_irq(adapter); 2636 if (rc) 2637 goto err_req_irq; 2638 2639 rc = create_queues_with_size_backoff(adapter); 2640 if (rc) 2641 goto err_create_queues_with_backoff; 2642 2643 rc = ena_up_complete(adapter); 2644 if (rc) 2645 goto err_up; 2646 2647 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2648 netif_carrier_on(adapter->netdev); 2649 2650 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2651 &adapter->syncp); 2652 2653 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2654 2655 /* Enable completion queues interrupt */ 2656 for (i = 0; i < adapter->num_io_queues; i++) 2657 ena_unmask_interrupt(&adapter->tx_ring[i], 2658 &adapter->rx_ring[i]); 2659 2660 /* schedule napi in case we had pending packets 2661 * from the last time we disable napi 2662 */ 2663 for (i = 0; i < io_queue_count; i++) 2664 napi_schedule(&adapter->ena_napi[i].napi); 2665 2666 return rc; 2667 2668 err_up: 2669 ena_destroy_all_tx_queues(adapter); 2670 ena_free_all_io_tx_resources(adapter); 2671 ena_destroy_all_rx_queues(adapter); 2672 ena_free_all_io_rx_resources(adapter); 2673 err_create_queues_with_backoff: 2674 ena_free_io_irq(adapter); 2675 err_req_irq: 2676 ena_del_napi_in_range(adapter, 0, io_queue_count); 2677 2678 return rc; 2679 } 2680 2681 static void ena_down(struct ena_adapter *adapter) 2682 { 2683 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2684 2685 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2686 2687 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2688 2689 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2690 &adapter->syncp); 2691 2692 netif_carrier_off(adapter->netdev); 2693 netif_tx_disable(adapter->netdev); 2694 2695 /* After this point the napi handler won't enable the tx queue */ 2696 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2697 2698 /* After destroy the queue there won't be any new interrupts */ 2699 2700 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2701 int rc; 2702 2703 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2704 if (rc) 2705 netif_err(adapter, ifdown, adapter->netdev, 2706 "Device reset failed\n"); 2707 /* stop submitting admin commands on a device that was reset */ 2708 ena_com_set_admin_running_state(adapter->ena_dev, false); 2709 } 2710 2711 ena_destroy_all_io_queues(adapter); 2712 2713 ena_disable_io_intr_sync(adapter); 2714 ena_free_io_irq(adapter); 2715 ena_del_napi_in_range(adapter, 0, io_queue_count); 2716 2717 ena_free_all_tx_bufs(adapter); 2718 ena_free_all_rx_bufs(adapter); 2719 ena_free_all_io_tx_resources(adapter); 2720 ena_free_all_io_rx_resources(adapter); 2721 } 2722 2723 /* ena_open - Called when a network interface is made active 2724 * @netdev: network interface device structure 2725 * 2726 * Returns 0 on success, negative value on failure 2727 * 2728 * The open entry point is called when a network interface is made 2729 * active by the system (IFF_UP). At this point all resources needed 2730 * for transmit and receive operations are allocated, the interrupt 2731 * handler is registered with the OS, the watchdog timer is started, 2732 * and the stack is notified that the interface is ready. 2733 */ 2734 static int ena_open(struct net_device *netdev) 2735 { 2736 struct ena_adapter *adapter = netdev_priv(netdev); 2737 int rc; 2738 2739 /* Notify the stack of the actual queue counts. */ 2740 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2741 if (rc) { 2742 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2743 return rc; 2744 } 2745 2746 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2747 if (rc) { 2748 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2749 return rc; 2750 } 2751 2752 rc = ena_up(adapter); 2753 if (rc) 2754 return rc; 2755 2756 return rc; 2757 } 2758 2759 /* ena_close - Disables a network interface 2760 * @netdev: network interface device structure 2761 * 2762 * Returns 0, this is not allowed to fail 2763 * 2764 * The close entry point is called when an interface is de-activated 2765 * by the OS. The hardware is still under the drivers control, but 2766 * needs to be disabled. A global MAC reset is issued to stop the 2767 * hardware, and all transmit and receive resources are freed. 2768 */ 2769 static int ena_close(struct net_device *netdev) 2770 { 2771 struct ena_adapter *adapter = netdev_priv(netdev); 2772 2773 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2774 2775 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2776 return 0; 2777 2778 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2779 ena_down(adapter); 2780 2781 /* Check for device status and issue reset if needed*/ 2782 check_for_admin_com_state(adapter); 2783 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2784 netif_err(adapter, ifdown, adapter->netdev, 2785 "Destroy failure, restarting device\n"); 2786 ena_dump_stats_to_dmesg(adapter); 2787 /* rtnl lock already obtained in dev_ioctl() layer */ 2788 ena_destroy_device(adapter, false); 2789 ena_restore_device(adapter); 2790 } 2791 2792 return 0; 2793 } 2794 2795 int ena_update_queue_sizes(struct ena_adapter *adapter, 2796 u32 new_tx_size, 2797 u32 new_rx_size) 2798 { 2799 bool dev_was_up; 2800 2801 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2802 ena_close(adapter->netdev); 2803 adapter->requested_tx_ring_size = new_tx_size; 2804 adapter->requested_rx_ring_size = new_rx_size; 2805 ena_init_io_rings(adapter, 2806 0, 2807 adapter->xdp_num_queues + 2808 adapter->num_io_queues); 2809 return dev_was_up ? ena_up(adapter) : 0; 2810 } 2811 2812 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2813 { 2814 struct ena_com_dev *ena_dev = adapter->ena_dev; 2815 int prev_channel_count; 2816 bool dev_was_up; 2817 2818 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2819 ena_close(adapter->netdev); 2820 prev_channel_count = adapter->num_io_queues; 2821 adapter->num_io_queues = new_channel_count; 2822 if (ena_xdp_present(adapter) && 2823 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2824 adapter->xdp_first_ring = new_channel_count; 2825 adapter->xdp_num_queues = new_channel_count; 2826 if (prev_channel_count > new_channel_count) 2827 ena_xdp_exchange_program_rx_in_range(adapter, 2828 NULL, 2829 new_channel_count, 2830 prev_channel_count); 2831 else 2832 ena_xdp_exchange_program_rx_in_range(adapter, 2833 adapter->xdp_bpf_prog, 2834 prev_channel_count, 2835 new_channel_count); 2836 } 2837 2838 /* We need to destroy the rss table so that the indirection 2839 * table will be reinitialized by ena_up() 2840 */ 2841 ena_com_rss_destroy(ena_dev); 2842 ena_init_io_rings(adapter, 2843 0, 2844 adapter->xdp_num_queues + 2845 adapter->num_io_queues); 2846 return dev_was_up ? ena_open(adapter->netdev) : 0; 2847 } 2848 2849 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2850 struct sk_buff *skb, 2851 bool disable_meta_caching) 2852 { 2853 u32 mss = skb_shinfo(skb)->gso_size; 2854 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2855 u8 l4_protocol = 0; 2856 2857 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2858 ena_tx_ctx->l4_csum_enable = 1; 2859 if (mss) { 2860 ena_tx_ctx->tso_enable = 1; 2861 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2862 ena_tx_ctx->l4_csum_partial = 0; 2863 } else { 2864 ena_tx_ctx->tso_enable = 0; 2865 ena_meta->l4_hdr_len = 0; 2866 ena_tx_ctx->l4_csum_partial = 1; 2867 } 2868 2869 switch (ip_hdr(skb)->version) { 2870 case IPVERSION: 2871 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2872 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2873 ena_tx_ctx->df = 1; 2874 if (mss) 2875 ena_tx_ctx->l3_csum_enable = 1; 2876 l4_protocol = ip_hdr(skb)->protocol; 2877 break; 2878 case 6: 2879 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2880 l4_protocol = ipv6_hdr(skb)->nexthdr; 2881 break; 2882 default: 2883 break; 2884 } 2885 2886 if (l4_protocol == IPPROTO_TCP) 2887 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2888 else 2889 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2890 2891 ena_meta->mss = mss; 2892 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2893 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2894 ena_tx_ctx->meta_valid = 1; 2895 } else if (disable_meta_caching) { 2896 memset(ena_meta, 0, sizeof(*ena_meta)); 2897 ena_tx_ctx->meta_valid = 1; 2898 } else { 2899 ena_tx_ctx->meta_valid = 0; 2900 } 2901 } 2902 2903 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2904 struct sk_buff *skb) 2905 { 2906 int num_frags, header_len, rc; 2907 2908 num_frags = skb_shinfo(skb)->nr_frags; 2909 header_len = skb_headlen(skb); 2910 2911 if (num_frags < tx_ring->sgl_size) 2912 return 0; 2913 2914 if ((num_frags == tx_ring->sgl_size) && 2915 (header_len < tx_ring->tx_max_header_size)) 2916 return 0; 2917 2918 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2919 2920 rc = skb_linearize(skb); 2921 if (unlikely(rc)) { 2922 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2923 &tx_ring->syncp); 2924 } 2925 2926 return rc; 2927 } 2928 2929 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2930 struct ena_tx_buffer *tx_info, 2931 struct sk_buff *skb, 2932 void **push_hdr, 2933 u16 *header_len) 2934 { 2935 struct ena_adapter *adapter = tx_ring->adapter; 2936 struct ena_com_buf *ena_buf; 2937 dma_addr_t dma; 2938 u32 skb_head_len, frag_len, last_frag; 2939 u16 push_len = 0; 2940 u16 delta = 0; 2941 int i = 0; 2942 2943 skb_head_len = skb_headlen(skb); 2944 tx_info->skb = skb; 2945 ena_buf = tx_info->bufs; 2946 2947 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2948 /* When the device is LLQ mode, the driver will copy 2949 * the header into the device memory space. 2950 * the ena_com layer assume the header is in a linear 2951 * memory space. 2952 * This assumption might be wrong since part of the header 2953 * can be in the fragmented buffers. 2954 * Use skb_header_pointer to make sure the header is in a 2955 * linear memory space. 2956 */ 2957 2958 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2959 *push_hdr = skb_header_pointer(skb, 0, push_len, 2960 tx_ring->push_buf_intermediate_buf); 2961 *header_len = push_len; 2962 if (unlikely(skb->data != *push_hdr)) { 2963 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 2964 &tx_ring->syncp); 2965 2966 delta = push_len - skb_head_len; 2967 } 2968 } else { 2969 *push_hdr = NULL; 2970 *header_len = min_t(u32, skb_head_len, 2971 tx_ring->tx_max_header_size); 2972 } 2973 2974 netif_dbg(adapter, tx_queued, adapter->netdev, 2975 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2976 *push_hdr, push_len); 2977 2978 if (skb_head_len > push_len) { 2979 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2980 skb_head_len - push_len, DMA_TO_DEVICE); 2981 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2982 goto error_report_dma_error; 2983 2984 ena_buf->paddr = dma; 2985 ena_buf->len = skb_head_len - push_len; 2986 2987 ena_buf++; 2988 tx_info->num_of_bufs++; 2989 tx_info->map_linear_data = 1; 2990 } else { 2991 tx_info->map_linear_data = 0; 2992 } 2993 2994 last_frag = skb_shinfo(skb)->nr_frags; 2995 2996 for (i = 0; i < last_frag; i++) { 2997 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2998 2999 frag_len = skb_frag_size(frag); 3000 3001 if (unlikely(delta >= frag_len)) { 3002 delta -= frag_len; 3003 continue; 3004 } 3005 3006 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 3007 frag_len - delta, DMA_TO_DEVICE); 3008 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 3009 goto error_report_dma_error; 3010 3011 ena_buf->paddr = dma; 3012 ena_buf->len = frag_len - delta; 3013 ena_buf++; 3014 tx_info->num_of_bufs++; 3015 delta = 0; 3016 } 3017 3018 return 0; 3019 3020 error_report_dma_error: 3021 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 3022 &tx_ring->syncp); 3023 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 3024 3025 tx_info->skb = NULL; 3026 3027 tx_info->num_of_bufs += i; 3028 ena_unmap_tx_buff(tx_ring, tx_info); 3029 3030 return -EINVAL; 3031 } 3032 3033 /* Called with netif_tx_lock. */ 3034 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3035 { 3036 struct ena_adapter *adapter = netdev_priv(dev); 3037 struct ena_tx_buffer *tx_info; 3038 struct ena_com_tx_ctx ena_tx_ctx; 3039 struct ena_ring *tx_ring; 3040 struct netdev_queue *txq; 3041 void *push_hdr; 3042 u16 next_to_use, req_id, header_len; 3043 int qid, rc; 3044 3045 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3046 /* Determine which tx ring we will be placed on */ 3047 qid = skb_get_queue_mapping(skb); 3048 tx_ring = &adapter->tx_ring[qid]; 3049 txq = netdev_get_tx_queue(dev, qid); 3050 3051 rc = ena_check_and_linearize_skb(tx_ring, skb); 3052 if (unlikely(rc)) 3053 goto error_drop_packet; 3054 3055 skb_tx_timestamp(skb); 3056 3057 next_to_use = tx_ring->next_to_use; 3058 req_id = tx_ring->free_ids[next_to_use]; 3059 tx_info = &tx_ring->tx_buffer_info[req_id]; 3060 tx_info->num_of_bufs = 0; 3061 3062 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3063 3064 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3065 if (unlikely(rc)) 3066 goto error_drop_packet; 3067 3068 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3069 ena_tx_ctx.ena_bufs = tx_info->bufs; 3070 ena_tx_ctx.push_header = push_hdr; 3071 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3072 ena_tx_ctx.req_id = req_id; 3073 ena_tx_ctx.header_len = header_len; 3074 3075 /* set flags and meta data */ 3076 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3077 3078 rc = ena_xmit_common(dev, 3079 tx_ring, 3080 tx_info, 3081 &ena_tx_ctx, 3082 next_to_use, 3083 skb->len); 3084 if (rc) 3085 goto error_unmap_dma; 3086 3087 netdev_tx_sent_queue(txq, skb->len); 3088 3089 /* stop the queue when no more space available, the packet can have up 3090 * to sgl_size + 2. one for the meta descriptor and one for header 3091 * (if the header is larger than tx_max_header_size). 3092 */ 3093 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3094 tx_ring->sgl_size + 2))) { 3095 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3096 __func__, qid); 3097 3098 netif_tx_stop_queue(txq); 3099 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3100 &tx_ring->syncp); 3101 3102 /* There is a rare condition where this function decide to 3103 * stop the queue but meanwhile clean_tx_irq updates 3104 * next_to_completion and terminates. 3105 * The queue will remain stopped forever. 3106 * To solve this issue add a mb() to make sure that 3107 * netif_tx_stop_queue() write is vissible before checking if 3108 * there is additional space in the queue. 3109 */ 3110 smp_mb(); 3111 3112 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3113 ENA_TX_WAKEUP_THRESH)) { 3114 netif_tx_wake_queue(txq); 3115 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3116 &tx_ring->syncp); 3117 } 3118 } 3119 3120 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) 3121 /* trigger the dma engine. ena_ring_tx_doorbell() 3122 * calls a memory barrier inside it. 3123 */ 3124 ena_ring_tx_doorbell(tx_ring); 3125 3126 return NETDEV_TX_OK; 3127 3128 error_unmap_dma: 3129 ena_unmap_tx_buff(tx_ring, tx_info); 3130 tx_info->skb = NULL; 3131 3132 error_drop_packet: 3133 dev_kfree_skb(skb); 3134 return NETDEV_TX_OK; 3135 } 3136 3137 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3138 struct net_device *sb_dev) 3139 { 3140 u16 qid; 3141 /* we suspect that this is good for in--kernel network services that 3142 * want to loop incoming skb rx to tx in normal user generated traffic, 3143 * most probably we will not get to this 3144 */ 3145 if (skb_rx_queue_recorded(skb)) 3146 qid = skb_get_rx_queue(skb); 3147 else 3148 qid = netdev_pick_tx(dev, skb, NULL); 3149 3150 return qid; 3151 } 3152 3153 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3154 { 3155 struct device *dev = &pdev->dev; 3156 struct ena_admin_host_info *host_info; 3157 int rc; 3158 3159 /* Allocate only the host info */ 3160 rc = ena_com_allocate_host_info(ena_dev); 3161 if (rc) { 3162 dev_err(dev, "Cannot allocate host info\n"); 3163 return; 3164 } 3165 3166 host_info = ena_dev->host_attr.host_info; 3167 3168 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3169 host_info->os_type = ENA_ADMIN_OS_LINUX; 3170 host_info->kernel_ver = LINUX_VERSION_CODE; 3171 strlcpy(host_info->kernel_ver_str, utsname()->version, 3172 sizeof(host_info->kernel_ver_str) - 1); 3173 host_info->os_dist = 0; 3174 strncpy(host_info->os_dist_str, utsname()->release, 3175 sizeof(host_info->os_dist_str) - 1); 3176 host_info->driver_version = 3177 (DRV_MODULE_GEN_MAJOR) | 3178 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3179 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3180 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3181 host_info->num_cpus = num_online_cpus(); 3182 3183 host_info->driver_supported_features = 3184 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3185 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3186 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3187 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3188 3189 rc = ena_com_set_host_attributes(ena_dev); 3190 if (rc) { 3191 if (rc == -EOPNOTSUPP) 3192 dev_warn(dev, "Cannot set host attributes\n"); 3193 else 3194 dev_err(dev, "Cannot set host attributes\n"); 3195 3196 goto err; 3197 } 3198 3199 return; 3200 3201 err: 3202 ena_com_delete_host_info(ena_dev); 3203 } 3204 3205 static void ena_config_debug_area(struct ena_adapter *adapter) 3206 { 3207 u32 debug_area_size; 3208 int rc, ss_count; 3209 3210 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3211 if (ss_count <= 0) { 3212 netif_err(adapter, drv, adapter->netdev, 3213 "SS count is negative\n"); 3214 return; 3215 } 3216 3217 /* allocate 32 bytes for each string and 64bit for the value */ 3218 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3219 3220 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3221 if (rc) { 3222 netif_err(adapter, drv, adapter->netdev, 3223 "Cannot allocate debug area\n"); 3224 return; 3225 } 3226 3227 rc = ena_com_set_host_attributes(adapter->ena_dev); 3228 if (rc) { 3229 if (rc == -EOPNOTSUPP) 3230 netif_warn(adapter, drv, adapter->netdev, 3231 "Cannot set host attributes\n"); 3232 else 3233 netif_err(adapter, drv, adapter->netdev, 3234 "Cannot set host attributes\n"); 3235 goto err; 3236 } 3237 3238 return; 3239 err: 3240 ena_com_delete_debug_area(adapter->ena_dev); 3241 } 3242 3243 int ena_update_hw_stats(struct ena_adapter *adapter) 3244 { 3245 int rc; 3246 3247 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3248 if (rc) { 3249 netdev_err(adapter->netdev, "Failed to get ENI stats\n"); 3250 return rc; 3251 } 3252 3253 return 0; 3254 } 3255 3256 static void ena_get_stats64(struct net_device *netdev, 3257 struct rtnl_link_stats64 *stats) 3258 { 3259 struct ena_adapter *adapter = netdev_priv(netdev); 3260 struct ena_ring *rx_ring, *tx_ring; 3261 unsigned int start; 3262 u64 rx_drops; 3263 u64 tx_drops; 3264 int i; 3265 3266 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3267 return; 3268 3269 for (i = 0; i < adapter->num_io_queues; i++) { 3270 u64 bytes, packets; 3271 3272 tx_ring = &adapter->tx_ring[i]; 3273 3274 do { 3275 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3276 packets = tx_ring->tx_stats.cnt; 3277 bytes = tx_ring->tx_stats.bytes; 3278 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3279 3280 stats->tx_packets += packets; 3281 stats->tx_bytes += bytes; 3282 3283 rx_ring = &adapter->rx_ring[i]; 3284 3285 do { 3286 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3287 packets = rx_ring->rx_stats.cnt; 3288 bytes = rx_ring->rx_stats.bytes; 3289 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3290 3291 stats->rx_packets += packets; 3292 stats->rx_bytes += bytes; 3293 } 3294 3295 do { 3296 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3297 rx_drops = adapter->dev_stats.rx_drops; 3298 tx_drops = adapter->dev_stats.tx_drops; 3299 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3300 3301 stats->rx_dropped = rx_drops; 3302 stats->tx_dropped = tx_drops; 3303 3304 stats->multicast = 0; 3305 stats->collisions = 0; 3306 3307 stats->rx_length_errors = 0; 3308 stats->rx_crc_errors = 0; 3309 stats->rx_frame_errors = 0; 3310 stats->rx_fifo_errors = 0; 3311 stats->rx_missed_errors = 0; 3312 stats->tx_window_errors = 0; 3313 3314 stats->rx_errors = 0; 3315 stats->tx_errors = 0; 3316 } 3317 3318 static const struct net_device_ops ena_netdev_ops = { 3319 .ndo_open = ena_open, 3320 .ndo_stop = ena_close, 3321 .ndo_start_xmit = ena_start_xmit, 3322 .ndo_select_queue = ena_select_queue, 3323 .ndo_get_stats64 = ena_get_stats64, 3324 .ndo_tx_timeout = ena_tx_timeout, 3325 .ndo_change_mtu = ena_change_mtu, 3326 .ndo_set_mac_address = NULL, 3327 .ndo_validate_addr = eth_validate_addr, 3328 .ndo_bpf = ena_xdp, 3329 .ndo_xdp_xmit = ena_xdp_xmit, 3330 }; 3331 3332 static int ena_device_validate_params(struct ena_adapter *adapter, 3333 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3334 { 3335 struct net_device *netdev = adapter->netdev; 3336 int rc; 3337 3338 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3339 adapter->mac_addr); 3340 if (!rc) { 3341 netif_err(adapter, drv, netdev, 3342 "Error, mac address are different\n"); 3343 return -EINVAL; 3344 } 3345 3346 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3347 netif_err(adapter, drv, netdev, 3348 "Error, device max mtu is smaller than netdev MTU\n"); 3349 return -EINVAL; 3350 } 3351 3352 return 0; 3353 } 3354 3355 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 3356 { 3357 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3358 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3359 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3360 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3361 llq_config->llq_ring_entry_size_value = 128; 3362 } 3363 3364 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3365 struct ena_com_dev *ena_dev, 3366 struct ena_admin_feature_llq_desc *llq, 3367 struct ena_llq_configurations *llq_default_configurations) 3368 { 3369 int rc; 3370 u32 llq_feature_mask; 3371 3372 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3373 if (!(ena_dev->supported_features & llq_feature_mask)) { 3374 dev_warn(&pdev->dev, 3375 "LLQ is not supported Fallback to host mode policy.\n"); 3376 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3377 return 0; 3378 } 3379 3380 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3381 if (unlikely(rc)) { 3382 dev_err(&pdev->dev, 3383 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3384 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3385 } 3386 3387 return 0; 3388 } 3389 3390 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3391 int bars) 3392 { 3393 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3394 3395 if (!has_mem_bar) { 3396 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3397 dev_err(&pdev->dev, 3398 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3399 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3400 } 3401 3402 return 0; 3403 } 3404 3405 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3406 pci_resource_start(pdev, ENA_MEM_BAR), 3407 pci_resource_len(pdev, ENA_MEM_BAR)); 3408 3409 if (!ena_dev->mem_bar) 3410 return -EFAULT; 3411 3412 return 0; 3413 } 3414 3415 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3416 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3417 bool *wd_state) 3418 { 3419 struct ena_llq_configurations llq_config; 3420 struct device *dev = &pdev->dev; 3421 bool readless_supported; 3422 u32 aenq_groups; 3423 int dma_width; 3424 int rc; 3425 3426 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3427 if (rc) { 3428 dev_err(dev, "Failed to init mmio read less\n"); 3429 return rc; 3430 } 3431 3432 /* The PCIe configuration space revision id indicate if mmio reg 3433 * read is disabled 3434 */ 3435 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3436 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3437 3438 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3439 if (rc) { 3440 dev_err(dev, "Can not reset device\n"); 3441 goto err_mmio_read_less; 3442 } 3443 3444 rc = ena_com_validate_version(ena_dev); 3445 if (rc) { 3446 dev_err(dev, "Device version is too low\n"); 3447 goto err_mmio_read_less; 3448 } 3449 3450 dma_width = ena_com_get_dma_width(ena_dev); 3451 if (dma_width < 0) { 3452 dev_err(dev, "Invalid dma width value %d", dma_width); 3453 rc = dma_width; 3454 goto err_mmio_read_less; 3455 } 3456 3457 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3458 if (rc) { 3459 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3460 goto err_mmio_read_less; 3461 } 3462 3463 /* ENA admin level init */ 3464 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3465 if (rc) { 3466 dev_err(dev, 3467 "Can not initialize ena admin queue with device\n"); 3468 goto err_mmio_read_less; 3469 } 3470 3471 /* To enable the msix interrupts the driver needs to know the number 3472 * of queues. So the driver uses polling mode to retrieve this 3473 * information 3474 */ 3475 ena_com_set_admin_polling_mode(ena_dev, true); 3476 3477 ena_config_host_info(ena_dev, pdev); 3478 3479 /* Get Device Attributes*/ 3480 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3481 if (rc) { 3482 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3483 goto err_admin_init; 3484 } 3485 3486 /* Try to turn all the available aenq groups */ 3487 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3488 BIT(ENA_ADMIN_FATAL_ERROR) | 3489 BIT(ENA_ADMIN_WARNING) | 3490 BIT(ENA_ADMIN_NOTIFICATION) | 3491 BIT(ENA_ADMIN_KEEP_ALIVE); 3492 3493 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3494 3495 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3496 if (rc) { 3497 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3498 goto err_admin_init; 3499 } 3500 3501 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3502 3503 set_default_llq_configurations(&llq_config); 3504 3505 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3506 &llq_config); 3507 if (rc) { 3508 dev_err(dev, "ENA device init failed\n"); 3509 goto err_admin_init; 3510 } 3511 3512 return 0; 3513 3514 err_admin_init: 3515 ena_com_delete_host_info(ena_dev); 3516 ena_com_admin_destroy(ena_dev); 3517 err_mmio_read_less: 3518 ena_com_mmio_reg_read_request_destroy(ena_dev); 3519 3520 return rc; 3521 } 3522 3523 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3524 { 3525 struct ena_com_dev *ena_dev = adapter->ena_dev; 3526 struct device *dev = &adapter->pdev->dev; 3527 int rc; 3528 3529 rc = ena_enable_msix(adapter); 3530 if (rc) { 3531 dev_err(dev, "Can not reserve msix vectors\n"); 3532 return rc; 3533 } 3534 3535 ena_setup_mgmnt_intr(adapter); 3536 3537 rc = ena_request_mgmnt_irq(adapter); 3538 if (rc) { 3539 dev_err(dev, "Can not setup management interrupts\n"); 3540 goto err_disable_msix; 3541 } 3542 3543 ena_com_set_admin_polling_mode(ena_dev, false); 3544 3545 ena_com_admin_aenq_enable(ena_dev); 3546 3547 return 0; 3548 3549 err_disable_msix: 3550 ena_disable_msix(adapter); 3551 3552 return rc; 3553 } 3554 3555 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3556 { 3557 struct net_device *netdev = adapter->netdev; 3558 struct ena_com_dev *ena_dev = adapter->ena_dev; 3559 bool dev_up; 3560 3561 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3562 return; 3563 3564 netif_carrier_off(netdev); 3565 3566 del_timer_sync(&adapter->timer_service); 3567 3568 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3569 adapter->dev_up_before_reset = dev_up; 3570 if (!graceful) 3571 ena_com_set_admin_running_state(ena_dev, false); 3572 3573 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3574 ena_down(adapter); 3575 3576 /* Stop the device from sending AENQ events (in case reset flag is set 3577 * and device is up, ena_down() already reset the device. 3578 */ 3579 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3580 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3581 3582 ena_free_mgmnt_irq(adapter); 3583 3584 ena_disable_msix(adapter); 3585 3586 ena_com_abort_admin_commands(ena_dev); 3587 3588 ena_com_wait_for_abort_completion(ena_dev); 3589 3590 ena_com_admin_destroy(ena_dev); 3591 3592 ena_com_mmio_reg_read_request_destroy(ena_dev); 3593 3594 /* return reset reason to default value */ 3595 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3596 3597 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3598 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3599 } 3600 3601 static int ena_restore_device(struct ena_adapter *adapter) 3602 { 3603 struct ena_com_dev_get_features_ctx get_feat_ctx; 3604 struct ena_com_dev *ena_dev = adapter->ena_dev; 3605 struct pci_dev *pdev = adapter->pdev; 3606 bool wd_state; 3607 int rc; 3608 3609 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3610 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3611 if (rc) { 3612 dev_err(&pdev->dev, "Can not initialize device\n"); 3613 goto err; 3614 } 3615 adapter->wd_state = wd_state; 3616 3617 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3618 if (rc) { 3619 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3620 goto err_device_destroy; 3621 } 3622 3623 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3624 if (rc) { 3625 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3626 goto err_device_destroy; 3627 } 3628 /* If the interface was up before the reset bring it up */ 3629 if (adapter->dev_up_before_reset) { 3630 rc = ena_up(adapter); 3631 if (rc) { 3632 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3633 goto err_disable_msix; 3634 } 3635 } 3636 3637 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3638 3639 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3640 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3641 netif_carrier_on(adapter->netdev); 3642 3643 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3644 adapter->last_keep_alive_jiffies = jiffies; 3645 3646 return rc; 3647 err_disable_msix: 3648 ena_free_mgmnt_irq(adapter); 3649 ena_disable_msix(adapter); 3650 err_device_destroy: 3651 ena_com_abort_admin_commands(ena_dev); 3652 ena_com_wait_for_abort_completion(ena_dev); 3653 ena_com_admin_destroy(ena_dev); 3654 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3655 ena_com_mmio_reg_read_request_destroy(ena_dev); 3656 err: 3657 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3658 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3659 dev_err(&pdev->dev, 3660 "Reset attempt failed. Can not reset the device\n"); 3661 3662 return rc; 3663 } 3664 3665 static void ena_fw_reset_device(struct work_struct *work) 3666 { 3667 struct ena_adapter *adapter = 3668 container_of(work, struct ena_adapter, reset_task); 3669 3670 rtnl_lock(); 3671 3672 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3673 ena_destroy_device(adapter, false); 3674 ena_restore_device(adapter); 3675 3676 dev_err(&adapter->pdev->dev, "Device reset completed successfully\n"); 3677 } 3678 3679 rtnl_unlock(); 3680 } 3681 3682 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3683 struct ena_ring *rx_ring) 3684 { 3685 struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi); 3686 3687 if (likely(READ_ONCE(ena_napi->first_interrupt))) 3688 return 0; 3689 3690 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3691 return 0; 3692 3693 rx_ring->no_interrupt_event_cnt++; 3694 3695 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3696 netif_err(adapter, rx_err, adapter->netdev, 3697 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3698 rx_ring->qid); 3699 3700 ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT); 3701 return -EIO; 3702 } 3703 3704 return 0; 3705 } 3706 3707 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3708 struct ena_ring *tx_ring) 3709 { 3710 struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi); 3711 unsigned int time_since_last_napi; 3712 unsigned int missing_tx_comp_to; 3713 bool is_tx_comp_time_expired; 3714 struct ena_tx_buffer *tx_buf; 3715 unsigned long last_jiffies; 3716 u32 missed_tx = 0; 3717 int i, rc = 0; 3718 3719 for (i = 0; i < tx_ring->ring_size; i++) { 3720 tx_buf = &tx_ring->tx_buffer_info[i]; 3721 last_jiffies = tx_buf->last_jiffies; 3722 3723 if (last_jiffies == 0) 3724 /* no pending Tx at this location */ 3725 continue; 3726 3727 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3728 2 * adapter->missing_tx_completion_to); 3729 3730 if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) { 3731 /* If after graceful period interrupt is still not 3732 * received, we schedule a reset 3733 */ 3734 netif_err(adapter, tx_err, adapter->netdev, 3735 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3736 tx_ring->qid); 3737 ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT); 3738 return -EIO; 3739 } 3740 3741 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies + 3742 adapter->missing_tx_completion_to); 3743 3744 if (unlikely(is_tx_comp_time_expired)) { 3745 if (!tx_buf->print_once) { 3746 time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies); 3747 missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to); 3748 netif_notice(adapter, tx_err, adapter->netdev, 3749 "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n", 3750 tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to); 3751 } 3752 3753 tx_buf->print_once = 1; 3754 missed_tx++; 3755 } 3756 } 3757 3758 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3759 netif_err(adapter, tx_err, adapter->netdev, 3760 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3761 missed_tx, 3762 adapter->missing_tx_completion_threshold); 3763 ena_reset_device(adapter, ENA_REGS_RESET_MISS_TX_CMPL); 3764 rc = -EIO; 3765 } 3766 3767 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3768 &tx_ring->syncp); 3769 3770 return rc; 3771 } 3772 3773 static void check_for_missing_completions(struct ena_adapter *adapter) 3774 { 3775 struct ena_ring *tx_ring; 3776 struct ena_ring *rx_ring; 3777 int i, budget, rc; 3778 int io_queue_count; 3779 3780 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3781 /* Make sure the driver doesn't turn the device in other process */ 3782 smp_rmb(); 3783 3784 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3785 return; 3786 3787 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3788 return; 3789 3790 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3791 return; 3792 3793 budget = ENA_MONITORED_TX_QUEUES; 3794 3795 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3796 tx_ring = &adapter->tx_ring[i]; 3797 rx_ring = &adapter->rx_ring[i]; 3798 3799 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3800 if (unlikely(rc)) 3801 return; 3802 3803 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3804 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3805 if (unlikely(rc)) 3806 return; 3807 3808 budget--; 3809 if (!budget) 3810 break; 3811 } 3812 3813 adapter->last_monitored_tx_qid = i % io_queue_count; 3814 } 3815 3816 /* trigger napi schedule after 2 consecutive detections */ 3817 #define EMPTY_RX_REFILL 2 3818 /* For the rare case where the device runs out of Rx descriptors and the 3819 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3820 * for example). 3821 * This case will lead to a deadlock: 3822 * The device won't send interrupts since all the new Rx packets will be dropped 3823 * The napi handler won't allocate new Rx descriptors so the device will be 3824 * able to send new packets. 3825 * 3826 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3827 * It is recommended to have at least 512MB, with a minimum of 128MB for 3828 * constrained environment). 3829 * 3830 * When such a situation is detected - Reschedule napi 3831 */ 3832 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3833 { 3834 struct ena_ring *rx_ring; 3835 int i, refill_required; 3836 3837 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3838 return; 3839 3840 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3841 return; 3842 3843 for (i = 0; i < adapter->num_io_queues; i++) { 3844 rx_ring = &adapter->rx_ring[i]; 3845 3846 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3847 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3848 rx_ring->empty_rx_queue++; 3849 3850 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3851 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 3852 &rx_ring->syncp); 3853 3854 netif_err(adapter, drv, adapter->netdev, 3855 "Trigger refill for ring %d\n", i); 3856 3857 napi_schedule(rx_ring->napi); 3858 rx_ring->empty_rx_queue = 0; 3859 } 3860 } else { 3861 rx_ring->empty_rx_queue = 0; 3862 } 3863 } 3864 } 3865 3866 /* Check for keep alive expiration */ 3867 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3868 { 3869 unsigned long keep_alive_expired; 3870 3871 if (!adapter->wd_state) 3872 return; 3873 3874 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3875 return; 3876 3877 keep_alive_expired = adapter->last_keep_alive_jiffies + 3878 adapter->keep_alive_timeout; 3879 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3880 netif_err(adapter, drv, adapter->netdev, 3881 "Keep alive watchdog timeout.\n"); 3882 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 3883 &adapter->syncp); 3884 ena_reset_device(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO); 3885 } 3886 } 3887 3888 static void check_for_admin_com_state(struct ena_adapter *adapter) 3889 { 3890 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3891 netif_err(adapter, drv, adapter->netdev, 3892 "ENA admin queue is not in running state!\n"); 3893 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 3894 &adapter->syncp); 3895 ena_reset_device(adapter, ENA_REGS_RESET_ADMIN_TO); 3896 } 3897 } 3898 3899 static void ena_update_hints(struct ena_adapter *adapter, 3900 struct ena_admin_ena_hw_hints *hints) 3901 { 3902 struct net_device *netdev = adapter->netdev; 3903 3904 if (hints->admin_completion_tx_timeout) 3905 adapter->ena_dev->admin_queue.completion_timeout = 3906 hints->admin_completion_tx_timeout * 1000; 3907 3908 if (hints->mmio_read_timeout) 3909 /* convert to usec */ 3910 adapter->ena_dev->mmio_read.reg_read_to = 3911 hints->mmio_read_timeout * 1000; 3912 3913 if (hints->missed_tx_completion_count_threshold_to_reset) 3914 adapter->missing_tx_completion_threshold = 3915 hints->missed_tx_completion_count_threshold_to_reset; 3916 3917 if (hints->missing_tx_completion_timeout) { 3918 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3919 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3920 else 3921 adapter->missing_tx_completion_to = 3922 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3923 } 3924 3925 if (hints->netdev_wd_timeout) 3926 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3927 3928 if (hints->driver_watchdog_timeout) { 3929 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3930 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3931 else 3932 adapter->keep_alive_timeout = 3933 msecs_to_jiffies(hints->driver_watchdog_timeout); 3934 } 3935 } 3936 3937 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3938 struct net_device *netdev) 3939 { 3940 host_info->supported_network_features[0] = 3941 netdev->features & GENMASK_ULL(31, 0); 3942 host_info->supported_network_features[1] = 3943 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3944 } 3945 3946 static void ena_timer_service(struct timer_list *t) 3947 { 3948 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3949 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3950 struct ena_admin_host_info *host_info = 3951 adapter->ena_dev->host_attr.host_info; 3952 3953 check_for_missing_keep_alive(adapter); 3954 3955 check_for_admin_com_state(adapter); 3956 3957 check_for_missing_completions(adapter); 3958 3959 check_for_empty_rx_ring(adapter); 3960 3961 if (debug_area) 3962 ena_dump_stats_to_buf(adapter, debug_area); 3963 3964 if (host_info) 3965 ena_update_host_info(host_info, adapter->netdev); 3966 3967 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3968 netif_err(adapter, drv, adapter->netdev, 3969 "Trigger reset is on\n"); 3970 ena_dump_stats_to_dmesg(adapter); 3971 queue_work(ena_wq, &adapter->reset_task); 3972 return; 3973 } 3974 3975 /* Reset the timer */ 3976 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3977 } 3978 3979 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 3980 struct ena_com_dev *ena_dev, 3981 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3982 { 3983 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3984 3985 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3986 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3987 &get_feat_ctx->max_queue_ext.max_queue_ext; 3988 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3989 max_queue_ext->max_rx_cq_num); 3990 3991 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3992 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3993 } else { 3994 struct ena_admin_queue_feature_desc *max_queues = 3995 &get_feat_ctx->max_queues; 3996 io_tx_sq_num = max_queues->max_sq_num; 3997 io_tx_cq_num = max_queues->max_cq_num; 3998 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3999 } 4000 4001 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 4002 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4003 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 4004 4005 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 4006 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 4007 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 4008 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 4009 /* 1 IRQ for mgmnt and 1 IRQs for each IO direction */ 4010 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 4011 4012 return max_num_io_queues; 4013 } 4014 4015 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 4016 struct net_device *netdev) 4017 { 4018 netdev_features_t dev_features = 0; 4019 4020 /* Set offload features */ 4021 if (feat->offload.tx & 4022 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 4023 dev_features |= NETIF_F_IP_CSUM; 4024 4025 if (feat->offload.tx & 4026 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 4027 dev_features |= NETIF_F_IPV6_CSUM; 4028 4029 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4030 dev_features |= NETIF_F_TSO; 4031 4032 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4033 dev_features |= NETIF_F_TSO6; 4034 4035 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4036 dev_features |= NETIF_F_TSO_ECN; 4037 4038 if (feat->offload.rx_supported & 4039 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4040 dev_features |= NETIF_F_RXCSUM; 4041 4042 if (feat->offload.rx_supported & 4043 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4044 dev_features |= NETIF_F_RXCSUM; 4045 4046 netdev->features = 4047 dev_features | 4048 NETIF_F_SG | 4049 NETIF_F_RXHASH | 4050 NETIF_F_HIGHDMA; 4051 4052 netdev->hw_features |= netdev->features; 4053 netdev->vlan_features |= netdev->features; 4054 } 4055 4056 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4057 struct ena_com_dev_get_features_ctx *feat) 4058 { 4059 struct net_device *netdev = adapter->netdev; 4060 4061 /* Copy mac address */ 4062 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4063 eth_hw_addr_random(netdev); 4064 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4065 } else { 4066 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4067 eth_hw_addr_set(netdev, adapter->mac_addr); 4068 } 4069 4070 /* Set offload features */ 4071 ena_set_dev_offloads(feat, netdev); 4072 4073 adapter->max_mtu = feat->dev_attr.max_mtu; 4074 netdev->max_mtu = adapter->max_mtu; 4075 netdev->min_mtu = ENA_MIN_MTU; 4076 } 4077 4078 static int ena_rss_init_default(struct ena_adapter *adapter) 4079 { 4080 struct ena_com_dev *ena_dev = adapter->ena_dev; 4081 struct device *dev = &adapter->pdev->dev; 4082 int rc, i; 4083 u32 val; 4084 4085 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4086 if (unlikely(rc)) { 4087 dev_err(dev, "Cannot init indirect table\n"); 4088 goto err_rss_init; 4089 } 4090 4091 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4092 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4093 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4094 ENA_IO_RXQ_IDX(val)); 4095 if (unlikely(rc)) { 4096 dev_err(dev, "Cannot fill indirect table\n"); 4097 goto err_fill_indir; 4098 } 4099 } 4100 4101 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4102 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4103 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4104 dev_err(dev, "Cannot fill hash function\n"); 4105 goto err_fill_indir; 4106 } 4107 4108 rc = ena_com_set_default_hash_ctrl(ena_dev); 4109 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4110 dev_err(dev, "Cannot fill hash control\n"); 4111 goto err_fill_indir; 4112 } 4113 4114 return 0; 4115 4116 err_fill_indir: 4117 ena_com_rss_destroy(ena_dev); 4118 err_rss_init: 4119 4120 return rc; 4121 } 4122 4123 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4124 { 4125 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4126 4127 pci_release_selected_regions(pdev, release_bars); 4128 } 4129 4130 4131 static void ena_calc_io_queue_size(struct ena_adapter *adapter, 4132 struct ena_com_dev_get_features_ctx *get_feat_ctx) 4133 { 4134 struct ena_admin_feature_llq_desc *llq = &get_feat_ctx->llq; 4135 struct ena_com_dev *ena_dev = adapter->ena_dev; 4136 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4137 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4138 u32 max_tx_queue_size; 4139 u32 max_rx_queue_size; 4140 4141 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4142 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4143 &get_feat_ctx->max_queue_ext.max_queue_ext; 4144 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4145 max_queue_ext->max_rx_sq_depth); 4146 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4147 4148 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4149 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4150 llq->max_llq_depth); 4151 else 4152 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4153 max_queue_ext->max_tx_sq_depth); 4154 4155 adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4156 max_queue_ext->max_per_packet_tx_descs); 4157 adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4158 max_queue_ext->max_per_packet_rx_descs); 4159 } else { 4160 struct ena_admin_queue_feature_desc *max_queues = 4161 &get_feat_ctx->max_queues; 4162 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4163 max_queues->max_sq_depth); 4164 max_tx_queue_size = max_queues->max_cq_depth; 4165 4166 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4167 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4168 llq->max_llq_depth); 4169 else 4170 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4171 max_queues->max_sq_depth); 4172 4173 adapter->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4174 max_queues->max_packet_tx_descs); 4175 adapter->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4176 max_queues->max_packet_rx_descs); 4177 } 4178 4179 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4180 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4181 4182 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4183 max_tx_queue_size); 4184 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4185 max_rx_queue_size); 4186 4187 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4188 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4189 4190 adapter->max_tx_ring_size = max_tx_queue_size; 4191 adapter->max_rx_ring_size = max_rx_queue_size; 4192 adapter->requested_tx_ring_size = tx_queue_size; 4193 adapter->requested_rx_ring_size = rx_queue_size; 4194 } 4195 4196 /* ena_probe - Device Initialization Routine 4197 * @pdev: PCI device information struct 4198 * @ent: entry in ena_pci_tbl 4199 * 4200 * Returns 0 on success, negative on failure 4201 * 4202 * ena_probe initializes an adapter identified by a pci_dev structure. 4203 * The OS initialization, configuring of the adapter private structure, 4204 * and a hardware reset occur. 4205 */ 4206 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4207 { 4208 struct ena_com_dev_get_features_ctx get_feat_ctx; 4209 struct ena_com_dev *ena_dev = NULL; 4210 struct ena_adapter *adapter; 4211 struct net_device *netdev; 4212 static int adapters_found; 4213 u32 max_num_io_queues; 4214 bool wd_state; 4215 int bars, rc; 4216 4217 dev_dbg(&pdev->dev, "%s\n", __func__); 4218 4219 rc = pci_enable_device_mem(pdev); 4220 if (rc) { 4221 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4222 return rc; 4223 } 4224 4225 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4226 if (rc) { 4227 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4228 goto err_disable_device; 4229 } 4230 4231 pci_set_master(pdev); 4232 4233 ena_dev = vzalloc(sizeof(*ena_dev)); 4234 if (!ena_dev) { 4235 rc = -ENOMEM; 4236 goto err_disable_device; 4237 } 4238 4239 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4240 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4241 if (rc) { 4242 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4243 rc); 4244 goto err_free_ena_dev; 4245 } 4246 4247 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4248 pci_resource_start(pdev, ENA_REG_BAR), 4249 pci_resource_len(pdev, ENA_REG_BAR)); 4250 if (!ena_dev->reg_bar) { 4251 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4252 rc = -EFAULT; 4253 goto err_free_region; 4254 } 4255 4256 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4257 4258 ena_dev->dmadev = &pdev->dev; 4259 4260 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4261 if (!netdev) { 4262 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4263 rc = -ENOMEM; 4264 goto err_free_region; 4265 } 4266 4267 SET_NETDEV_DEV(netdev, &pdev->dev); 4268 adapter = netdev_priv(netdev); 4269 adapter->ena_dev = ena_dev; 4270 adapter->netdev = netdev; 4271 adapter->pdev = pdev; 4272 adapter->msg_enable = DEFAULT_MSG_ENABLE; 4273 4274 ena_dev->net_device = netdev; 4275 4276 pci_set_drvdata(pdev, adapter); 4277 4278 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4279 if (rc) { 4280 dev_err(&pdev->dev, "ENA device init failed\n"); 4281 if (rc == -ETIME) 4282 rc = -EPROBE_DEFER; 4283 goto err_netdev_destroy; 4284 } 4285 4286 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4287 if (rc) { 4288 dev_err(&pdev->dev, "ENA llq bar mapping failed\n"); 4289 goto err_device_destroy; 4290 } 4291 4292 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4293 * Updated during device initialization with the real granularity 4294 */ 4295 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4296 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4297 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4298 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4299 ena_calc_io_queue_size(adapter, &get_feat_ctx); 4300 if (unlikely(!max_num_io_queues)) { 4301 rc = -EFAULT; 4302 goto err_device_destroy; 4303 } 4304 4305 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4306 4307 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4308 4309 adapter->num_io_queues = max_num_io_queues; 4310 adapter->max_num_io_queues = max_num_io_queues; 4311 adapter->last_monitored_tx_qid = 0; 4312 4313 adapter->xdp_first_ring = 0; 4314 adapter->xdp_num_queues = 0; 4315 4316 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4317 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4318 adapter->disable_meta_caching = 4319 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4320 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4321 4322 adapter->wd_state = wd_state; 4323 4324 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4325 4326 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4327 if (rc) { 4328 dev_err(&pdev->dev, 4329 "Failed to query interrupt moderation feature\n"); 4330 goto err_device_destroy; 4331 } 4332 ena_init_io_rings(adapter, 4333 0, 4334 adapter->xdp_num_queues + 4335 adapter->num_io_queues); 4336 4337 netdev->netdev_ops = &ena_netdev_ops; 4338 netdev->watchdog_timeo = TX_TIMEOUT; 4339 ena_set_ethtool_ops(netdev); 4340 4341 netdev->priv_flags |= IFF_UNICAST_FLT; 4342 4343 u64_stats_init(&adapter->syncp); 4344 4345 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4346 if (rc) { 4347 dev_err(&pdev->dev, 4348 "Failed to enable and set the admin interrupts\n"); 4349 goto err_worker_destroy; 4350 } 4351 rc = ena_rss_init_default(adapter); 4352 if (rc && (rc != -EOPNOTSUPP)) { 4353 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4354 goto err_free_msix; 4355 } 4356 4357 ena_config_debug_area(adapter); 4358 4359 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4360 4361 netif_carrier_off(netdev); 4362 4363 rc = register_netdev(netdev); 4364 if (rc) { 4365 dev_err(&pdev->dev, "Cannot register net device\n"); 4366 goto err_rss; 4367 } 4368 4369 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4370 4371 adapter->last_keep_alive_jiffies = jiffies; 4372 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4373 adapter->missing_tx_completion_to = TX_TIMEOUT; 4374 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4375 4376 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4377 4378 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4379 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4380 4381 dev_info(&pdev->dev, 4382 "%s found at mem %lx, mac addr %pM\n", 4383 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4384 netdev->dev_addr); 4385 4386 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4387 4388 adapters_found++; 4389 4390 return 0; 4391 4392 err_rss: 4393 ena_com_delete_debug_area(ena_dev); 4394 ena_com_rss_destroy(ena_dev); 4395 err_free_msix: 4396 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4397 /* stop submitting admin commands on a device that was reset */ 4398 ena_com_set_admin_running_state(ena_dev, false); 4399 ena_free_mgmnt_irq(adapter); 4400 ena_disable_msix(adapter); 4401 err_worker_destroy: 4402 del_timer(&adapter->timer_service); 4403 err_device_destroy: 4404 ena_com_delete_host_info(ena_dev); 4405 ena_com_admin_destroy(ena_dev); 4406 err_netdev_destroy: 4407 free_netdev(netdev); 4408 err_free_region: 4409 ena_release_bars(ena_dev, pdev); 4410 err_free_ena_dev: 4411 vfree(ena_dev); 4412 err_disable_device: 4413 pci_disable_device(pdev); 4414 return rc; 4415 } 4416 4417 /*****************************************************************************/ 4418 4419 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4420 * @pdev: PCI device information struct 4421 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4422 * 4423 * __ena_shutoff is a helper routine that does the real work on shutdown and 4424 * removal paths; the difference between those paths is with regards to whether 4425 * dettach or unregister the netdevice. 4426 */ 4427 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4428 { 4429 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4430 struct ena_com_dev *ena_dev; 4431 struct net_device *netdev; 4432 4433 ena_dev = adapter->ena_dev; 4434 netdev = adapter->netdev; 4435 4436 #ifdef CONFIG_RFS_ACCEL 4437 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4438 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4439 netdev->rx_cpu_rmap = NULL; 4440 } 4441 #endif /* CONFIG_RFS_ACCEL */ 4442 4443 /* Make sure timer and reset routine won't be called after 4444 * freeing device resources. 4445 */ 4446 del_timer_sync(&adapter->timer_service); 4447 cancel_work_sync(&adapter->reset_task); 4448 4449 rtnl_lock(); /* lock released inside the below if-else block */ 4450 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4451 ena_destroy_device(adapter, true); 4452 if (shutdown) { 4453 netif_device_detach(netdev); 4454 dev_close(netdev); 4455 rtnl_unlock(); 4456 } else { 4457 rtnl_unlock(); 4458 unregister_netdev(netdev); 4459 free_netdev(netdev); 4460 } 4461 4462 ena_com_rss_destroy(ena_dev); 4463 4464 ena_com_delete_debug_area(ena_dev); 4465 4466 ena_com_delete_host_info(ena_dev); 4467 4468 ena_release_bars(ena_dev, pdev); 4469 4470 pci_disable_device(pdev); 4471 4472 vfree(ena_dev); 4473 } 4474 4475 /* ena_remove - Device Removal Routine 4476 * @pdev: PCI device information struct 4477 * 4478 * ena_remove is called by the PCI subsystem to alert the driver 4479 * that it should release a PCI device. 4480 */ 4481 4482 static void ena_remove(struct pci_dev *pdev) 4483 { 4484 __ena_shutoff(pdev, false); 4485 } 4486 4487 /* ena_shutdown - Device Shutdown Routine 4488 * @pdev: PCI device information struct 4489 * 4490 * ena_shutdown is called by the PCI subsystem to alert the driver that 4491 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4492 */ 4493 4494 static void ena_shutdown(struct pci_dev *pdev) 4495 { 4496 __ena_shutoff(pdev, true); 4497 } 4498 4499 /* ena_suspend - PM suspend callback 4500 * @dev_d: Device information struct 4501 */ 4502 static int __maybe_unused ena_suspend(struct device *dev_d) 4503 { 4504 struct pci_dev *pdev = to_pci_dev(dev_d); 4505 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4506 4507 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4508 4509 rtnl_lock(); 4510 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4511 dev_err(&pdev->dev, 4512 "Ignoring device reset request as the device is being suspended\n"); 4513 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4514 } 4515 ena_destroy_device(adapter, true); 4516 rtnl_unlock(); 4517 return 0; 4518 } 4519 4520 /* ena_resume - PM resume callback 4521 * @dev_d: Device information struct 4522 */ 4523 static int __maybe_unused ena_resume(struct device *dev_d) 4524 { 4525 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4526 int rc; 4527 4528 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4529 4530 rtnl_lock(); 4531 rc = ena_restore_device(adapter); 4532 rtnl_unlock(); 4533 return rc; 4534 } 4535 4536 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4537 4538 static struct pci_driver ena_pci_driver = { 4539 .name = DRV_MODULE_NAME, 4540 .id_table = ena_pci_tbl, 4541 .probe = ena_probe, 4542 .remove = ena_remove, 4543 .shutdown = ena_shutdown, 4544 .driver.pm = &ena_pm_ops, 4545 .sriov_configure = pci_sriov_configure_simple, 4546 }; 4547 4548 static int __init ena_init(void) 4549 { 4550 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4551 if (!ena_wq) { 4552 pr_err("Failed to create workqueue\n"); 4553 return -ENOMEM; 4554 } 4555 4556 return pci_register_driver(&ena_pci_driver); 4557 } 4558 4559 static void __exit ena_cleanup(void) 4560 { 4561 pci_unregister_driver(&ena_pci_driver); 4562 4563 if (ena_wq) { 4564 destroy_workqueue(ena_wq); 4565 ena_wq = NULL; 4566 } 4567 } 4568 4569 /****************************************************************************** 4570 ******************************** AENQ Handlers ******************************* 4571 *****************************************************************************/ 4572 /* ena_update_on_link_change: 4573 * Notify the network interface about the change in link status 4574 */ 4575 static void ena_update_on_link_change(void *adapter_data, 4576 struct ena_admin_aenq_entry *aenq_e) 4577 { 4578 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4579 struct ena_admin_aenq_link_change_desc *aenq_desc = 4580 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4581 int status = aenq_desc->flags & 4582 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4583 4584 if (status) { 4585 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4586 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4587 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4588 netif_carrier_on(adapter->netdev); 4589 } else { 4590 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4591 netif_carrier_off(adapter->netdev); 4592 } 4593 } 4594 4595 static void ena_keep_alive_wd(void *adapter_data, 4596 struct ena_admin_aenq_entry *aenq_e) 4597 { 4598 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4599 struct ena_admin_aenq_keep_alive_desc *desc; 4600 u64 rx_drops; 4601 u64 tx_drops; 4602 4603 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4604 adapter->last_keep_alive_jiffies = jiffies; 4605 4606 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4607 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4608 4609 u64_stats_update_begin(&adapter->syncp); 4610 /* These stats are accumulated by the device, so the counters indicate 4611 * all drops since last reset. 4612 */ 4613 adapter->dev_stats.rx_drops = rx_drops; 4614 adapter->dev_stats.tx_drops = tx_drops; 4615 u64_stats_update_end(&adapter->syncp); 4616 } 4617 4618 static void ena_notification(void *adapter_data, 4619 struct ena_admin_aenq_entry *aenq_e) 4620 { 4621 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4622 struct ena_admin_ena_hw_hints *hints; 4623 4624 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4625 "Invalid group(%x) expected %x\n", 4626 aenq_e->aenq_common_desc.group, 4627 ENA_ADMIN_NOTIFICATION); 4628 4629 switch (aenq_e->aenq_common_desc.syndrome) { 4630 case ENA_ADMIN_UPDATE_HINTS: 4631 hints = (struct ena_admin_ena_hw_hints *) 4632 (&aenq_e->inline_data_w4); 4633 ena_update_hints(adapter, hints); 4634 break; 4635 default: 4636 netif_err(adapter, drv, adapter->netdev, 4637 "Invalid aenq notification link state %d\n", 4638 aenq_e->aenq_common_desc.syndrome); 4639 } 4640 } 4641 4642 /* This handler will called for unknown event group or unimplemented handlers*/ 4643 static void unimplemented_aenq_handler(void *data, 4644 struct ena_admin_aenq_entry *aenq_e) 4645 { 4646 struct ena_adapter *adapter = (struct ena_adapter *)data; 4647 4648 netif_err(adapter, drv, adapter->netdev, 4649 "Unknown event was received or event with unimplemented handler\n"); 4650 } 4651 4652 static struct ena_aenq_handlers aenq_handlers = { 4653 .handlers = { 4654 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4655 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4656 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4657 }, 4658 .unimplemented_handler = unimplemented_aenq_handler 4659 }; 4660 4661 module_init(ena_init); 4662 module_exit(ena_cleanup); 4663