1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #ifdef CONFIG_RFS_ACCEL 9 #include <linux/cpu_rmap.h> 10 #endif /* CONFIG_RFS_ACCEL */ 11 #include <linux/ethtool.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/numa.h> 15 #include <linux/pci.h> 16 #include <linux/utsname.h> 17 #include <linux/version.h> 18 #include <linux/vmalloc.h> 19 #include <net/ip.h> 20 21 #include "ena_netdev.h" 22 #include <linux/bpf_trace.h> 23 #include "ena_pci_id_tbl.h" 24 25 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates"); 26 MODULE_DESCRIPTION(DEVICE_NAME); 27 MODULE_LICENSE("GPL"); 28 29 /* Time in jiffies before concluding the transmitter is hung. */ 30 #define TX_TIMEOUT (5 * HZ) 31 32 #define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus()) 33 34 #define ENA_NAPI_BUDGET 64 35 36 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \ 37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR) 38 static int debug = -1; 39 module_param(debug, int, 0); 40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 41 42 static struct ena_aenq_handlers aenq_handlers; 43 44 static struct workqueue_struct *ena_wq; 45 46 MODULE_DEVICE_TABLE(pci, ena_pci_tbl); 47 48 static int ena_rss_init_default(struct ena_adapter *adapter); 49 static void check_for_admin_com_state(struct ena_adapter *adapter); 50 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful); 51 static int ena_restore_device(struct ena_adapter *adapter); 52 53 static void ena_init_io_rings(struct ena_adapter *adapter, 54 int first_index, int count); 55 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index, 56 int count); 57 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index, 58 int count); 59 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid); 60 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 61 int first_index, 62 int count); 63 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid); 64 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid); 65 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget); 66 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter); 67 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 68 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 69 int first_index, int count); 70 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 71 int first_index, int count); 72 static int ena_up(struct ena_adapter *adapter); 73 static void ena_down(struct ena_adapter *adapter); 74 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 75 struct ena_ring *rx_ring); 76 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 77 struct ena_ring *rx_ring); 78 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 79 struct ena_tx_buffer *tx_info); 80 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 81 int first_index, int count); 82 83 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 84 static void ena_increase_stat(u64 *statp, u64 cnt, 85 struct u64_stats_sync *syncp) 86 { 87 u64_stats_update_begin(syncp); 88 (*statp) += cnt; 89 u64_stats_update_end(syncp); 90 } 91 92 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue) 93 { 94 struct ena_adapter *adapter = netdev_priv(dev); 95 96 /* Change the state of the device to trigger reset 97 * Check that we are not in the middle or a trigger already 98 */ 99 100 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 101 return; 102 103 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD; 104 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp); 105 106 netif_err(adapter, tx_err, dev, "Transmit time out\n"); 107 } 108 109 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu) 110 { 111 int i; 112 113 for (i = 0; i < adapter->num_io_queues; i++) 114 adapter->rx_ring[i].mtu = mtu; 115 } 116 117 static int ena_change_mtu(struct net_device *dev, int new_mtu) 118 { 119 struct ena_adapter *adapter = netdev_priv(dev); 120 int ret; 121 122 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 123 if (!ret) { 124 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu); 125 update_rx_ring_mtu(adapter, new_mtu); 126 dev->mtu = new_mtu; 127 } else { 128 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n", 129 new_mtu); 130 } 131 132 return ret; 133 } 134 135 static int ena_xmit_common(struct net_device *dev, 136 struct ena_ring *ring, 137 struct ena_tx_buffer *tx_info, 138 struct ena_com_tx_ctx *ena_tx_ctx, 139 u16 next_to_use, 140 u32 bytes) 141 { 142 struct ena_adapter *adapter = netdev_priv(dev); 143 int rc, nb_hw_desc; 144 145 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq, 146 ena_tx_ctx))) { 147 netif_dbg(adapter, tx_queued, dev, 148 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n", 149 ring->qid); 150 ena_com_write_sq_doorbell(ring->ena_com_io_sq); 151 } 152 153 /* prepare the packet's descriptors to dma engine */ 154 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx, 155 &nb_hw_desc); 156 157 /* In case there isn't enough space in the queue for the packet, 158 * we simply drop it. All other failure reasons of 159 * ena_com_prepare_tx() are fatal and therefore require a device reset. 160 */ 161 if (unlikely(rc)) { 162 netif_err(adapter, tx_queued, dev, 163 "Failed to prepare tx bufs\n"); 164 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1, 165 &ring->syncp); 166 if (rc != -ENOMEM) { 167 adapter->reset_reason = 168 ENA_REGS_RESET_DRIVER_INVALID_STATE; 169 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 170 } 171 return rc; 172 } 173 174 u64_stats_update_begin(&ring->syncp); 175 ring->tx_stats.cnt++; 176 ring->tx_stats.bytes += bytes; 177 u64_stats_update_end(&ring->syncp); 178 179 tx_info->tx_descs = nb_hw_desc; 180 tx_info->last_jiffies = jiffies; 181 tx_info->print_once = 0; 182 183 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 184 ring->ring_size); 185 return 0; 186 } 187 188 /* This is the XDP napi callback. XDP queues use a separate napi callback 189 * than Rx/Tx queues. 190 */ 191 static int ena_xdp_io_poll(struct napi_struct *napi, int budget) 192 { 193 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 194 u32 xdp_work_done, xdp_budget; 195 struct ena_ring *xdp_ring; 196 int napi_comp_call = 0; 197 int ret; 198 199 xdp_ring = ena_napi->xdp_ring; 200 xdp_ring->first_interrupt = ena_napi->first_interrupt; 201 202 xdp_budget = budget; 203 204 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) || 205 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) { 206 napi_complete_done(napi, 0); 207 return 0; 208 } 209 210 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget); 211 212 /* If the device is about to reset or down, avoid unmask 213 * the interrupt and return 0 so NAPI won't reschedule 214 */ 215 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) { 216 napi_complete_done(napi, 0); 217 ret = 0; 218 } else if (xdp_budget > xdp_work_done) { 219 napi_comp_call = 1; 220 if (napi_complete_done(napi, xdp_work_done)) 221 ena_unmask_interrupt(xdp_ring, NULL); 222 ena_update_ring_numa_node(xdp_ring, NULL); 223 ret = xdp_work_done; 224 } else { 225 ret = xdp_budget; 226 } 227 228 u64_stats_update_begin(&xdp_ring->syncp); 229 xdp_ring->tx_stats.napi_comp += napi_comp_call; 230 xdp_ring->tx_stats.tx_poll++; 231 u64_stats_update_end(&xdp_ring->syncp); 232 233 return ret; 234 } 235 236 static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring, 237 struct ena_tx_buffer *tx_info, 238 struct xdp_frame *xdpf, 239 void **push_hdr, 240 u32 *push_len) 241 { 242 struct ena_adapter *adapter = xdp_ring->adapter; 243 struct ena_com_buf *ena_buf; 244 dma_addr_t dma = 0; 245 u32 size; 246 247 tx_info->xdpf = xdpf; 248 size = tx_info->xdpf->len; 249 ena_buf = tx_info->bufs; 250 251 /* llq push buffer */ 252 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size); 253 *push_hdr = tx_info->xdpf->data; 254 255 if (size - *push_len > 0) { 256 dma = dma_map_single(xdp_ring->dev, 257 *push_hdr + *push_len, 258 size - *push_len, 259 DMA_TO_DEVICE); 260 if (unlikely(dma_mapping_error(xdp_ring->dev, dma))) 261 goto error_report_dma_error; 262 263 tx_info->map_linear_data = 1; 264 tx_info->num_of_bufs = 1; 265 } 266 267 ena_buf->paddr = dma; 268 ena_buf->len = size; 269 270 return 0; 271 272 error_report_dma_error: 273 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1, 274 &xdp_ring->syncp); 275 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n"); 276 277 xdp_return_frame_rx_napi(tx_info->xdpf); 278 tx_info->xdpf = NULL; 279 tx_info->num_of_bufs = 0; 280 281 return -EINVAL; 282 } 283 284 static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring, 285 struct net_device *dev, 286 struct xdp_frame *xdpf, 287 int flags) 288 { 289 struct ena_com_tx_ctx ena_tx_ctx = {}; 290 struct ena_tx_buffer *tx_info; 291 u16 next_to_use, req_id; 292 void *push_hdr; 293 u32 push_len; 294 int rc; 295 296 next_to_use = xdp_ring->next_to_use; 297 req_id = xdp_ring->free_ids[next_to_use]; 298 tx_info = &xdp_ring->tx_buffer_info[req_id]; 299 tx_info->num_of_bufs = 0; 300 301 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &push_hdr, &push_len); 302 if (unlikely(rc)) 303 goto error_drop_packet; 304 305 ena_tx_ctx.ena_bufs = tx_info->bufs; 306 ena_tx_ctx.push_header = push_hdr; 307 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 308 ena_tx_ctx.req_id = req_id; 309 ena_tx_ctx.header_len = push_len; 310 311 rc = ena_xmit_common(dev, 312 xdp_ring, 313 tx_info, 314 &ena_tx_ctx, 315 next_to_use, 316 xdpf->len); 317 if (rc) 318 goto error_unmap_dma; 319 /* trigger the dma engine. ena_com_write_sq_doorbell() 320 * has a mb 321 */ 322 if (flags & XDP_XMIT_FLUSH) { 323 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 324 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 325 &xdp_ring->syncp); 326 } 327 328 return rc; 329 330 error_unmap_dma: 331 ena_unmap_tx_buff(xdp_ring, tx_info); 332 tx_info->xdpf = NULL; 333 error_drop_packet: 334 xdp_return_frame(xdpf); 335 return rc; 336 } 337 338 static int ena_xdp_xmit(struct net_device *dev, int n, 339 struct xdp_frame **frames, u32 flags) 340 { 341 struct ena_adapter *adapter = netdev_priv(dev); 342 int qid, i, err, drops = 0; 343 struct ena_ring *xdp_ring; 344 345 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) 346 return -EINVAL; 347 348 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 349 return -ENETDOWN; 350 351 /* We assume that all rings have the same XDP program */ 352 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog)) 353 return -ENXIO; 354 355 qid = smp_processor_id() % adapter->xdp_num_queues; 356 qid += adapter->xdp_first_ring; 357 xdp_ring = &adapter->tx_ring[qid]; 358 359 /* Other CPU ids might try to send thorugh this queue */ 360 spin_lock(&xdp_ring->xdp_tx_lock); 361 362 for (i = 0; i < n; i++) { 363 err = ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0); 364 /* The descriptor is freed by ena_xdp_xmit_frame in case 365 * of an error. 366 */ 367 if (err) 368 drops++; 369 } 370 371 /* Ring doorbell to make device aware of the packets */ 372 if (flags & XDP_XMIT_FLUSH) { 373 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq); 374 ena_increase_stat(&xdp_ring->tx_stats.doorbells, 1, 375 &xdp_ring->syncp); 376 } 377 378 spin_unlock(&xdp_ring->xdp_tx_lock); 379 380 /* Return number of packets sent */ 381 return n - drops; 382 } 383 384 static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp) 385 { 386 struct bpf_prog *xdp_prog; 387 struct ena_ring *xdp_ring; 388 u32 verdict = XDP_PASS; 389 struct xdp_frame *xdpf; 390 u64 *xdp_stat; 391 int qid; 392 393 rcu_read_lock(); 394 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog); 395 396 if (!xdp_prog) 397 goto out; 398 399 verdict = bpf_prog_run_xdp(xdp_prog, xdp); 400 401 switch (verdict) { 402 case XDP_TX: 403 xdpf = xdp_convert_buff_to_frame(xdp); 404 if (unlikely(!xdpf)) { 405 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 406 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 407 verdict = XDP_ABORTED; 408 break; 409 } 410 411 /* Find xmit queue */ 412 qid = rx_ring->qid + rx_ring->adapter->num_io_queues; 413 xdp_ring = &rx_ring->adapter->tx_ring[qid]; 414 415 /* The XDP queues are shared between XDP_TX and XDP_REDIRECT */ 416 spin_lock(&xdp_ring->xdp_tx_lock); 417 418 ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf, XDP_XMIT_FLUSH); 419 420 spin_unlock(&xdp_ring->xdp_tx_lock); 421 xdp_stat = &rx_ring->rx_stats.xdp_tx; 422 break; 423 case XDP_REDIRECT: 424 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) { 425 xdp_stat = &rx_ring->rx_stats.xdp_redirect; 426 break; 427 } 428 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 429 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 430 verdict = XDP_ABORTED; 431 break; 432 case XDP_ABORTED: 433 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict); 434 xdp_stat = &rx_ring->rx_stats.xdp_aborted; 435 break; 436 case XDP_DROP: 437 xdp_stat = &rx_ring->rx_stats.xdp_drop; 438 break; 439 case XDP_PASS: 440 xdp_stat = &rx_ring->rx_stats.xdp_pass; 441 break; 442 default: 443 bpf_warn_invalid_xdp_action(verdict); 444 xdp_stat = &rx_ring->rx_stats.xdp_invalid; 445 } 446 447 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp); 448 out: 449 rcu_read_unlock(); 450 451 return verdict; 452 } 453 454 static void ena_init_all_xdp_queues(struct ena_adapter *adapter) 455 { 456 adapter->xdp_first_ring = adapter->num_io_queues; 457 adapter->xdp_num_queues = adapter->num_io_queues; 458 459 ena_init_io_rings(adapter, 460 adapter->xdp_first_ring, 461 adapter->xdp_num_queues); 462 } 463 464 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter) 465 { 466 int rc = 0; 467 468 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring, 469 adapter->xdp_num_queues); 470 if (rc) 471 goto setup_err; 472 473 rc = ena_create_io_tx_queues_in_range(adapter, 474 adapter->xdp_first_ring, 475 adapter->xdp_num_queues); 476 if (rc) 477 goto create_err; 478 479 return 0; 480 481 create_err: 482 ena_free_all_io_tx_resources(adapter); 483 setup_err: 484 return rc; 485 } 486 487 /* Provides a way for both kernel and bpf-prog to know 488 * more about the RX-queue a given XDP frame arrived on. 489 */ 490 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring) 491 { 492 int rc; 493 494 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0); 495 496 if (rc) { 497 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 498 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n", 499 rx_ring->qid, rc); 500 goto err; 501 } 502 503 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED, 504 NULL); 505 506 if (rc) { 507 netif_err(rx_ring->adapter, ifup, rx_ring->netdev, 508 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n", 509 rx_ring->qid, rc); 510 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 511 } 512 513 err: 514 return rc; 515 } 516 517 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring) 518 { 519 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq); 520 xdp_rxq_info_unreg(&rx_ring->xdp_rxq); 521 } 522 523 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter, 524 struct bpf_prog *prog, 525 int first, int count) 526 { 527 struct ena_ring *rx_ring; 528 int i = 0; 529 530 for (i = first; i < count; i++) { 531 rx_ring = &adapter->rx_ring[i]; 532 xchg(&rx_ring->xdp_bpf_prog, prog); 533 if (prog) { 534 ena_xdp_register_rxq_info(rx_ring); 535 rx_ring->rx_headroom = XDP_PACKET_HEADROOM; 536 } else { 537 ena_xdp_unregister_rxq_info(rx_ring); 538 rx_ring->rx_headroom = 0; 539 } 540 } 541 } 542 543 static void ena_xdp_exchange_program(struct ena_adapter *adapter, 544 struct bpf_prog *prog) 545 { 546 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog); 547 548 ena_xdp_exchange_program_rx_in_range(adapter, 549 prog, 550 0, 551 adapter->num_io_queues); 552 553 if (old_bpf_prog) 554 bpf_prog_put(old_bpf_prog); 555 } 556 557 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter) 558 { 559 bool was_up; 560 int rc; 561 562 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 563 564 if (was_up) 565 ena_down(adapter); 566 567 adapter->xdp_first_ring = 0; 568 adapter->xdp_num_queues = 0; 569 ena_xdp_exchange_program(adapter, NULL); 570 if (was_up) { 571 rc = ena_up(adapter); 572 if (rc) 573 return rc; 574 } 575 return 0; 576 } 577 578 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf) 579 { 580 struct ena_adapter *adapter = netdev_priv(netdev); 581 struct bpf_prog *prog = bpf->prog; 582 struct bpf_prog *old_bpf_prog; 583 int rc, prev_mtu; 584 bool is_up; 585 586 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 587 rc = ena_xdp_allowed(adapter); 588 if (rc == ENA_XDP_ALLOWED) { 589 old_bpf_prog = adapter->xdp_bpf_prog; 590 if (prog) { 591 if (!is_up) { 592 ena_init_all_xdp_queues(adapter); 593 } else if (!old_bpf_prog) { 594 ena_down(adapter); 595 ena_init_all_xdp_queues(adapter); 596 } 597 ena_xdp_exchange_program(adapter, prog); 598 599 if (is_up && !old_bpf_prog) { 600 rc = ena_up(adapter); 601 if (rc) 602 return rc; 603 } 604 } else if (old_bpf_prog) { 605 rc = ena_destroy_and_free_all_xdp_queues(adapter); 606 if (rc) 607 return rc; 608 } 609 610 prev_mtu = netdev->max_mtu; 611 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu; 612 613 if (!old_bpf_prog) 614 netif_info(adapter, drv, adapter->netdev, 615 "XDP program is set, changing the max_mtu from %d to %d", 616 prev_mtu, netdev->max_mtu); 617 618 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) { 619 netif_err(adapter, drv, adapter->netdev, 620 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on", 621 netdev->mtu, ENA_XDP_MAX_MTU); 622 NL_SET_ERR_MSG_MOD(bpf->extack, 623 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info"); 624 return -EINVAL; 625 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) { 626 netif_err(adapter, drv, adapter->netdev, 627 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n", 628 adapter->num_io_queues, adapter->max_num_io_queues); 629 NL_SET_ERR_MSG_MOD(bpf->extack, 630 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info"); 631 return -EINVAL; 632 } 633 634 return 0; 635 } 636 637 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp 638 * program as well as to query the current xdp program id. 639 */ 640 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf) 641 { 642 switch (bpf->command) { 643 case XDP_SETUP_PROG: 644 return ena_xdp_set(netdev, bpf); 645 default: 646 return -EINVAL; 647 } 648 return 0; 649 } 650 651 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter) 652 { 653 #ifdef CONFIG_RFS_ACCEL 654 u32 i; 655 int rc; 656 657 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues); 658 if (!adapter->netdev->rx_cpu_rmap) 659 return -ENOMEM; 660 for (i = 0; i < adapter->num_io_queues; i++) { 661 int irq_idx = ENA_IO_IRQ_IDX(i); 662 663 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap, 664 pci_irq_vector(adapter->pdev, irq_idx)); 665 if (rc) { 666 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 667 adapter->netdev->rx_cpu_rmap = NULL; 668 return rc; 669 } 670 } 671 #endif /* CONFIG_RFS_ACCEL */ 672 return 0; 673 } 674 675 static void ena_init_io_rings_common(struct ena_adapter *adapter, 676 struct ena_ring *ring, u16 qid) 677 { 678 ring->qid = qid; 679 ring->pdev = adapter->pdev; 680 ring->dev = &adapter->pdev->dev; 681 ring->netdev = adapter->netdev; 682 ring->napi = &adapter->ena_napi[qid].napi; 683 ring->adapter = adapter; 684 ring->ena_dev = adapter->ena_dev; 685 ring->per_napi_packets = 0; 686 ring->cpu = 0; 687 ring->first_interrupt = false; 688 ring->no_interrupt_event_cnt = 0; 689 u64_stats_init(&ring->syncp); 690 } 691 692 static void ena_init_io_rings(struct ena_adapter *adapter, 693 int first_index, int count) 694 { 695 struct ena_com_dev *ena_dev; 696 struct ena_ring *txr, *rxr; 697 int i; 698 699 ena_dev = adapter->ena_dev; 700 701 for (i = first_index; i < first_index + count; i++) { 702 txr = &adapter->tx_ring[i]; 703 rxr = &adapter->rx_ring[i]; 704 705 /* TX common ring state */ 706 ena_init_io_rings_common(adapter, txr, i); 707 708 /* TX specific ring state */ 709 txr->ring_size = adapter->requested_tx_ring_size; 710 txr->tx_max_header_size = ena_dev->tx_max_header_size; 711 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 712 txr->sgl_size = adapter->max_tx_sgl_size; 713 txr->smoothed_interval = 714 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 715 txr->disable_meta_caching = adapter->disable_meta_caching; 716 spin_lock_init(&txr->xdp_tx_lock); 717 718 /* Don't init RX queues for xdp queues */ 719 if (!ENA_IS_XDP_INDEX(adapter, i)) { 720 /* RX common ring state */ 721 ena_init_io_rings_common(adapter, rxr, i); 722 723 /* RX specific ring state */ 724 rxr->ring_size = adapter->requested_rx_ring_size; 725 rxr->rx_copybreak = adapter->rx_copybreak; 726 rxr->sgl_size = adapter->max_rx_sgl_size; 727 rxr->smoothed_interval = 728 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 729 rxr->empty_rx_queue = 0; 730 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 731 } 732 } 733 } 734 735 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors) 736 * @adapter: network interface device structure 737 * @qid: queue index 738 * 739 * Return 0 on success, negative on failure 740 */ 741 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 742 { 743 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 744 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 745 int size, i, node; 746 747 if (tx_ring->tx_buffer_info) { 748 netif_err(adapter, ifup, 749 adapter->netdev, "tx_buffer_info info is not NULL"); 750 return -EEXIST; 751 } 752 753 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 754 node = cpu_to_node(ena_irq->cpu); 755 756 tx_ring->tx_buffer_info = vzalloc_node(size, node); 757 if (!tx_ring->tx_buffer_info) { 758 tx_ring->tx_buffer_info = vzalloc(size); 759 if (!tx_ring->tx_buffer_info) 760 goto err_tx_buffer_info; 761 } 762 763 size = sizeof(u16) * tx_ring->ring_size; 764 tx_ring->free_ids = vzalloc_node(size, node); 765 if (!tx_ring->free_ids) { 766 tx_ring->free_ids = vzalloc(size); 767 if (!tx_ring->free_ids) 768 goto err_tx_free_ids; 769 } 770 771 size = tx_ring->tx_max_header_size; 772 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node); 773 if (!tx_ring->push_buf_intermediate_buf) { 774 tx_ring->push_buf_intermediate_buf = vzalloc(size); 775 if (!tx_ring->push_buf_intermediate_buf) 776 goto err_push_buf_intermediate_buf; 777 } 778 779 /* Req id ring for TX out of order completions */ 780 for (i = 0; i < tx_ring->ring_size; i++) 781 tx_ring->free_ids[i] = i; 782 783 /* Reset tx statistics */ 784 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats)); 785 786 tx_ring->next_to_use = 0; 787 tx_ring->next_to_clean = 0; 788 tx_ring->cpu = ena_irq->cpu; 789 return 0; 790 791 err_push_buf_intermediate_buf: 792 vfree(tx_ring->free_ids); 793 tx_ring->free_ids = NULL; 794 err_tx_free_ids: 795 vfree(tx_ring->tx_buffer_info); 796 tx_ring->tx_buffer_info = NULL; 797 err_tx_buffer_info: 798 return -ENOMEM; 799 } 800 801 /* ena_free_tx_resources - Free I/O Tx Resources per Queue 802 * @adapter: network interface device structure 803 * @qid: queue index 804 * 805 * Free all transmit software resources 806 */ 807 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid) 808 { 809 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 810 811 vfree(tx_ring->tx_buffer_info); 812 tx_ring->tx_buffer_info = NULL; 813 814 vfree(tx_ring->free_ids); 815 tx_ring->free_ids = NULL; 816 817 vfree(tx_ring->push_buf_intermediate_buf); 818 tx_ring->push_buf_intermediate_buf = NULL; 819 } 820 821 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 822 int first_index, 823 int count) 824 { 825 int i, rc = 0; 826 827 for (i = first_index; i < first_index + count; i++) { 828 rc = ena_setup_tx_resources(adapter, i); 829 if (rc) 830 goto err_setup_tx; 831 } 832 833 return 0; 834 835 err_setup_tx: 836 837 netif_err(adapter, ifup, adapter->netdev, 838 "Tx queue %d: allocation failed\n", i); 839 840 /* rewind the index freeing the rings as we go */ 841 while (first_index < i--) 842 ena_free_tx_resources(adapter, i); 843 return rc; 844 } 845 846 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 847 int first_index, int count) 848 { 849 int i; 850 851 for (i = first_index; i < first_index + count; i++) 852 ena_free_tx_resources(adapter, i); 853 } 854 855 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues 856 * @adapter: board private structure 857 * 858 * Free all transmit software resources 859 */ 860 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) 861 { 862 ena_free_all_io_tx_resources_in_range(adapter, 863 0, 864 adapter->xdp_num_queues + 865 adapter->num_io_queues); 866 } 867 868 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors) 869 * @adapter: network interface device structure 870 * @qid: queue index 871 * 872 * Returns 0 on success, negative on failure 873 */ 874 static int ena_setup_rx_resources(struct ena_adapter *adapter, 875 u32 qid) 876 { 877 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 878 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)]; 879 int size, node, i; 880 881 if (rx_ring->rx_buffer_info) { 882 netif_err(adapter, ifup, adapter->netdev, 883 "rx_buffer_info is not NULL"); 884 return -EEXIST; 885 } 886 887 /* alloc extra element so in rx path 888 * we can always prefetch rx_info + 1 889 */ 890 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1); 891 node = cpu_to_node(ena_irq->cpu); 892 893 rx_ring->rx_buffer_info = vzalloc_node(size, node); 894 if (!rx_ring->rx_buffer_info) { 895 rx_ring->rx_buffer_info = vzalloc(size); 896 if (!rx_ring->rx_buffer_info) 897 return -ENOMEM; 898 } 899 900 size = sizeof(u16) * rx_ring->ring_size; 901 rx_ring->free_ids = vzalloc_node(size, node); 902 if (!rx_ring->free_ids) { 903 rx_ring->free_ids = vzalloc(size); 904 if (!rx_ring->free_ids) { 905 vfree(rx_ring->rx_buffer_info); 906 rx_ring->rx_buffer_info = NULL; 907 return -ENOMEM; 908 } 909 } 910 911 /* Req id ring for receiving RX pkts out of order */ 912 for (i = 0; i < rx_ring->ring_size; i++) 913 rx_ring->free_ids[i] = i; 914 915 /* Reset rx statistics */ 916 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats)); 917 918 rx_ring->next_to_clean = 0; 919 rx_ring->next_to_use = 0; 920 rx_ring->cpu = ena_irq->cpu; 921 922 return 0; 923 } 924 925 /* ena_free_rx_resources - Free I/O Rx Resources 926 * @adapter: network interface device structure 927 * @qid: queue index 928 * 929 * Free all receive software resources 930 */ 931 static void ena_free_rx_resources(struct ena_adapter *adapter, 932 u32 qid) 933 { 934 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 935 936 vfree(rx_ring->rx_buffer_info); 937 rx_ring->rx_buffer_info = NULL; 938 939 vfree(rx_ring->free_ids); 940 rx_ring->free_ids = NULL; 941 } 942 943 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues 944 * @adapter: board private structure 945 * 946 * Return 0 on success, negative on failure 947 */ 948 static int ena_setup_all_rx_resources(struct ena_adapter *adapter) 949 { 950 int i, rc = 0; 951 952 for (i = 0; i < adapter->num_io_queues; i++) { 953 rc = ena_setup_rx_resources(adapter, i); 954 if (rc) 955 goto err_setup_rx; 956 } 957 958 return 0; 959 960 err_setup_rx: 961 962 netif_err(adapter, ifup, adapter->netdev, 963 "Rx queue %d: allocation failed\n", i); 964 965 /* rewind the index freeing the rings as we go */ 966 while (i--) 967 ena_free_rx_resources(adapter, i); 968 return rc; 969 } 970 971 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues 972 * @adapter: board private structure 973 * 974 * Free all receive software resources 975 */ 976 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) 977 { 978 int i; 979 980 for (i = 0; i < adapter->num_io_queues; i++) 981 ena_free_rx_resources(adapter, i); 982 } 983 984 static int ena_alloc_rx_page(struct ena_ring *rx_ring, 985 struct ena_rx_buffer *rx_info, gfp_t gfp) 986 { 987 int headroom = rx_ring->rx_headroom; 988 struct ena_com_buf *ena_buf; 989 struct page *page; 990 dma_addr_t dma; 991 992 /* restore page offset value in case it has been changed by device */ 993 rx_info->page_offset = headroom; 994 995 /* if previous allocated page is not used */ 996 if (unlikely(rx_info->page)) 997 return 0; 998 999 page = alloc_page(gfp); 1000 if (unlikely(!page)) { 1001 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1, 1002 &rx_ring->syncp); 1003 return -ENOMEM; 1004 } 1005 1006 /* To enable NIC-side port-mirroring, AKA SPAN port, 1007 * we make the buffer readable from the nic as well 1008 */ 1009 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE, 1010 DMA_BIDIRECTIONAL); 1011 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) { 1012 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1, 1013 &rx_ring->syncp); 1014 1015 __free_page(page); 1016 return -EIO; 1017 } 1018 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1019 "Allocate page %p, rx_info %p\n", page, rx_info); 1020 1021 rx_info->page = page; 1022 ena_buf = &rx_info->ena_buf; 1023 ena_buf->paddr = dma + headroom; 1024 ena_buf->len = ENA_PAGE_SIZE - headroom; 1025 1026 return 0; 1027 } 1028 1029 static void ena_unmap_rx_buff(struct ena_ring *rx_ring, 1030 struct ena_rx_buffer *rx_info) 1031 { 1032 struct ena_com_buf *ena_buf = &rx_info->ena_buf; 1033 1034 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom, 1035 ENA_PAGE_SIZE, 1036 DMA_BIDIRECTIONAL); 1037 } 1038 1039 static void ena_free_rx_page(struct ena_ring *rx_ring, 1040 struct ena_rx_buffer *rx_info) 1041 { 1042 struct page *page = rx_info->page; 1043 1044 if (unlikely(!page)) { 1045 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1046 "Trying to free unallocated buffer\n"); 1047 return; 1048 } 1049 1050 ena_unmap_rx_buff(rx_ring, rx_info); 1051 1052 __free_page(page); 1053 rx_info->page = NULL; 1054 } 1055 1056 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num) 1057 { 1058 u16 next_to_use, req_id; 1059 u32 i; 1060 int rc; 1061 1062 next_to_use = rx_ring->next_to_use; 1063 1064 for (i = 0; i < num; i++) { 1065 struct ena_rx_buffer *rx_info; 1066 1067 req_id = rx_ring->free_ids[next_to_use]; 1068 1069 rx_info = &rx_ring->rx_buffer_info[req_id]; 1070 1071 rc = ena_alloc_rx_page(rx_ring, rx_info, 1072 GFP_ATOMIC | __GFP_COMP); 1073 if (unlikely(rc < 0)) { 1074 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1075 "Failed to allocate buffer for rx queue %d\n", 1076 rx_ring->qid); 1077 break; 1078 } 1079 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1080 &rx_info->ena_buf, 1081 req_id); 1082 if (unlikely(rc)) { 1083 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1084 "Failed to add buffer for rx queue %d\n", 1085 rx_ring->qid); 1086 break; 1087 } 1088 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1089 rx_ring->ring_size); 1090 } 1091 1092 if (unlikely(i < num)) { 1093 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1, 1094 &rx_ring->syncp); 1095 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev, 1096 "Refilled rx qid %d with only %d buffers (from %d)\n", 1097 rx_ring->qid, i, num); 1098 } 1099 1100 /* ena_com_write_sq_doorbell issues a wmb() */ 1101 if (likely(i)) 1102 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1103 1104 rx_ring->next_to_use = next_to_use; 1105 1106 return i; 1107 } 1108 1109 static void ena_free_rx_bufs(struct ena_adapter *adapter, 1110 u32 qid) 1111 { 1112 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1113 u32 i; 1114 1115 for (i = 0; i < rx_ring->ring_size; i++) { 1116 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1117 1118 if (rx_info->page) 1119 ena_free_rx_page(rx_ring, rx_info); 1120 } 1121 } 1122 1123 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers 1124 * @adapter: board private structure 1125 */ 1126 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1127 { 1128 struct ena_ring *rx_ring; 1129 int i, rc, bufs_num; 1130 1131 for (i = 0; i < adapter->num_io_queues; i++) { 1132 rx_ring = &adapter->rx_ring[i]; 1133 bufs_num = rx_ring->ring_size - 1; 1134 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1135 1136 if (unlikely(rc != bufs_num)) 1137 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev, 1138 "Refilling Queue %d failed. allocated %d buffers from: %d\n", 1139 i, rc, bufs_num); 1140 } 1141 } 1142 1143 static void ena_free_all_rx_bufs(struct ena_adapter *adapter) 1144 { 1145 int i; 1146 1147 for (i = 0; i < adapter->num_io_queues; i++) 1148 ena_free_rx_bufs(adapter, i); 1149 } 1150 1151 static void ena_unmap_tx_buff(struct ena_ring *tx_ring, 1152 struct ena_tx_buffer *tx_info) 1153 { 1154 struct ena_com_buf *ena_buf; 1155 u32 cnt; 1156 int i; 1157 1158 ena_buf = tx_info->bufs; 1159 cnt = tx_info->num_of_bufs; 1160 1161 if (unlikely(!cnt)) 1162 return; 1163 1164 if (tx_info->map_linear_data) { 1165 dma_unmap_single(tx_ring->dev, 1166 dma_unmap_addr(ena_buf, paddr), 1167 dma_unmap_len(ena_buf, len), 1168 DMA_TO_DEVICE); 1169 ena_buf++; 1170 cnt--; 1171 } 1172 1173 /* unmap remaining mapped pages */ 1174 for (i = 0; i < cnt; i++) { 1175 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr), 1176 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE); 1177 ena_buf++; 1178 } 1179 } 1180 1181 /* ena_free_tx_bufs - Free Tx Buffers per Queue 1182 * @tx_ring: TX ring for which buffers be freed 1183 */ 1184 static void ena_free_tx_bufs(struct ena_ring *tx_ring) 1185 { 1186 bool print_once = true; 1187 u32 i; 1188 1189 for (i = 0; i < tx_ring->ring_size; i++) { 1190 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1191 1192 if (!tx_info->skb) 1193 continue; 1194 1195 if (print_once) { 1196 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev, 1197 "Free uncompleted tx skb qid %d idx 0x%x\n", 1198 tx_ring->qid, i); 1199 print_once = false; 1200 } else { 1201 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev, 1202 "Free uncompleted tx skb qid %d idx 0x%x\n", 1203 tx_ring->qid, i); 1204 } 1205 1206 ena_unmap_tx_buff(tx_ring, tx_info); 1207 1208 dev_kfree_skb_any(tx_info->skb); 1209 } 1210 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev, 1211 tx_ring->qid)); 1212 } 1213 1214 static void ena_free_all_tx_bufs(struct ena_adapter *adapter) 1215 { 1216 struct ena_ring *tx_ring; 1217 int i; 1218 1219 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1220 tx_ring = &adapter->tx_ring[i]; 1221 ena_free_tx_bufs(tx_ring); 1222 } 1223 } 1224 1225 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1226 { 1227 u16 ena_qid; 1228 int i; 1229 1230 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) { 1231 ena_qid = ENA_IO_TXQ_IDX(i); 1232 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1233 } 1234 } 1235 1236 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1237 { 1238 u16 ena_qid; 1239 int i; 1240 1241 for (i = 0; i < adapter->num_io_queues; i++) { 1242 ena_qid = ENA_IO_RXQ_IDX(i); 1243 cancel_work_sync(&adapter->ena_napi[i].dim.work); 1244 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1245 } 1246 } 1247 1248 static void ena_destroy_all_io_queues(struct ena_adapter *adapter) 1249 { 1250 ena_destroy_all_tx_queues(adapter); 1251 ena_destroy_all_rx_queues(adapter); 1252 } 1253 1254 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 1255 struct ena_tx_buffer *tx_info, bool is_xdp) 1256 { 1257 if (tx_info) 1258 netif_err(ring->adapter, 1259 tx_done, 1260 ring->netdev, 1261 "tx_info doesn't have valid %s", 1262 is_xdp ? "xdp frame" : "skb"); 1263 else 1264 netif_err(ring->adapter, 1265 tx_done, 1266 ring->netdev, 1267 "Invalid req_id: %hu\n", 1268 req_id); 1269 1270 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp); 1271 1272 /* Trigger device reset */ 1273 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID; 1274 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags); 1275 return -EFAULT; 1276 } 1277 1278 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id) 1279 { 1280 struct ena_tx_buffer *tx_info = NULL; 1281 1282 if (likely(req_id < tx_ring->ring_size)) { 1283 tx_info = &tx_ring->tx_buffer_info[req_id]; 1284 if (likely(tx_info->skb)) 1285 return 0; 1286 } 1287 1288 return handle_invalid_req_id(tx_ring, req_id, tx_info, false); 1289 } 1290 1291 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id) 1292 { 1293 struct ena_tx_buffer *tx_info = NULL; 1294 1295 if (likely(req_id < xdp_ring->ring_size)) { 1296 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1297 if (likely(tx_info->xdpf)) 1298 return 0; 1299 } 1300 1301 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true); 1302 } 1303 1304 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget) 1305 { 1306 struct netdev_queue *txq; 1307 bool above_thresh; 1308 u32 tx_bytes = 0; 1309 u32 total_done = 0; 1310 u16 next_to_clean; 1311 u16 req_id; 1312 int tx_pkts = 0; 1313 int rc; 1314 1315 next_to_clean = tx_ring->next_to_clean; 1316 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid); 1317 1318 while (tx_pkts < budget) { 1319 struct ena_tx_buffer *tx_info; 1320 struct sk_buff *skb; 1321 1322 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq, 1323 &req_id); 1324 if (rc) 1325 break; 1326 1327 rc = validate_tx_req_id(tx_ring, req_id); 1328 if (rc) 1329 break; 1330 1331 tx_info = &tx_ring->tx_buffer_info[req_id]; 1332 skb = tx_info->skb; 1333 1334 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */ 1335 prefetch(&skb->end); 1336 1337 tx_info->skb = NULL; 1338 tx_info->last_jiffies = 0; 1339 1340 ena_unmap_tx_buff(tx_ring, tx_info); 1341 1342 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1343 "tx_poll: q %d skb %p completed\n", tx_ring->qid, 1344 skb); 1345 1346 tx_bytes += skb->len; 1347 dev_kfree_skb(skb); 1348 tx_pkts++; 1349 total_done += tx_info->tx_descs; 1350 1351 tx_ring->free_ids[next_to_clean] = req_id; 1352 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1353 tx_ring->ring_size); 1354 } 1355 1356 tx_ring->next_to_clean = next_to_clean; 1357 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done); 1358 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq); 1359 1360 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 1361 1362 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev, 1363 "tx_poll: q %d done. total pkts: %d\n", 1364 tx_ring->qid, tx_pkts); 1365 1366 /* need to make the rings circular update visible to 1367 * ena_start_xmit() before checking for netif_queue_stopped(). 1368 */ 1369 smp_mb(); 1370 1371 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1372 ENA_TX_WAKEUP_THRESH); 1373 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) { 1374 __netif_tx_lock(txq, smp_processor_id()); 1375 above_thresh = 1376 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 1377 ENA_TX_WAKEUP_THRESH); 1378 if (netif_tx_queue_stopped(txq) && above_thresh && 1379 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) { 1380 netif_tx_wake_queue(txq); 1381 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 1382 &tx_ring->syncp); 1383 } 1384 __netif_tx_unlock(txq); 1385 } 1386 1387 return tx_pkts; 1388 } 1389 1390 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags) 1391 { 1392 struct sk_buff *skb; 1393 1394 if (frags) 1395 skb = napi_get_frags(rx_ring->napi); 1396 else 1397 skb = netdev_alloc_skb_ip_align(rx_ring->netdev, 1398 rx_ring->rx_copybreak); 1399 1400 if (unlikely(!skb)) { 1401 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1, 1402 &rx_ring->syncp); 1403 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1404 "Failed to allocate skb. frags: %d\n", frags); 1405 return NULL; 1406 } 1407 1408 return skb; 1409 } 1410 1411 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, 1412 struct ena_com_rx_buf_info *ena_bufs, 1413 u32 descs, 1414 u16 *next_to_clean) 1415 { 1416 struct sk_buff *skb; 1417 struct ena_rx_buffer *rx_info; 1418 u16 len, req_id, buf = 0; 1419 void *va; 1420 1421 len = ena_bufs[buf].len; 1422 req_id = ena_bufs[buf].req_id; 1423 1424 rx_info = &rx_ring->rx_buffer_info[req_id]; 1425 1426 if (unlikely(!rx_info->page)) { 1427 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev, 1428 "Page is NULL\n"); 1429 return NULL; 1430 } 1431 1432 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1433 "rx_info %p page %p\n", 1434 rx_info, rx_info->page); 1435 1436 /* save virt address of first buffer */ 1437 va = page_address(rx_info->page) + rx_info->page_offset; 1438 1439 prefetch(va); 1440 1441 if (len <= rx_ring->rx_copybreak) { 1442 skb = ena_alloc_skb(rx_ring, false); 1443 if (unlikely(!skb)) 1444 return NULL; 1445 1446 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1447 "RX allocated small packet. len %d. data_len %d\n", 1448 skb->len, skb->data_len); 1449 1450 /* sync this buffer for CPU use */ 1451 dma_sync_single_for_cpu(rx_ring->dev, 1452 dma_unmap_addr(&rx_info->ena_buf, paddr), 1453 len, 1454 DMA_FROM_DEVICE); 1455 skb_copy_to_linear_data(skb, va, len); 1456 dma_sync_single_for_device(rx_ring->dev, 1457 dma_unmap_addr(&rx_info->ena_buf, paddr), 1458 len, 1459 DMA_FROM_DEVICE); 1460 1461 skb_put(skb, len); 1462 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 1463 rx_ring->free_ids[*next_to_clean] = req_id; 1464 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs, 1465 rx_ring->ring_size); 1466 return skb; 1467 } 1468 1469 skb = ena_alloc_skb(rx_ring, true); 1470 if (unlikely(!skb)) 1471 return NULL; 1472 1473 do { 1474 ena_unmap_rx_buff(rx_ring, rx_info); 1475 1476 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page, 1477 rx_info->page_offset, len, ENA_PAGE_SIZE); 1478 1479 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1480 "RX skb updated. len %d. data_len %d\n", 1481 skb->len, skb->data_len); 1482 1483 rx_info->page = NULL; 1484 1485 rx_ring->free_ids[*next_to_clean] = req_id; 1486 *next_to_clean = 1487 ENA_RX_RING_IDX_NEXT(*next_to_clean, 1488 rx_ring->ring_size); 1489 if (likely(--descs == 0)) 1490 break; 1491 1492 buf++; 1493 len = ena_bufs[buf].len; 1494 req_id = ena_bufs[buf].req_id; 1495 1496 rx_info = &rx_ring->rx_buffer_info[req_id]; 1497 } while (1); 1498 1499 return skb; 1500 } 1501 1502 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum 1503 * @adapter: structure containing adapter specific data 1504 * @ena_rx_ctx: received packet context/metadata 1505 * @skb: skb currently being received and modified 1506 */ 1507 static void ena_rx_checksum(struct ena_ring *rx_ring, 1508 struct ena_com_rx_ctx *ena_rx_ctx, 1509 struct sk_buff *skb) 1510 { 1511 /* Rx csum disabled */ 1512 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) { 1513 skb->ip_summed = CHECKSUM_NONE; 1514 return; 1515 } 1516 1517 /* For fragmented packets the checksum isn't valid */ 1518 if (ena_rx_ctx->frag) { 1519 skb->ip_summed = CHECKSUM_NONE; 1520 return; 1521 } 1522 1523 /* if IP and error */ 1524 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1525 (ena_rx_ctx->l3_csum_err))) { 1526 /* ipv4 checksum error */ 1527 skb->ip_summed = CHECKSUM_NONE; 1528 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1529 &rx_ring->syncp); 1530 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1531 "RX IPv4 header checksum error\n"); 1532 return; 1533 } 1534 1535 /* if TCP/UDP */ 1536 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1537 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) { 1538 if (unlikely(ena_rx_ctx->l4_csum_err)) { 1539 /* TCP/UDP checksum error */ 1540 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1, 1541 &rx_ring->syncp); 1542 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev, 1543 "RX L4 checksum error\n"); 1544 skb->ip_summed = CHECKSUM_NONE; 1545 return; 1546 } 1547 1548 if (likely(ena_rx_ctx->l4_csum_checked)) { 1549 skb->ip_summed = CHECKSUM_UNNECESSARY; 1550 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1, 1551 &rx_ring->syncp); 1552 } else { 1553 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1, 1554 &rx_ring->syncp); 1555 skb->ip_summed = CHECKSUM_NONE; 1556 } 1557 } else { 1558 skb->ip_summed = CHECKSUM_NONE; 1559 return; 1560 } 1561 1562 } 1563 1564 static void ena_set_rx_hash(struct ena_ring *rx_ring, 1565 struct ena_com_rx_ctx *ena_rx_ctx, 1566 struct sk_buff *skb) 1567 { 1568 enum pkt_hash_types hash_type; 1569 1570 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) { 1571 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1572 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) 1573 1574 hash_type = PKT_HASH_TYPE_L4; 1575 else 1576 hash_type = PKT_HASH_TYPE_NONE; 1577 1578 /* Override hash type if the packet is fragmented */ 1579 if (ena_rx_ctx->frag) 1580 hash_type = PKT_HASH_TYPE_NONE; 1581 1582 skb_set_hash(skb, ena_rx_ctx->hash, hash_type); 1583 } 1584 } 1585 1586 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp) 1587 { 1588 struct ena_rx_buffer *rx_info; 1589 int ret; 1590 1591 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1592 xdp->data = page_address(rx_info->page) + rx_info->page_offset; 1593 xdp_set_data_meta_invalid(xdp); 1594 xdp->data_hard_start = page_address(rx_info->page); 1595 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len; 1596 /* If for some reason we received a bigger packet than 1597 * we expect, then we simply drop it 1598 */ 1599 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU)) 1600 return XDP_DROP; 1601 1602 ret = ena_xdp_execute(rx_ring, xdp); 1603 1604 /* The xdp program might expand the headers */ 1605 if (ret == XDP_PASS) { 1606 rx_info->page_offset = xdp->data - xdp->data_hard_start; 1607 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data; 1608 } 1609 1610 return ret; 1611 } 1612 /* ena_clean_rx_irq - Cleanup RX irq 1613 * @rx_ring: RX ring to clean 1614 * @napi: napi handler 1615 * @budget: how many packets driver is allowed to clean 1616 * 1617 * Returns the number of cleaned buffers. 1618 */ 1619 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi, 1620 u32 budget) 1621 { 1622 u16 next_to_clean = rx_ring->next_to_clean; 1623 struct ena_com_rx_ctx ena_rx_ctx; 1624 struct ena_rx_buffer *rx_info; 1625 struct ena_adapter *adapter; 1626 u32 res_budget, work_done; 1627 int rx_copybreak_pkt = 0; 1628 int refill_threshold; 1629 struct sk_buff *skb; 1630 int refill_required; 1631 struct xdp_buff xdp; 1632 int xdp_flags = 0; 1633 int total_len = 0; 1634 int xdp_verdict; 1635 int rc = 0; 1636 int i; 1637 1638 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1639 "%s qid %d\n", __func__, rx_ring->qid); 1640 res_budget = budget; 1641 xdp.rxq = &rx_ring->xdp_rxq; 1642 xdp.frame_sz = ENA_PAGE_SIZE; 1643 1644 do { 1645 xdp_verdict = XDP_PASS; 1646 skb = NULL; 1647 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1648 ena_rx_ctx.max_bufs = rx_ring->sgl_size; 1649 ena_rx_ctx.descs = 0; 1650 ena_rx_ctx.pkt_offset = 0; 1651 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq, 1652 rx_ring->ena_com_io_sq, 1653 &ena_rx_ctx); 1654 if (unlikely(rc)) 1655 goto error; 1656 1657 if (unlikely(ena_rx_ctx.descs == 0)) 1658 break; 1659 1660 /* First descriptor might have an offset set by the device */ 1661 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]; 1662 rx_info->page_offset += ena_rx_ctx.pkt_offset; 1663 1664 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev, 1665 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n", 1666 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto, 1667 ena_rx_ctx.l4_proto, ena_rx_ctx.hash); 1668 1669 if (ena_xdp_present_ring(rx_ring)) 1670 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp); 1671 1672 /* allocate skb and fill it */ 1673 if (xdp_verdict == XDP_PASS) 1674 skb = ena_rx_skb(rx_ring, 1675 rx_ring->ena_bufs, 1676 ena_rx_ctx.descs, 1677 &next_to_clean); 1678 1679 if (unlikely(!skb)) { 1680 for (i = 0; i < ena_rx_ctx.descs; i++) { 1681 int req_id = rx_ring->ena_bufs[i].req_id; 1682 1683 rx_ring->free_ids[next_to_clean] = req_id; 1684 next_to_clean = 1685 ENA_RX_RING_IDX_NEXT(next_to_clean, 1686 rx_ring->ring_size); 1687 1688 /* Packets was passed for transmission, unmap it 1689 * from RX side. 1690 */ 1691 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) { 1692 ena_unmap_rx_buff(rx_ring, 1693 &rx_ring->rx_buffer_info[req_id]); 1694 rx_ring->rx_buffer_info[req_id].page = NULL; 1695 } 1696 } 1697 if (xdp_verdict != XDP_PASS) { 1698 xdp_flags |= xdp_verdict; 1699 res_budget--; 1700 continue; 1701 } 1702 break; 1703 } 1704 1705 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb); 1706 1707 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb); 1708 1709 skb_record_rx_queue(skb, rx_ring->qid); 1710 1711 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) { 1712 total_len += rx_ring->ena_bufs[0].len; 1713 rx_copybreak_pkt++; 1714 napi_gro_receive(napi, skb); 1715 } else { 1716 total_len += skb->len; 1717 napi_gro_frags(napi); 1718 } 1719 1720 res_budget--; 1721 } while (likely(res_budget)); 1722 1723 work_done = budget - res_budget; 1724 rx_ring->per_napi_packets += work_done; 1725 u64_stats_update_begin(&rx_ring->syncp); 1726 rx_ring->rx_stats.bytes += total_len; 1727 rx_ring->rx_stats.cnt += work_done; 1728 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt; 1729 u64_stats_update_end(&rx_ring->syncp); 1730 1731 rx_ring->next_to_clean = next_to_clean; 1732 1733 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 1734 refill_threshold = 1735 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER, 1736 ENA_RX_REFILL_THRESH_PACKET); 1737 1738 /* Optimization, try to batch new rx buffers */ 1739 if (refill_required > refill_threshold) { 1740 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1741 ena_refill_rx_bufs(rx_ring, refill_required); 1742 } 1743 1744 if (xdp_flags & XDP_REDIRECT) 1745 xdp_do_flush_map(); 1746 1747 return work_done; 1748 1749 error: 1750 adapter = netdev_priv(rx_ring->netdev); 1751 1752 if (rc == -ENOSPC) { 1753 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1, 1754 &rx_ring->syncp); 1755 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS; 1756 } else { 1757 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1, 1758 &rx_ring->syncp); 1759 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID; 1760 } 1761 1762 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 1763 1764 return 0; 1765 } 1766 1767 static void ena_dim_work(struct work_struct *w) 1768 { 1769 struct dim *dim = container_of(w, struct dim, work); 1770 struct dim_cq_moder cur_moder = 1771 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1772 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim); 1773 1774 ena_napi->rx_ring->smoothed_interval = cur_moder.usec; 1775 dim->state = DIM_START_MEASURE; 1776 } 1777 1778 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi) 1779 { 1780 struct dim_sample dim_sample; 1781 struct ena_ring *rx_ring = ena_napi->rx_ring; 1782 1783 if (!rx_ring->per_napi_packets) 1784 return; 1785 1786 rx_ring->non_empty_napi_events++; 1787 1788 dim_update_sample(rx_ring->non_empty_napi_events, 1789 rx_ring->rx_stats.cnt, 1790 rx_ring->rx_stats.bytes, 1791 &dim_sample); 1792 1793 net_dim(&ena_napi->dim, dim_sample); 1794 1795 rx_ring->per_napi_packets = 0; 1796 } 1797 1798 static void ena_unmask_interrupt(struct ena_ring *tx_ring, 1799 struct ena_ring *rx_ring) 1800 { 1801 struct ena_eth_io_intr_reg intr_reg; 1802 u32 rx_interval = 0; 1803 /* Rx ring can be NULL when for XDP tx queues which don't have an 1804 * accompanying rx_ring pair. 1805 */ 1806 if (rx_ring) 1807 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ? 1808 rx_ring->smoothed_interval : 1809 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev); 1810 1811 /* Update intr register: rx intr delay, 1812 * tx intr delay and interrupt unmask 1813 */ 1814 ena_com_update_intr_reg(&intr_reg, 1815 rx_interval, 1816 tx_ring->smoothed_interval, 1817 true); 1818 1819 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1, 1820 &tx_ring->syncp); 1821 1822 /* It is a shared MSI-X. 1823 * Tx and Rx CQ have pointer to it. 1824 * So we use one of them to reach the intr reg 1825 * The Tx ring is used because the rx_ring is NULL for XDP queues 1826 */ 1827 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg); 1828 } 1829 1830 static void ena_update_ring_numa_node(struct ena_ring *tx_ring, 1831 struct ena_ring *rx_ring) 1832 { 1833 int cpu = get_cpu(); 1834 int numa_node; 1835 1836 /* Check only one ring since the 2 rings are running on the same cpu */ 1837 if (likely(tx_ring->cpu == cpu)) 1838 goto out; 1839 1840 numa_node = cpu_to_node(cpu); 1841 put_cpu(); 1842 1843 if (numa_node != NUMA_NO_NODE) { 1844 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node); 1845 if (rx_ring) 1846 ena_com_update_numa_node(rx_ring->ena_com_io_cq, 1847 numa_node); 1848 } 1849 1850 tx_ring->cpu = cpu; 1851 if (rx_ring) 1852 rx_ring->cpu = cpu; 1853 1854 return; 1855 out: 1856 put_cpu(); 1857 } 1858 1859 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget) 1860 { 1861 u32 total_done = 0; 1862 u16 next_to_clean; 1863 u32 tx_bytes = 0; 1864 int tx_pkts = 0; 1865 u16 req_id; 1866 int rc; 1867 1868 if (unlikely(!xdp_ring)) 1869 return 0; 1870 next_to_clean = xdp_ring->next_to_clean; 1871 1872 while (tx_pkts < budget) { 1873 struct ena_tx_buffer *tx_info; 1874 struct xdp_frame *xdpf; 1875 1876 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq, 1877 &req_id); 1878 if (rc) 1879 break; 1880 1881 rc = validate_xdp_req_id(xdp_ring, req_id); 1882 if (rc) 1883 break; 1884 1885 tx_info = &xdp_ring->tx_buffer_info[req_id]; 1886 xdpf = tx_info->xdpf; 1887 1888 tx_info->xdpf = NULL; 1889 tx_info->last_jiffies = 0; 1890 ena_unmap_tx_buff(xdp_ring, tx_info); 1891 1892 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1893 "tx_poll: q %d skb %p completed\n", xdp_ring->qid, 1894 xdpf); 1895 1896 tx_bytes += xdpf->len; 1897 tx_pkts++; 1898 total_done += tx_info->tx_descs; 1899 1900 xdp_return_frame(xdpf); 1901 xdp_ring->free_ids[next_to_clean] = req_id; 1902 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1903 xdp_ring->ring_size); 1904 } 1905 1906 xdp_ring->next_to_clean = next_to_clean; 1907 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done); 1908 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq); 1909 1910 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev, 1911 "tx_poll: q %d done. total pkts: %d\n", 1912 xdp_ring->qid, tx_pkts); 1913 1914 return tx_pkts; 1915 } 1916 1917 static int ena_io_poll(struct napi_struct *napi, int budget) 1918 { 1919 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); 1920 struct ena_ring *tx_ring, *rx_ring; 1921 int tx_work_done; 1922 int rx_work_done = 0; 1923 int tx_budget; 1924 int napi_comp_call = 0; 1925 int ret; 1926 1927 tx_ring = ena_napi->tx_ring; 1928 rx_ring = ena_napi->rx_ring; 1929 1930 tx_ring->first_interrupt = ena_napi->first_interrupt; 1931 rx_ring->first_interrupt = ena_napi->first_interrupt; 1932 1933 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER; 1934 1935 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1936 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) { 1937 napi_complete_done(napi, 0); 1938 return 0; 1939 } 1940 1941 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); 1942 /* On netpoll the budget is zero and the handler should only clean the 1943 * tx completions. 1944 */ 1945 if (likely(budget)) 1946 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); 1947 1948 /* If the device is about to reset or down, avoid unmask 1949 * the interrupt and return 0 so NAPI won't reschedule 1950 */ 1951 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) || 1952 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) { 1953 napi_complete_done(napi, 0); 1954 ret = 0; 1955 1956 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { 1957 napi_comp_call = 1; 1958 1959 /* Update numa and unmask the interrupt only when schedule 1960 * from the interrupt context (vs from sk_busy_loop) 1961 */ 1962 if (napi_complete_done(napi, rx_work_done) && 1963 READ_ONCE(ena_napi->interrupts_masked)) { 1964 smp_rmb(); /* make sure interrupts_masked is read */ 1965 WRITE_ONCE(ena_napi->interrupts_masked, false); 1966 /* We apply adaptive moderation on Rx path only. 1967 * Tx uses static interrupt moderation. 1968 */ 1969 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) 1970 ena_adjust_adaptive_rx_intr_moderation(ena_napi); 1971 1972 ena_unmask_interrupt(tx_ring, rx_ring); 1973 } 1974 1975 ena_update_ring_numa_node(tx_ring, rx_ring); 1976 1977 ret = rx_work_done; 1978 } else { 1979 ret = budget; 1980 } 1981 1982 u64_stats_update_begin(&tx_ring->syncp); 1983 tx_ring->tx_stats.napi_comp += napi_comp_call; 1984 tx_ring->tx_stats.tx_poll++; 1985 u64_stats_update_end(&tx_ring->syncp); 1986 1987 return ret; 1988 } 1989 1990 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data) 1991 { 1992 struct ena_adapter *adapter = (struct ena_adapter *)data; 1993 1994 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1995 1996 /* Don't call the aenq handler before probe is done */ 1997 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))) 1998 ena_com_aenq_intr_handler(adapter->ena_dev, data); 1999 2000 return IRQ_HANDLED; 2001 } 2002 2003 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx 2004 * @irq: interrupt number 2005 * @data: pointer to a network interface private napi device structure 2006 */ 2007 static irqreturn_t ena_intr_msix_io(int irq, void *data) 2008 { 2009 struct ena_napi *ena_napi = data; 2010 2011 ena_napi->first_interrupt = true; 2012 2013 WRITE_ONCE(ena_napi->interrupts_masked, true); 2014 smp_wmb(); /* write interrupts_masked before calling napi */ 2015 2016 napi_schedule_irqoff(&ena_napi->napi); 2017 2018 return IRQ_HANDLED; 2019 } 2020 2021 /* Reserve a single MSI-X vector for management (admin + aenq). 2022 * plus reserve one vector for each potential io queue. 2023 * the number of potential io queues is the minimum of what the device 2024 * supports and the number of vCPUs. 2025 */ 2026 static int ena_enable_msix(struct ena_adapter *adapter) 2027 { 2028 int msix_vecs, irq_cnt; 2029 2030 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2031 netif_err(adapter, probe, adapter->netdev, 2032 "Error, MSI-X is already enabled\n"); 2033 return -EPERM; 2034 } 2035 2036 /* Reserved the max msix vectors we might need */ 2037 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues); 2038 netif_dbg(adapter, probe, adapter->netdev, 2039 "Trying to enable MSI-X, vectors %d\n", msix_vecs); 2040 2041 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC, 2042 msix_vecs, PCI_IRQ_MSIX); 2043 2044 if (irq_cnt < 0) { 2045 netif_err(adapter, probe, adapter->netdev, 2046 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt); 2047 return -ENOSPC; 2048 } 2049 2050 if (irq_cnt != msix_vecs) { 2051 netif_notice(adapter, probe, adapter->netdev, 2052 "Enable only %d MSI-X (out of %d), reduce the number of queues\n", 2053 irq_cnt, msix_vecs); 2054 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC; 2055 } 2056 2057 if (ena_init_rx_cpu_rmap(adapter)) 2058 netif_warn(adapter, probe, adapter->netdev, 2059 "Failed to map IRQs to CPUs\n"); 2060 2061 adapter->msix_vecs = irq_cnt; 2062 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags); 2063 2064 return 0; 2065 } 2066 2067 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter) 2068 { 2069 u32 cpu; 2070 2071 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 2072 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 2073 pci_name(adapter->pdev)); 2074 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = 2075 ena_intr_msix_mgmnt; 2076 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 2077 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 2078 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX); 2079 cpu = cpumask_first(cpu_online_mask); 2080 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu; 2081 cpumask_set_cpu(cpu, 2082 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask); 2083 } 2084 2085 static void ena_setup_io_intr(struct ena_adapter *adapter) 2086 { 2087 struct net_device *netdev; 2088 int irq_idx, i, cpu; 2089 int io_queue_count; 2090 2091 netdev = adapter->netdev; 2092 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2093 2094 for (i = 0; i < io_queue_count; i++) { 2095 irq_idx = ENA_IO_IRQ_IDX(i); 2096 cpu = i % num_online_cpus(); 2097 2098 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 2099 "%s-Tx-Rx-%d", netdev->name, i); 2100 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io; 2101 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i]; 2102 adapter->irq_tbl[irq_idx].vector = 2103 pci_irq_vector(adapter->pdev, irq_idx); 2104 adapter->irq_tbl[irq_idx].cpu = cpu; 2105 2106 cpumask_set_cpu(cpu, 2107 &adapter->irq_tbl[irq_idx].affinity_hint_mask); 2108 } 2109 } 2110 2111 static int ena_request_mgmnt_irq(struct ena_adapter *adapter) 2112 { 2113 unsigned long flags = 0; 2114 struct ena_irq *irq; 2115 int rc; 2116 2117 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2118 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2119 irq->data); 2120 if (rc) { 2121 netif_err(adapter, probe, adapter->netdev, 2122 "Failed to request admin irq\n"); 2123 return rc; 2124 } 2125 2126 netif_dbg(adapter, probe, adapter->netdev, 2127 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n", 2128 irq->affinity_hint_mask.bits[0], irq->vector); 2129 2130 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2131 2132 return rc; 2133 } 2134 2135 static int ena_request_io_irq(struct ena_adapter *adapter) 2136 { 2137 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2138 unsigned long flags = 0; 2139 struct ena_irq *irq; 2140 int rc = 0, i, k; 2141 2142 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) { 2143 netif_err(adapter, ifup, adapter->netdev, 2144 "Failed to request I/O IRQ: MSI-X is not enabled\n"); 2145 return -EINVAL; 2146 } 2147 2148 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2149 irq = &adapter->irq_tbl[i]; 2150 rc = request_irq(irq->vector, irq->handler, flags, irq->name, 2151 irq->data); 2152 if (rc) { 2153 netif_err(adapter, ifup, adapter->netdev, 2154 "Failed to request I/O IRQ. index %d rc %d\n", 2155 i, rc); 2156 goto err; 2157 } 2158 2159 netif_dbg(adapter, ifup, adapter->netdev, 2160 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n", 2161 i, irq->affinity_hint_mask.bits[0], irq->vector); 2162 2163 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask); 2164 } 2165 2166 return rc; 2167 2168 err: 2169 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) { 2170 irq = &adapter->irq_tbl[k]; 2171 free_irq(irq->vector, irq->data); 2172 } 2173 2174 return rc; 2175 } 2176 2177 static void ena_free_mgmnt_irq(struct ena_adapter *adapter) 2178 { 2179 struct ena_irq *irq; 2180 2181 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 2182 synchronize_irq(irq->vector); 2183 irq_set_affinity_hint(irq->vector, NULL); 2184 free_irq(irq->vector, irq->data); 2185 } 2186 2187 static void ena_free_io_irq(struct ena_adapter *adapter) 2188 { 2189 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2190 struct ena_irq *irq; 2191 int i; 2192 2193 #ifdef CONFIG_RFS_ACCEL 2194 if (adapter->msix_vecs >= 1) { 2195 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap); 2196 adapter->netdev->rx_cpu_rmap = NULL; 2197 } 2198 #endif /* CONFIG_RFS_ACCEL */ 2199 2200 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) { 2201 irq = &adapter->irq_tbl[i]; 2202 irq_set_affinity_hint(irq->vector, NULL); 2203 free_irq(irq->vector, irq->data); 2204 } 2205 } 2206 2207 static void ena_disable_msix(struct ena_adapter *adapter) 2208 { 2209 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) 2210 pci_free_irq_vectors(adapter->pdev); 2211 } 2212 2213 static void ena_disable_io_intr_sync(struct ena_adapter *adapter) 2214 { 2215 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2216 int i; 2217 2218 if (!netif_running(adapter->netdev)) 2219 return; 2220 2221 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) 2222 synchronize_irq(adapter->irq_tbl[i].vector); 2223 } 2224 2225 static void ena_del_napi_in_range(struct ena_adapter *adapter, 2226 int first_index, 2227 int count) 2228 { 2229 int i; 2230 2231 for (i = first_index; i < first_index + count; i++) { 2232 netif_napi_del(&adapter->ena_napi[i].napi); 2233 2234 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) && 2235 adapter->ena_napi[i].xdp_ring); 2236 } 2237 } 2238 2239 static void ena_init_napi_in_range(struct ena_adapter *adapter, 2240 int first_index, int count) 2241 { 2242 int i; 2243 2244 for (i = first_index; i < first_index + count; i++) { 2245 struct ena_napi *napi = &adapter->ena_napi[i]; 2246 2247 netif_napi_add(adapter->netdev, 2248 &napi->napi, 2249 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll, 2250 ENA_NAPI_BUDGET); 2251 2252 if (!ENA_IS_XDP_INDEX(adapter, i)) { 2253 napi->rx_ring = &adapter->rx_ring[i]; 2254 napi->tx_ring = &adapter->tx_ring[i]; 2255 } else { 2256 napi->xdp_ring = &adapter->tx_ring[i]; 2257 } 2258 napi->qid = i; 2259 } 2260 } 2261 2262 static void ena_napi_disable_in_range(struct ena_adapter *adapter, 2263 int first_index, 2264 int count) 2265 { 2266 int i; 2267 2268 for (i = first_index; i < first_index + count; i++) 2269 napi_disable(&adapter->ena_napi[i].napi); 2270 } 2271 2272 static void ena_napi_enable_in_range(struct ena_adapter *adapter, 2273 int first_index, 2274 int count) 2275 { 2276 int i; 2277 2278 for (i = first_index; i < first_index + count; i++) 2279 napi_enable(&adapter->ena_napi[i].napi); 2280 } 2281 2282 /* Configure the Rx forwarding */ 2283 static int ena_rss_configure(struct ena_adapter *adapter) 2284 { 2285 struct ena_com_dev *ena_dev = adapter->ena_dev; 2286 int rc; 2287 2288 /* In case the RSS table wasn't initialized by probe */ 2289 if (!ena_dev->rss.tbl_log_size) { 2290 rc = ena_rss_init_default(adapter); 2291 if (rc && (rc != -EOPNOTSUPP)) { 2292 netif_err(adapter, ifup, adapter->netdev, 2293 "Failed to init RSS rc: %d\n", rc); 2294 return rc; 2295 } 2296 } 2297 2298 /* Set indirect table */ 2299 rc = ena_com_indirect_table_set(ena_dev); 2300 if (unlikely(rc && rc != -EOPNOTSUPP)) 2301 return rc; 2302 2303 /* Configure hash function (if supported) */ 2304 rc = ena_com_set_hash_function(ena_dev); 2305 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2306 return rc; 2307 2308 /* Configure hash inputs (if supported) */ 2309 rc = ena_com_set_hash_ctrl(ena_dev); 2310 if (unlikely(rc && (rc != -EOPNOTSUPP))) 2311 return rc; 2312 2313 return 0; 2314 } 2315 2316 static int ena_up_complete(struct ena_adapter *adapter) 2317 { 2318 int rc; 2319 2320 rc = ena_rss_configure(adapter); 2321 if (rc) 2322 return rc; 2323 2324 ena_change_mtu(adapter->netdev, adapter->netdev->mtu); 2325 2326 ena_refill_all_rx_bufs(adapter); 2327 2328 /* enable transmits */ 2329 netif_tx_start_all_queues(adapter->netdev); 2330 2331 ena_napi_enable_in_range(adapter, 2332 0, 2333 adapter->xdp_num_queues + adapter->num_io_queues); 2334 2335 return 0; 2336 } 2337 2338 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) 2339 { 2340 struct ena_com_create_io_ctx ctx; 2341 struct ena_com_dev *ena_dev; 2342 struct ena_ring *tx_ring; 2343 u32 msix_vector; 2344 u16 ena_qid; 2345 int rc; 2346 2347 ena_dev = adapter->ena_dev; 2348 2349 tx_ring = &adapter->tx_ring[qid]; 2350 msix_vector = ENA_IO_IRQ_IDX(qid); 2351 ena_qid = ENA_IO_TXQ_IDX(qid); 2352 2353 memset(&ctx, 0x0, sizeof(ctx)); 2354 2355 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 2356 ctx.qid = ena_qid; 2357 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 2358 ctx.msix_vector = msix_vector; 2359 ctx.queue_size = tx_ring->ring_size; 2360 ctx.numa_node = cpu_to_node(tx_ring->cpu); 2361 2362 rc = ena_com_create_io_queue(ena_dev, &ctx); 2363 if (rc) { 2364 netif_err(adapter, ifup, adapter->netdev, 2365 "Failed to create I/O TX queue num %d rc: %d\n", 2366 qid, rc); 2367 return rc; 2368 } 2369 2370 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2371 &tx_ring->ena_com_io_sq, 2372 &tx_ring->ena_com_io_cq); 2373 if (rc) { 2374 netif_err(adapter, ifup, adapter->netdev, 2375 "Failed to get TX queue handlers. TX queue num %d rc: %d\n", 2376 qid, rc); 2377 ena_com_destroy_io_queue(ena_dev, ena_qid); 2378 return rc; 2379 } 2380 2381 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); 2382 return rc; 2383 } 2384 2385 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 2386 int first_index, int count) 2387 { 2388 struct ena_com_dev *ena_dev = adapter->ena_dev; 2389 int rc, i; 2390 2391 for (i = first_index; i < first_index + count; i++) { 2392 rc = ena_create_io_tx_queue(adapter, i); 2393 if (rc) 2394 goto create_err; 2395 } 2396 2397 return 0; 2398 2399 create_err: 2400 while (i-- > first_index) 2401 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 2402 2403 return rc; 2404 } 2405 2406 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) 2407 { 2408 struct ena_com_dev *ena_dev; 2409 struct ena_com_create_io_ctx ctx; 2410 struct ena_ring *rx_ring; 2411 u32 msix_vector; 2412 u16 ena_qid; 2413 int rc; 2414 2415 ena_dev = adapter->ena_dev; 2416 2417 rx_ring = &adapter->rx_ring[qid]; 2418 msix_vector = ENA_IO_IRQ_IDX(qid); 2419 ena_qid = ENA_IO_RXQ_IDX(qid); 2420 2421 memset(&ctx, 0x0, sizeof(ctx)); 2422 2423 ctx.qid = ena_qid; 2424 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 2425 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 2426 ctx.msix_vector = msix_vector; 2427 ctx.queue_size = rx_ring->ring_size; 2428 ctx.numa_node = cpu_to_node(rx_ring->cpu); 2429 2430 rc = ena_com_create_io_queue(ena_dev, &ctx); 2431 if (rc) { 2432 netif_err(adapter, ifup, adapter->netdev, 2433 "Failed to create I/O RX queue num %d rc: %d\n", 2434 qid, rc); 2435 return rc; 2436 } 2437 2438 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 2439 &rx_ring->ena_com_io_sq, 2440 &rx_ring->ena_com_io_cq); 2441 if (rc) { 2442 netif_err(adapter, ifup, adapter->netdev, 2443 "Failed to get RX queue handlers. RX queue num %d rc: %d\n", 2444 qid, rc); 2445 goto err; 2446 } 2447 2448 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); 2449 2450 return rc; 2451 err: 2452 ena_com_destroy_io_queue(ena_dev, ena_qid); 2453 return rc; 2454 } 2455 2456 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter) 2457 { 2458 struct ena_com_dev *ena_dev = adapter->ena_dev; 2459 int rc, i; 2460 2461 for (i = 0; i < adapter->num_io_queues; i++) { 2462 rc = ena_create_io_rx_queue(adapter, i); 2463 if (rc) 2464 goto create_err; 2465 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work); 2466 } 2467 2468 return 0; 2469 2470 create_err: 2471 while (i--) { 2472 cancel_work_sync(&adapter->ena_napi[i].dim.work); 2473 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 2474 } 2475 2476 return rc; 2477 } 2478 2479 static void set_io_rings_size(struct ena_adapter *adapter, 2480 int new_tx_size, 2481 int new_rx_size) 2482 { 2483 int i; 2484 2485 for (i = 0; i < adapter->num_io_queues; i++) { 2486 adapter->tx_ring[i].ring_size = new_tx_size; 2487 adapter->rx_ring[i].ring_size = new_rx_size; 2488 } 2489 } 2490 2491 /* This function allows queue allocation to backoff when the system is 2492 * low on memory. If there is not enough memory to allocate io queues 2493 * the driver will try to allocate smaller queues. 2494 * 2495 * The backoff algorithm is as follows: 2496 * 1. Try to allocate TX and RX and if successful. 2497 * 1.1. return success 2498 * 2499 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same). 2500 * 2501 * 3. If TX or RX is smaller than 256 2502 * 3.1. return failure. 2503 * 4. else 2504 * 4.1. go back to 1. 2505 */ 2506 static int create_queues_with_size_backoff(struct ena_adapter *adapter) 2507 { 2508 int rc, cur_rx_ring_size, cur_tx_ring_size; 2509 int new_rx_ring_size, new_tx_ring_size; 2510 2511 /* current queue sizes might be set to smaller than the requested 2512 * ones due to past queue allocation failures. 2513 */ 2514 set_io_rings_size(adapter, adapter->requested_tx_ring_size, 2515 adapter->requested_rx_ring_size); 2516 2517 while (1) { 2518 if (ena_xdp_present(adapter)) { 2519 rc = ena_setup_and_create_all_xdp_queues(adapter); 2520 2521 if (rc) 2522 goto err_setup_tx; 2523 } 2524 rc = ena_setup_tx_resources_in_range(adapter, 2525 0, 2526 adapter->num_io_queues); 2527 if (rc) 2528 goto err_setup_tx; 2529 2530 rc = ena_create_io_tx_queues_in_range(adapter, 2531 0, 2532 adapter->num_io_queues); 2533 if (rc) 2534 goto err_create_tx_queues; 2535 2536 rc = ena_setup_all_rx_resources(adapter); 2537 if (rc) 2538 goto err_setup_rx; 2539 2540 rc = ena_create_all_io_rx_queues(adapter); 2541 if (rc) 2542 goto err_create_rx_queues; 2543 2544 return 0; 2545 2546 err_create_rx_queues: 2547 ena_free_all_io_rx_resources(adapter); 2548 err_setup_rx: 2549 ena_destroy_all_tx_queues(adapter); 2550 err_create_tx_queues: 2551 ena_free_all_io_tx_resources(adapter); 2552 err_setup_tx: 2553 if (rc != -ENOMEM) { 2554 netif_err(adapter, ifup, adapter->netdev, 2555 "Queue creation failed with error code %d\n", 2556 rc); 2557 return rc; 2558 } 2559 2560 cur_tx_ring_size = adapter->tx_ring[0].ring_size; 2561 cur_rx_ring_size = adapter->rx_ring[0].ring_size; 2562 2563 netif_err(adapter, ifup, adapter->netdev, 2564 "Not enough memory to create queues with sizes TX=%d, RX=%d\n", 2565 cur_tx_ring_size, cur_rx_ring_size); 2566 2567 new_tx_ring_size = cur_tx_ring_size; 2568 new_rx_ring_size = cur_rx_ring_size; 2569 2570 /* Decrease the size of the larger queue, or 2571 * decrease both if they are the same size. 2572 */ 2573 if (cur_rx_ring_size <= cur_tx_ring_size) 2574 new_tx_ring_size = cur_tx_ring_size / 2; 2575 if (cur_rx_ring_size >= cur_tx_ring_size) 2576 new_rx_ring_size = cur_rx_ring_size / 2; 2577 2578 if (new_tx_ring_size < ENA_MIN_RING_SIZE || 2579 new_rx_ring_size < ENA_MIN_RING_SIZE) { 2580 netif_err(adapter, ifup, adapter->netdev, 2581 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n", 2582 ENA_MIN_RING_SIZE); 2583 return rc; 2584 } 2585 2586 netif_err(adapter, ifup, adapter->netdev, 2587 "Retrying queue creation with sizes TX=%d, RX=%d\n", 2588 new_tx_ring_size, 2589 new_rx_ring_size); 2590 2591 set_io_rings_size(adapter, new_tx_ring_size, 2592 new_rx_ring_size); 2593 } 2594 } 2595 2596 static int ena_up(struct ena_adapter *adapter) 2597 { 2598 int io_queue_count, rc, i; 2599 2600 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 2601 2602 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2603 ena_setup_io_intr(adapter); 2604 2605 /* napi poll functions should be initialized before running 2606 * request_irq(), to handle a rare condition where there is a pending 2607 * interrupt, causing the ISR to fire immediately while the poll 2608 * function wasn't set yet, causing a null dereference 2609 */ 2610 ena_init_napi_in_range(adapter, 0, io_queue_count); 2611 2612 rc = ena_request_io_irq(adapter); 2613 if (rc) 2614 goto err_req_irq; 2615 2616 rc = create_queues_with_size_backoff(adapter); 2617 if (rc) 2618 goto err_create_queues_with_backoff; 2619 2620 rc = ena_up_complete(adapter); 2621 if (rc) 2622 goto err_up; 2623 2624 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 2625 netif_carrier_on(adapter->netdev); 2626 2627 ena_increase_stat(&adapter->dev_stats.interface_up, 1, 2628 &adapter->syncp); 2629 2630 set_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2631 2632 /* Enable completion queues interrupt */ 2633 for (i = 0; i < adapter->num_io_queues; i++) 2634 ena_unmask_interrupt(&adapter->tx_ring[i], 2635 &adapter->rx_ring[i]); 2636 2637 /* schedule napi in case we had pending packets 2638 * from the last time we disable napi 2639 */ 2640 for (i = 0; i < io_queue_count; i++) 2641 napi_schedule(&adapter->ena_napi[i].napi); 2642 2643 return rc; 2644 2645 err_up: 2646 ena_destroy_all_tx_queues(adapter); 2647 ena_free_all_io_tx_resources(adapter); 2648 ena_destroy_all_rx_queues(adapter); 2649 ena_free_all_io_rx_resources(adapter); 2650 err_create_queues_with_backoff: 2651 ena_free_io_irq(adapter); 2652 err_req_irq: 2653 ena_del_napi_in_range(adapter, 0, io_queue_count); 2654 2655 return rc; 2656 } 2657 2658 static void ena_down(struct ena_adapter *adapter) 2659 { 2660 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues; 2661 2662 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__); 2663 2664 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2665 2666 ena_increase_stat(&adapter->dev_stats.interface_down, 1, 2667 &adapter->syncp); 2668 2669 netif_carrier_off(adapter->netdev); 2670 netif_tx_disable(adapter->netdev); 2671 2672 /* After this point the napi handler won't enable the tx queue */ 2673 ena_napi_disable_in_range(adapter, 0, io_queue_count); 2674 2675 /* After destroy the queue there won't be any new interrupts */ 2676 2677 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) { 2678 int rc; 2679 2680 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 2681 if (rc) 2682 netif_err(adapter, ifdown, adapter->netdev, 2683 "Device reset failed\n"); 2684 /* stop submitting admin commands on a device that was reset */ 2685 ena_com_set_admin_running_state(adapter->ena_dev, false); 2686 } 2687 2688 ena_destroy_all_io_queues(adapter); 2689 2690 ena_disable_io_intr_sync(adapter); 2691 ena_free_io_irq(adapter); 2692 ena_del_napi_in_range(adapter, 0, io_queue_count); 2693 2694 ena_free_all_tx_bufs(adapter); 2695 ena_free_all_rx_bufs(adapter); 2696 ena_free_all_io_tx_resources(adapter); 2697 ena_free_all_io_rx_resources(adapter); 2698 } 2699 2700 /* ena_open - Called when a network interface is made active 2701 * @netdev: network interface device structure 2702 * 2703 * Returns 0 on success, negative value on failure 2704 * 2705 * The open entry point is called when a network interface is made 2706 * active by the system (IFF_UP). At this point all resources needed 2707 * for transmit and receive operations are allocated, the interrupt 2708 * handler is registered with the OS, the watchdog timer is started, 2709 * and the stack is notified that the interface is ready. 2710 */ 2711 static int ena_open(struct net_device *netdev) 2712 { 2713 struct ena_adapter *adapter = netdev_priv(netdev); 2714 int rc; 2715 2716 /* Notify the stack of the actual queue counts. */ 2717 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues); 2718 if (rc) { 2719 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n"); 2720 return rc; 2721 } 2722 2723 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues); 2724 if (rc) { 2725 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n"); 2726 return rc; 2727 } 2728 2729 rc = ena_up(adapter); 2730 if (rc) 2731 return rc; 2732 2733 return rc; 2734 } 2735 2736 /* ena_close - Disables a network interface 2737 * @netdev: network interface device structure 2738 * 2739 * Returns 0, this is not allowed to fail 2740 * 2741 * The close entry point is called when an interface is de-activated 2742 * by the OS. The hardware is still under the drivers control, but 2743 * needs to be disabled. A global MAC reset is issued to stop the 2744 * hardware, and all transmit and receive resources are freed. 2745 */ 2746 static int ena_close(struct net_device *netdev) 2747 { 2748 struct ena_adapter *adapter = netdev_priv(netdev); 2749 2750 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__); 2751 2752 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 2753 return 0; 2754 2755 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 2756 ena_down(adapter); 2757 2758 /* Check for device status and issue reset if needed*/ 2759 check_for_admin_com_state(adapter); 2760 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 2761 netif_err(adapter, ifdown, adapter->netdev, 2762 "Destroy failure, restarting device\n"); 2763 ena_dump_stats_to_dmesg(adapter); 2764 /* rtnl lock already obtained in dev_ioctl() layer */ 2765 ena_destroy_device(adapter, false); 2766 ena_restore_device(adapter); 2767 } 2768 2769 return 0; 2770 } 2771 2772 int ena_update_queue_sizes(struct ena_adapter *adapter, 2773 u32 new_tx_size, 2774 u32 new_rx_size) 2775 { 2776 bool dev_was_up; 2777 2778 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2779 ena_close(adapter->netdev); 2780 adapter->requested_tx_ring_size = new_tx_size; 2781 adapter->requested_rx_ring_size = new_rx_size; 2782 ena_init_io_rings(adapter, 2783 0, 2784 adapter->xdp_num_queues + 2785 adapter->num_io_queues); 2786 return dev_was_up ? ena_up(adapter) : 0; 2787 } 2788 2789 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count) 2790 { 2791 struct ena_com_dev *ena_dev = adapter->ena_dev; 2792 int prev_channel_count; 2793 bool dev_was_up; 2794 2795 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 2796 ena_close(adapter->netdev); 2797 prev_channel_count = adapter->num_io_queues; 2798 adapter->num_io_queues = new_channel_count; 2799 if (ena_xdp_present(adapter) && 2800 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) { 2801 adapter->xdp_first_ring = new_channel_count; 2802 adapter->xdp_num_queues = new_channel_count; 2803 if (prev_channel_count > new_channel_count) 2804 ena_xdp_exchange_program_rx_in_range(adapter, 2805 NULL, 2806 new_channel_count, 2807 prev_channel_count); 2808 else 2809 ena_xdp_exchange_program_rx_in_range(adapter, 2810 adapter->xdp_bpf_prog, 2811 prev_channel_count, 2812 new_channel_count); 2813 } 2814 2815 /* We need to destroy the rss table so that the indirection 2816 * table will be reinitialized by ena_up() 2817 */ 2818 ena_com_rss_destroy(ena_dev); 2819 ena_init_io_rings(adapter, 2820 0, 2821 adapter->xdp_num_queues + 2822 adapter->num_io_queues); 2823 return dev_was_up ? ena_open(adapter->netdev) : 0; 2824 } 2825 2826 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, 2827 struct sk_buff *skb, 2828 bool disable_meta_caching) 2829 { 2830 u32 mss = skb_shinfo(skb)->gso_size; 2831 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta; 2832 u8 l4_protocol = 0; 2833 2834 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) { 2835 ena_tx_ctx->l4_csum_enable = 1; 2836 if (mss) { 2837 ena_tx_ctx->tso_enable = 1; 2838 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff; 2839 ena_tx_ctx->l4_csum_partial = 0; 2840 } else { 2841 ena_tx_ctx->tso_enable = 0; 2842 ena_meta->l4_hdr_len = 0; 2843 ena_tx_ctx->l4_csum_partial = 1; 2844 } 2845 2846 switch (ip_hdr(skb)->version) { 2847 case IPVERSION: 2848 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2849 if (ip_hdr(skb)->frag_off & htons(IP_DF)) 2850 ena_tx_ctx->df = 1; 2851 if (mss) 2852 ena_tx_ctx->l3_csum_enable = 1; 2853 l4_protocol = ip_hdr(skb)->protocol; 2854 break; 2855 case 6: 2856 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2857 l4_protocol = ipv6_hdr(skb)->nexthdr; 2858 break; 2859 default: 2860 break; 2861 } 2862 2863 if (l4_protocol == IPPROTO_TCP) 2864 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2865 else 2866 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2867 2868 ena_meta->mss = mss; 2869 ena_meta->l3_hdr_len = skb_network_header_len(skb); 2870 ena_meta->l3_hdr_offset = skb_network_offset(skb); 2871 ena_tx_ctx->meta_valid = 1; 2872 } else if (disable_meta_caching) { 2873 memset(ena_meta, 0, sizeof(*ena_meta)); 2874 ena_tx_ctx->meta_valid = 1; 2875 } else { 2876 ena_tx_ctx->meta_valid = 0; 2877 } 2878 } 2879 2880 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring, 2881 struct sk_buff *skb) 2882 { 2883 int num_frags, header_len, rc; 2884 2885 num_frags = skb_shinfo(skb)->nr_frags; 2886 header_len = skb_headlen(skb); 2887 2888 if (num_frags < tx_ring->sgl_size) 2889 return 0; 2890 2891 if ((num_frags == tx_ring->sgl_size) && 2892 (header_len < tx_ring->tx_max_header_size)) 2893 return 0; 2894 2895 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp); 2896 2897 rc = skb_linearize(skb); 2898 if (unlikely(rc)) { 2899 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1, 2900 &tx_ring->syncp); 2901 } 2902 2903 return rc; 2904 } 2905 2906 static int ena_tx_map_skb(struct ena_ring *tx_ring, 2907 struct ena_tx_buffer *tx_info, 2908 struct sk_buff *skb, 2909 void **push_hdr, 2910 u16 *header_len) 2911 { 2912 struct ena_adapter *adapter = tx_ring->adapter; 2913 struct ena_com_buf *ena_buf; 2914 dma_addr_t dma; 2915 u32 skb_head_len, frag_len, last_frag; 2916 u16 push_len = 0; 2917 u16 delta = 0; 2918 int i = 0; 2919 2920 skb_head_len = skb_headlen(skb); 2921 tx_info->skb = skb; 2922 ena_buf = tx_info->bufs; 2923 2924 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 2925 /* When the device is LLQ mode, the driver will copy 2926 * the header into the device memory space. 2927 * the ena_com layer assume the header is in a linear 2928 * memory space. 2929 * This assumption might be wrong since part of the header 2930 * can be in the fragmented buffers. 2931 * Use skb_header_pointer to make sure the header is in a 2932 * linear memory space. 2933 */ 2934 2935 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size); 2936 *push_hdr = skb_header_pointer(skb, 0, push_len, 2937 tx_ring->push_buf_intermediate_buf); 2938 *header_len = push_len; 2939 if (unlikely(skb->data != *push_hdr)) { 2940 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1, 2941 &tx_ring->syncp); 2942 2943 delta = push_len - skb_head_len; 2944 } 2945 } else { 2946 *push_hdr = NULL; 2947 *header_len = min_t(u32, skb_head_len, 2948 tx_ring->tx_max_header_size); 2949 } 2950 2951 netif_dbg(adapter, tx_queued, adapter->netdev, 2952 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb, 2953 *push_hdr, push_len); 2954 2955 if (skb_head_len > push_len) { 2956 dma = dma_map_single(tx_ring->dev, skb->data + push_len, 2957 skb_head_len - push_len, DMA_TO_DEVICE); 2958 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2959 goto error_report_dma_error; 2960 2961 ena_buf->paddr = dma; 2962 ena_buf->len = skb_head_len - push_len; 2963 2964 ena_buf++; 2965 tx_info->num_of_bufs++; 2966 tx_info->map_linear_data = 1; 2967 } else { 2968 tx_info->map_linear_data = 0; 2969 } 2970 2971 last_frag = skb_shinfo(skb)->nr_frags; 2972 2973 for (i = 0; i < last_frag; i++) { 2974 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2975 2976 frag_len = skb_frag_size(frag); 2977 2978 if (unlikely(delta >= frag_len)) { 2979 delta -= frag_len; 2980 continue; 2981 } 2982 2983 dma = skb_frag_dma_map(tx_ring->dev, frag, delta, 2984 frag_len - delta, DMA_TO_DEVICE); 2985 if (unlikely(dma_mapping_error(tx_ring->dev, dma))) 2986 goto error_report_dma_error; 2987 2988 ena_buf->paddr = dma; 2989 ena_buf->len = frag_len - delta; 2990 ena_buf++; 2991 tx_info->num_of_bufs++; 2992 delta = 0; 2993 } 2994 2995 return 0; 2996 2997 error_report_dma_error: 2998 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1, 2999 &tx_ring->syncp); 3000 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n"); 3001 3002 tx_info->skb = NULL; 3003 3004 tx_info->num_of_bufs += i; 3005 ena_unmap_tx_buff(tx_ring, tx_info); 3006 3007 return -EINVAL; 3008 } 3009 3010 /* Called with netif_tx_lock. */ 3011 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) 3012 { 3013 struct ena_adapter *adapter = netdev_priv(dev); 3014 struct ena_tx_buffer *tx_info; 3015 struct ena_com_tx_ctx ena_tx_ctx; 3016 struct ena_ring *tx_ring; 3017 struct netdev_queue *txq; 3018 void *push_hdr; 3019 u16 next_to_use, req_id, header_len; 3020 int qid, rc; 3021 3022 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb); 3023 /* Determine which tx ring we will be placed on */ 3024 qid = skb_get_queue_mapping(skb); 3025 tx_ring = &adapter->tx_ring[qid]; 3026 txq = netdev_get_tx_queue(dev, qid); 3027 3028 rc = ena_check_and_linearize_skb(tx_ring, skb); 3029 if (unlikely(rc)) 3030 goto error_drop_packet; 3031 3032 skb_tx_timestamp(skb); 3033 3034 next_to_use = tx_ring->next_to_use; 3035 req_id = tx_ring->free_ids[next_to_use]; 3036 tx_info = &tx_ring->tx_buffer_info[req_id]; 3037 tx_info->num_of_bufs = 0; 3038 3039 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id); 3040 3041 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len); 3042 if (unlikely(rc)) 3043 goto error_drop_packet; 3044 3045 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 3046 ena_tx_ctx.ena_bufs = tx_info->bufs; 3047 ena_tx_ctx.push_header = push_hdr; 3048 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 3049 ena_tx_ctx.req_id = req_id; 3050 ena_tx_ctx.header_len = header_len; 3051 3052 /* set flags and meta data */ 3053 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching); 3054 3055 rc = ena_xmit_common(dev, 3056 tx_ring, 3057 tx_info, 3058 &ena_tx_ctx, 3059 next_to_use, 3060 skb->len); 3061 if (rc) 3062 goto error_unmap_dma; 3063 3064 netdev_tx_sent_queue(txq, skb->len); 3065 3066 /* stop the queue when no more space available, the packet can have up 3067 * to sgl_size + 2. one for the meta descriptor and one for header 3068 * (if the header is larger than tx_max_header_size). 3069 */ 3070 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3071 tx_ring->sgl_size + 2))) { 3072 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n", 3073 __func__, qid); 3074 3075 netif_tx_stop_queue(txq); 3076 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1, 3077 &tx_ring->syncp); 3078 3079 /* There is a rare condition where this function decide to 3080 * stop the queue but meanwhile clean_tx_irq updates 3081 * next_to_completion and terminates. 3082 * The queue will remain stopped forever. 3083 * To solve this issue add a mb() to make sure that 3084 * netif_tx_stop_queue() write is vissible before checking if 3085 * there is additional space in the queue. 3086 */ 3087 smp_mb(); 3088 3089 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq, 3090 ENA_TX_WAKEUP_THRESH)) { 3091 netif_tx_wake_queue(txq); 3092 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1, 3093 &tx_ring->syncp); 3094 } 3095 } 3096 3097 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) { 3098 /* trigger the dma engine. ena_com_write_sq_doorbell() 3099 * has a mb 3100 */ 3101 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 3102 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, 3103 &tx_ring->syncp); 3104 } 3105 3106 return NETDEV_TX_OK; 3107 3108 error_unmap_dma: 3109 ena_unmap_tx_buff(tx_ring, tx_info); 3110 tx_info->skb = NULL; 3111 3112 error_drop_packet: 3113 dev_kfree_skb(skb); 3114 return NETDEV_TX_OK; 3115 } 3116 3117 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb, 3118 struct net_device *sb_dev) 3119 { 3120 u16 qid; 3121 /* we suspect that this is good for in--kernel network services that 3122 * want to loop incoming skb rx to tx in normal user generated traffic, 3123 * most probably we will not get to this 3124 */ 3125 if (skb_rx_queue_recorded(skb)) 3126 qid = skb_get_rx_queue(skb); 3127 else 3128 qid = netdev_pick_tx(dev, skb, NULL); 3129 3130 return qid; 3131 } 3132 3133 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 3134 { 3135 struct device *dev = &pdev->dev; 3136 struct ena_admin_host_info *host_info; 3137 int rc; 3138 3139 /* Allocate only the host info */ 3140 rc = ena_com_allocate_host_info(ena_dev); 3141 if (rc) { 3142 dev_err(dev, "Cannot allocate host info\n"); 3143 return; 3144 } 3145 3146 host_info = ena_dev->host_attr.host_info; 3147 3148 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn; 3149 host_info->os_type = ENA_ADMIN_OS_LINUX; 3150 host_info->kernel_ver = LINUX_VERSION_CODE; 3151 strlcpy(host_info->kernel_ver_str, utsname()->version, 3152 sizeof(host_info->kernel_ver_str) - 1); 3153 host_info->os_dist = 0; 3154 strncpy(host_info->os_dist_str, utsname()->release, 3155 sizeof(host_info->os_dist_str) - 1); 3156 host_info->driver_version = 3157 (DRV_MODULE_GEN_MAJOR) | 3158 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3159 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) | 3160 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT); 3161 host_info->num_cpus = num_online_cpus(); 3162 3163 host_info->driver_supported_features = 3164 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK | 3165 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK | 3166 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK | 3167 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK; 3168 3169 rc = ena_com_set_host_attributes(ena_dev); 3170 if (rc) { 3171 if (rc == -EOPNOTSUPP) 3172 dev_warn(dev, "Cannot set host attributes\n"); 3173 else 3174 dev_err(dev, "Cannot set host attributes\n"); 3175 3176 goto err; 3177 } 3178 3179 return; 3180 3181 err: 3182 ena_com_delete_host_info(ena_dev); 3183 } 3184 3185 static void ena_config_debug_area(struct ena_adapter *adapter) 3186 { 3187 u32 debug_area_size; 3188 int rc, ss_count; 3189 3190 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS); 3191 if (ss_count <= 0) { 3192 netif_err(adapter, drv, adapter->netdev, 3193 "SS count is negative\n"); 3194 return; 3195 } 3196 3197 /* allocate 32 bytes for each string and 64bit for the value */ 3198 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count; 3199 3200 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size); 3201 if (rc) { 3202 netif_err(adapter, drv, adapter->netdev, 3203 "Cannot allocate debug area\n"); 3204 return; 3205 } 3206 3207 rc = ena_com_set_host_attributes(adapter->ena_dev); 3208 if (rc) { 3209 if (rc == -EOPNOTSUPP) 3210 netif_warn(adapter, drv, adapter->netdev, 3211 "Cannot set host attributes\n"); 3212 else 3213 netif_err(adapter, drv, adapter->netdev, 3214 "Cannot set host attributes\n"); 3215 goto err; 3216 } 3217 3218 return; 3219 err: 3220 ena_com_delete_debug_area(adapter->ena_dev); 3221 } 3222 3223 int ena_update_hw_stats(struct ena_adapter *adapter) 3224 { 3225 int rc = 0; 3226 3227 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats); 3228 if (rc) { 3229 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n"); 3230 return rc; 3231 } 3232 3233 return 0; 3234 } 3235 3236 static void ena_get_stats64(struct net_device *netdev, 3237 struct rtnl_link_stats64 *stats) 3238 { 3239 struct ena_adapter *adapter = netdev_priv(netdev); 3240 struct ena_ring *rx_ring, *tx_ring; 3241 unsigned int start; 3242 u64 rx_drops; 3243 u64 tx_drops; 3244 int i; 3245 3246 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3247 return; 3248 3249 for (i = 0; i < adapter->num_io_queues; i++) { 3250 u64 bytes, packets; 3251 3252 tx_ring = &adapter->tx_ring[i]; 3253 3254 do { 3255 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 3256 packets = tx_ring->tx_stats.cnt; 3257 bytes = tx_ring->tx_stats.bytes; 3258 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 3259 3260 stats->tx_packets += packets; 3261 stats->tx_bytes += bytes; 3262 3263 rx_ring = &adapter->rx_ring[i]; 3264 3265 do { 3266 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 3267 packets = rx_ring->rx_stats.cnt; 3268 bytes = rx_ring->rx_stats.bytes; 3269 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 3270 3271 stats->rx_packets += packets; 3272 stats->rx_bytes += bytes; 3273 } 3274 3275 do { 3276 start = u64_stats_fetch_begin_irq(&adapter->syncp); 3277 rx_drops = adapter->dev_stats.rx_drops; 3278 tx_drops = adapter->dev_stats.tx_drops; 3279 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start)); 3280 3281 stats->rx_dropped = rx_drops; 3282 stats->tx_dropped = tx_drops; 3283 3284 stats->multicast = 0; 3285 stats->collisions = 0; 3286 3287 stats->rx_length_errors = 0; 3288 stats->rx_crc_errors = 0; 3289 stats->rx_frame_errors = 0; 3290 stats->rx_fifo_errors = 0; 3291 stats->rx_missed_errors = 0; 3292 stats->tx_window_errors = 0; 3293 3294 stats->rx_errors = 0; 3295 stats->tx_errors = 0; 3296 } 3297 3298 static const struct net_device_ops ena_netdev_ops = { 3299 .ndo_open = ena_open, 3300 .ndo_stop = ena_close, 3301 .ndo_start_xmit = ena_start_xmit, 3302 .ndo_select_queue = ena_select_queue, 3303 .ndo_get_stats64 = ena_get_stats64, 3304 .ndo_tx_timeout = ena_tx_timeout, 3305 .ndo_change_mtu = ena_change_mtu, 3306 .ndo_set_mac_address = NULL, 3307 .ndo_validate_addr = eth_validate_addr, 3308 .ndo_bpf = ena_xdp, 3309 .ndo_xdp_xmit = ena_xdp_xmit, 3310 }; 3311 3312 static int ena_device_validate_params(struct ena_adapter *adapter, 3313 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3314 { 3315 struct net_device *netdev = adapter->netdev; 3316 int rc; 3317 3318 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr, 3319 adapter->mac_addr); 3320 if (!rc) { 3321 netif_err(adapter, drv, netdev, 3322 "Error, mac address are different\n"); 3323 return -EINVAL; 3324 } 3325 3326 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) { 3327 netif_err(adapter, drv, netdev, 3328 "Error, device max mtu is smaller than netdev MTU\n"); 3329 return -EINVAL; 3330 } 3331 3332 return 0; 3333 } 3334 3335 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config) 3336 { 3337 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER; 3338 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY; 3339 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2; 3340 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B; 3341 llq_config->llq_ring_entry_size_value = 128; 3342 } 3343 3344 static int ena_set_queues_placement_policy(struct pci_dev *pdev, 3345 struct ena_com_dev *ena_dev, 3346 struct ena_admin_feature_llq_desc *llq, 3347 struct ena_llq_configurations *llq_default_configurations) 3348 { 3349 int rc; 3350 u32 llq_feature_mask; 3351 3352 llq_feature_mask = 1 << ENA_ADMIN_LLQ; 3353 if (!(ena_dev->supported_features & llq_feature_mask)) { 3354 dev_err(&pdev->dev, 3355 "LLQ is not supported Fallback to host mode policy.\n"); 3356 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3357 return 0; 3358 } 3359 3360 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations); 3361 if (unlikely(rc)) { 3362 dev_err(&pdev->dev, 3363 "Failed to configure the device mode. Fallback to host mode policy.\n"); 3364 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3365 } 3366 3367 return 0; 3368 } 3369 3370 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev, 3371 int bars) 3372 { 3373 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR)); 3374 3375 if (!has_mem_bar) { 3376 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { 3377 dev_err(&pdev->dev, 3378 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n"); 3379 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3380 } 3381 3382 return 0; 3383 } 3384 3385 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, 3386 pci_resource_start(pdev, ENA_MEM_BAR), 3387 pci_resource_len(pdev, ENA_MEM_BAR)); 3388 3389 if (!ena_dev->mem_bar) 3390 return -EFAULT; 3391 3392 return 0; 3393 } 3394 3395 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev, 3396 struct ena_com_dev_get_features_ctx *get_feat_ctx, 3397 bool *wd_state) 3398 { 3399 struct ena_llq_configurations llq_config; 3400 struct device *dev = &pdev->dev; 3401 bool readless_supported; 3402 u32 aenq_groups; 3403 int dma_width; 3404 int rc; 3405 3406 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3407 if (rc) { 3408 dev_err(dev, "Failed to init mmio read less\n"); 3409 return rc; 3410 } 3411 3412 /* The PCIe configuration space revision id indicate if mmio reg 3413 * read is disabled 3414 */ 3415 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ); 3416 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3417 3418 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL); 3419 if (rc) { 3420 dev_err(dev, "Can not reset device\n"); 3421 goto err_mmio_read_less; 3422 } 3423 3424 rc = ena_com_validate_version(ena_dev); 3425 if (rc) { 3426 dev_err(dev, "Device version is too low\n"); 3427 goto err_mmio_read_less; 3428 } 3429 3430 dma_width = ena_com_get_dma_width(ena_dev); 3431 if (dma_width < 0) { 3432 dev_err(dev, "Invalid dma width value %d", dma_width); 3433 rc = dma_width; 3434 goto err_mmio_read_less; 3435 } 3436 3437 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width)); 3438 if (rc) { 3439 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc); 3440 goto err_mmio_read_less; 3441 } 3442 3443 /* ENA admin level init */ 3444 rc = ena_com_admin_init(ena_dev, &aenq_handlers); 3445 if (rc) { 3446 dev_err(dev, 3447 "Can not initialize ena admin queue with device\n"); 3448 goto err_mmio_read_less; 3449 } 3450 3451 /* To enable the msix interrupts the driver needs to know the number 3452 * of queues. So the driver uses polling mode to retrieve this 3453 * information 3454 */ 3455 ena_com_set_admin_polling_mode(ena_dev, true); 3456 3457 ena_config_host_info(ena_dev, pdev); 3458 3459 /* Get Device Attributes*/ 3460 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3461 if (rc) { 3462 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc); 3463 goto err_admin_init; 3464 } 3465 3466 /* Try to turn all the available aenq groups */ 3467 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3468 BIT(ENA_ADMIN_FATAL_ERROR) | 3469 BIT(ENA_ADMIN_WARNING) | 3470 BIT(ENA_ADMIN_NOTIFICATION) | 3471 BIT(ENA_ADMIN_KEEP_ALIVE); 3472 3473 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3474 3475 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3476 if (rc) { 3477 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc); 3478 goto err_admin_init; 3479 } 3480 3481 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3482 3483 set_default_llq_configurations(&llq_config); 3484 3485 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq, 3486 &llq_config); 3487 if (rc) { 3488 dev_err(dev, "ENA device init failed\n"); 3489 goto err_admin_init; 3490 } 3491 3492 return 0; 3493 3494 err_admin_init: 3495 ena_com_delete_host_info(ena_dev); 3496 ena_com_admin_destroy(ena_dev); 3497 err_mmio_read_less: 3498 ena_com_mmio_reg_read_request_destroy(ena_dev); 3499 3500 return rc; 3501 } 3502 3503 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter) 3504 { 3505 struct ena_com_dev *ena_dev = adapter->ena_dev; 3506 struct device *dev = &adapter->pdev->dev; 3507 int rc; 3508 3509 rc = ena_enable_msix(adapter); 3510 if (rc) { 3511 dev_err(dev, "Can not reserve msix vectors\n"); 3512 return rc; 3513 } 3514 3515 ena_setup_mgmnt_intr(adapter); 3516 3517 rc = ena_request_mgmnt_irq(adapter); 3518 if (rc) { 3519 dev_err(dev, "Can not setup management interrupts\n"); 3520 goto err_disable_msix; 3521 } 3522 3523 ena_com_set_admin_polling_mode(ena_dev, false); 3524 3525 ena_com_admin_aenq_enable(ena_dev); 3526 3527 return 0; 3528 3529 err_disable_msix: 3530 ena_disable_msix(adapter); 3531 3532 return rc; 3533 } 3534 3535 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful) 3536 { 3537 struct net_device *netdev = adapter->netdev; 3538 struct ena_com_dev *ena_dev = adapter->ena_dev; 3539 bool dev_up; 3540 3541 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)) 3542 return; 3543 3544 netif_carrier_off(netdev); 3545 3546 del_timer_sync(&adapter->timer_service); 3547 3548 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags); 3549 adapter->dev_up_before_reset = dev_up; 3550 if (!graceful) 3551 ena_com_set_admin_running_state(ena_dev, false); 3552 3553 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3554 ena_down(adapter); 3555 3556 /* Stop the device from sending AENQ events (in case reset flag is set 3557 * and device is up, ena_down() already reset the device. 3558 */ 3559 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up)) 3560 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason); 3561 3562 ena_free_mgmnt_irq(adapter); 3563 3564 ena_disable_msix(adapter); 3565 3566 ena_com_abort_admin_commands(ena_dev); 3567 3568 ena_com_wait_for_abort_completion(ena_dev); 3569 3570 ena_com_admin_destroy(ena_dev); 3571 3572 ena_com_mmio_reg_read_request_destroy(ena_dev); 3573 3574 /* return reset reason to default value */ 3575 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 3576 3577 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3578 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3579 } 3580 3581 static int ena_restore_device(struct ena_adapter *adapter) 3582 { 3583 struct ena_com_dev_get_features_ctx get_feat_ctx; 3584 struct ena_com_dev *ena_dev = adapter->ena_dev; 3585 struct pci_dev *pdev = adapter->pdev; 3586 bool wd_state; 3587 int rc; 3588 3589 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3590 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state); 3591 if (rc) { 3592 dev_err(&pdev->dev, "Can not initialize device\n"); 3593 goto err; 3594 } 3595 adapter->wd_state = wd_state; 3596 3597 rc = ena_device_validate_params(adapter, &get_feat_ctx); 3598 if (rc) { 3599 dev_err(&pdev->dev, "Validation of device parameters failed\n"); 3600 goto err_device_destroy; 3601 } 3602 3603 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 3604 if (rc) { 3605 dev_err(&pdev->dev, "Enable MSI-X failed\n"); 3606 goto err_device_destroy; 3607 } 3608 /* If the interface was up before the reset bring it up */ 3609 if (adapter->dev_up_before_reset) { 3610 rc = ena_up(adapter); 3611 if (rc) { 3612 dev_err(&pdev->dev, "Failed to create I/O queues\n"); 3613 goto err_disable_msix; 3614 } 3615 } 3616 3617 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3618 3619 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3620 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags)) 3621 netif_carrier_on(adapter->netdev); 3622 3623 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3624 adapter->last_keep_alive_jiffies = jiffies; 3625 3626 dev_err(&pdev->dev, "Device reset completed successfully\n"); 3627 3628 return rc; 3629 err_disable_msix: 3630 ena_free_mgmnt_irq(adapter); 3631 ena_disable_msix(adapter); 3632 err_device_destroy: 3633 ena_com_abort_admin_commands(ena_dev); 3634 ena_com_wait_for_abort_completion(ena_dev); 3635 ena_com_admin_destroy(ena_dev); 3636 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE); 3637 ena_com_mmio_reg_read_request_destroy(ena_dev); 3638 err: 3639 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 3640 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags); 3641 dev_err(&pdev->dev, 3642 "Reset attempt failed. Can not reset the device\n"); 3643 3644 return rc; 3645 } 3646 3647 static void ena_fw_reset_device(struct work_struct *work) 3648 { 3649 struct ena_adapter *adapter = 3650 container_of(work, struct ena_adapter, reset_task); 3651 3652 rtnl_lock(); 3653 3654 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3655 ena_destroy_device(adapter, false); 3656 ena_restore_device(adapter); 3657 } 3658 3659 rtnl_unlock(); 3660 } 3661 3662 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter, 3663 struct ena_ring *rx_ring) 3664 { 3665 if (likely(rx_ring->first_interrupt)) 3666 return 0; 3667 3668 if (ena_com_cq_empty(rx_ring->ena_com_io_cq)) 3669 return 0; 3670 3671 rx_ring->no_interrupt_event_cnt++; 3672 3673 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) { 3674 netif_err(adapter, rx_err, adapter->netdev, 3675 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n", 3676 rx_ring->qid); 3677 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3678 smp_mb__before_atomic(); 3679 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3680 return -EIO; 3681 } 3682 3683 return 0; 3684 } 3685 3686 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter, 3687 struct ena_ring *tx_ring) 3688 { 3689 struct ena_tx_buffer *tx_buf; 3690 unsigned long last_jiffies; 3691 u32 missed_tx = 0; 3692 int i, rc = 0; 3693 3694 for (i = 0; i < tx_ring->ring_size; i++) { 3695 tx_buf = &tx_ring->tx_buffer_info[i]; 3696 last_jiffies = tx_buf->last_jiffies; 3697 3698 if (last_jiffies == 0) 3699 /* no pending Tx at this location */ 3700 continue; 3701 3702 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies + 3703 2 * adapter->missing_tx_completion_to))) { 3704 /* If after graceful period interrupt is still not 3705 * received, we schedule a reset 3706 */ 3707 netif_err(adapter, tx_err, adapter->netdev, 3708 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n", 3709 tx_ring->qid); 3710 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT; 3711 smp_mb__before_atomic(); 3712 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3713 return -EIO; 3714 } 3715 3716 if (unlikely(time_is_before_jiffies(last_jiffies + 3717 adapter->missing_tx_completion_to))) { 3718 if (!tx_buf->print_once) 3719 netif_notice(adapter, tx_err, adapter->netdev, 3720 "Found a Tx that wasn't completed on time, qid %d, index %d.\n", 3721 tx_ring->qid, i); 3722 3723 tx_buf->print_once = 1; 3724 missed_tx++; 3725 } 3726 } 3727 3728 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) { 3729 netif_err(adapter, tx_err, adapter->netdev, 3730 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", 3731 missed_tx, 3732 adapter->missing_tx_completion_threshold); 3733 adapter->reset_reason = 3734 ENA_REGS_RESET_MISS_TX_CMPL; 3735 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3736 rc = -EIO; 3737 } 3738 3739 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx, 3740 &tx_ring->syncp); 3741 3742 return rc; 3743 } 3744 3745 static void check_for_missing_completions(struct ena_adapter *adapter) 3746 { 3747 struct ena_ring *tx_ring; 3748 struct ena_ring *rx_ring; 3749 int i, budget, rc; 3750 int io_queue_count; 3751 3752 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues; 3753 /* Make sure the driver doesn't turn the device in other process */ 3754 smp_rmb(); 3755 3756 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3757 return; 3758 3759 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3760 return; 3761 3762 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT) 3763 return; 3764 3765 budget = ENA_MONITORED_TX_QUEUES; 3766 3767 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) { 3768 tx_ring = &adapter->tx_ring[i]; 3769 rx_ring = &adapter->rx_ring[i]; 3770 3771 rc = check_missing_comp_in_tx_queue(adapter, tx_ring); 3772 if (unlikely(rc)) 3773 return; 3774 3775 rc = !ENA_IS_XDP_INDEX(adapter, i) ? 3776 check_for_rx_interrupt_queue(adapter, rx_ring) : 0; 3777 if (unlikely(rc)) 3778 return; 3779 3780 budget--; 3781 if (!budget) 3782 break; 3783 } 3784 3785 adapter->last_monitored_tx_qid = i % io_queue_count; 3786 } 3787 3788 /* trigger napi schedule after 2 consecutive detections */ 3789 #define EMPTY_RX_REFILL 2 3790 /* For the rare case where the device runs out of Rx descriptors and the 3791 * napi handler failed to refill new Rx descriptors (due to a lack of memory 3792 * for example). 3793 * This case will lead to a deadlock: 3794 * The device won't send interrupts since all the new Rx packets will be dropped 3795 * The napi handler won't allocate new Rx descriptors so the device will be 3796 * able to send new packets. 3797 * 3798 * This scenario can happen when the kernel's vm.min_free_kbytes is too small. 3799 * It is recommended to have at least 512MB, with a minimum of 128MB for 3800 * constrained environment). 3801 * 3802 * When such a situation is detected - Reschedule napi 3803 */ 3804 static void check_for_empty_rx_ring(struct ena_adapter *adapter) 3805 { 3806 struct ena_ring *rx_ring; 3807 int i, refill_required; 3808 3809 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) 3810 return; 3811 3812 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) 3813 return; 3814 3815 for (i = 0; i < adapter->num_io_queues; i++) { 3816 rx_ring = &adapter->rx_ring[i]; 3817 3818 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq); 3819 if (unlikely(refill_required == (rx_ring->ring_size - 1))) { 3820 rx_ring->empty_rx_queue++; 3821 3822 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { 3823 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1, 3824 &rx_ring->syncp); 3825 3826 netif_err(adapter, drv, adapter->netdev, 3827 "Trigger refill for ring %d\n", i); 3828 3829 napi_schedule(rx_ring->napi); 3830 rx_ring->empty_rx_queue = 0; 3831 } 3832 } else { 3833 rx_ring->empty_rx_queue = 0; 3834 } 3835 } 3836 } 3837 3838 /* Check for keep alive expiration */ 3839 static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3840 { 3841 unsigned long keep_alive_expired; 3842 3843 if (!adapter->wd_state) 3844 return; 3845 3846 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3847 return; 3848 3849 keep_alive_expired = adapter->last_keep_alive_jiffies + 3850 adapter->keep_alive_timeout; 3851 if (unlikely(time_is_before_jiffies(keep_alive_expired))) { 3852 netif_err(adapter, drv, adapter->netdev, 3853 "Keep alive watchdog timeout.\n"); 3854 ena_increase_stat(&adapter->dev_stats.wd_expired, 1, 3855 &adapter->syncp); 3856 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO; 3857 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3858 } 3859 } 3860 3861 static void check_for_admin_com_state(struct ena_adapter *adapter) 3862 { 3863 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3864 netif_err(adapter, drv, adapter->netdev, 3865 "ENA admin queue is not in running state!\n"); 3866 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1, 3867 &adapter->syncp); 3868 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO; 3869 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 3870 } 3871 } 3872 3873 static void ena_update_hints(struct ena_adapter *adapter, 3874 struct ena_admin_ena_hw_hints *hints) 3875 { 3876 struct net_device *netdev = adapter->netdev; 3877 3878 if (hints->admin_completion_tx_timeout) 3879 adapter->ena_dev->admin_queue.completion_timeout = 3880 hints->admin_completion_tx_timeout * 1000; 3881 3882 if (hints->mmio_read_timeout) 3883 /* convert to usec */ 3884 adapter->ena_dev->mmio_read.reg_read_to = 3885 hints->mmio_read_timeout * 1000; 3886 3887 if (hints->missed_tx_completion_count_threshold_to_reset) 3888 adapter->missing_tx_completion_threshold = 3889 hints->missed_tx_completion_count_threshold_to_reset; 3890 3891 if (hints->missing_tx_completion_timeout) { 3892 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3893 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT; 3894 else 3895 adapter->missing_tx_completion_to = 3896 msecs_to_jiffies(hints->missing_tx_completion_timeout); 3897 } 3898 3899 if (hints->netdev_wd_timeout) 3900 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout); 3901 3902 if (hints->driver_watchdog_timeout) { 3903 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT) 3904 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT; 3905 else 3906 adapter->keep_alive_timeout = 3907 msecs_to_jiffies(hints->driver_watchdog_timeout); 3908 } 3909 } 3910 3911 static void ena_update_host_info(struct ena_admin_host_info *host_info, 3912 struct net_device *netdev) 3913 { 3914 host_info->supported_network_features[0] = 3915 netdev->features & GENMASK_ULL(31, 0); 3916 host_info->supported_network_features[1] = 3917 (netdev->features & GENMASK_ULL(63, 32)) >> 32; 3918 } 3919 3920 static void ena_timer_service(struct timer_list *t) 3921 { 3922 struct ena_adapter *adapter = from_timer(adapter, t, timer_service); 3923 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr; 3924 struct ena_admin_host_info *host_info = 3925 adapter->ena_dev->host_attr.host_info; 3926 3927 check_for_missing_keep_alive(adapter); 3928 3929 check_for_admin_com_state(adapter); 3930 3931 check_for_missing_completions(adapter); 3932 3933 check_for_empty_rx_ring(adapter); 3934 3935 if (debug_area) 3936 ena_dump_stats_to_buf(adapter, debug_area); 3937 3938 if (host_info) 3939 ena_update_host_info(host_info, adapter->netdev); 3940 3941 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 3942 netif_err(adapter, drv, adapter->netdev, 3943 "Trigger reset is on\n"); 3944 ena_dump_stats_to_dmesg(adapter); 3945 queue_work(ena_wq, &adapter->reset_task); 3946 return; 3947 } 3948 3949 /* Reset the timer */ 3950 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 3951 } 3952 3953 static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev, 3954 struct ena_com_dev *ena_dev, 3955 struct ena_com_dev_get_features_ctx *get_feat_ctx) 3956 { 3957 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues; 3958 3959 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 3960 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 3961 &get_feat_ctx->max_queue_ext.max_queue_ext; 3962 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, 3963 max_queue_ext->max_rx_cq_num); 3964 3965 io_tx_sq_num = max_queue_ext->max_tx_sq_num; 3966 io_tx_cq_num = max_queue_ext->max_tx_cq_num; 3967 } else { 3968 struct ena_admin_queue_feature_desc *max_queues = 3969 &get_feat_ctx->max_queues; 3970 io_tx_sq_num = max_queues->max_sq_num; 3971 io_tx_cq_num = max_queues->max_cq_num; 3972 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num); 3973 } 3974 3975 /* In case of LLQ use the llq fields for the tx SQ/CQ */ 3976 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 3977 io_tx_sq_num = get_feat_ctx->llq.max_llq_num; 3978 3979 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES); 3980 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num); 3981 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num); 3982 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num); 3983 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */ 3984 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1); 3985 if (unlikely(!max_num_io_queues)) { 3986 dev_err(&pdev->dev, "The device doesn't have io queues\n"); 3987 return -EFAULT; 3988 } 3989 3990 return max_num_io_queues; 3991 } 3992 3993 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat, 3994 struct net_device *netdev) 3995 { 3996 netdev_features_t dev_features = 0; 3997 3998 /* Set offload features */ 3999 if (feat->offload.tx & 4000 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK) 4001 dev_features |= NETIF_F_IP_CSUM; 4002 4003 if (feat->offload.tx & 4004 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK) 4005 dev_features |= NETIF_F_IPV6_CSUM; 4006 4007 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 4008 dev_features |= NETIF_F_TSO; 4009 4010 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 4011 dev_features |= NETIF_F_TSO6; 4012 4013 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK) 4014 dev_features |= NETIF_F_TSO_ECN; 4015 4016 if (feat->offload.rx_supported & 4017 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK) 4018 dev_features |= NETIF_F_RXCSUM; 4019 4020 if (feat->offload.rx_supported & 4021 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 4022 dev_features |= NETIF_F_RXCSUM; 4023 4024 netdev->features = 4025 dev_features | 4026 NETIF_F_SG | 4027 NETIF_F_RXHASH | 4028 NETIF_F_HIGHDMA; 4029 4030 netdev->hw_features |= netdev->features; 4031 netdev->vlan_features |= netdev->features; 4032 } 4033 4034 static void ena_set_conf_feat_params(struct ena_adapter *adapter, 4035 struct ena_com_dev_get_features_ctx *feat) 4036 { 4037 struct net_device *netdev = adapter->netdev; 4038 4039 /* Copy mac address */ 4040 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) { 4041 eth_hw_addr_random(netdev); 4042 ether_addr_copy(adapter->mac_addr, netdev->dev_addr); 4043 } else { 4044 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr); 4045 ether_addr_copy(netdev->dev_addr, adapter->mac_addr); 4046 } 4047 4048 /* Set offload features */ 4049 ena_set_dev_offloads(feat, netdev); 4050 4051 adapter->max_mtu = feat->dev_attr.max_mtu; 4052 netdev->max_mtu = adapter->max_mtu; 4053 netdev->min_mtu = ENA_MIN_MTU; 4054 } 4055 4056 static int ena_rss_init_default(struct ena_adapter *adapter) 4057 { 4058 struct ena_com_dev *ena_dev = adapter->ena_dev; 4059 struct device *dev = &adapter->pdev->dev; 4060 int rc, i; 4061 u32 val; 4062 4063 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 4064 if (unlikely(rc)) { 4065 dev_err(dev, "Cannot init indirect table\n"); 4066 goto err_rss_init; 4067 } 4068 4069 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 4070 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues); 4071 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 4072 ENA_IO_RXQ_IDX(val)); 4073 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4074 dev_err(dev, "Cannot fill indirect table\n"); 4075 goto err_fill_indir; 4076 } 4077 } 4078 4079 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, 4080 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 4081 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4082 dev_err(dev, "Cannot fill hash function\n"); 4083 goto err_fill_indir; 4084 } 4085 4086 rc = ena_com_set_default_hash_ctrl(ena_dev); 4087 if (unlikely(rc && (rc != -EOPNOTSUPP))) { 4088 dev_err(dev, "Cannot fill hash control\n"); 4089 goto err_fill_indir; 4090 } 4091 4092 return 0; 4093 4094 err_fill_indir: 4095 ena_com_rss_destroy(ena_dev); 4096 err_rss_init: 4097 4098 return rc; 4099 } 4100 4101 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) 4102 { 4103 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4104 4105 pci_release_selected_regions(pdev, release_bars); 4106 } 4107 4108 4109 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx) 4110 { 4111 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; 4112 struct ena_com_dev *ena_dev = ctx->ena_dev; 4113 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE; 4114 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE; 4115 u32 max_tx_queue_size; 4116 u32 max_rx_queue_size; 4117 4118 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { 4119 struct ena_admin_queue_ext_feature_fields *max_queue_ext = 4120 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; 4121 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, 4122 max_queue_ext->max_rx_sq_depth); 4123 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; 4124 4125 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4126 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4127 llq->max_llq_depth); 4128 else 4129 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4130 max_queue_ext->max_tx_sq_depth); 4131 4132 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4133 max_queue_ext->max_per_packet_tx_descs); 4134 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4135 max_queue_ext->max_per_packet_rx_descs); 4136 } else { 4137 struct ena_admin_queue_feature_desc *max_queues = 4138 &ctx->get_feat_ctx->max_queues; 4139 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth, 4140 max_queues->max_sq_depth); 4141 max_tx_queue_size = max_queues->max_cq_depth; 4142 4143 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4144 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4145 llq->max_llq_depth); 4146 else 4147 max_tx_queue_size = min_t(u32, max_tx_queue_size, 4148 max_queues->max_sq_depth); 4149 4150 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4151 max_queues->max_packet_tx_descs); 4152 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS, 4153 max_queues->max_packet_rx_descs); 4154 } 4155 4156 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size); 4157 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size); 4158 4159 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE, 4160 max_tx_queue_size); 4161 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE, 4162 max_rx_queue_size); 4163 4164 tx_queue_size = rounddown_pow_of_two(tx_queue_size); 4165 rx_queue_size = rounddown_pow_of_two(rx_queue_size); 4166 4167 ctx->max_tx_queue_size = max_tx_queue_size; 4168 ctx->max_rx_queue_size = max_rx_queue_size; 4169 ctx->tx_queue_size = tx_queue_size; 4170 ctx->rx_queue_size = rx_queue_size; 4171 4172 return 0; 4173 } 4174 4175 /* ena_probe - Device Initialization Routine 4176 * @pdev: PCI device information struct 4177 * @ent: entry in ena_pci_tbl 4178 * 4179 * Returns 0 on success, negative on failure 4180 * 4181 * ena_probe initializes an adapter identified by a pci_dev structure. 4182 * The OS initialization, configuring of the adapter private structure, 4183 * and a hardware reset occur. 4184 */ 4185 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 4186 { 4187 struct ena_calc_queue_size_ctx calc_queue_ctx = {}; 4188 struct ena_com_dev_get_features_ctx get_feat_ctx; 4189 struct ena_com_dev *ena_dev = NULL; 4190 struct ena_adapter *adapter; 4191 struct net_device *netdev; 4192 static int adapters_found; 4193 u32 max_num_io_queues; 4194 bool wd_state; 4195 int bars, rc; 4196 4197 dev_dbg(&pdev->dev, "%s\n", __func__); 4198 4199 rc = pci_enable_device_mem(pdev); 4200 if (rc) { 4201 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n"); 4202 return rc; 4203 } 4204 4205 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS)); 4206 if (rc) { 4207 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc); 4208 goto err_disable_device; 4209 } 4210 4211 pci_set_master(pdev); 4212 4213 ena_dev = vzalloc(sizeof(*ena_dev)); 4214 if (!ena_dev) { 4215 rc = -ENOMEM; 4216 goto err_disable_device; 4217 } 4218 4219 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; 4220 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); 4221 if (rc) { 4222 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n", 4223 rc); 4224 goto err_free_ena_dev; 4225 } 4226 4227 ena_dev->reg_bar = devm_ioremap(&pdev->dev, 4228 pci_resource_start(pdev, ENA_REG_BAR), 4229 pci_resource_len(pdev, ENA_REG_BAR)); 4230 if (!ena_dev->reg_bar) { 4231 dev_err(&pdev->dev, "Failed to remap regs bar\n"); 4232 rc = -EFAULT; 4233 goto err_free_region; 4234 } 4235 4236 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US; 4237 4238 ena_dev->dmadev = &pdev->dev; 4239 4240 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS); 4241 if (!netdev) { 4242 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n"); 4243 rc = -ENOMEM; 4244 goto err_free_region; 4245 } 4246 4247 SET_NETDEV_DEV(netdev, &pdev->dev); 4248 adapter = netdev_priv(netdev); 4249 adapter->ena_dev = ena_dev; 4250 adapter->netdev = netdev; 4251 adapter->pdev = pdev; 4252 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 4253 4254 ena_dev->net_device = netdev; 4255 4256 pci_set_drvdata(pdev, adapter); 4257 4258 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state); 4259 if (rc) { 4260 dev_err(&pdev->dev, "ENA device init failed\n"); 4261 if (rc == -ETIME) 4262 rc = -EPROBE_DEFER; 4263 goto err_netdev_destroy; 4264 } 4265 4266 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars); 4267 if (rc) { 4268 dev_err(&pdev->dev, "ENA llq bar mapping failed\n"); 4269 goto err_device_destroy; 4270 } 4271 4272 calc_queue_ctx.ena_dev = ena_dev; 4273 calc_queue_ctx.get_feat_ctx = &get_feat_ctx; 4274 calc_queue_ctx.pdev = pdev; 4275 4276 /* Initial TX and RX interrupt delay. Assumes 1 usec granularity. 4277 * Updated during device initialization with the real granularity 4278 */ 4279 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS; 4280 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS; 4281 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION; 4282 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx); 4283 rc = ena_calc_io_queue_size(&calc_queue_ctx); 4284 if (rc || !max_num_io_queues) { 4285 rc = -EFAULT; 4286 goto err_device_destroy; 4287 } 4288 4289 ena_set_conf_feat_params(adapter, &get_feat_ctx); 4290 4291 adapter->reset_reason = ENA_REGS_RESET_NORMAL; 4292 4293 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size; 4294 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size; 4295 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size; 4296 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size; 4297 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size; 4298 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size; 4299 4300 adapter->num_io_queues = max_num_io_queues; 4301 adapter->max_num_io_queues = max_num_io_queues; 4302 adapter->last_monitored_tx_qid = 0; 4303 4304 adapter->xdp_first_ring = 0; 4305 adapter->xdp_num_queues = 0; 4306 4307 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK; 4308 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) 4309 adapter->disable_meta_caching = 4310 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags & 4311 BIT(ENA_ADMIN_DISABLE_META_CACHING)); 4312 4313 adapter->wd_state = wd_state; 4314 4315 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found); 4316 4317 rc = ena_com_init_interrupt_moderation(adapter->ena_dev); 4318 if (rc) { 4319 dev_err(&pdev->dev, 4320 "Failed to query interrupt moderation feature\n"); 4321 goto err_device_destroy; 4322 } 4323 ena_init_io_rings(adapter, 4324 0, 4325 adapter->xdp_num_queues + 4326 adapter->num_io_queues); 4327 4328 netdev->netdev_ops = &ena_netdev_ops; 4329 netdev->watchdog_timeo = TX_TIMEOUT; 4330 ena_set_ethtool_ops(netdev); 4331 4332 netdev->priv_flags |= IFF_UNICAST_FLT; 4333 4334 u64_stats_init(&adapter->syncp); 4335 4336 rc = ena_enable_msix_and_set_admin_interrupts(adapter); 4337 if (rc) { 4338 dev_err(&pdev->dev, 4339 "Failed to enable and set the admin interrupts\n"); 4340 goto err_worker_destroy; 4341 } 4342 rc = ena_rss_init_default(adapter); 4343 if (rc && (rc != -EOPNOTSUPP)) { 4344 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc); 4345 goto err_free_msix; 4346 } 4347 4348 ena_config_debug_area(adapter); 4349 4350 if (!ena_update_hw_stats(adapter)) 4351 adapter->eni_stats_supported = true; 4352 else 4353 adapter->eni_stats_supported = false; 4354 4355 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len); 4356 4357 netif_carrier_off(netdev); 4358 4359 rc = register_netdev(netdev); 4360 if (rc) { 4361 dev_err(&pdev->dev, "Cannot register net device\n"); 4362 goto err_rss; 4363 } 4364 4365 INIT_WORK(&adapter->reset_task, ena_fw_reset_device); 4366 4367 adapter->last_keep_alive_jiffies = jiffies; 4368 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT; 4369 adapter->missing_tx_completion_to = TX_TIMEOUT; 4370 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS; 4371 4372 ena_update_hints(adapter, &get_feat_ctx.hw_hints); 4373 4374 timer_setup(&adapter->timer_service, ena_timer_service, 0); 4375 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ)); 4376 4377 dev_info(&pdev->dev, 4378 "%s found at mem %lx, mac addr %pM\n", 4379 DEVICE_NAME, (long)pci_resource_start(pdev, 0), 4380 netdev->dev_addr); 4381 4382 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags); 4383 4384 adapters_found++; 4385 4386 return 0; 4387 4388 err_rss: 4389 ena_com_delete_debug_area(ena_dev); 4390 ena_com_rss_destroy(ena_dev); 4391 err_free_msix: 4392 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR); 4393 /* stop submitting admin commands on a device that was reset */ 4394 ena_com_set_admin_running_state(ena_dev, false); 4395 ena_free_mgmnt_irq(adapter); 4396 ena_disable_msix(adapter); 4397 err_worker_destroy: 4398 del_timer(&adapter->timer_service); 4399 err_device_destroy: 4400 ena_com_delete_host_info(ena_dev); 4401 ena_com_admin_destroy(ena_dev); 4402 err_netdev_destroy: 4403 free_netdev(netdev); 4404 err_free_region: 4405 ena_release_bars(ena_dev, pdev); 4406 err_free_ena_dev: 4407 vfree(ena_dev); 4408 err_disable_device: 4409 pci_disable_device(pdev); 4410 return rc; 4411 } 4412 4413 /*****************************************************************************/ 4414 4415 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines 4416 * @pdev: PCI device information struct 4417 * @shutdown: Is it a shutdown operation? If false, means it is a removal 4418 * 4419 * __ena_shutoff is a helper routine that does the real work on shutdown and 4420 * removal paths; the difference between those paths is with regards to whether 4421 * dettach or unregister the netdevice. 4422 */ 4423 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown) 4424 { 4425 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4426 struct ena_com_dev *ena_dev; 4427 struct net_device *netdev; 4428 4429 ena_dev = adapter->ena_dev; 4430 netdev = adapter->netdev; 4431 4432 #ifdef CONFIG_RFS_ACCEL 4433 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) { 4434 free_irq_cpu_rmap(netdev->rx_cpu_rmap); 4435 netdev->rx_cpu_rmap = NULL; 4436 } 4437 #endif /* CONFIG_RFS_ACCEL */ 4438 4439 /* Make sure timer and reset routine won't be called after 4440 * freeing device resources. 4441 */ 4442 del_timer_sync(&adapter->timer_service); 4443 cancel_work_sync(&adapter->reset_task); 4444 4445 rtnl_lock(); /* lock released inside the below if-else block */ 4446 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN; 4447 ena_destroy_device(adapter, true); 4448 if (shutdown) { 4449 netif_device_detach(netdev); 4450 dev_close(netdev); 4451 rtnl_unlock(); 4452 } else { 4453 rtnl_unlock(); 4454 unregister_netdev(netdev); 4455 free_netdev(netdev); 4456 } 4457 4458 ena_com_rss_destroy(ena_dev); 4459 4460 ena_com_delete_debug_area(ena_dev); 4461 4462 ena_com_delete_host_info(ena_dev); 4463 4464 ena_release_bars(ena_dev, pdev); 4465 4466 pci_disable_device(pdev); 4467 4468 vfree(ena_dev); 4469 } 4470 4471 /* ena_remove - Device Removal Routine 4472 * @pdev: PCI device information struct 4473 * 4474 * ena_remove is called by the PCI subsystem to alert the driver 4475 * that it should release a PCI device. 4476 */ 4477 4478 static void ena_remove(struct pci_dev *pdev) 4479 { 4480 __ena_shutoff(pdev, false); 4481 } 4482 4483 /* ena_shutdown - Device Shutdown Routine 4484 * @pdev: PCI device information struct 4485 * 4486 * ena_shutdown is called by the PCI subsystem to alert the driver that 4487 * a shutdown/reboot (or kexec) is happening and device must be disabled. 4488 */ 4489 4490 static void ena_shutdown(struct pci_dev *pdev) 4491 { 4492 __ena_shutoff(pdev, true); 4493 } 4494 4495 /* ena_suspend - PM suspend callback 4496 * @dev_d: Device information struct 4497 */ 4498 static int __maybe_unused ena_suspend(struct device *dev_d) 4499 { 4500 struct pci_dev *pdev = to_pci_dev(dev_d); 4501 struct ena_adapter *adapter = pci_get_drvdata(pdev); 4502 4503 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp); 4504 4505 rtnl_lock(); 4506 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) { 4507 dev_err(&pdev->dev, 4508 "Ignoring device reset request as the device is being suspended\n"); 4509 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 4510 } 4511 ena_destroy_device(adapter, true); 4512 rtnl_unlock(); 4513 return 0; 4514 } 4515 4516 /* ena_resume - PM resume callback 4517 * @dev_d: Device information struct 4518 */ 4519 static int __maybe_unused ena_resume(struct device *dev_d) 4520 { 4521 struct ena_adapter *adapter = dev_get_drvdata(dev_d); 4522 int rc; 4523 4524 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp); 4525 4526 rtnl_lock(); 4527 rc = ena_restore_device(adapter); 4528 rtnl_unlock(); 4529 return rc; 4530 } 4531 4532 static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume); 4533 4534 static struct pci_driver ena_pci_driver = { 4535 .name = DRV_MODULE_NAME, 4536 .id_table = ena_pci_tbl, 4537 .probe = ena_probe, 4538 .remove = ena_remove, 4539 .shutdown = ena_shutdown, 4540 .driver.pm = &ena_pm_ops, 4541 .sriov_configure = pci_sriov_configure_simple, 4542 }; 4543 4544 static int __init ena_init(void) 4545 { 4546 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME); 4547 if (!ena_wq) { 4548 pr_err("Failed to create workqueue\n"); 4549 return -ENOMEM; 4550 } 4551 4552 return pci_register_driver(&ena_pci_driver); 4553 } 4554 4555 static void __exit ena_cleanup(void) 4556 { 4557 pci_unregister_driver(&ena_pci_driver); 4558 4559 if (ena_wq) { 4560 destroy_workqueue(ena_wq); 4561 ena_wq = NULL; 4562 } 4563 } 4564 4565 /****************************************************************************** 4566 ******************************** AENQ Handlers ******************************* 4567 *****************************************************************************/ 4568 /* ena_update_on_link_change: 4569 * Notify the network interface about the change in link status 4570 */ 4571 static void ena_update_on_link_change(void *adapter_data, 4572 struct ena_admin_aenq_entry *aenq_e) 4573 { 4574 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4575 struct ena_admin_aenq_link_change_desc *aenq_desc = 4576 (struct ena_admin_aenq_link_change_desc *)aenq_e; 4577 int status = aenq_desc->flags & 4578 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 4579 4580 if (status) { 4581 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__); 4582 set_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4583 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags)) 4584 netif_carrier_on(adapter->netdev); 4585 } else { 4586 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags); 4587 netif_carrier_off(adapter->netdev); 4588 } 4589 } 4590 4591 static void ena_keep_alive_wd(void *adapter_data, 4592 struct ena_admin_aenq_entry *aenq_e) 4593 { 4594 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4595 struct ena_admin_aenq_keep_alive_desc *desc; 4596 u64 rx_drops; 4597 u64 tx_drops; 4598 4599 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e; 4600 adapter->last_keep_alive_jiffies = jiffies; 4601 4602 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low; 4603 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low; 4604 4605 u64_stats_update_begin(&adapter->syncp); 4606 /* These stats are accumulated by the device, so the counters indicate 4607 * all drops since last reset. 4608 */ 4609 adapter->dev_stats.rx_drops = rx_drops; 4610 adapter->dev_stats.tx_drops = tx_drops; 4611 u64_stats_update_end(&adapter->syncp); 4612 } 4613 4614 static void ena_notification(void *adapter_data, 4615 struct ena_admin_aenq_entry *aenq_e) 4616 { 4617 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 4618 struct ena_admin_ena_hw_hints *hints; 4619 4620 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION, 4621 "Invalid group(%x) expected %x\n", 4622 aenq_e->aenq_common_desc.group, 4623 ENA_ADMIN_NOTIFICATION); 4624 4625 switch (aenq_e->aenq_common_desc.syndrome) { 4626 case ENA_ADMIN_UPDATE_HINTS: 4627 hints = (struct ena_admin_ena_hw_hints *) 4628 (&aenq_e->inline_data_w4); 4629 ena_update_hints(adapter, hints); 4630 break; 4631 default: 4632 netif_err(adapter, drv, adapter->netdev, 4633 "Invalid aenq notification link state %d\n", 4634 aenq_e->aenq_common_desc.syndrome); 4635 } 4636 } 4637 4638 /* This handler will called for unknown event group or unimplemented handlers*/ 4639 static void unimplemented_aenq_handler(void *data, 4640 struct ena_admin_aenq_entry *aenq_e) 4641 { 4642 struct ena_adapter *adapter = (struct ena_adapter *)data; 4643 4644 netif_err(adapter, drv, adapter->netdev, 4645 "Unknown event was received or event with unimplemented handler\n"); 4646 } 4647 4648 static struct ena_aenq_handlers aenq_handlers = { 4649 .handlers = { 4650 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 4651 [ENA_ADMIN_NOTIFICATION] = ena_notification, 4652 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 4653 }, 4654 .unimplemented_handler = unimplemented_aenq_handler 4655 }; 4656 4657 module_init(ena_init); 4658 module_exit(ena_cleanup); 4659