1 /*
2  * Copyright 2015 Amazon.com, Inc. or its affiliates.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/numa.h>
42 #include <linux/pci.h>
43 #include <linux/utsname.h>
44 #include <linux/version.h>
45 #include <linux/vmalloc.h>
46 #include <net/ip.h>
47 
48 #include "ena_netdev.h"
49 #include <linux/bpf_trace.h>
50 #include "ena_pci_id_tbl.h"
51 
52 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
53 MODULE_DESCRIPTION(DEVICE_NAME);
54 MODULE_LICENSE("GPL");
55 
56 /* Time in jiffies before concluding the transmitter is hung. */
57 #define TX_TIMEOUT  (5 * HZ)
58 
59 #define ENA_NAPI_BUDGET 64
60 
61 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
62 		NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
63 static int debug = -1;
64 module_param(debug, int, 0);
65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
66 
67 static struct ena_aenq_handlers aenq_handlers;
68 
69 static struct workqueue_struct *ena_wq;
70 
71 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
72 
73 static int ena_rss_init_default(struct ena_adapter *adapter);
74 static void check_for_admin_com_state(struct ena_adapter *adapter);
75 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
76 static int ena_restore_device(struct ena_adapter *adapter);
77 
78 static void ena_init_io_rings(struct ena_adapter *adapter,
79 			      int first_index, int count);
80 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
81 				   int count);
82 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
83 				  int count);
84 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
85 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
86 					   int first_index,
87 					   int count);
88 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
89 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
90 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
91 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
92 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
93 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
94 				      int first_index, int count);
95 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
96 				     int first_index, int count);
97 static int ena_up(struct ena_adapter *adapter);
98 static void ena_down(struct ena_adapter *adapter);
99 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
100 				 struct ena_ring *rx_ring);
101 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
102 				      struct ena_ring *rx_ring);
103 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
104 			      struct ena_tx_buffer *tx_info);
105 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
106 					    int first_index, int count);
107 
108 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
109 {
110 	struct ena_adapter *adapter = netdev_priv(dev);
111 
112 	/* Change the state of the device to trigger reset
113 	 * Check that we are not in the middle or a trigger already
114 	 */
115 
116 	if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
117 		return;
118 
119 	adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
120 	u64_stats_update_begin(&adapter->syncp);
121 	adapter->dev_stats.tx_timeout++;
122 	u64_stats_update_end(&adapter->syncp);
123 
124 	netif_err(adapter, tx_err, dev, "Transmit time out\n");
125 }
126 
127 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
128 {
129 	int i;
130 
131 	for (i = 0; i < adapter->num_io_queues; i++)
132 		adapter->rx_ring[i].mtu = mtu;
133 }
134 
135 static int ena_change_mtu(struct net_device *dev, int new_mtu)
136 {
137 	struct ena_adapter *adapter = netdev_priv(dev);
138 	int ret;
139 
140 	ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
141 	if (!ret) {
142 		netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
143 		update_rx_ring_mtu(adapter, new_mtu);
144 		dev->mtu = new_mtu;
145 	} else {
146 		netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
147 			  new_mtu);
148 	}
149 
150 	return ret;
151 }
152 
153 static int ena_xmit_common(struct net_device *dev,
154 			   struct ena_ring *ring,
155 			   struct ena_tx_buffer *tx_info,
156 			   struct ena_com_tx_ctx *ena_tx_ctx,
157 			   u16 next_to_use,
158 			   u32 bytes)
159 {
160 	struct ena_adapter *adapter = netdev_priv(dev);
161 	int rc, nb_hw_desc;
162 
163 	if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
164 						ena_tx_ctx))) {
165 		netif_dbg(adapter, tx_queued, dev,
166 			  "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
167 			  ring->qid);
168 		ena_com_write_sq_doorbell(ring->ena_com_io_sq);
169 	}
170 
171 	/* prepare the packet's descriptors to dma engine */
172 	rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
173 				&nb_hw_desc);
174 
175 	/* In case there isn't enough space in the queue for the packet,
176 	 * we simply drop it. All other failure reasons of
177 	 * ena_com_prepare_tx() are fatal and therefore require a device reset.
178 	 */
179 	if (unlikely(rc)) {
180 		netif_err(adapter, tx_queued, dev,
181 			  "failed to prepare tx bufs\n");
182 		u64_stats_update_begin(&ring->syncp);
183 		ring->tx_stats.prepare_ctx_err++;
184 		u64_stats_update_end(&ring->syncp);
185 		if (rc != -ENOMEM) {
186 			adapter->reset_reason =
187 				ENA_REGS_RESET_DRIVER_INVALID_STATE;
188 			set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
189 		}
190 		return rc;
191 	}
192 
193 	u64_stats_update_begin(&ring->syncp);
194 	ring->tx_stats.cnt++;
195 	ring->tx_stats.bytes += bytes;
196 	u64_stats_update_end(&ring->syncp);
197 
198 	tx_info->tx_descs = nb_hw_desc;
199 	tx_info->last_jiffies = jiffies;
200 	tx_info->print_once = 0;
201 
202 	ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
203 						 ring->ring_size);
204 	return 0;
205 }
206 
207 /* This is the XDP napi callback. XDP queues use a separate napi callback
208  * than Rx/Tx queues.
209  */
210 static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
211 {
212 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
213 	u32 xdp_work_done, xdp_budget;
214 	struct ena_ring *xdp_ring;
215 	int napi_comp_call = 0;
216 	int ret;
217 
218 	xdp_ring = ena_napi->xdp_ring;
219 	xdp_ring->first_interrupt = ena_napi->first_interrupt;
220 
221 	xdp_budget = budget;
222 
223 	if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
224 	    test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
225 		napi_complete_done(napi, 0);
226 		return 0;
227 	}
228 
229 	xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
230 
231 	/* If the device is about to reset or down, avoid unmask
232 	 * the interrupt and return 0 so NAPI won't reschedule
233 	 */
234 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
235 		napi_complete_done(napi, 0);
236 		ret = 0;
237 	} else if (xdp_budget > xdp_work_done) {
238 		napi_comp_call = 1;
239 		if (napi_complete_done(napi, xdp_work_done))
240 			ena_unmask_interrupt(xdp_ring, NULL);
241 		ena_update_ring_numa_node(xdp_ring, NULL);
242 		ret = xdp_work_done;
243 	} else {
244 		ret = xdp_budget;
245 	}
246 
247 	u64_stats_update_begin(&xdp_ring->syncp);
248 	xdp_ring->tx_stats.napi_comp += napi_comp_call;
249 	xdp_ring->tx_stats.tx_poll++;
250 	u64_stats_update_end(&xdp_ring->syncp);
251 
252 	return ret;
253 }
254 
255 static int ena_xdp_tx_map_buff(struct ena_ring *xdp_ring,
256 			       struct ena_tx_buffer *tx_info,
257 			       struct xdp_buff *xdp,
258 			       void **push_hdr,
259 			       u32 *push_len)
260 {
261 	struct ena_adapter *adapter = xdp_ring->adapter;
262 	struct ena_com_buf *ena_buf;
263 	dma_addr_t dma = 0;
264 	u32 size;
265 
266 	tx_info->xdpf = convert_to_xdp_frame(xdp);
267 	size = tx_info->xdpf->len;
268 	ena_buf = tx_info->bufs;
269 
270 	/* llq push buffer */
271 	*push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
272 	*push_hdr = tx_info->xdpf->data;
273 
274 	if (size - *push_len > 0) {
275 		dma = dma_map_single(xdp_ring->dev,
276 				     *push_hdr + *push_len,
277 				     size - *push_len,
278 				     DMA_TO_DEVICE);
279 		if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
280 			goto error_report_dma_error;
281 
282 		tx_info->map_linear_data = 1;
283 		tx_info->num_of_bufs = 1;
284 	}
285 
286 	ena_buf->paddr = dma;
287 	ena_buf->len = size;
288 
289 	return 0;
290 
291 error_report_dma_error:
292 	u64_stats_update_begin(&xdp_ring->syncp);
293 	xdp_ring->tx_stats.dma_mapping_err++;
294 	u64_stats_update_end(&xdp_ring->syncp);
295 	netdev_warn(adapter->netdev, "failed to map xdp buff\n");
296 
297 	xdp_return_frame_rx_napi(tx_info->xdpf);
298 	tx_info->xdpf = NULL;
299 	tx_info->num_of_bufs = 0;
300 
301 	return -EINVAL;
302 }
303 
304 static int ena_xdp_xmit_buff(struct net_device *dev,
305 			     struct xdp_buff *xdp,
306 			     int qid,
307 			     struct ena_rx_buffer *rx_info)
308 {
309 	struct ena_adapter *adapter = netdev_priv(dev);
310 	struct ena_com_tx_ctx ena_tx_ctx = {0};
311 	struct ena_tx_buffer *tx_info;
312 	struct ena_ring *xdp_ring;
313 	u16 next_to_use, req_id;
314 	int rc;
315 	void *push_hdr;
316 	u32 push_len;
317 
318 	xdp_ring = &adapter->tx_ring[qid];
319 	next_to_use = xdp_ring->next_to_use;
320 	req_id = xdp_ring->free_ids[next_to_use];
321 	tx_info = &xdp_ring->tx_buffer_info[req_id];
322 	tx_info->num_of_bufs = 0;
323 	page_ref_inc(rx_info->page);
324 	tx_info->xdp_rx_page = rx_info->page;
325 
326 	rc = ena_xdp_tx_map_buff(xdp_ring, tx_info, xdp, &push_hdr, &push_len);
327 	if (unlikely(rc))
328 		goto error_drop_packet;
329 
330 	ena_tx_ctx.ena_bufs = tx_info->bufs;
331 	ena_tx_ctx.push_header = push_hdr;
332 	ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
333 	ena_tx_ctx.req_id = req_id;
334 	ena_tx_ctx.header_len = push_len;
335 
336 	rc = ena_xmit_common(dev,
337 			     xdp_ring,
338 			     tx_info,
339 			     &ena_tx_ctx,
340 			     next_to_use,
341 			     xdp->data_end - xdp->data);
342 	if (rc)
343 		goto error_unmap_dma;
344 	/* trigger the dma engine. ena_com_write_sq_doorbell()
345 	 * has a mb
346 	 */
347 	ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq);
348 	u64_stats_update_begin(&xdp_ring->syncp);
349 	xdp_ring->tx_stats.doorbells++;
350 	u64_stats_update_end(&xdp_ring->syncp);
351 
352 	return NETDEV_TX_OK;
353 
354 error_unmap_dma:
355 	ena_unmap_tx_buff(xdp_ring, tx_info);
356 	tx_info->xdpf = NULL;
357 error_drop_packet:
358 
359 	return NETDEV_TX_OK;
360 }
361 
362 static int ena_xdp_execute(struct ena_ring *rx_ring,
363 			   struct xdp_buff *xdp,
364 			   struct ena_rx_buffer *rx_info)
365 {
366 	struct bpf_prog *xdp_prog;
367 	u32 verdict = XDP_PASS;
368 
369 	rcu_read_lock();
370 	xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
371 
372 	if (!xdp_prog)
373 		goto out;
374 
375 	verdict = bpf_prog_run_xdp(xdp_prog, xdp);
376 
377 	if (verdict == XDP_TX)
378 		ena_xdp_xmit_buff(rx_ring->netdev,
379 				  xdp,
380 				  rx_ring->qid + rx_ring->adapter->num_io_queues,
381 				  rx_info);
382 	else if (unlikely(verdict == XDP_ABORTED))
383 		trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
384 	else if (unlikely(verdict > XDP_TX))
385 		bpf_warn_invalid_xdp_action(verdict);
386 out:
387 	rcu_read_unlock();
388 	return verdict;
389 }
390 
391 static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
392 {
393 	adapter->xdp_first_ring = adapter->num_io_queues;
394 	adapter->xdp_num_queues = adapter->num_io_queues;
395 
396 	ena_init_io_rings(adapter,
397 			  adapter->xdp_first_ring,
398 			  adapter->xdp_num_queues);
399 }
400 
401 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
402 {
403 	int rc = 0;
404 
405 	rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
406 					     adapter->xdp_num_queues);
407 	if (rc)
408 		goto setup_err;
409 
410 	rc = ena_create_io_tx_queues_in_range(adapter,
411 					      adapter->xdp_first_ring,
412 					      adapter->xdp_num_queues);
413 	if (rc)
414 		goto create_err;
415 
416 	return 0;
417 
418 create_err:
419 	ena_free_all_io_tx_resources(adapter);
420 setup_err:
421 	return rc;
422 }
423 
424 /* Provides a way for both kernel and bpf-prog to know
425  * more about the RX-queue a given XDP frame arrived on.
426  */
427 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
428 {
429 	int rc;
430 
431 	rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid);
432 
433 	if (rc) {
434 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
435 			  "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
436 			  rx_ring->qid, rc);
437 		goto err;
438 	}
439 
440 	rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
441 					NULL);
442 
443 	if (rc) {
444 		netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
445 			  "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
446 			  rx_ring->qid, rc);
447 		xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
448 	}
449 
450 err:
451 	return rc;
452 }
453 
454 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
455 {
456 	xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
457 	xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
458 }
459 
460 static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
461 						 struct bpf_prog *prog,
462 						 int first, int count)
463 {
464 	struct ena_ring *rx_ring;
465 	int i = 0;
466 
467 	for (i = first; i < count; i++) {
468 		rx_ring = &adapter->rx_ring[i];
469 		xchg(&rx_ring->xdp_bpf_prog, prog);
470 		if (prog) {
471 			ena_xdp_register_rxq_info(rx_ring);
472 			rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
473 		} else {
474 			ena_xdp_unregister_rxq_info(rx_ring);
475 			rx_ring->rx_headroom = 0;
476 		}
477 	}
478 }
479 
480 static void ena_xdp_exchange_program(struct ena_adapter *adapter,
481 				     struct bpf_prog *prog)
482 {
483 	struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
484 
485 	ena_xdp_exchange_program_rx_in_range(adapter,
486 					     prog,
487 					     0,
488 					     adapter->num_io_queues);
489 
490 	if (old_bpf_prog)
491 		bpf_prog_put(old_bpf_prog);
492 }
493 
494 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
495 {
496 	bool was_up;
497 	int rc;
498 
499 	was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
500 
501 	if (was_up)
502 		ena_down(adapter);
503 
504 	adapter->xdp_first_ring = 0;
505 	adapter->xdp_num_queues = 0;
506 	ena_xdp_exchange_program(adapter, NULL);
507 	if (was_up) {
508 		rc = ena_up(adapter);
509 		if (rc)
510 			return rc;
511 	}
512 	return 0;
513 }
514 
515 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
516 {
517 	struct ena_adapter *adapter = netdev_priv(netdev);
518 	struct bpf_prog *prog = bpf->prog;
519 	struct bpf_prog *old_bpf_prog;
520 	int rc, prev_mtu;
521 	bool is_up;
522 
523 	is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
524 	rc = ena_xdp_allowed(adapter);
525 	if (rc == ENA_XDP_ALLOWED) {
526 		old_bpf_prog = adapter->xdp_bpf_prog;
527 		if (prog) {
528 			if (!is_up) {
529 				ena_init_all_xdp_queues(adapter);
530 			} else if (!old_bpf_prog) {
531 				ena_down(adapter);
532 				ena_init_all_xdp_queues(adapter);
533 			}
534 			ena_xdp_exchange_program(adapter, prog);
535 
536 			if (is_up && !old_bpf_prog) {
537 				rc = ena_up(adapter);
538 				if (rc)
539 					return rc;
540 			}
541 		} else if (old_bpf_prog) {
542 			rc = ena_destroy_and_free_all_xdp_queues(adapter);
543 			if (rc)
544 				return rc;
545 		}
546 
547 		prev_mtu = netdev->max_mtu;
548 		netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
549 
550 		if (!old_bpf_prog)
551 			netif_info(adapter, drv, adapter->netdev,
552 				   "xdp program set, changing the max_mtu from %d to %d",
553 				   prev_mtu, netdev->max_mtu);
554 
555 	} else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
556 		netif_err(adapter, drv, adapter->netdev,
557 			  "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
558 			  netdev->mtu, ENA_XDP_MAX_MTU);
559 		NL_SET_ERR_MSG_MOD(bpf->extack,
560 				   "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
561 		return -EINVAL;
562 	} else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
563 		netif_err(adapter, drv, adapter->netdev,
564 			  "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
565 			  adapter->num_io_queues, adapter->max_num_io_queues);
566 		NL_SET_ERR_MSG_MOD(bpf->extack,
567 				   "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
568 		return -EINVAL;
569 	}
570 
571 	return 0;
572 }
573 
574 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp
575  * program as well as to query the current xdp program id.
576  */
577 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
578 {
579 	struct ena_adapter *adapter = netdev_priv(netdev);
580 
581 	switch (bpf->command) {
582 	case XDP_SETUP_PROG:
583 		return ena_xdp_set(netdev, bpf);
584 	case XDP_QUERY_PROG:
585 		bpf->prog_id = adapter->xdp_bpf_prog ?
586 			adapter->xdp_bpf_prog->aux->id : 0;
587 		break;
588 	default:
589 		return -EINVAL;
590 	}
591 	return 0;
592 }
593 
594 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
595 {
596 #ifdef CONFIG_RFS_ACCEL
597 	u32 i;
598 	int rc;
599 
600 	adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
601 	if (!adapter->netdev->rx_cpu_rmap)
602 		return -ENOMEM;
603 	for (i = 0; i < adapter->num_io_queues; i++) {
604 		int irq_idx = ENA_IO_IRQ_IDX(i);
605 
606 		rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
607 				      pci_irq_vector(adapter->pdev, irq_idx));
608 		if (rc) {
609 			free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
610 			adapter->netdev->rx_cpu_rmap = NULL;
611 			return rc;
612 		}
613 	}
614 #endif /* CONFIG_RFS_ACCEL */
615 	return 0;
616 }
617 
618 static void ena_init_io_rings_common(struct ena_adapter *adapter,
619 				     struct ena_ring *ring, u16 qid)
620 {
621 	ring->qid = qid;
622 	ring->pdev = adapter->pdev;
623 	ring->dev = &adapter->pdev->dev;
624 	ring->netdev = adapter->netdev;
625 	ring->napi = &adapter->ena_napi[qid].napi;
626 	ring->adapter = adapter;
627 	ring->ena_dev = adapter->ena_dev;
628 	ring->per_napi_packets = 0;
629 	ring->cpu = 0;
630 	ring->first_interrupt = false;
631 	ring->no_interrupt_event_cnt = 0;
632 	u64_stats_init(&ring->syncp);
633 }
634 
635 static void ena_init_io_rings(struct ena_adapter *adapter,
636 			      int first_index, int count)
637 {
638 	struct ena_com_dev *ena_dev;
639 	struct ena_ring *txr, *rxr;
640 	int i;
641 
642 	ena_dev = adapter->ena_dev;
643 
644 	for (i = first_index; i < first_index + count; i++) {
645 		txr = &adapter->tx_ring[i];
646 		rxr = &adapter->rx_ring[i];
647 
648 		/* TX common ring state */
649 		ena_init_io_rings_common(adapter, txr, i);
650 
651 		/* TX specific ring state */
652 		txr->ring_size = adapter->requested_tx_ring_size;
653 		txr->tx_max_header_size = ena_dev->tx_max_header_size;
654 		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
655 		txr->sgl_size = adapter->max_tx_sgl_size;
656 		txr->smoothed_interval =
657 			ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
658 
659 		/* Don't init RX queues for xdp queues */
660 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
661 			/* RX common ring state */
662 			ena_init_io_rings_common(adapter, rxr, i);
663 
664 			/* RX specific ring state */
665 			rxr->ring_size = adapter->requested_rx_ring_size;
666 			rxr->rx_copybreak = adapter->rx_copybreak;
667 			rxr->sgl_size = adapter->max_rx_sgl_size;
668 			rxr->smoothed_interval =
669 				ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
670 			rxr->empty_rx_queue = 0;
671 			adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
672 		}
673 	}
674 }
675 
676 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
677  * @adapter: network interface device structure
678  * @qid: queue index
679  *
680  * Return 0 on success, negative on failure
681  */
682 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
683 {
684 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
685 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
686 	int size, i, node;
687 
688 	if (tx_ring->tx_buffer_info) {
689 		netif_err(adapter, ifup,
690 			  adapter->netdev, "tx_buffer_info info is not NULL");
691 		return -EEXIST;
692 	}
693 
694 	size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
695 	node = cpu_to_node(ena_irq->cpu);
696 
697 	tx_ring->tx_buffer_info = vzalloc_node(size, node);
698 	if (!tx_ring->tx_buffer_info) {
699 		tx_ring->tx_buffer_info = vzalloc(size);
700 		if (!tx_ring->tx_buffer_info)
701 			goto err_tx_buffer_info;
702 	}
703 
704 	size = sizeof(u16) * tx_ring->ring_size;
705 	tx_ring->free_ids = vzalloc_node(size, node);
706 	if (!tx_ring->free_ids) {
707 		tx_ring->free_ids = vzalloc(size);
708 		if (!tx_ring->free_ids)
709 			goto err_tx_free_ids;
710 	}
711 
712 	size = tx_ring->tx_max_header_size;
713 	tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
714 	if (!tx_ring->push_buf_intermediate_buf) {
715 		tx_ring->push_buf_intermediate_buf = vzalloc(size);
716 		if (!tx_ring->push_buf_intermediate_buf)
717 			goto err_push_buf_intermediate_buf;
718 	}
719 
720 	/* Req id ring for TX out of order completions */
721 	for (i = 0; i < tx_ring->ring_size; i++)
722 		tx_ring->free_ids[i] = i;
723 
724 	/* Reset tx statistics */
725 	memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
726 
727 	tx_ring->next_to_use = 0;
728 	tx_ring->next_to_clean = 0;
729 	tx_ring->cpu = ena_irq->cpu;
730 	return 0;
731 
732 err_push_buf_intermediate_buf:
733 	vfree(tx_ring->free_ids);
734 	tx_ring->free_ids = NULL;
735 err_tx_free_ids:
736 	vfree(tx_ring->tx_buffer_info);
737 	tx_ring->tx_buffer_info = NULL;
738 err_tx_buffer_info:
739 	return -ENOMEM;
740 }
741 
742 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
743  * @adapter: network interface device structure
744  * @qid: queue index
745  *
746  * Free all transmit software resources
747  */
748 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
749 {
750 	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
751 
752 	vfree(tx_ring->tx_buffer_info);
753 	tx_ring->tx_buffer_info = NULL;
754 
755 	vfree(tx_ring->free_ids);
756 	tx_ring->free_ids = NULL;
757 
758 	vfree(tx_ring->push_buf_intermediate_buf);
759 	tx_ring->push_buf_intermediate_buf = NULL;
760 }
761 
762 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
763 					   int first_index,
764 					   int count)
765 {
766 	int i, rc = 0;
767 
768 	for (i = first_index; i < first_index + count; i++) {
769 		rc = ena_setup_tx_resources(adapter, i);
770 		if (rc)
771 			goto err_setup_tx;
772 	}
773 
774 	return 0;
775 
776 err_setup_tx:
777 
778 	netif_err(adapter, ifup, adapter->netdev,
779 		  "Tx queue %d: allocation failed\n", i);
780 
781 	/* rewind the index freeing the rings as we go */
782 	while (first_index < i--)
783 		ena_free_tx_resources(adapter, i);
784 	return rc;
785 }
786 
787 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
788 						  int first_index, int count)
789 {
790 	int i;
791 
792 	for (i = first_index; i < first_index + count; i++)
793 		ena_free_tx_resources(adapter, i);
794 }
795 
796 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
797  * @adapter: board private structure
798  *
799  * Free all transmit software resources
800  */
801 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
802 {
803 	ena_free_all_io_tx_resources_in_range(adapter,
804 					      0,
805 					      adapter->xdp_num_queues +
806 					      adapter->num_io_queues);
807 }
808 
809 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
810 {
811 	if (likely(req_id < rx_ring->ring_size))
812 		return 0;
813 
814 	netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
815 		  "Invalid rx req_id: %hu\n", req_id);
816 
817 	u64_stats_update_begin(&rx_ring->syncp);
818 	rx_ring->rx_stats.bad_req_id++;
819 	u64_stats_update_end(&rx_ring->syncp);
820 
821 	/* Trigger device reset */
822 	rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
823 	set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
824 	return -EFAULT;
825 }
826 
827 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
828  * @adapter: network interface device structure
829  * @qid: queue index
830  *
831  * Returns 0 on success, negative on failure
832  */
833 static int ena_setup_rx_resources(struct ena_adapter *adapter,
834 				  u32 qid)
835 {
836 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
837 	struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
838 	int size, node, i;
839 
840 	if (rx_ring->rx_buffer_info) {
841 		netif_err(adapter, ifup, adapter->netdev,
842 			  "rx_buffer_info is not NULL");
843 		return -EEXIST;
844 	}
845 
846 	/* alloc extra element so in rx path
847 	 * we can always prefetch rx_info + 1
848 	 */
849 	size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
850 	node = cpu_to_node(ena_irq->cpu);
851 
852 	rx_ring->rx_buffer_info = vzalloc_node(size, node);
853 	if (!rx_ring->rx_buffer_info) {
854 		rx_ring->rx_buffer_info = vzalloc(size);
855 		if (!rx_ring->rx_buffer_info)
856 			return -ENOMEM;
857 	}
858 
859 	size = sizeof(u16) * rx_ring->ring_size;
860 	rx_ring->free_ids = vzalloc_node(size, node);
861 	if (!rx_ring->free_ids) {
862 		rx_ring->free_ids = vzalloc(size);
863 		if (!rx_ring->free_ids) {
864 			vfree(rx_ring->rx_buffer_info);
865 			rx_ring->rx_buffer_info = NULL;
866 			return -ENOMEM;
867 		}
868 	}
869 
870 	/* Req id ring for receiving RX pkts out of order */
871 	for (i = 0; i < rx_ring->ring_size; i++)
872 		rx_ring->free_ids[i] = i;
873 
874 	/* Reset rx statistics */
875 	memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
876 
877 	rx_ring->next_to_clean = 0;
878 	rx_ring->next_to_use = 0;
879 	rx_ring->cpu = ena_irq->cpu;
880 
881 	return 0;
882 }
883 
884 /* ena_free_rx_resources - Free I/O Rx Resources
885  * @adapter: network interface device structure
886  * @qid: queue index
887  *
888  * Free all receive software resources
889  */
890 static void ena_free_rx_resources(struct ena_adapter *adapter,
891 				  u32 qid)
892 {
893 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
894 
895 	vfree(rx_ring->rx_buffer_info);
896 	rx_ring->rx_buffer_info = NULL;
897 
898 	vfree(rx_ring->free_ids);
899 	rx_ring->free_ids = NULL;
900 }
901 
902 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
903  * @adapter: board private structure
904  *
905  * Return 0 on success, negative on failure
906  */
907 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
908 {
909 	int i, rc = 0;
910 
911 	for (i = 0; i < adapter->num_io_queues; i++) {
912 		rc = ena_setup_rx_resources(adapter, i);
913 		if (rc)
914 			goto err_setup_rx;
915 	}
916 
917 	return 0;
918 
919 err_setup_rx:
920 
921 	netif_err(adapter, ifup, adapter->netdev,
922 		  "Rx queue %d: allocation failed\n", i);
923 
924 	/* rewind the index freeing the rings as we go */
925 	while (i--)
926 		ena_free_rx_resources(adapter, i);
927 	return rc;
928 }
929 
930 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
931  * @adapter: board private structure
932  *
933  * Free all receive software resources
934  */
935 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
936 {
937 	int i;
938 
939 	for (i = 0; i < adapter->num_io_queues; i++)
940 		ena_free_rx_resources(adapter, i);
941 }
942 
943 static int ena_alloc_rx_page(struct ena_ring *rx_ring,
944 				    struct ena_rx_buffer *rx_info, gfp_t gfp)
945 {
946 	struct ena_com_buf *ena_buf;
947 	struct page *page;
948 	dma_addr_t dma;
949 
950 	/* if previous allocated page is not used */
951 	if (unlikely(rx_info->page))
952 		return 0;
953 
954 	page = alloc_page(gfp);
955 	if (unlikely(!page)) {
956 		u64_stats_update_begin(&rx_ring->syncp);
957 		rx_ring->rx_stats.page_alloc_fail++;
958 		u64_stats_update_end(&rx_ring->syncp);
959 		return -ENOMEM;
960 	}
961 
962 	dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
963 			   DMA_FROM_DEVICE);
964 	if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
965 		u64_stats_update_begin(&rx_ring->syncp);
966 		rx_ring->rx_stats.dma_mapping_err++;
967 		u64_stats_update_end(&rx_ring->syncp);
968 
969 		__free_page(page);
970 		return -EIO;
971 	}
972 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
973 		  "alloc page %p, rx_info %p\n", page, rx_info);
974 
975 	rx_info->page = page;
976 	rx_info->page_offset = 0;
977 	ena_buf = &rx_info->ena_buf;
978 	ena_buf->paddr = dma + rx_ring->rx_headroom;
979 	ena_buf->len = ENA_PAGE_SIZE - rx_ring->rx_headroom;
980 
981 	return 0;
982 }
983 
984 static void ena_free_rx_page(struct ena_ring *rx_ring,
985 			     struct ena_rx_buffer *rx_info)
986 {
987 	struct page *page = rx_info->page;
988 	struct ena_com_buf *ena_buf = &rx_info->ena_buf;
989 
990 	if (unlikely(!page)) {
991 		netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
992 			   "Trying to free unallocated buffer\n");
993 		return;
994 	}
995 
996 	dma_unmap_page(rx_ring->dev,
997 		       ena_buf->paddr - rx_ring->rx_headroom,
998 		       ENA_PAGE_SIZE,
999 		       DMA_FROM_DEVICE);
1000 
1001 	__free_page(page);
1002 	rx_info->page = NULL;
1003 }
1004 
1005 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
1006 {
1007 	u16 next_to_use, req_id;
1008 	u32 i;
1009 	int rc;
1010 
1011 	next_to_use = rx_ring->next_to_use;
1012 
1013 	for (i = 0; i < num; i++) {
1014 		struct ena_rx_buffer *rx_info;
1015 
1016 		req_id = rx_ring->free_ids[next_to_use];
1017 
1018 		rx_info = &rx_ring->rx_buffer_info[req_id];
1019 
1020 		rc = ena_alloc_rx_page(rx_ring, rx_info,
1021 				       GFP_ATOMIC | __GFP_COMP);
1022 		if (unlikely(rc < 0)) {
1023 			netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1024 				   "failed to alloc buffer for rx queue %d\n",
1025 				   rx_ring->qid);
1026 			break;
1027 		}
1028 		rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1029 						&rx_info->ena_buf,
1030 						req_id);
1031 		if (unlikely(rc)) {
1032 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1033 				   "failed to add buffer for rx queue %d\n",
1034 				   rx_ring->qid);
1035 			break;
1036 		}
1037 		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1038 						   rx_ring->ring_size);
1039 	}
1040 
1041 	if (unlikely(i < num)) {
1042 		u64_stats_update_begin(&rx_ring->syncp);
1043 		rx_ring->rx_stats.refil_partial++;
1044 		u64_stats_update_end(&rx_ring->syncp);
1045 		netdev_warn(rx_ring->netdev,
1046 			    "refilled rx qid %d with only %d buffers (from %d)\n",
1047 			    rx_ring->qid, i, num);
1048 	}
1049 
1050 	/* ena_com_write_sq_doorbell issues a wmb() */
1051 	if (likely(i))
1052 		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1053 
1054 	rx_ring->next_to_use = next_to_use;
1055 
1056 	return i;
1057 }
1058 
1059 static void ena_free_rx_bufs(struct ena_adapter *adapter,
1060 			     u32 qid)
1061 {
1062 	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1063 	u32 i;
1064 
1065 	for (i = 0; i < rx_ring->ring_size; i++) {
1066 		struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1067 
1068 		if (rx_info->page)
1069 			ena_free_rx_page(rx_ring, rx_info);
1070 	}
1071 }
1072 
1073 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1074  * @adapter: board private structure
1075  */
1076 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1077 {
1078 	struct ena_ring *rx_ring;
1079 	int i, rc, bufs_num;
1080 
1081 	for (i = 0; i < adapter->num_io_queues; i++) {
1082 		rx_ring = &adapter->rx_ring[i];
1083 		bufs_num = rx_ring->ring_size - 1;
1084 		rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1085 
1086 		if (unlikely(rc != bufs_num))
1087 			netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1088 				   "refilling Queue %d failed. allocated %d buffers from: %d\n",
1089 				   i, rc, bufs_num);
1090 	}
1091 }
1092 
1093 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1094 {
1095 	int i;
1096 
1097 	for (i = 0; i < adapter->num_io_queues; i++)
1098 		ena_free_rx_bufs(adapter, i);
1099 }
1100 
1101 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1102 			      struct ena_tx_buffer *tx_info)
1103 {
1104 	struct ena_com_buf *ena_buf;
1105 	u32 cnt;
1106 	int i;
1107 
1108 	ena_buf = tx_info->bufs;
1109 	cnt = tx_info->num_of_bufs;
1110 
1111 	if (unlikely(!cnt))
1112 		return;
1113 
1114 	if (tx_info->map_linear_data) {
1115 		dma_unmap_single(tx_ring->dev,
1116 				 dma_unmap_addr(ena_buf, paddr),
1117 				 dma_unmap_len(ena_buf, len),
1118 				 DMA_TO_DEVICE);
1119 		ena_buf++;
1120 		cnt--;
1121 	}
1122 
1123 	/* unmap remaining mapped pages */
1124 	for (i = 0; i < cnt; i++) {
1125 		dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1126 			       dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1127 		ena_buf++;
1128 	}
1129 }
1130 
1131 /* ena_free_tx_bufs - Free Tx Buffers per Queue
1132  * @tx_ring: TX ring for which buffers be freed
1133  */
1134 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1135 {
1136 	bool print_once = true;
1137 	u32 i;
1138 
1139 	for (i = 0; i < tx_ring->ring_size; i++) {
1140 		struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1141 
1142 		if (!tx_info->skb)
1143 			continue;
1144 
1145 		if (print_once) {
1146 			netdev_notice(tx_ring->netdev,
1147 				      "free uncompleted tx skb qid %d idx 0x%x\n",
1148 				      tx_ring->qid, i);
1149 			print_once = false;
1150 		} else {
1151 			netdev_dbg(tx_ring->netdev,
1152 				   "free uncompleted tx skb qid %d idx 0x%x\n",
1153 				   tx_ring->qid, i);
1154 		}
1155 
1156 		ena_unmap_tx_buff(tx_ring, tx_info);
1157 
1158 		dev_kfree_skb_any(tx_info->skb);
1159 	}
1160 	netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1161 						  tx_ring->qid));
1162 }
1163 
1164 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1165 {
1166 	struct ena_ring *tx_ring;
1167 	int i;
1168 
1169 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1170 		tx_ring = &adapter->tx_ring[i];
1171 		ena_free_tx_bufs(tx_ring);
1172 	}
1173 }
1174 
1175 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1176 {
1177 	u16 ena_qid;
1178 	int i;
1179 
1180 	for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1181 		ena_qid = ENA_IO_TXQ_IDX(i);
1182 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1183 	}
1184 }
1185 
1186 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1187 {
1188 	u16 ena_qid;
1189 	int i;
1190 
1191 	for (i = 0; i < adapter->num_io_queues; i++) {
1192 		ena_qid = ENA_IO_RXQ_IDX(i);
1193 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
1194 		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1195 	}
1196 }
1197 
1198 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1199 {
1200 	ena_destroy_all_tx_queues(adapter);
1201 	ena_destroy_all_rx_queues(adapter);
1202 }
1203 
1204 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1205 				 struct ena_tx_buffer *tx_info, bool is_xdp)
1206 {
1207 	if (tx_info)
1208 		netif_err(ring->adapter,
1209 			  tx_done,
1210 			  ring->netdev,
1211 			  "tx_info doesn't have valid %s",
1212 			   is_xdp ? "xdp frame" : "skb");
1213 	else
1214 		netif_err(ring->adapter,
1215 			  tx_done,
1216 			  ring->netdev,
1217 			  "Invalid req_id: %hu\n",
1218 			  req_id);
1219 
1220 	u64_stats_update_begin(&ring->syncp);
1221 	ring->tx_stats.bad_req_id++;
1222 	u64_stats_update_end(&ring->syncp);
1223 
1224 	/* Trigger device reset */
1225 	ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1226 	set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1227 	return -EFAULT;
1228 }
1229 
1230 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1231 {
1232 	struct ena_tx_buffer *tx_info = NULL;
1233 
1234 	if (likely(req_id < tx_ring->ring_size)) {
1235 		tx_info = &tx_ring->tx_buffer_info[req_id];
1236 		if (likely(tx_info->skb))
1237 			return 0;
1238 	}
1239 
1240 	return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1241 }
1242 
1243 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1244 {
1245 	struct ena_tx_buffer *tx_info = NULL;
1246 
1247 	if (likely(req_id < xdp_ring->ring_size)) {
1248 		tx_info = &xdp_ring->tx_buffer_info[req_id];
1249 		if (likely(tx_info->xdpf))
1250 			return 0;
1251 	}
1252 
1253 	return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1254 }
1255 
1256 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1257 {
1258 	struct netdev_queue *txq;
1259 	bool above_thresh;
1260 	u32 tx_bytes = 0;
1261 	u32 total_done = 0;
1262 	u16 next_to_clean;
1263 	u16 req_id;
1264 	int tx_pkts = 0;
1265 	int rc;
1266 
1267 	next_to_clean = tx_ring->next_to_clean;
1268 	txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1269 
1270 	while (tx_pkts < budget) {
1271 		struct ena_tx_buffer *tx_info;
1272 		struct sk_buff *skb;
1273 
1274 		rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1275 						&req_id);
1276 		if (rc)
1277 			break;
1278 
1279 		rc = validate_tx_req_id(tx_ring, req_id);
1280 		if (rc)
1281 			break;
1282 
1283 		tx_info = &tx_ring->tx_buffer_info[req_id];
1284 		skb = tx_info->skb;
1285 
1286 		/* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1287 		prefetch(&skb->end);
1288 
1289 		tx_info->skb = NULL;
1290 		tx_info->last_jiffies = 0;
1291 
1292 		ena_unmap_tx_buff(tx_ring, tx_info);
1293 
1294 		netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1295 			  "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1296 			  skb);
1297 
1298 		tx_bytes += skb->len;
1299 		dev_kfree_skb(skb);
1300 		tx_pkts++;
1301 		total_done += tx_info->tx_descs;
1302 
1303 		tx_ring->free_ids[next_to_clean] = req_id;
1304 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1305 						     tx_ring->ring_size);
1306 	}
1307 
1308 	tx_ring->next_to_clean = next_to_clean;
1309 	ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1310 	ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1311 
1312 	netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1313 
1314 	netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1315 		  "tx_poll: q %d done. total pkts: %d\n",
1316 		  tx_ring->qid, tx_pkts);
1317 
1318 	/* need to make the rings circular update visible to
1319 	 * ena_start_xmit() before checking for netif_queue_stopped().
1320 	 */
1321 	smp_mb();
1322 
1323 	above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1324 						    ENA_TX_WAKEUP_THRESH);
1325 	if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1326 		__netif_tx_lock(txq, smp_processor_id());
1327 		above_thresh =
1328 			ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1329 						     ENA_TX_WAKEUP_THRESH);
1330 		if (netif_tx_queue_stopped(txq) && above_thresh &&
1331 		    test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1332 			netif_tx_wake_queue(txq);
1333 			u64_stats_update_begin(&tx_ring->syncp);
1334 			tx_ring->tx_stats.queue_wakeup++;
1335 			u64_stats_update_end(&tx_ring->syncp);
1336 		}
1337 		__netif_tx_unlock(txq);
1338 	}
1339 
1340 	return tx_pkts;
1341 }
1342 
1343 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
1344 {
1345 	struct sk_buff *skb;
1346 
1347 	if (frags)
1348 		skb = napi_get_frags(rx_ring->napi);
1349 	else
1350 		skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1351 						rx_ring->rx_copybreak);
1352 
1353 	if (unlikely(!skb)) {
1354 		u64_stats_update_begin(&rx_ring->syncp);
1355 		rx_ring->rx_stats.skb_alloc_fail++;
1356 		u64_stats_update_end(&rx_ring->syncp);
1357 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1358 			  "Failed to allocate skb. frags: %d\n", frags);
1359 		return NULL;
1360 	}
1361 
1362 	return skb;
1363 }
1364 
1365 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1366 				  struct ena_com_rx_buf_info *ena_bufs,
1367 				  u32 descs,
1368 				  u16 *next_to_clean)
1369 {
1370 	struct sk_buff *skb;
1371 	struct ena_rx_buffer *rx_info;
1372 	u16 len, req_id, buf = 0;
1373 	void *va;
1374 	int rc;
1375 
1376 	len = ena_bufs[buf].len;
1377 	req_id = ena_bufs[buf].req_id;
1378 
1379 	rc = validate_rx_req_id(rx_ring, req_id);
1380 	if (unlikely(rc < 0))
1381 		return NULL;
1382 
1383 	rx_info = &rx_ring->rx_buffer_info[req_id];
1384 
1385 	if (unlikely(!rx_info->page)) {
1386 		netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1387 			  "Page is NULL\n");
1388 		return NULL;
1389 	}
1390 
1391 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1392 		  "rx_info %p page %p\n",
1393 		  rx_info, rx_info->page);
1394 
1395 	/* save virt address of first buffer */
1396 	va = page_address(rx_info->page) + rx_info->page_offset;
1397 	prefetch(va + NET_IP_ALIGN);
1398 
1399 	if (len <= rx_ring->rx_copybreak) {
1400 		skb = ena_alloc_skb(rx_ring, false);
1401 		if (unlikely(!skb))
1402 			return NULL;
1403 
1404 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1405 			  "rx allocated small packet. len %d. data_len %d\n",
1406 			  skb->len, skb->data_len);
1407 
1408 		/* sync this buffer for CPU use */
1409 		dma_sync_single_for_cpu(rx_ring->dev,
1410 					dma_unmap_addr(&rx_info->ena_buf, paddr),
1411 					len,
1412 					DMA_FROM_DEVICE);
1413 		skb_copy_to_linear_data(skb, va, len);
1414 		dma_sync_single_for_device(rx_ring->dev,
1415 					   dma_unmap_addr(&rx_info->ena_buf, paddr),
1416 					   len,
1417 					   DMA_FROM_DEVICE);
1418 
1419 		skb_put(skb, len);
1420 		skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1421 		rx_ring->free_ids[*next_to_clean] = req_id;
1422 		*next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1423 						     rx_ring->ring_size);
1424 		return skb;
1425 	}
1426 
1427 	skb = ena_alloc_skb(rx_ring, true);
1428 	if (unlikely(!skb))
1429 		return NULL;
1430 
1431 	do {
1432 		dma_unmap_page(rx_ring->dev,
1433 			       dma_unmap_addr(&rx_info->ena_buf, paddr),
1434 			       ENA_PAGE_SIZE, DMA_FROM_DEVICE);
1435 
1436 		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1437 				rx_info->page_offset, len, ENA_PAGE_SIZE);
1438 
1439 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1440 			  "rx skb updated. len %d. data_len %d\n",
1441 			  skb->len, skb->data_len);
1442 
1443 		rx_info->page = NULL;
1444 
1445 		rx_ring->free_ids[*next_to_clean] = req_id;
1446 		*next_to_clean =
1447 			ENA_RX_RING_IDX_NEXT(*next_to_clean,
1448 					     rx_ring->ring_size);
1449 		if (likely(--descs == 0))
1450 			break;
1451 
1452 		buf++;
1453 		len = ena_bufs[buf].len;
1454 		req_id = ena_bufs[buf].req_id;
1455 
1456 		rc = validate_rx_req_id(rx_ring, req_id);
1457 		if (unlikely(rc < 0))
1458 			return NULL;
1459 
1460 		rx_info = &rx_ring->rx_buffer_info[req_id];
1461 	} while (1);
1462 
1463 	return skb;
1464 }
1465 
1466 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1467  * @adapter: structure containing adapter specific data
1468  * @ena_rx_ctx: received packet context/metadata
1469  * @skb: skb currently being received and modified
1470  */
1471 static void ena_rx_checksum(struct ena_ring *rx_ring,
1472 				   struct ena_com_rx_ctx *ena_rx_ctx,
1473 				   struct sk_buff *skb)
1474 {
1475 	/* Rx csum disabled */
1476 	if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1477 		skb->ip_summed = CHECKSUM_NONE;
1478 		return;
1479 	}
1480 
1481 	/* For fragmented packets the checksum isn't valid */
1482 	if (ena_rx_ctx->frag) {
1483 		skb->ip_summed = CHECKSUM_NONE;
1484 		return;
1485 	}
1486 
1487 	/* if IP and error */
1488 	if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1489 		     (ena_rx_ctx->l3_csum_err))) {
1490 		/* ipv4 checksum error */
1491 		skb->ip_summed = CHECKSUM_NONE;
1492 		u64_stats_update_begin(&rx_ring->syncp);
1493 		rx_ring->rx_stats.bad_csum++;
1494 		u64_stats_update_end(&rx_ring->syncp);
1495 		netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1496 			  "RX IPv4 header checksum error\n");
1497 		return;
1498 	}
1499 
1500 	/* if TCP/UDP */
1501 	if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1502 		   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1503 		if (unlikely(ena_rx_ctx->l4_csum_err)) {
1504 			/* TCP/UDP checksum error */
1505 			u64_stats_update_begin(&rx_ring->syncp);
1506 			rx_ring->rx_stats.bad_csum++;
1507 			u64_stats_update_end(&rx_ring->syncp);
1508 			netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1509 				  "RX L4 checksum error\n");
1510 			skb->ip_summed = CHECKSUM_NONE;
1511 			return;
1512 		}
1513 
1514 		if (likely(ena_rx_ctx->l4_csum_checked)) {
1515 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1516 			u64_stats_update_begin(&rx_ring->syncp);
1517 			rx_ring->rx_stats.csum_good++;
1518 			u64_stats_update_end(&rx_ring->syncp);
1519 		} else {
1520 			u64_stats_update_begin(&rx_ring->syncp);
1521 			rx_ring->rx_stats.csum_unchecked++;
1522 			u64_stats_update_end(&rx_ring->syncp);
1523 			skb->ip_summed = CHECKSUM_NONE;
1524 		}
1525 	} else {
1526 		skb->ip_summed = CHECKSUM_NONE;
1527 		return;
1528 	}
1529 
1530 }
1531 
1532 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1533 			    struct ena_com_rx_ctx *ena_rx_ctx,
1534 			    struct sk_buff *skb)
1535 {
1536 	enum pkt_hash_types hash_type;
1537 
1538 	if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1539 		if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1540 			   (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1541 
1542 			hash_type = PKT_HASH_TYPE_L4;
1543 		else
1544 			hash_type = PKT_HASH_TYPE_NONE;
1545 
1546 		/* Override hash type if the packet is fragmented */
1547 		if (ena_rx_ctx->frag)
1548 			hash_type = PKT_HASH_TYPE_NONE;
1549 
1550 		skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1551 	}
1552 }
1553 
1554 static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1555 {
1556 	struct ena_rx_buffer *rx_info;
1557 	int ret;
1558 
1559 	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1560 	xdp->data = page_address(rx_info->page) +
1561 		rx_info->page_offset + rx_ring->rx_headroom;
1562 	xdp_set_data_meta_invalid(xdp);
1563 	xdp->data_hard_start = page_address(rx_info->page);
1564 	xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;
1565 	/* If for some reason we received a bigger packet than
1566 	 * we expect, then we simply drop it
1567 	 */
1568 	if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1569 		return XDP_DROP;
1570 
1571 	ret = ena_xdp_execute(rx_ring, xdp, rx_info);
1572 
1573 	/* The xdp program might expand the headers */
1574 	if (ret == XDP_PASS) {
1575 		rx_info->page_offset = xdp->data - xdp->data_hard_start;
1576 		rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1577 	}
1578 
1579 	return ret;
1580 }
1581 /* ena_clean_rx_irq - Cleanup RX irq
1582  * @rx_ring: RX ring to clean
1583  * @napi: napi handler
1584  * @budget: how many packets driver is allowed to clean
1585  *
1586  * Returns the number of cleaned buffers.
1587  */
1588 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1589 			    u32 budget)
1590 {
1591 	u16 next_to_clean = rx_ring->next_to_clean;
1592 	struct ena_com_rx_ctx ena_rx_ctx;
1593 	struct ena_adapter *adapter;
1594 	u32 res_budget, work_done;
1595 	int rx_copybreak_pkt = 0;
1596 	int refill_threshold;
1597 	struct sk_buff *skb;
1598 	int refill_required;
1599 	struct xdp_buff xdp;
1600 	int total_len = 0;
1601 	int xdp_verdict;
1602 	int rc = 0;
1603 	int i;
1604 
1605 	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1606 		  "%s qid %d\n", __func__, rx_ring->qid);
1607 	res_budget = budget;
1608 	xdp.rxq = &rx_ring->xdp_rxq;
1609 
1610 	do {
1611 		xdp_verdict = XDP_PASS;
1612 		skb = NULL;
1613 		ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1614 		ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1615 		ena_rx_ctx.descs = 0;
1616 		rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1617 				    rx_ring->ena_com_io_sq,
1618 				    &ena_rx_ctx);
1619 		if (unlikely(rc))
1620 			goto error;
1621 
1622 		if (unlikely(ena_rx_ctx.descs == 0))
1623 			break;
1624 
1625 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1626 			  "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1627 			  rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1628 			  ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1629 
1630 		if (ena_xdp_present_ring(rx_ring))
1631 			xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1632 
1633 		/* allocate skb and fill it */
1634 		if (xdp_verdict == XDP_PASS)
1635 			skb = ena_rx_skb(rx_ring,
1636 					 rx_ring->ena_bufs,
1637 					 ena_rx_ctx.descs,
1638 					 &next_to_clean);
1639 
1640 		if (unlikely(!skb)) {
1641 			if (xdp_verdict == XDP_TX) {
1642 				ena_free_rx_page(rx_ring,
1643 						 &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]);
1644 				res_budget--;
1645 			}
1646 			for (i = 0; i < ena_rx_ctx.descs; i++) {
1647 				rx_ring->free_ids[next_to_clean] =
1648 					rx_ring->ena_bufs[i].req_id;
1649 				next_to_clean =
1650 					ENA_RX_RING_IDX_NEXT(next_to_clean,
1651 							     rx_ring->ring_size);
1652 			}
1653 			if (xdp_verdict == XDP_TX || xdp_verdict == XDP_DROP)
1654 				continue;
1655 			break;
1656 		}
1657 
1658 		ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1659 
1660 		ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1661 
1662 		skb_record_rx_queue(skb, rx_ring->qid);
1663 
1664 		if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1665 			total_len += rx_ring->ena_bufs[0].len;
1666 			rx_copybreak_pkt++;
1667 			napi_gro_receive(napi, skb);
1668 		} else {
1669 			total_len += skb->len;
1670 			napi_gro_frags(napi);
1671 		}
1672 
1673 		res_budget--;
1674 	} while (likely(res_budget));
1675 
1676 	work_done = budget - res_budget;
1677 	rx_ring->per_napi_packets += work_done;
1678 	u64_stats_update_begin(&rx_ring->syncp);
1679 	rx_ring->rx_stats.bytes += total_len;
1680 	rx_ring->rx_stats.cnt += work_done;
1681 	rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1682 	u64_stats_update_end(&rx_ring->syncp);
1683 
1684 	rx_ring->next_to_clean = next_to_clean;
1685 
1686 	refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1687 	refill_threshold =
1688 		min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1689 		      ENA_RX_REFILL_THRESH_PACKET);
1690 
1691 	/* Optimization, try to batch new rx buffers */
1692 	if (refill_required > refill_threshold) {
1693 		ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1694 		ena_refill_rx_bufs(rx_ring, refill_required);
1695 	}
1696 
1697 	return work_done;
1698 
1699 error:
1700 	adapter = netdev_priv(rx_ring->netdev);
1701 
1702 	u64_stats_update_begin(&rx_ring->syncp);
1703 	rx_ring->rx_stats.bad_desc_num++;
1704 	u64_stats_update_end(&rx_ring->syncp);
1705 
1706 	/* Too many desc from the device. Trigger reset */
1707 	adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1708 	set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1709 
1710 	return 0;
1711 }
1712 
1713 static void ena_dim_work(struct work_struct *w)
1714 {
1715 	struct dim *dim = container_of(w, struct dim, work);
1716 	struct dim_cq_moder cur_moder =
1717 		net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1718 	struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1719 
1720 	ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1721 	dim->state = DIM_START_MEASURE;
1722 }
1723 
1724 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1725 {
1726 	struct dim_sample dim_sample;
1727 	struct ena_ring *rx_ring = ena_napi->rx_ring;
1728 
1729 	if (!rx_ring->per_napi_packets)
1730 		return;
1731 
1732 	rx_ring->non_empty_napi_events++;
1733 
1734 	dim_update_sample(rx_ring->non_empty_napi_events,
1735 			  rx_ring->rx_stats.cnt,
1736 			  rx_ring->rx_stats.bytes,
1737 			  &dim_sample);
1738 
1739 	net_dim(&ena_napi->dim, dim_sample);
1740 
1741 	rx_ring->per_napi_packets = 0;
1742 }
1743 
1744 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1745 					struct ena_ring *rx_ring)
1746 {
1747 	struct ena_eth_io_intr_reg intr_reg;
1748 	u32 rx_interval = 0;
1749 	/* Rx ring can be NULL when for XDP tx queues which don't have an
1750 	 * accompanying rx_ring pair.
1751 	 */
1752 	if (rx_ring)
1753 		rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1754 			rx_ring->smoothed_interval :
1755 			ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1756 
1757 	/* Update intr register: rx intr delay,
1758 	 * tx intr delay and interrupt unmask
1759 	 */
1760 	ena_com_update_intr_reg(&intr_reg,
1761 				rx_interval,
1762 				tx_ring->smoothed_interval,
1763 				true);
1764 
1765 	/* It is a shared MSI-X.
1766 	 * Tx and Rx CQ have pointer to it.
1767 	 * So we use one of them to reach the intr reg
1768 	 * The Tx ring is used because the rx_ring is NULL for XDP queues
1769 	 */
1770 	ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1771 }
1772 
1773 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1774 					     struct ena_ring *rx_ring)
1775 {
1776 	int cpu = get_cpu();
1777 	int numa_node;
1778 
1779 	/* Check only one ring since the 2 rings are running on the same cpu */
1780 	if (likely(tx_ring->cpu == cpu))
1781 		goto out;
1782 
1783 	numa_node = cpu_to_node(cpu);
1784 	put_cpu();
1785 
1786 	if (numa_node != NUMA_NO_NODE) {
1787 		ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1788 		if (rx_ring)
1789 			ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1790 						 numa_node);
1791 	}
1792 
1793 	tx_ring->cpu = cpu;
1794 	if (rx_ring)
1795 		rx_ring->cpu = cpu;
1796 
1797 	return;
1798 out:
1799 	put_cpu();
1800 }
1801 
1802 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1803 {
1804 	u32 total_done = 0;
1805 	u16 next_to_clean;
1806 	u32 tx_bytes = 0;
1807 	int tx_pkts = 0;
1808 	u16 req_id;
1809 	int rc;
1810 
1811 	if (unlikely(!xdp_ring))
1812 		return 0;
1813 	next_to_clean = xdp_ring->next_to_clean;
1814 
1815 	while (tx_pkts < budget) {
1816 		struct ena_tx_buffer *tx_info;
1817 		struct xdp_frame *xdpf;
1818 
1819 		rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1820 						&req_id);
1821 		if (rc)
1822 			break;
1823 
1824 		rc = validate_xdp_req_id(xdp_ring, req_id);
1825 		if (rc)
1826 			break;
1827 
1828 		tx_info = &xdp_ring->tx_buffer_info[req_id];
1829 		xdpf = tx_info->xdpf;
1830 
1831 		tx_info->xdpf = NULL;
1832 		tx_info->last_jiffies = 0;
1833 		ena_unmap_tx_buff(xdp_ring, tx_info);
1834 
1835 		netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1836 			  "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1837 			  xdpf);
1838 
1839 		tx_bytes += xdpf->len;
1840 		tx_pkts++;
1841 		total_done += tx_info->tx_descs;
1842 
1843 		__free_page(tx_info->xdp_rx_page);
1844 		xdp_ring->free_ids[next_to_clean] = req_id;
1845 		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1846 						     xdp_ring->ring_size);
1847 	}
1848 
1849 	xdp_ring->next_to_clean = next_to_clean;
1850 	ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1851 	ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1852 
1853 	netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1854 		  "tx_poll: q %d done. total pkts: %d\n",
1855 		  xdp_ring->qid, tx_pkts);
1856 
1857 	return tx_pkts;
1858 }
1859 
1860 static int ena_io_poll(struct napi_struct *napi, int budget)
1861 {
1862 	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1863 	struct ena_ring *tx_ring, *rx_ring;
1864 	int tx_work_done;
1865 	int rx_work_done = 0;
1866 	int tx_budget;
1867 	int napi_comp_call = 0;
1868 	int ret;
1869 
1870 	tx_ring = ena_napi->tx_ring;
1871 	rx_ring = ena_napi->rx_ring;
1872 
1873 	tx_ring->first_interrupt = ena_napi->first_interrupt;
1874 	rx_ring->first_interrupt = ena_napi->first_interrupt;
1875 
1876 	tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1877 
1878 	if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1879 	    test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1880 		napi_complete_done(napi, 0);
1881 		return 0;
1882 	}
1883 
1884 	tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1885 	/* On netpoll the budget is zero and the handler should only clean the
1886 	 * tx completions.
1887 	 */
1888 	if (likely(budget))
1889 		rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1890 
1891 	/* If the device is about to reset or down, avoid unmask
1892 	 * the interrupt and return 0 so NAPI won't reschedule
1893 	 */
1894 	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1895 		     test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1896 		napi_complete_done(napi, 0);
1897 		ret = 0;
1898 
1899 	} else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1900 		napi_comp_call = 1;
1901 
1902 		/* Update numa and unmask the interrupt only when schedule
1903 		 * from the interrupt context (vs from sk_busy_loop)
1904 		 */
1905 		if (napi_complete_done(napi, rx_work_done)) {
1906 			/* We apply adaptive moderation on Rx path only.
1907 			 * Tx uses static interrupt moderation.
1908 			 */
1909 			if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1910 				ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1911 
1912 			ena_unmask_interrupt(tx_ring, rx_ring);
1913 		}
1914 
1915 		ena_update_ring_numa_node(tx_ring, rx_ring);
1916 
1917 		ret = rx_work_done;
1918 	} else {
1919 		ret = budget;
1920 	}
1921 
1922 	u64_stats_update_begin(&tx_ring->syncp);
1923 	tx_ring->tx_stats.napi_comp += napi_comp_call;
1924 	tx_ring->tx_stats.tx_poll++;
1925 	u64_stats_update_end(&tx_ring->syncp);
1926 
1927 	return ret;
1928 }
1929 
1930 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1931 {
1932 	struct ena_adapter *adapter = (struct ena_adapter *)data;
1933 
1934 	ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1935 
1936 	/* Don't call the aenq handler before probe is done */
1937 	if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1938 		ena_com_aenq_intr_handler(adapter->ena_dev, data);
1939 
1940 	return IRQ_HANDLED;
1941 }
1942 
1943 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1944  * @irq: interrupt number
1945  * @data: pointer to a network interface private napi device structure
1946  */
1947 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1948 {
1949 	struct ena_napi *ena_napi = data;
1950 
1951 	ena_napi->first_interrupt = true;
1952 
1953 	napi_schedule_irqoff(&ena_napi->napi);
1954 
1955 	return IRQ_HANDLED;
1956 }
1957 
1958 /* Reserve a single MSI-X vector for management (admin + aenq).
1959  * plus reserve one vector for each potential io queue.
1960  * the number of potential io queues is the minimum of what the device
1961  * supports and the number of vCPUs.
1962  */
1963 static int ena_enable_msix(struct ena_adapter *adapter)
1964 {
1965 	int msix_vecs, irq_cnt;
1966 
1967 	if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1968 		netif_err(adapter, probe, adapter->netdev,
1969 			  "Error, MSI-X is already enabled\n");
1970 		return -EPERM;
1971 	}
1972 
1973 	/* Reserved the max msix vectors we might need */
1974 	msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
1975 	netif_dbg(adapter, probe, adapter->netdev,
1976 		  "trying to enable MSI-X, vectors %d\n", msix_vecs);
1977 
1978 	irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1979 					msix_vecs, PCI_IRQ_MSIX);
1980 
1981 	if (irq_cnt < 0) {
1982 		netif_err(adapter, probe, adapter->netdev,
1983 			  "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1984 		return -ENOSPC;
1985 	}
1986 
1987 	if (irq_cnt != msix_vecs) {
1988 		netif_notice(adapter, probe, adapter->netdev,
1989 			     "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1990 			     irq_cnt, msix_vecs);
1991 		adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1992 	}
1993 
1994 	if (ena_init_rx_cpu_rmap(adapter))
1995 		netif_warn(adapter, probe, adapter->netdev,
1996 			   "Failed to map IRQs to CPUs\n");
1997 
1998 	adapter->msix_vecs = irq_cnt;
1999 	set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
2000 
2001 	return 0;
2002 }
2003 
2004 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2005 {
2006 	u32 cpu;
2007 
2008 	snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2009 		 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2010 		 pci_name(adapter->pdev));
2011 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2012 		ena_intr_msix_mgmnt;
2013 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2014 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2015 		pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2016 	cpu = cpumask_first(cpu_online_mask);
2017 	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2018 	cpumask_set_cpu(cpu,
2019 			&adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2020 }
2021 
2022 static void ena_setup_io_intr(struct ena_adapter *adapter)
2023 {
2024 	struct net_device *netdev;
2025 	int irq_idx, i, cpu;
2026 	int io_queue_count;
2027 
2028 	netdev = adapter->netdev;
2029 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2030 
2031 	for (i = 0; i < io_queue_count; i++) {
2032 		irq_idx = ENA_IO_IRQ_IDX(i);
2033 		cpu = i % num_online_cpus();
2034 
2035 		snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2036 			 "%s-Tx-Rx-%d", netdev->name, i);
2037 		adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2038 		adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2039 		adapter->irq_tbl[irq_idx].vector =
2040 			pci_irq_vector(adapter->pdev, irq_idx);
2041 		adapter->irq_tbl[irq_idx].cpu = cpu;
2042 
2043 		cpumask_set_cpu(cpu,
2044 				&adapter->irq_tbl[irq_idx].affinity_hint_mask);
2045 	}
2046 }
2047 
2048 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2049 {
2050 	unsigned long flags = 0;
2051 	struct ena_irq *irq;
2052 	int rc;
2053 
2054 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2055 	rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2056 			 irq->data);
2057 	if (rc) {
2058 		netif_err(adapter, probe, adapter->netdev,
2059 			  "failed to request admin irq\n");
2060 		return rc;
2061 	}
2062 
2063 	netif_dbg(adapter, probe, adapter->netdev,
2064 		  "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2065 		  irq->affinity_hint_mask.bits[0], irq->vector);
2066 
2067 	irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2068 
2069 	return rc;
2070 }
2071 
2072 static int ena_request_io_irq(struct ena_adapter *adapter)
2073 {
2074 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2075 	unsigned long flags = 0;
2076 	struct ena_irq *irq;
2077 	int rc = 0, i, k;
2078 
2079 	if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2080 		netif_err(adapter, ifup, adapter->netdev,
2081 			  "Failed to request I/O IRQ: MSI-X is not enabled\n");
2082 		return -EINVAL;
2083 	}
2084 
2085 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2086 		irq = &adapter->irq_tbl[i];
2087 		rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2088 				 irq->data);
2089 		if (rc) {
2090 			netif_err(adapter, ifup, adapter->netdev,
2091 				  "Failed to request I/O IRQ. index %d rc %d\n",
2092 				   i, rc);
2093 			goto err;
2094 		}
2095 
2096 		netif_dbg(adapter, ifup, adapter->netdev,
2097 			  "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2098 			  i, irq->affinity_hint_mask.bits[0], irq->vector);
2099 
2100 		irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2101 	}
2102 
2103 	return rc;
2104 
2105 err:
2106 	for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2107 		irq = &adapter->irq_tbl[k];
2108 		free_irq(irq->vector, irq->data);
2109 	}
2110 
2111 	return rc;
2112 }
2113 
2114 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2115 {
2116 	struct ena_irq *irq;
2117 
2118 	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2119 	synchronize_irq(irq->vector);
2120 	irq_set_affinity_hint(irq->vector, NULL);
2121 	free_irq(irq->vector, irq->data);
2122 }
2123 
2124 static void ena_free_io_irq(struct ena_adapter *adapter)
2125 {
2126 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2127 	struct ena_irq *irq;
2128 	int i;
2129 
2130 #ifdef CONFIG_RFS_ACCEL
2131 	if (adapter->msix_vecs >= 1) {
2132 		free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2133 		adapter->netdev->rx_cpu_rmap = NULL;
2134 	}
2135 #endif /* CONFIG_RFS_ACCEL */
2136 
2137 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2138 		irq = &adapter->irq_tbl[i];
2139 		irq_set_affinity_hint(irq->vector, NULL);
2140 		free_irq(irq->vector, irq->data);
2141 	}
2142 }
2143 
2144 static void ena_disable_msix(struct ena_adapter *adapter)
2145 {
2146 	if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2147 		pci_free_irq_vectors(adapter->pdev);
2148 }
2149 
2150 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2151 {
2152 	u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2153 	int i;
2154 
2155 	if (!netif_running(adapter->netdev))
2156 		return;
2157 
2158 	for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
2159 		synchronize_irq(adapter->irq_tbl[i].vector);
2160 }
2161 
2162 static void ena_del_napi_in_range(struct ena_adapter *adapter,
2163 				  int first_index,
2164 				  int count)
2165 {
2166 	int i;
2167 
2168 	for (i = first_index; i < first_index + count; i++) {
2169 		/* Check if napi was initialized before */
2170 		if (!ENA_IS_XDP_INDEX(adapter, i) ||
2171 		    adapter->ena_napi[i].xdp_ring)
2172 			netif_napi_del(&adapter->ena_napi[i].napi);
2173 		else
2174 			WARN_ON(ENA_IS_XDP_INDEX(adapter, i) &&
2175 				adapter->ena_napi[i].xdp_ring);
2176 	}
2177 }
2178 
2179 static void ena_init_napi_in_range(struct ena_adapter *adapter,
2180 				   int first_index, int count)
2181 {
2182 	struct ena_napi *napi = {0};
2183 	int i;
2184 
2185 	for (i = first_index; i < first_index + count; i++) {
2186 		napi = &adapter->ena_napi[i];
2187 
2188 		netif_napi_add(adapter->netdev,
2189 			       &adapter->ena_napi[i].napi,
2190 			       ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
2191 			       ENA_NAPI_BUDGET);
2192 
2193 		if (!ENA_IS_XDP_INDEX(adapter, i)) {
2194 			napi->rx_ring = &adapter->rx_ring[i];
2195 			napi->tx_ring = &adapter->tx_ring[i];
2196 		} else {
2197 			napi->xdp_ring = &adapter->tx_ring[i];
2198 		}
2199 		napi->qid = i;
2200 	}
2201 }
2202 
2203 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2204 				      int first_index,
2205 				      int count)
2206 {
2207 	int i;
2208 
2209 	for (i = first_index; i < first_index + count; i++)
2210 		napi_disable(&adapter->ena_napi[i].napi);
2211 }
2212 
2213 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2214 				     int first_index,
2215 				     int count)
2216 {
2217 	int i;
2218 
2219 	for (i = first_index; i < first_index + count; i++)
2220 		napi_enable(&adapter->ena_napi[i].napi);
2221 }
2222 
2223 /* Configure the Rx forwarding */
2224 static int ena_rss_configure(struct ena_adapter *adapter)
2225 {
2226 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2227 	int rc;
2228 
2229 	/* In case the RSS table wasn't initialized by probe */
2230 	if (!ena_dev->rss.tbl_log_size) {
2231 		rc = ena_rss_init_default(adapter);
2232 		if (rc && (rc != -EOPNOTSUPP)) {
2233 			netif_err(adapter, ifup, adapter->netdev,
2234 					"Failed to init RSS rc: %d\n", rc);
2235 			return rc;
2236 		}
2237 	}
2238 
2239 	/* Set indirect table */
2240 	rc = ena_com_indirect_table_set(ena_dev);
2241 	if (unlikely(rc && rc != -EOPNOTSUPP))
2242 		return rc;
2243 
2244 	/* Configure hash function (if supported) */
2245 	rc = ena_com_set_hash_function(ena_dev);
2246 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2247 		return rc;
2248 
2249 	/* Configure hash inputs (if supported) */
2250 	rc = ena_com_set_hash_ctrl(ena_dev);
2251 	if (unlikely(rc && (rc != -EOPNOTSUPP)))
2252 		return rc;
2253 
2254 	return 0;
2255 }
2256 
2257 static int ena_up_complete(struct ena_adapter *adapter)
2258 {
2259 	int rc;
2260 
2261 	rc = ena_rss_configure(adapter);
2262 	if (rc)
2263 		return rc;
2264 
2265 	ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2266 
2267 	ena_refill_all_rx_bufs(adapter);
2268 
2269 	/* enable transmits */
2270 	netif_tx_start_all_queues(adapter->netdev);
2271 
2272 	ena_napi_enable_in_range(adapter,
2273 				 0,
2274 				 adapter->xdp_num_queues + adapter->num_io_queues);
2275 
2276 	return 0;
2277 }
2278 
2279 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2280 {
2281 	struct ena_com_create_io_ctx ctx;
2282 	struct ena_com_dev *ena_dev;
2283 	struct ena_ring *tx_ring;
2284 	u32 msix_vector;
2285 	u16 ena_qid;
2286 	int rc;
2287 
2288 	ena_dev = adapter->ena_dev;
2289 
2290 	tx_ring = &adapter->tx_ring[qid];
2291 	msix_vector = ENA_IO_IRQ_IDX(qid);
2292 	ena_qid = ENA_IO_TXQ_IDX(qid);
2293 
2294 	memset(&ctx, 0x0, sizeof(ctx));
2295 
2296 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2297 	ctx.qid = ena_qid;
2298 	ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2299 	ctx.msix_vector = msix_vector;
2300 	ctx.queue_size = tx_ring->ring_size;
2301 	ctx.numa_node = cpu_to_node(tx_ring->cpu);
2302 
2303 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2304 	if (rc) {
2305 		netif_err(adapter, ifup, adapter->netdev,
2306 			  "Failed to create I/O TX queue num %d rc: %d\n",
2307 			   qid, rc);
2308 		return rc;
2309 	}
2310 
2311 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2312 				     &tx_ring->ena_com_io_sq,
2313 				     &tx_ring->ena_com_io_cq);
2314 	if (rc) {
2315 		netif_err(adapter, ifup, adapter->netdev,
2316 			  "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2317 			  qid, rc);
2318 		ena_com_destroy_io_queue(ena_dev, ena_qid);
2319 		return rc;
2320 	}
2321 
2322 	ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2323 	return rc;
2324 }
2325 
2326 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2327 					    int first_index, int count)
2328 {
2329 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2330 	int rc, i;
2331 
2332 	for (i = first_index; i < first_index + count; i++) {
2333 		rc = ena_create_io_tx_queue(adapter, i);
2334 		if (rc)
2335 			goto create_err;
2336 	}
2337 
2338 	return 0;
2339 
2340 create_err:
2341 	while (i-- > first_index)
2342 		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2343 
2344 	return rc;
2345 }
2346 
2347 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2348 {
2349 	struct ena_com_dev *ena_dev;
2350 	struct ena_com_create_io_ctx ctx;
2351 	struct ena_ring *rx_ring;
2352 	u32 msix_vector;
2353 	u16 ena_qid;
2354 	int rc;
2355 
2356 	ena_dev = adapter->ena_dev;
2357 
2358 	rx_ring = &adapter->rx_ring[qid];
2359 	msix_vector = ENA_IO_IRQ_IDX(qid);
2360 	ena_qid = ENA_IO_RXQ_IDX(qid);
2361 
2362 	memset(&ctx, 0x0, sizeof(ctx));
2363 
2364 	ctx.qid = ena_qid;
2365 	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2366 	ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2367 	ctx.msix_vector = msix_vector;
2368 	ctx.queue_size = rx_ring->ring_size;
2369 	ctx.numa_node = cpu_to_node(rx_ring->cpu);
2370 
2371 	rc = ena_com_create_io_queue(ena_dev, &ctx);
2372 	if (rc) {
2373 		netif_err(adapter, ifup, adapter->netdev,
2374 			  "Failed to create I/O RX queue num %d rc: %d\n",
2375 			  qid, rc);
2376 		return rc;
2377 	}
2378 
2379 	rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2380 				     &rx_ring->ena_com_io_sq,
2381 				     &rx_ring->ena_com_io_cq);
2382 	if (rc) {
2383 		netif_err(adapter, ifup, adapter->netdev,
2384 			  "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2385 			  qid, rc);
2386 		goto err;
2387 	}
2388 
2389 	ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2390 
2391 	return rc;
2392 err:
2393 	ena_com_destroy_io_queue(ena_dev, ena_qid);
2394 	return rc;
2395 }
2396 
2397 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2398 {
2399 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2400 	int rc, i;
2401 
2402 	for (i = 0; i < adapter->num_io_queues; i++) {
2403 		rc = ena_create_io_rx_queue(adapter, i);
2404 		if (rc)
2405 			goto create_err;
2406 		INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2407 	}
2408 
2409 	return 0;
2410 
2411 create_err:
2412 	while (i--) {
2413 		cancel_work_sync(&adapter->ena_napi[i].dim.work);
2414 		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2415 	}
2416 
2417 	return rc;
2418 }
2419 
2420 static void set_io_rings_size(struct ena_adapter *adapter,
2421 			      int new_tx_size,
2422 			      int new_rx_size)
2423 {
2424 	int i;
2425 
2426 	for (i = 0; i < adapter->num_io_queues; i++) {
2427 		adapter->tx_ring[i].ring_size = new_tx_size;
2428 		adapter->rx_ring[i].ring_size = new_rx_size;
2429 	}
2430 }
2431 
2432 /* This function allows queue allocation to backoff when the system is
2433  * low on memory. If there is not enough memory to allocate io queues
2434  * the driver will try to allocate smaller queues.
2435  *
2436  * The backoff algorithm is as follows:
2437  *  1. Try to allocate TX and RX and if successful.
2438  *  1.1. return success
2439  *
2440  *  2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2441  *
2442  *  3. If TX or RX is smaller than 256
2443  *  3.1. return failure.
2444  *  4. else
2445  *  4.1. go back to 1.
2446  */
2447 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2448 {
2449 	int rc, cur_rx_ring_size, cur_tx_ring_size;
2450 	int new_rx_ring_size, new_tx_ring_size;
2451 
2452 	/* current queue sizes might be set to smaller than the requested
2453 	 * ones due to past queue allocation failures.
2454 	 */
2455 	set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2456 			adapter->requested_rx_ring_size);
2457 
2458 	while (1) {
2459 		if (ena_xdp_present(adapter)) {
2460 			rc = ena_setup_and_create_all_xdp_queues(adapter);
2461 
2462 			if (rc)
2463 				goto err_setup_tx;
2464 		}
2465 		rc = ena_setup_tx_resources_in_range(adapter,
2466 						     0,
2467 						     adapter->num_io_queues);
2468 		if (rc)
2469 			goto err_setup_tx;
2470 
2471 		rc = ena_create_io_tx_queues_in_range(adapter,
2472 						      0,
2473 						      adapter->num_io_queues);
2474 		if (rc)
2475 			goto err_create_tx_queues;
2476 
2477 		rc = ena_setup_all_rx_resources(adapter);
2478 		if (rc)
2479 			goto err_setup_rx;
2480 
2481 		rc = ena_create_all_io_rx_queues(adapter);
2482 		if (rc)
2483 			goto err_create_rx_queues;
2484 
2485 		return 0;
2486 
2487 err_create_rx_queues:
2488 		ena_free_all_io_rx_resources(adapter);
2489 err_setup_rx:
2490 		ena_destroy_all_tx_queues(adapter);
2491 err_create_tx_queues:
2492 		ena_free_all_io_tx_resources(adapter);
2493 err_setup_tx:
2494 		if (rc != -ENOMEM) {
2495 			netif_err(adapter, ifup, adapter->netdev,
2496 				  "Queue creation failed with error code %d\n",
2497 				   rc);
2498 			return rc;
2499 		}
2500 
2501 		cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2502 		cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2503 
2504 		netif_err(adapter, ifup, adapter->netdev,
2505 			  "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2506 			  cur_tx_ring_size, cur_rx_ring_size);
2507 
2508 		new_tx_ring_size = cur_tx_ring_size;
2509 		new_rx_ring_size = cur_rx_ring_size;
2510 
2511 		/* Decrease the size of the larger queue, or
2512 		 * decrease both if they are the same size.
2513 		 */
2514 		if (cur_rx_ring_size <= cur_tx_ring_size)
2515 			new_tx_ring_size = cur_tx_ring_size / 2;
2516 		if (cur_rx_ring_size >= cur_tx_ring_size)
2517 			new_rx_ring_size = cur_rx_ring_size / 2;
2518 
2519 		if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2520 				new_rx_ring_size < ENA_MIN_RING_SIZE) {
2521 			netif_err(adapter, ifup, adapter->netdev,
2522 				  "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2523 				  ENA_MIN_RING_SIZE);
2524 			return rc;
2525 		}
2526 
2527 		netif_err(adapter, ifup, adapter->netdev,
2528 			  "Retrying queue creation with sizes TX=%d, RX=%d\n",
2529 			  new_tx_ring_size,
2530 			  new_rx_ring_size);
2531 
2532 		set_io_rings_size(adapter, new_tx_ring_size,
2533 				  new_rx_ring_size);
2534 	}
2535 }
2536 
2537 static int ena_up(struct ena_adapter *adapter)
2538 {
2539 	int io_queue_count, rc, i;
2540 
2541 	netdev_dbg(adapter->netdev, "%s\n", __func__);
2542 
2543 	io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2544 	ena_setup_io_intr(adapter);
2545 
2546 	/* napi poll functions should be initialized before running
2547 	 * request_irq(), to handle a rare condition where there is a pending
2548 	 * interrupt, causing the ISR to fire immediately while the poll
2549 	 * function wasn't set yet, causing a null dereference
2550 	 */
2551 	ena_init_napi_in_range(adapter, 0, io_queue_count);
2552 
2553 	rc = ena_request_io_irq(adapter);
2554 	if (rc)
2555 		goto err_req_irq;
2556 
2557 	rc = create_queues_with_size_backoff(adapter);
2558 	if (rc)
2559 		goto err_create_queues_with_backoff;
2560 
2561 	rc = ena_up_complete(adapter);
2562 	if (rc)
2563 		goto err_up;
2564 
2565 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2566 		netif_carrier_on(adapter->netdev);
2567 
2568 	u64_stats_update_begin(&adapter->syncp);
2569 	adapter->dev_stats.interface_up++;
2570 	u64_stats_update_end(&adapter->syncp);
2571 
2572 	set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2573 
2574 	/* Enable completion queues interrupt */
2575 	for (i = 0; i < adapter->num_io_queues; i++)
2576 		ena_unmask_interrupt(&adapter->tx_ring[i],
2577 				     &adapter->rx_ring[i]);
2578 
2579 	/* schedule napi in case we had pending packets
2580 	 * from the last time we disable napi
2581 	 */
2582 	for (i = 0; i < io_queue_count; i++)
2583 		napi_schedule(&adapter->ena_napi[i].napi);
2584 
2585 	return rc;
2586 
2587 err_up:
2588 	ena_destroy_all_tx_queues(adapter);
2589 	ena_free_all_io_tx_resources(adapter);
2590 	ena_destroy_all_rx_queues(adapter);
2591 	ena_free_all_io_rx_resources(adapter);
2592 err_create_queues_with_backoff:
2593 	ena_free_io_irq(adapter);
2594 err_req_irq:
2595 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2596 
2597 	return rc;
2598 }
2599 
2600 static void ena_down(struct ena_adapter *adapter)
2601 {
2602 	int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2603 
2604 	netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2605 
2606 	clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2607 
2608 	u64_stats_update_begin(&adapter->syncp);
2609 	adapter->dev_stats.interface_down++;
2610 	u64_stats_update_end(&adapter->syncp);
2611 
2612 	netif_carrier_off(adapter->netdev);
2613 	netif_tx_disable(adapter->netdev);
2614 
2615 	/* After this point the napi handler won't enable the tx queue */
2616 	ena_napi_disable_in_range(adapter, 0, io_queue_count);
2617 
2618 	/* After destroy the queue there won't be any new interrupts */
2619 
2620 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2621 		int rc;
2622 
2623 		rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2624 		if (rc)
2625 			dev_err(&adapter->pdev->dev, "Device reset failed\n");
2626 		/* stop submitting admin commands on a device that was reset */
2627 		ena_com_set_admin_running_state(adapter->ena_dev, false);
2628 	}
2629 
2630 	ena_destroy_all_io_queues(adapter);
2631 
2632 	ena_disable_io_intr_sync(adapter);
2633 	ena_free_io_irq(adapter);
2634 	ena_del_napi_in_range(adapter, 0, io_queue_count);
2635 
2636 	ena_free_all_tx_bufs(adapter);
2637 	ena_free_all_rx_bufs(adapter);
2638 	ena_free_all_io_tx_resources(adapter);
2639 	ena_free_all_io_rx_resources(adapter);
2640 }
2641 
2642 /* ena_open - Called when a network interface is made active
2643  * @netdev: network interface device structure
2644  *
2645  * Returns 0 on success, negative value on failure
2646  *
2647  * The open entry point is called when a network interface is made
2648  * active by the system (IFF_UP).  At this point all resources needed
2649  * for transmit and receive operations are allocated, the interrupt
2650  * handler is registered with the OS, the watchdog timer is started,
2651  * and the stack is notified that the interface is ready.
2652  */
2653 static int ena_open(struct net_device *netdev)
2654 {
2655 	struct ena_adapter *adapter = netdev_priv(netdev);
2656 	int rc;
2657 
2658 	/* Notify the stack of the actual queue counts. */
2659 	rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2660 	if (rc) {
2661 		netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2662 		return rc;
2663 	}
2664 
2665 	rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2666 	if (rc) {
2667 		netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2668 		return rc;
2669 	}
2670 
2671 	rc = ena_up(adapter);
2672 	if (rc)
2673 		return rc;
2674 
2675 	return rc;
2676 }
2677 
2678 /* ena_close - Disables a network interface
2679  * @netdev: network interface device structure
2680  *
2681  * Returns 0, this is not allowed to fail
2682  *
2683  * The close entry point is called when an interface is de-activated
2684  * by the OS.  The hardware is still under the drivers control, but
2685  * needs to be disabled.  A global MAC reset is issued to stop the
2686  * hardware, and all transmit and receive resources are freed.
2687  */
2688 static int ena_close(struct net_device *netdev)
2689 {
2690 	struct ena_adapter *adapter = netdev_priv(netdev);
2691 
2692 	netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2693 
2694 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2695 		return 0;
2696 
2697 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2698 		ena_down(adapter);
2699 
2700 	/* Check for device status and issue reset if needed*/
2701 	check_for_admin_com_state(adapter);
2702 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2703 		netif_err(adapter, ifdown, adapter->netdev,
2704 			  "Destroy failure, restarting device\n");
2705 		ena_dump_stats_to_dmesg(adapter);
2706 		/* rtnl lock already obtained in dev_ioctl() layer */
2707 		ena_destroy_device(adapter, false);
2708 		ena_restore_device(adapter);
2709 	}
2710 
2711 	return 0;
2712 }
2713 
2714 int ena_update_queue_sizes(struct ena_adapter *adapter,
2715 			   u32 new_tx_size,
2716 			   u32 new_rx_size)
2717 {
2718 	bool dev_was_up;
2719 
2720 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2721 	ena_close(adapter->netdev);
2722 	adapter->requested_tx_ring_size = new_tx_size;
2723 	adapter->requested_rx_ring_size = new_rx_size;
2724 	ena_init_io_rings(adapter,
2725 			  0,
2726 			  adapter->xdp_num_queues +
2727 			  adapter->num_io_queues);
2728 	return dev_was_up ? ena_up(adapter) : 0;
2729 }
2730 
2731 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2732 {
2733 	struct ena_com_dev *ena_dev = adapter->ena_dev;
2734 	int prev_channel_count;
2735 	bool dev_was_up;
2736 
2737 	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2738 	ena_close(adapter->netdev);
2739 	prev_channel_count = adapter->num_io_queues;
2740 	adapter->num_io_queues = new_channel_count;
2741 	if (ena_xdp_present(adapter) &&
2742 	    ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2743 		adapter->xdp_first_ring = new_channel_count;
2744 		adapter->xdp_num_queues = new_channel_count;
2745 		if (prev_channel_count > new_channel_count)
2746 			ena_xdp_exchange_program_rx_in_range(adapter,
2747 							     NULL,
2748 							     new_channel_count,
2749 							     prev_channel_count);
2750 		else
2751 			ena_xdp_exchange_program_rx_in_range(adapter,
2752 							     adapter->xdp_bpf_prog,
2753 							     prev_channel_count,
2754 							     new_channel_count);
2755 	}
2756 
2757 	/* We need to destroy the rss table so that the indirection
2758 	 * table will be reinitialized by ena_up()
2759 	 */
2760 	ena_com_rss_destroy(ena_dev);
2761 	ena_init_io_rings(adapter,
2762 			  0,
2763 			  adapter->xdp_num_queues +
2764 			  adapter->num_io_queues);
2765 	return dev_was_up ? ena_open(adapter->netdev) : 0;
2766 }
2767 
2768 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
2769 {
2770 	u32 mss = skb_shinfo(skb)->gso_size;
2771 	struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2772 	u8 l4_protocol = 0;
2773 
2774 	if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2775 		ena_tx_ctx->l4_csum_enable = 1;
2776 		if (mss) {
2777 			ena_tx_ctx->tso_enable = 1;
2778 			ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2779 			ena_tx_ctx->l4_csum_partial = 0;
2780 		} else {
2781 			ena_tx_ctx->tso_enable = 0;
2782 			ena_meta->l4_hdr_len = 0;
2783 			ena_tx_ctx->l4_csum_partial = 1;
2784 		}
2785 
2786 		switch (ip_hdr(skb)->version) {
2787 		case IPVERSION:
2788 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2789 			if (ip_hdr(skb)->frag_off & htons(IP_DF))
2790 				ena_tx_ctx->df = 1;
2791 			if (mss)
2792 				ena_tx_ctx->l3_csum_enable = 1;
2793 			l4_protocol = ip_hdr(skb)->protocol;
2794 			break;
2795 		case 6:
2796 			ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2797 			l4_protocol = ipv6_hdr(skb)->nexthdr;
2798 			break;
2799 		default:
2800 			break;
2801 		}
2802 
2803 		if (l4_protocol == IPPROTO_TCP)
2804 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2805 		else
2806 			ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2807 
2808 		ena_meta->mss = mss;
2809 		ena_meta->l3_hdr_len = skb_network_header_len(skb);
2810 		ena_meta->l3_hdr_offset = skb_network_offset(skb);
2811 		ena_tx_ctx->meta_valid = 1;
2812 
2813 	} else {
2814 		ena_tx_ctx->meta_valid = 0;
2815 	}
2816 }
2817 
2818 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2819 				       struct sk_buff *skb)
2820 {
2821 	int num_frags, header_len, rc;
2822 
2823 	num_frags = skb_shinfo(skb)->nr_frags;
2824 	header_len = skb_headlen(skb);
2825 
2826 	if (num_frags < tx_ring->sgl_size)
2827 		return 0;
2828 
2829 	if ((num_frags == tx_ring->sgl_size) &&
2830 	    (header_len < tx_ring->tx_max_header_size))
2831 		return 0;
2832 
2833 	u64_stats_update_begin(&tx_ring->syncp);
2834 	tx_ring->tx_stats.linearize++;
2835 	u64_stats_update_end(&tx_ring->syncp);
2836 
2837 	rc = skb_linearize(skb);
2838 	if (unlikely(rc)) {
2839 		u64_stats_update_begin(&tx_ring->syncp);
2840 		tx_ring->tx_stats.linearize_failed++;
2841 		u64_stats_update_end(&tx_ring->syncp);
2842 	}
2843 
2844 	return rc;
2845 }
2846 
2847 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2848 			  struct ena_tx_buffer *tx_info,
2849 			  struct sk_buff *skb,
2850 			  void **push_hdr,
2851 			  u16 *header_len)
2852 {
2853 	struct ena_adapter *adapter = tx_ring->adapter;
2854 	struct ena_com_buf *ena_buf;
2855 	dma_addr_t dma;
2856 	u32 skb_head_len, frag_len, last_frag;
2857 	u16 push_len = 0;
2858 	u16 delta = 0;
2859 	int i = 0;
2860 
2861 	skb_head_len = skb_headlen(skb);
2862 	tx_info->skb = skb;
2863 	ena_buf = tx_info->bufs;
2864 
2865 	if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2866 		/* When the device is LLQ mode, the driver will copy
2867 		 * the header into the device memory space.
2868 		 * the ena_com layer assume the header is in a linear
2869 		 * memory space.
2870 		 * This assumption might be wrong since part of the header
2871 		 * can be in the fragmented buffers.
2872 		 * Use skb_header_pointer to make sure the header is in a
2873 		 * linear memory space.
2874 		 */
2875 
2876 		push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2877 		*push_hdr = skb_header_pointer(skb, 0, push_len,
2878 					       tx_ring->push_buf_intermediate_buf);
2879 		*header_len = push_len;
2880 		if (unlikely(skb->data != *push_hdr)) {
2881 			u64_stats_update_begin(&tx_ring->syncp);
2882 			tx_ring->tx_stats.llq_buffer_copy++;
2883 			u64_stats_update_end(&tx_ring->syncp);
2884 
2885 			delta = push_len - skb_head_len;
2886 		}
2887 	} else {
2888 		*push_hdr = NULL;
2889 		*header_len = min_t(u32, skb_head_len,
2890 				    tx_ring->tx_max_header_size);
2891 	}
2892 
2893 	netif_dbg(adapter, tx_queued, adapter->netdev,
2894 		  "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2895 		  *push_hdr, push_len);
2896 
2897 	if (skb_head_len > push_len) {
2898 		dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2899 				     skb_head_len - push_len, DMA_TO_DEVICE);
2900 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2901 			goto error_report_dma_error;
2902 
2903 		ena_buf->paddr = dma;
2904 		ena_buf->len = skb_head_len - push_len;
2905 
2906 		ena_buf++;
2907 		tx_info->num_of_bufs++;
2908 		tx_info->map_linear_data = 1;
2909 	} else {
2910 		tx_info->map_linear_data = 0;
2911 	}
2912 
2913 	last_frag = skb_shinfo(skb)->nr_frags;
2914 
2915 	for (i = 0; i < last_frag; i++) {
2916 		const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2917 
2918 		frag_len = skb_frag_size(frag);
2919 
2920 		if (unlikely(delta >= frag_len)) {
2921 			delta -= frag_len;
2922 			continue;
2923 		}
2924 
2925 		dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2926 				       frag_len - delta, DMA_TO_DEVICE);
2927 		if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2928 			goto error_report_dma_error;
2929 
2930 		ena_buf->paddr = dma;
2931 		ena_buf->len = frag_len - delta;
2932 		ena_buf++;
2933 		tx_info->num_of_bufs++;
2934 		delta = 0;
2935 	}
2936 
2937 	return 0;
2938 
2939 error_report_dma_error:
2940 	u64_stats_update_begin(&tx_ring->syncp);
2941 	tx_ring->tx_stats.dma_mapping_err++;
2942 	u64_stats_update_end(&tx_ring->syncp);
2943 	netdev_warn(adapter->netdev, "failed to map skb\n");
2944 
2945 	tx_info->skb = NULL;
2946 
2947 	tx_info->num_of_bufs += i;
2948 	ena_unmap_tx_buff(tx_ring, tx_info);
2949 
2950 	return -EINVAL;
2951 }
2952 
2953 /* Called with netif_tx_lock. */
2954 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2955 {
2956 	struct ena_adapter *adapter = netdev_priv(dev);
2957 	struct ena_tx_buffer *tx_info;
2958 	struct ena_com_tx_ctx ena_tx_ctx;
2959 	struct ena_ring *tx_ring;
2960 	struct netdev_queue *txq;
2961 	void *push_hdr;
2962 	u16 next_to_use, req_id, header_len;
2963 	int qid, rc;
2964 
2965 	netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2966 	/*  Determine which tx ring we will be placed on */
2967 	qid = skb_get_queue_mapping(skb);
2968 	tx_ring = &adapter->tx_ring[qid];
2969 	txq = netdev_get_tx_queue(dev, qid);
2970 
2971 	rc = ena_check_and_linearize_skb(tx_ring, skb);
2972 	if (unlikely(rc))
2973 		goto error_drop_packet;
2974 
2975 	skb_tx_timestamp(skb);
2976 
2977 	next_to_use = tx_ring->next_to_use;
2978 	req_id = tx_ring->free_ids[next_to_use];
2979 	tx_info = &tx_ring->tx_buffer_info[req_id];
2980 	tx_info->num_of_bufs = 0;
2981 
2982 	WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2983 
2984 	rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2985 	if (unlikely(rc))
2986 		goto error_drop_packet;
2987 
2988 	memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2989 	ena_tx_ctx.ena_bufs = tx_info->bufs;
2990 	ena_tx_ctx.push_header = push_hdr;
2991 	ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2992 	ena_tx_ctx.req_id = req_id;
2993 	ena_tx_ctx.header_len = header_len;
2994 
2995 	/* set flags and meta data */
2996 	ena_tx_csum(&ena_tx_ctx, skb);
2997 
2998 	rc = ena_xmit_common(dev,
2999 			     tx_ring,
3000 			     tx_info,
3001 			     &ena_tx_ctx,
3002 			     next_to_use,
3003 			     skb->len);
3004 	if (rc)
3005 		goto error_unmap_dma;
3006 
3007 	netdev_tx_sent_queue(txq, skb->len);
3008 
3009 	/* stop the queue when no more space available, the packet can have up
3010 	 * to sgl_size + 2. one for the meta descriptor and one for header
3011 	 * (if the header is larger than tx_max_header_size).
3012 	 */
3013 	if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3014 						   tx_ring->sgl_size + 2))) {
3015 		netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3016 			  __func__, qid);
3017 
3018 		netif_tx_stop_queue(txq);
3019 		u64_stats_update_begin(&tx_ring->syncp);
3020 		tx_ring->tx_stats.queue_stop++;
3021 		u64_stats_update_end(&tx_ring->syncp);
3022 
3023 		/* There is a rare condition where this function decide to
3024 		 * stop the queue but meanwhile clean_tx_irq updates
3025 		 * next_to_completion and terminates.
3026 		 * The queue will remain stopped forever.
3027 		 * To solve this issue add a mb() to make sure that
3028 		 * netif_tx_stop_queue() write is vissible before checking if
3029 		 * there is additional space in the queue.
3030 		 */
3031 		smp_mb();
3032 
3033 		if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3034 						 ENA_TX_WAKEUP_THRESH)) {
3035 			netif_tx_wake_queue(txq);
3036 			u64_stats_update_begin(&tx_ring->syncp);
3037 			tx_ring->tx_stats.queue_wakeup++;
3038 			u64_stats_update_end(&tx_ring->syncp);
3039 		}
3040 	}
3041 
3042 	if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
3043 		/* trigger the dma engine. ena_com_write_sq_doorbell()
3044 		 * has a mb
3045 		 */
3046 		ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
3047 		u64_stats_update_begin(&tx_ring->syncp);
3048 		tx_ring->tx_stats.doorbells++;
3049 		u64_stats_update_end(&tx_ring->syncp);
3050 	}
3051 
3052 	return NETDEV_TX_OK;
3053 
3054 error_unmap_dma:
3055 	ena_unmap_tx_buff(tx_ring, tx_info);
3056 	tx_info->skb = NULL;
3057 
3058 error_drop_packet:
3059 	dev_kfree_skb(skb);
3060 	return NETDEV_TX_OK;
3061 }
3062 
3063 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3064 			    struct net_device *sb_dev)
3065 {
3066 	u16 qid;
3067 	/* we suspect that this is good for in--kernel network services that
3068 	 * want to loop incoming skb rx to tx in normal user generated traffic,
3069 	 * most probably we will not get to this
3070 	 */
3071 	if (skb_rx_queue_recorded(skb))
3072 		qid = skb_get_rx_queue(skb);
3073 	else
3074 		qid = netdev_pick_tx(dev, skb, NULL);
3075 
3076 	return qid;
3077 }
3078 
3079 static void ena_config_host_info(struct ena_com_dev *ena_dev,
3080 				 struct pci_dev *pdev)
3081 {
3082 	struct ena_admin_host_info *host_info;
3083 	int rc;
3084 
3085 	/* Allocate only the host info */
3086 	rc = ena_com_allocate_host_info(ena_dev);
3087 	if (rc) {
3088 		pr_err("Cannot allocate host info\n");
3089 		return;
3090 	}
3091 
3092 	host_info = ena_dev->host_attr.host_info;
3093 
3094 	host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3095 	host_info->os_type = ENA_ADMIN_OS_LINUX;
3096 	host_info->kernel_ver = LINUX_VERSION_CODE;
3097 	strlcpy(host_info->kernel_ver_str, utsname()->version,
3098 		sizeof(host_info->kernel_ver_str) - 1);
3099 	host_info->os_dist = 0;
3100 	strncpy(host_info->os_dist_str, utsname()->release,
3101 		sizeof(host_info->os_dist_str) - 1);
3102 	host_info->driver_version =
3103 		(DRV_MODULE_GEN_MAJOR) |
3104 		(DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3105 		(DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3106 		("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3107 	host_info->num_cpus = num_online_cpus();
3108 
3109 	host_info->driver_supported_features =
3110 		ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK;
3111 
3112 	rc = ena_com_set_host_attributes(ena_dev);
3113 	if (rc) {
3114 		if (rc == -EOPNOTSUPP)
3115 			pr_warn("Cannot set host attributes\n");
3116 		else
3117 			pr_err("Cannot set host attributes\n");
3118 
3119 		goto err;
3120 	}
3121 
3122 	return;
3123 
3124 err:
3125 	ena_com_delete_host_info(ena_dev);
3126 }
3127 
3128 static void ena_config_debug_area(struct ena_adapter *adapter)
3129 {
3130 	u32 debug_area_size;
3131 	int rc, ss_count;
3132 
3133 	ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3134 	if (ss_count <= 0) {
3135 		netif_err(adapter, drv, adapter->netdev,
3136 			  "SS count is negative\n");
3137 		return;
3138 	}
3139 
3140 	/* allocate 32 bytes for each string and 64bit for the value */
3141 	debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3142 
3143 	rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3144 	if (rc) {
3145 		pr_err("Cannot allocate debug area\n");
3146 		return;
3147 	}
3148 
3149 	rc = ena_com_set_host_attributes(adapter->ena_dev);
3150 	if (rc) {
3151 		if (rc == -EOPNOTSUPP)
3152 			netif_warn(adapter, drv, adapter->netdev,
3153 				   "Cannot set host attributes\n");
3154 		else
3155 			netif_err(adapter, drv, adapter->netdev,
3156 				  "Cannot set host attributes\n");
3157 		goto err;
3158 	}
3159 
3160 	return;
3161 err:
3162 	ena_com_delete_debug_area(adapter->ena_dev);
3163 }
3164 
3165 static void ena_get_stats64(struct net_device *netdev,
3166 			    struct rtnl_link_stats64 *stats)
3167 {
3168 	struct ena_adapter *adapter = netdev_priv(netdev);
3169 	struct ena_ring *rx_ring, *tx_ring;
3170 	unsigned int start;
3171 	u64 rx_drops;
3172 	int i;
3173 
3174 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3175 		return;
3176 
3177 	for (i = 0; i < adapter->num_io_queues; i++) {
3178 		u64 bytes, packets;
3179 
3180 		tx_ring = &adapter->tx_ring[i];
3181 
3182 		do {
3183 			start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3184 			packets = tx_ring->tx_stats.cnt;
3185 			bytes = tx_ring->tx_stats.bytes;
3186 		} while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
3187 
3188 		stats->tx_packets += packets;
3189 		stats->tx_bytes += bytes;
3190 
3191 		rx_ring = &adapter->rx_ring[i];
3192 
3193 		do {
3194 			start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3195 			packets = rx_ring->rx_stats.cnt;
3196 			bytes = rx_ring->rx_stats.bytes;
3197 		} while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3198 
3199 		stats->rx_packets += packets;
3200 		stats->rx_bytes += bytes;
3201 	}
3202 
3203 	do {
3204 		start = u64_stats_fetch_begin_irq(&adapter->syncp);
3205 		rx_drops = adapter->dev_stats.rx_drops;
3206 	} while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
3207 
3208 	stats->rx_dropped = rx_drops;
3209 
3210 	stats->multicast = 0;
3211 	stats->collisions = 0;
3212 
3213 	stats->rx_length_errors = 0;
3214 	stats->rx_crc_errors = 0;
3215 	stats->rx_frame_errors = 0;
3216 	stats->rx_fifo_errors = 0;
3217 	stats->rx_missed_errors = 0;
3218 	stats->tx_window_errors = 0;
3219 
3220 	stats->rx_errors = 0;
3221 	stats->tx_errors = 0;
3222 }
3223 
3224 static const struct net_device_ops ena_netdev_ops = {
3225 	.ndo_open		= ena_open,
3226 	.ndo_stop		= ena_close,
3227 	.ndo_start_xmit		= ena_start_xmit,
3228 	.ndo_select_queue	= ena_select_queue,
3229 	.ndo_get_stats64	= ena_get_stats64,
3230 	.ndo_tx_timeout		= ena_tx_timeout,
3231 	.ndo_change_mtu		= ena_change_mtu,
3232 	.ndo_set_mac_address	= NULL,
3233 	.ndo_validate_addr	= eth_validate_addr,
3234 	.ndo_bpf		= ena_xdp,
3235 };
3236 
3237 static int ena_device_validate_params(struct ena_adapter *adapter,
3238 				      struct ena_com_dev_get_features_ctx *get_feat_ctx)
3239 {
3240 	struct net_device *netdev = adapter->netdev;
3241 	int rc;
3242 
3243 	rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3244 			      adapter->mac_addr);
3245 	if (!rc) {
3246 		netif_err(adapter, drv, netdev,
3247 			  "Error, mac address are different\n");
3248 		return -EINVAL;
3249 	}
3250 
3251 	if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3252 		netif_err(adapter, drv, netdev,
3253 			  "Error, device max mtu is smaller than netdev MTU\n");
3254 		return -EINVAL;
3255 	}
3256 
3257 	return 0;
3258 }
3259 
3260 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3261 			   struct ena_com_dev_get_features_ctx *get_feat_ctx,
3262 			   bool *wd_state)
3263 {
3264 	struct device *dev = &pdev->dev;
3265 	bool readless_supported;
3266 	u32 aenq_groups;
3267 	int dma_width;
3268 	int rc;
3269 
3270 	rc = ena_com_mmio_reg_read_request_init(ena_dev);
3271 	if (rc) {
3272 		dev_err(dev, "failed to init mmio read less\n");
3273 		return rc;
3274 	}
3275 
3276 	/* The PCIe configuration space revision id indicate if mmio reg
3277 	 * read is disabled
3278 	 */
3279 	readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3280 	ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3281 
3282 	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3283 	if (rc) {
3284 		dev_err(dev, "Can not reset device\n");
3285 		goto err_mmio_read_less;
3286 	}
3287 
3288 	rc = ena_com_validate_version(ena_dev);
3289 	if (rc) {
3290 		dev_err(dev, "device version is too low\n");
3291 		goto err_mmio_read_less;
3292 	}
3293 
3294 	dma_width = ena_com_get_dma_width(ena_dev);
3295 	if (dma_width < 0) {
3296 		dev_err(dev, "Invalid dma width value %d", dma_width);
3297 		rc = dma_width;
3298 		goto err_mmio_read_less;
3299 	}
3300 
3301 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
3302 	if (rc) {
3303 		dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
3304 		goto err_mmio_read_less;
3305 	}
3306 
3307 	rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
3308 	if (rc) {
3309 		dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
3310 			rc);
3311 		goto err_mmio_read_less;
3312 	}
3313 
3314 	/* ENA admin level init */
3315 	rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3316 	if (rc) {
3317 		dev_err(dev,
3318 			"Can not initialize ena admin queue with device\n");
3319 		goto err_mmio_read_less;
3320 	}
3321 
3322 	/* To enable the msix interrupts the driver needs to know the number
3323 	 * of queues. So the driver uses polling mode to retrieve this
3324 	 * information
3325 	 */
3326 	ena_com_set_admin_polling_mode(ena_dev, true);
3327 
3328 	ena_config_host_info(ena_dev, pdev);
3329 
3330 	/* Get Device Attributes*/
3331 	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3332 	if (rc) {
3333 		dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3334 		goto err_admin_init;
3335 	}
3336 
3337 	/* Try to turn all the available aenq groups */
3338 	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3339 		BIT(ENA_ADMIN_FATAL_ERROR) |
3340 		BIT(ENA_ADMIN_WARNING) |
3341 		BIT(ENA_ADMIN_NOTIFICATION) |
3342 		BIT(ENA_ADMIN_KEEP_ALIVE);
3343 
3344 	aenq_groups &= get_feat_ctx->aenq.supported_groups;
3345 
3346 	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3347 	if (rc) {
3348 		dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3349 		goto err_admin_init;
3350 	}
3351 
3352 	*wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3353 
3354 	return 0;
3355 
3356 err_admin_init:
3357 	ena_com_delete_host_info(ena_dev);
3358 	ena_com_admin_destroy(ena_dev);
3359 err_mmio_read_less:
3360 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3361 
3362 	return rc;
3363 }
3364 
3365 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3366 {
3367 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3368 	struct device *dev = &adapter->pdev->dev;
3369 	int rc;
3370 
3371 	rc = ena_enable_msix(adapter);
3372 	if (rc) {
3373 		dev_err(dev, "Can not reserve msix vectors\n");
3374 		return rc;
3375 	}
3376 
3377 	ena_setup_mgmnt_intr(adapter);
3378 
3379 	rc = ena_request_mgmnt_irq(adapter);
3380 	if (rc) {
3381 		dev_err(dev, "Can not setup management interrupts\n");
3382 		goto err_disable_msix;
3383 	}
3384 
3385 	ena_com_set_admin_polling_mode(ena_dev, false);
3386 
3387 	ena_com_admin_aenq_enable(ena_dev);
3388 
3389 	return 0;
3390 
3391 err_disable_msix:
3392 	ena_disable_msix(adapter);
3393 
3394 	return rc;
3395 }
3396 
3397 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3398 {
3399 	struct net_device *netdev = adapter->netdev;
3400 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3401 	bool dev_up;
3402 
3403 	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3404 		return;
3405 
3406 	netif_carrier_off(netdev);
3407 
3408 	del_timer_sync(&adapter->timer_service);
3409 
3410 	dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3411 	adapter->dev_up_before_reset = dev_up;
3412 	if (!graceful)
3413 		ena_com_set_admin_running_state(ena_dev, false);
3414 
3415 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3416 		ena_down(adapter);
3417 
3418 	/* Stop the device from sending AENQ events (in case reset flag is set
3419 	 *  and device is up, ena_down() already reset the device.
3420 	 */
3421 	if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3422 		ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3423 
3424 	ena_free_mgmnt_irq(adapter);
3425 
3426 	ena_disable_msix(adapter);
3427 
3428 	ena_com_abort_admin_commands(ena_dev);
3429 
3430 	ena_com_wait_for_abort_completion(ena_dev);
3431 
3432 	ena_com_admin_destroy(ena_dev);
3433 
3434 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3435 
3436 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3437 
3438 	clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3439 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3440 }
3441 
3442 static int ena_restore_device(struct ena_adapter *adapter)
3443 {
3444 	struct ena_com_dev_get_features_ctx get_feat_ctx;
3445 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3446 	struct pci_dev *pdev = adapter->pdev;
3447 	bool wd_state;
3448 	int rc;
3449 
3450 	set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3451 	rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3452 	if (rc) {
3453 		dev_err(&pdev->dev, "Can not initialize device\n");
3454 		goto err;
3455 	}
3456 	adapter->wd_state = wd_state;
3457 
3458 	rc = ena_device_validate_params(adapter, &get_feat_ctx);
3459 	if (rc) {
3460 		dev_err(&pdev->dev, "Validation of device parameters failed\n");
3461 		goto err_device_destroy;
3462 	}
3463 
3464 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3465 	if (rc) {
3466 		dev_err(&pdev->dev, "Enable MSI-X failed\n");
3467 		goto err_device_destroy;
3468 	}
3469 	/* If the interface was up before the reset bring it up */
3470 	if (adapter->dev_up_before_reset) {
3471 		rc = ena_up(adapter);
3472 		if (rc) {
3473 			dev_err(&pdev->dev, "Failed to create I/O queues\n");
3474 			goto err_disable_msix;
3475 		}
3476 	}
3477 
3478 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3479 
3480 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3481 	if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3482 		netif_carrier_on(adapter->netdev);
3483 
3484 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3485 	dev_err(&pdev->dev, "Device reset completed successfully\n");
3486 	adapter->last_keep_alive_jiffies = jiffies;
3487 
3488 	return rc;
3489 err_disable_msix:
3490 	ena_free_mgmnt_irq(adapter);
3491 	ena_disable_msix(adapter);
3492 err_device_destroy:
3493 	ena_com_abort_admin_commands(ena_dev);
3494 	ena_com_wait_for_abort_completion(ena_dev);
3495 	ena_com_admin_destroy(ena_dev);
3496 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3497 	ena_com_mmio_reg_read_request_destroy(ena_dev);
3498 err:
3499 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3500 	clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3501 	dev_err(&pdev->dev,
3502 		"Reset attempt failed. Can not reset the device\n");
3503 
3504 	return rc;
3505 }
3506 
3507 static void ena_fw_reset_device(struct work_struct *work)
3508 {
3509 	struct ena_adapter *adapter =
3510 		container_of(work, struct ena_adapter, reset_task);
3511 	struct pci_dev *pdev = adapter->pdev;
3512 
3513 	if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3514 		dev_err(&pdev->dev,
3515 			"device reset schedule while reset bit is off\n");
3516 		return;
3517 	}
3518 	rtnl_lock();
3519 	ena_destroy_device(adapter, false);
3520 	ena_restore_device(adapter);
3521 	rtnl_unlock();
3522 }
3523 
3524 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3525 					struct ena_ring *rx_ring)
3526 {
3527 	if (likely(rx_ring->first_interrupt))
3528 		return 0;
3529 
3530 	if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3531 		return 0;
3532 
3533 	rx_ring->no_interrupt_event_cnt++;
3534 
3535 	if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3536 		netif_err(adapter, rx_err, adapter->netdev,
3537 			  "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3538 			  rx_ring->qid);
3539 		adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3540 		smp_mb__before_atomic();
3541 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3542 		return -EIO;
3543 	}
3544 
3545 	return 0;
3546 }
3547 
3548 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3549 					  struct ena_ring *tx_ring)
3550 {
3551 	struct ena_tx_buffer *tx_buf;
3552 	unsigned long last_jiffies;
3553 	u32 missed_tx = 0;
3554 	int i, rc = 0;
3555 
3556 	for (i = 0; i < tx_ring->ring_size; i++) {
3557 		tx_buf = &tx_ring->tx_buffer_info[i];
3558 		last_jiffies = tx_buf->last_jiffies;
3559 
3560 		if (last_jiffies == 0)
3561 			/* no pending Tx at this location */
3562 			continue;
3563 
3564 		if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
3565 			     2 * adapter->missing_tx_completion_to))) {
3566 			/* If after graceful period interrupt is still not
3567 			 * received, we schedule a reset
3568 			 */
3569 			netif_err(adapter, tx_err, adapter->netdev,
3570 				  "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3571 				  tx_ring->qid);
3572 			adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3573 			smp_mb__before_atomic();
3574 			set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3575 			return -EIO;
3576 		}
3577 
3578 		if (unlikely(time_is_before_jiffies(last_jiffies +
3579 				adapter->missing_tx_completion_to))) {
3580 			if (!tx_buf->print_once)
3581 				netif_notice(adapter, tx_err, adapter->netdev,
3582 					     "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
3583 					     tx_ring->qid, i);
3584 
3585 			tx_buf->print_once = 1;
3586 			missed_tx++;
3587 		}
3588 	}
3589 
3590 	if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3591 		netif_err(adapter, tx_err, adapter->netdev,
3592 			  "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3593 			  missed_tx,
3594 			  adapter->missing_tx_completion_threshold);
3595 		adapter->reset_reason =
3596 			ENA_REGS_RESET_MISS_TX_CMPL;
3597 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3598 		rc = -EIO;
3599 	}
3600 
3601 	u64_stats_update_begin(&tx_ring->syncp);
3602 	tx_ring->tx_stats.missed_tx = missed_tx;
3603 	u64_stats_update_end(&tx_ring->syncp);
3604 
3605 	return rc;
3606 }
3607 
3608 static void check_for_missing_completions(struct ena_adapter *adapter)
3609 {
3610 	struct ena_ring *tx_ring;
3611 	struct ena_ring *rx_ring;
3612 	int i, budget, rc;
3613 	int io_queue_count;
3614 
3615 	io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
3616 	/* Make sure the driver doesn't turn the device in other process */
3617 	smp_rmb();
3618 
3619 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3620 		return;
3621 
3622 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3623 		return;
3624 
3625 	if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3626 		return;
3627 
3628 	budget = ENA_MONITORED_TX_QUEUES;
3629 
3630 	for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
3631 		tx_ring = &adapter->tx_ring[i];
3632 		rx_ring = &adapter->rx_ring[i];
3633 
3634 		rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3635 		if (unlikely(rc))
3636 			return;
3637 
3638 		rc =  !ENA_IS_XDP_INDEX(adapter, i) ?
3639 			check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
3640 		if (unlikely(rc))
3641 			return;
3642 
3643 		budget--;
3644 		if (!budget)
3645 			break;
3646 	}
3647 
3648 	adapter->last_monitored_tx_qid = i % io_queue_count;
3649 }
3650 
3651 /* trigger napi schedule after 2 consecutive detections */
3652 #define EMPTY_RX_REFILL 2
3653 /* For the rare case where the device runs out of Rx descriptors and the
3654  * napi handler failed to refill new Rx descriptors (due to a lack of memory
3655  * for example).
3656  * This case will lead to a deadlock:
3657  * The device won't send interrupts since all the new Rx packets will be dropped
3658  * The napi handler won't allocate new Rx descriptors so the device will be
3659  * able to send new packets.
3660  *
3661  * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
3662  * It is recommended to have at least 512MB, with a minimum of 128MB for
3663  * constrained environment).
3664  *
3665  * When such a situation is detected - Reschedule napi
3666  */
3667 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3668 {
3669 	struct ena_ring *rx_ring;
3670 	int i, refill_required;
3671 
3672 	if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3673 		return;
3674 
3675 	if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3676 		return;
3677 
3678 	for (i = 0; i < adapter->num_io_queues; i++) {
3679 		rx_ring = &adapter->rx_ring[i];
3680 
3681 		refill_required =
3682 			ena_com_free_desc(rx_ring->ena_com_io_sq);
3683 		if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3684 			rx_ring->empty_rx_queue++;
3685 
3686 			if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3687 				u64_stats_update_begin(&rx_ring->syncp);
3688 				rx_ring->rx_stats.empty_rx_ring++;
3689 				u64_stats_update_end(&rx_ring->syncp);
3690 
3691 				netif_err(adapter, drv, adapter->netdev,
3692 					  "trigger refill for ring %d\n", i);
3693 
3694 				napi_schedule(rx_ring->napi);
3695 				rx_ring->empty_rx_queue = 0;
3696 			}
3697 		} else {
3698 			rx_ring->empty_rx_queue = 0;
3699 		}
3700 	}
3701 }
3702 
3703 /* Check for keep alive expiration */
3704 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3705 {
3706 	unsigned long keep_alive_expired;
3707 
3708 	if (!adapter->wd_state)
3709 		return;
3710 
3711 	if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3712 		return;
3713 
3714 	keep_alive_expired = adapter->last_keep_alive_jiffies +
3715 			     adapter->keep_alive_timeout;
3716 	if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3717 		netif_err(adapter, drv, adapter->netdev,
3718 			  "Keep alive watchdog timeout.\n");
3719 		u64_stats_update_begin(&adapter->syncp);
3720 		adapter->dev_stats.wd_expired++;
3721 		u64_stats_update_end(&adapter->syncp);
3722 		adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3723 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3724 	}
3725 }
3726 
3727 static void check_for_admin_com_state(struct ena_adapter *adapter)
3728 {
3729 	if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3730 		netif_err(adapter, drv, adapter->netdev,
3731 			  "ENA admin queue is not in running state!\n");
3732 		u64_stats_update_begin(&adapter->syncp);
3733 		adapter->dev_stats.admin_q_pause++;
3734 		u64_stats_update_end(&adapter->syncp);
3735 		adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3736 		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3737 	}
3738 }
3739 
3740 static void ena_update_hints(struct ena_adapter *adapter,
3741 			     struct ena_admin_ena_hw_hints *hints)
3742 {
3743 	struct net_device *netdev = adapter->netdev;
3744 
3745 	if (hints->admin_completion_tx_timeout)
3746 		adapter->ena_dev->admin_queue.completion_timeout =
3747 			hints->admin_completion_tx_timeout * 1000;
3748 
3749 	if (hints->mmio_read_timeout)
3750 		/* convert to usec */
3751 		adapter->ena_dev->mmio_read.reg_read_to =
3752 			hints->mmio_read_timeout * 1000;
3753 
3754 	if (hints->missed_tx_completion_count_threshold_to_reset)
3755 		adapter->missing_tx_completion_threshold =
3756 			hints->missed_tx_completion_count_threshold_to_reset;
3757 
3758 	if (hints->missing_tx_completion_timeout) {
3759 		if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3760 			adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3761 		else
3762 			adapter->missing_tx_completion_to =
3763 				msecs_to_jiffies(hints->missing_tx_completion_timeout);
3764 	}
3765 
3766 	if (hints->netdev_wd_timeout)
3767 		netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3768 
3769 	if (hints->driver_watchdog_timeout) {
3770 		if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3771 			adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3772 		else
3773 			adapter->keep_alive_timeout =
3774 				msecs_to_jiffies(hints->driver_watchdog_timeout);
3775 	}
3776 }
3777 
3778 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3779 				 struct net_device *netdev)
3780 {
3781 	host_info->supported_network_features[0] =
3782 		netdev->features & GENMASK_ULL(31, 0);
3783 	host_info->supported_network_features[1] =
3784 		(netdev->features & GENMASK_ULL(63, 32)) >> 32;
3785 }
3786 
3787 static void ena_timer_service(struct timer_list *t)
3788 {
3789 	struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3790 	u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3791 	struct ena_admin_host_info *host_info =
3792 		adapter->ena_dev->host_attr.host_info;
3793 
3794 	check_for_missing_keep_alive(adapter);
3795 
3796 	check_for_admin_com_state(adapter);
3797 
3798 	check_for_missing_completions(adapter);
3799 
3800 	check_for_empty_rx_ring(adapter);
3801 
3802 	if (debug_area)
3803 		ena_dump_stats_to_buf(adapter, debug_area);
3804 
3805 	if (host_info)
3806 		ena_update_host_info(host_info, adapter->netdev);
3807 
3808 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3809 		netif_err(adapter, drv, adapter->netdev,
3810 			  "Trigger reset is on\n");
3811 		ena_dump_stats_to_dmesg(adapter);
3812 		queue_work(ena_wq, &adapter->reset_task);
3813 		return;
3814 	}
3815 
3816 	/* Reset the timer */
3817 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3818 }
3819 
3820 static int ena_calc_max_io_queue_num(struct pci_dev *pdev,
3821 				     struct ena_com_dev *ena_dev,
3822 				     struct ena_com_dev_get_features_ctx *get_feat_ctx)
3823 {
3824 	int io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
3825 
3826 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3827 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3828 			&get_feat_ctx->max_queue_ext.max_queue_ext;
3829 		io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
3830 				  max_queue_ext->max_rx_cq_num);
3831 
3832 		io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3833 		io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3834 	} else {
3835 		struct ena_admin_queue_feature_desc *max_queues =
3836 			&get_feat_ctx->max_queues;
3837 		io_tx_sq_num = max_queues->max_sq_num;
3838 		io_tx_cq_num = max_queues->max_cq_num;
3839 		io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
3840 	}
3841 
3842 	/* In case of LLQ use the llq fields for the tx SQ/CQ */
3843 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3844 		io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3845 
3846 	max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3847 	max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
3848 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
3849 	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
3850 	/* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3851 	max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
3852 	if (unlikely(!max_num_io_queues)) {
3853 		dev_err(&pdev->dev, "The device doesn't have io queues\n");
3854 		return -EFAULT;
3855 	}
3856 
3857 	return max_num_io_queues;
3858 }
3859 
3860 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3861 					   struct ena_com_dev *ena_dev,
3862 					   struct ena_admin_feature_llq_desc *llq,
3863 					   struct ena_llq_configurations *llq_default_configurations)
3864 {
3865 	bool has_mem_bar;
3866 	int rc;
3867 	u32 llq_feature_mask;
3868 
3869 	llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3870 	if (!(ena_dev->supported_features & llq_feature_mask)) {
3871 		dev_err(&pdev->dev,
3872 			"LLQ is not supported Fallback to host mode policy.\n");
3873 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3874 		return 0;
3875 	}
3876 
3877 	has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3878 
3879 	rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3880 	if (unlikely(rc)) {
3881 		dev_err(&pdev->dev,
3882 			"Failed to configure the device mode.  Fallback to host mode policy.\n");
3883 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3884 		return 0;
3885 	}
3886 
3887 	/* Nothing to config, exit */
3888 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3889 		return 0;
3890 
3891 	if (!has_mem_bar) {
3892 		dev_err(&pdev->dev,
3893 			"ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3894 		ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3895 		return 0;
3896 	}
3897 
3898 	ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3899 					   pci_resource_start(pdev, ENA_MEM_BAR),
3900 					   pci_resource_len(pdev, ENA_MEM_BAR));
3901 
3902 	if (!ena_dev->mem_bar)
3903 		return -EFAULT;
3904 
3905 	return 0;
3906 }
3907 
3908 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3909 				 struct net_device *netdev)
3910 {
3911 	netdev_features_t dev_features = 0;
3912 
3913 	/* Set offload features */
3914 	if (feat->offload.tx &
3915 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3916 		dev_features |= NETIF_F_IP_CSUM;
3917 
3918 	if (feat->offload.tx &
3919 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3920 		dev_features |= NETIF_F_IPV6_CSUM;
3921 
3922 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3923 		dev_features |= NETIF_F_TSO;
3924 
3925 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3926 		dev_features |= NETIF_F_TSO6;
3927 
3928 	if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3929 		dev_features |= NETIF_F_TSO_ECN;
3930 
3931 	if (feat->offload.rx_supported &
3932 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3933 		dev_features |= NETIF_F_RXCSUM;
3934 
3935 	if (feat->offload.rx_supported &
3936 		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3937 		dev_features |= NETIF_F_RXCSUM;
3938 
3939 	netdev->features =
3940 		dev_features |
3941 		NETIF_F_SG |
3942 		NETIF_F_RXHASH |
3943 		NETIF_F_HIGHDMA;
3944 
3945 	netdev->hw_features |= netdev->features;
3946 	netdev->vlan_features |= netdev->features;
3947 }
3948 
3949 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3950 				     struct ena_com_dev_get_features_ctx *feat)
3951 {
3952 	struct net_device *netdev = adapter->netdev;
3953 
3954 	/* Copy mac address */
3955 	if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3956 		eth_hw_addr_random(netdev);
3957 		ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3958 	} else {
3959 		ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3960 		ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3961 	}
3962 
3963 	/* Set offload features */
3964 	ena_set_dev_offloads(feat, netdev);
3965 
3966 	adapter->max_mtu = feat->dev_attr.max_mtu;
3967 	netdev->max_mtu = adapter->max_mtu;
3968 	netdev->min_mtu = ENA_MIN_MTU;
3969 }
3970 
3971 static int ena_rss_init_default(struct ena_adapter *adapter)
3972 {
3973 	struct ena_com_dev *ena_dev = adapter->ena_dev;
3974 	struct device *dev = &adapter->pdev->dev;
3975 	int rc, i;
3976 	u32 val;
3977 
3978 	rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3979 	if (unlikely(rc)) {
3980 		dev_err(dev, "Cannot init indirect table\n");
3981 		goto err_rss_init;
3982 	}
3983 
3984 	for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3985 		val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
3986 		rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3987 						       ENA_IO_RXQ_IDX(val));
3988 		if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3989 			dev_err(dev, "Cannot fill indirect table\n");
3990 			goto err_fill_indir;
3991 		}
3992 	}
3993 
3994 	rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3995 					ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3996 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3997 		dev_err(dev, "Cannot fill hash function\n");
3998 		goto err_fill_indir;
3999 	}
4000 
4001 	rc = ena_com_set_default_hash_ctrl(ena_dev);
4002 	if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4003 		dev_err(dev, "Cannot fill hash control\n");
4004 		goto err_fill_indir;
4005 	}
4006 
4007 	return 0;
4008 
4009 err_fill_indir:
4010 	ena_com_rss_destroy(ena_dev);
4011 err_rss_init:
4012 
4013 	return rc;
4014 }
4015 
4016 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4017 {
4018 	int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4019 
4020 	pci_release_selected_regions(pdev, release_bars);
4021 }
4022 
4023 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
4024 {
4025 	llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
4026 	llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
4027 	llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
4028 	llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
4029 	llq_config->llq_ring_entry_size_value = 128;
4030 }
4031 
4032 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
4033 {
4034 	struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4035 	struct ena_com_dev *ena_dev = ctx->ena_dev;
4036 	u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4037 	u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4038 	u32 max_tx_queue_size;
4039 	u32 max_rx_queue_size;
4040 
4041 	if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4042 		struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4043 			&ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4044 		max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4045 					  max_queue_ext->max_rx_sq_depth);
4046 		max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
4047 
4048 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4049 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4050 						  llq->max_llq_depth);
4051 		else
4052 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4053 						  max_queue_ext->max_tx_sq_depth);
4054 
4055 		ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4056 					     max_queue_ext->max_per_packet_tx_descs);
4057 		ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4058 					     max_queue_ext->max_per_packet_rx_descs);
4059 	} else {
4060 		struct ena_admin_queue_feature_desc *max_queues =
4061 			&ctx->get_feat_ctx->max_queues;
4062 		max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4063 					  max_queues->max_sq_depth);
4064 		max_tx_queue_size = max_queues->max_cq_depth;
4065 
4066 		if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4067 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4068 						  llq->max_llq_depth);
4069 		else
4070 			max_tx_queue_size = min_t(u32, max_tx_queue_size,
4071 						  max_queues->max_sq_depth);
4072 
4073 		ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4074 					     max_queues->max_packet_tx_descs);
4075 		ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4076 					     max_queues->max_packet_rx_descs);
4077 	}
4078 
4079 	max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4080 	max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
4081 
4082 	tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4083 				  max_tx_queue_size);
4084 	rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4085 				  max_rx_queue_size);
4086 
4087 	tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4088 	rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4089 
4090 	ctx->max_tx_queue_size = max_tx_queue_size;
4091 	ctx->max_rx_queue_size = max_rx_queue_size;
4092 	ctx->tx_queue_size = tx_queue_size;
4093 	ctx->rx_queue_size = rx_queue_size;
4094 
4095 	return 0;
4096 }
4097 
4098 /* ena_probe - Device Initialization Routine
4099  * @pdev: PCI device information struct
4100  * @ent: entry in ena_pci_tbl
4101  *
4102  * Returns 0 on success, negative on failure
4103  *
4104  * ena_probe initializes an adapter identified by a pci_dev structure.
4105  * The OS initialization, configuring of the adapter private structure,
4106  * and a hardware reset occur.
4107  */
4108 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4109 {
4110 	struct ena_com_dev_get_features_ctx get_feat_ctx;
4111 	struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
4112 	struct ena_llq_configurations llq_config;
4113 	struct ena_com_dev *ena_dev = NULL;
4114 	struct ena_adapter *adapter;
4115 	struct net_device *netdev;
4116 	static int adapters_found;
4117 	u32 max_num_io_queues;
4118 	char *queue_type_str;
4119 	bool wd_state;
4120 	int bars, rc;
4121 
4122 	dev_dbg(&pdev->dev, "%s\n", __func__);
4123 
4124 	rc = pci_enable_device_mem(pdev);
4125 	if (rc) {
4126 		dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4127 		return rc;
4128 	}
4129 
4130 	pci_set_master(pdev);
4131 
4132 	ena_dev = vzalloc(sizeof(*ena_dev));
4133 	if (!ena_dev) {
4134 		rc = -ENOMEM;
4135 		goto err_disable_device;
4136 	}
4137 
4138 	bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4139 	rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4140 	if (rc) {
4141 		dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4142 			rc);
4143 		goto err_free_ena_dev;
4144 	}
4145 
4146 	ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4147 					pci_resource_start(pdev, ENA_REG_BAR),
4148 					pci_resource_len(pdev, ENA_REG_BAR));
4149 	if (!ena_dev->reg_bar) {
4150 		dev_err(&pdev->dev, "failed to remap regs bar\n");
4151 		rc = -EFAULT;
4152 		goto err_free_region;
4153 	}
4154 
4155 	ena_dev->dmadev = &pdev->dev;
4156 
4157 	rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4158 	if (rc) {
4159 		dev_err(&pdev->dev, "ena device init failed\n");
4160 		if (rc == -ETIME)
4161 			rc = -EPROBE_DEFER;
4162 		goto err_free_region;
4163 	}
4164 
4165 	set_default_llq_configurations(&llq_config);
4166 
4167 	rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
4168 					     &llq_config);
4169 	if (rc) {
4170 		dev_err(&pdev->dev, "ena device init failed\n");
4171 		goto err_device_destroy;
4172 	}
4173 
4174 	calc_queue_ctx.ena_dev = ena_dev;
4175 	calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4176 	calc_queue_ctx.pdev = pdev;
4177 
4178 	/* Initial Tx and RX interrupt delay. Assumes 1 usec granularity.
4179 	 * Updated during device initialization with the real granularity
4180 	 */
4181 	ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4182 	ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4183 	ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4184 	max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4185 	rc = ena_calc_io_queue_size(&calc_queue_ctx);
4186 	if (rc || !max_num_io_queues) {
4187 		rc = -EFAULT;
4188 		goto err_device_destroy;
4189 	}
4190 
4191 	/* dev zeroed in init_etherdev */
4192 	netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), max_num_io_queues);
4193 	if (!netdev) {
4194 		dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4195 		rc = -ENOMEM;
4196 		goto err_device_destroy;
4197 	}
4198 
4199 	SET_NETDEV_DEV(netdev, &pdev->dev);
4200 
4201 	adapter = netdev_priv(netdev);
4202 	pci_set_drvdata(pdev, adapter);
4203 
4204 	adapter->ena_dev = ena_dev;
4205 	adapter->netdev = netdev;
4206 	adapter->pdev = pdev;
4207 
4208 	ena_set_conf_feat_params(adapter, &get_feat_ctx);
4209 
4210 	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4211 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4212 
4213 	adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4214 	adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
4215 	adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4216 	adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
4217 	adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4218 	adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
4219 
4220 	adapter->num_io_queues = max_num_io_queues;
4221 	adapter->max_num_io_queues = max_num_io_queues;
4222 
4223 	adapter->xdp_first_ring = 0;
4224 	adapter->xdp_num_queues = 0;
4225 
4226 	adapter->last_monitored_tx_qid = 0;
4227 
4228 	adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4229 	adapter->wd_state = wd_state;
4230 
4231 	snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4232 
4233 	rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4234 	if (rc) {
4235 		dev_err(&pdev->dev,
4236 			"Failed to query interrupt moderation feature\n");
4237 		goto err_netdev_destroy;
4238 	}
4239 	ena_init_io_rings(adapter,
4240 			  0,
4241 			  adapter->xdp_num_queues +
4242 			  adapter->num_io_queues);
4243 
4244 	netdev->netdev_ops = &ena_netdev_ops;
4245 	netdev->watchdog_timeo = TX_TIMEOUT;
4246 	ena_set_ethtool_ops(netdev);
4247 
4248 	netdev->priv_flags |= IFF_UNICAST_FLT;
4249 
4250 	u64_stats_init(&adapter->syncp);
4251 
4252 	rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4253 	if (rc) {
4254 		dev_err(&pdev->dev,
4255 			"Failed to enable and set the admin interrupts\n");
4256 		goto err_worker_destroy;
4257 	}
4258 	rc = ena_rss_init_default(adapter);
4259 	if (rc && (rc != -EOPNOTSUPP)) {
4260 		dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4261 		goto err_free_msix;
4262 	}
4263 
4264 	ena_config_debug_area(adapter);
4265 
4266 	memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4267 
4268 	netif_carrier_off(netdev);
4269 
4270 	rc = register_netdev(netdev);
4271 	if (rc) {
4272 		dev_err(&pdev->dev, "Cannot register net device\n");
4273 		goto err_rss;
4274 	}
4275 
4276 	INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4277 
4278 	adapter->last_keep_alive_jiffies = jiffies;
4279 	adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4280 	adapter->missing_tx_completion_to = TX_TIMEOUT;
4281 	adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4282 
4283 	ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4284 
4285 	timer_setup(&adapter->timer_service, ena_timer_service, 0);
4286 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4287 
4288 	if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
4289 		queue_type_str = "Regular";
4290 	else
4291 		queue_type_str = "Low Latency";
4292 
4293 	dev_info(&pdev->dev,
4294 		 "%s found at mem %lx, mac addr %pM, Placement policy: %s\n",
4295 		 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4296 		 netdev->dev_addr, queue_type_str);
4297 
4298 	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4299 
4300 	adapters_found++;
4301 
4302 	return 0;
4303 
4304 err_rss:
4305 	ena_com_delete_debug_area(ena_dev);
4306 	ena_com_rss_destroy(ena_dev);
4307 err_free_msix:
4308 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4309 	/* stop submitting admin commands on a device that was reset */
4310 	ena_com_set_admin_running_state(ena_dev, false);
4311 	ena_free_mgmnt_irq(adapter);
4312 	ena_disable_msix(adapter);
4313 err_worker_destroy:
4314 	del_timer(&adapter->timer_service);
4315 err_netdev_destroy:
4316 	free_netdev(netdev);
4317 err_device_destroy:
4318 	ena_com_delete_host_info(ena_dev);
4319 	ena_com_admin_destroy(ena_dev);
4320 err_free_region:
4321 	ena_release_bars(ena_dev, pdev);
4322 err_free_ena_dev:
4323 	vfree(ena_dev);
4324 err_disable_device:
4325 	pci_disable_device(pdev);
4326 	return rc;
4327 }
4328 
4329 /*****************************************************************************/
4330 
4331 /* __ena_shutoff - Helper used in both PCI remove/shutdown routines
4332  * @pdev: PCI device information struct
4333  * @shutdown: Is it a shutdown operation? If false, means it is a removal
4334  *
4335  * __ena_shutoff is a helper routine that does the real work on shutdown and
4336  * removal paths; the difference between those paths is with regards to whether
4337  * dettach or unregister the netdevice.
4338  */
4339 static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
4340 {
4341 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4342 	struct ena_com_dev *ena_dev;
4343 	struct net_device *netdev;
4344 
4345 	ena_dev = adapter->ena_dev;
4346 	netdev = adapter->netdev;
4347 
4348 #ifdef CONFIG_RFS_ACCEL
4349 	if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4350 		free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4351 		netdev->rx_cpu_rmap = NULL;
4352 	}
4353 #endif /* CONFIG_RFS_ACCEL */
4354 	del_timer_sync(&adapter->timer_service);
4355 
4356 	cancel_work_sync(&adapter->reset_task);
4357 
4358 	rtnl_lock(); /* lock released inside the below if-else block */
4359 	ena_destroy_device(adapter, true);
4360 	if (shutdown) {
4361 		netif_device_detach(netdev);
4362 		dev_close(netdev);
4363 		rtnl_unlock();
4364 	} else {
4365 		rtnl_unlock();
4366 		unregister_netdev(netdev);
4367 		free_netdev(netdev);
4368 	}
4369 
4370 	ena_com_rss_destroy(ena_dev);
4371 
4372 	ena_com_delete_debug_area(ena_dev);
4373 
4374 	ena_com_delete_host_info(ena_dev);
4375 
4376 	ena_release_bars(ena_dev, pdev);
4377 
4378 	pci_disable_device(pdev);
4379 
4380 	vfree(ena_dev);
4381 }
4382 
4383 /* ena_remove - Device Removal Routine
4384  * @pdev: PCI device information struct
4385  *
4386  * ena_remove is called by the PCI subsystem to alert the driver
4387  * that it should release a PCI device.
4388  */
4389 
4390 static void ena_remove(struct pci_dev *pdev)
4391 {
4392 	__ena_shutoff(pdev, false);
4393 }
4394 
4395 /* ena_shutdown - Device Shutdown Routine
4396  * @pdev: PCI device information struct
4397  *
4398  * ena_shutdown is called by the PCI subsystem to alert the driver that
4399  * a shutdown/reboot (or kexec) is happening and device must be disabled.
4400  */
4401 
4402 static void ena_shutdown(struct pci_dev *pdev)
4403 {
4404 	__ena_shutoff(pdev, true);
4405 }
4406 
4407 #ifdef CONFIG_PM
4408 /* ena_suspend - PM suspend callback
4409  * @pdev: PCI device information struct
4410  * @state:power state
4411  */
4412 static int ena_suspend(struct pci_dev *pdev,  pm_message_t state)
4413 {
4414 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4415 
4416 	u64_stats_update_begin(&adapter->syncp);
4417 	adapter->dev_stats.suspend++;
4418 	u64_stats_update_end(&adapter->syncp);
4419 
4420 	rtnl_lock();
4421 	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4422 		dev_err(&pdev->dev,
4423 			"ignoring device reset request as the device is being suspended\n");
4424 		clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4425 	}
4426 	ena_destroy_device(adapter, true);
4427 	rtnl_unlock();
4428 	return 0;
4429 }
4430 
4431 /* ena_resume - PM resume callback
4432  * @pdev: PCI device information struct
4433  *
4434  */
4435 static int ena_resume(struct pci_dev *pdev)
4436 {
4437 	struct ena_adapter *adapter = pci_get_drvdata(pdev);
4438 	int rc;
4439 
4440 	u64_stats_update_begin(&adapter->syncp);
4441 	adapter->dev_stats.resume++;
4442 	u64_stats_update_end(&adapter->syncp);
4443 
4444 	rtnl_lock();
4445 	rc = ena_restore_device(adapter);
4446 	rtnl_unlock();
4447 	return rc;
4448 }
4449 #endif
4450 
4451 static struct pci_driver ena_pci_driver = {
4452 	.name		= DRV_MODULE_NAME,
4453 	.id_table	= ena_pci_tbl,
4454 	.probe		= ena_probe,
4455 	.remove		= ena_remove,
4456 	.shutdown	= ena_shutdown,
4457 #ifdef CONFIG_PM
4458 	.suspend    = ena_suspend,
4459 	.resume     = ena_resume,
4460 #endif
4461 	.sriov_configure = pci_sriov_configure_simple,
4462 };
4463 
4464 static int __init ena_init(void)
4465 {
4466 	ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4467 	if (!ena_wq) {
4468 		pr_err("Failed to create workqueue\n");
4469 		return -ENOMEM;
4470 	}
4471 
4472 	return pci_register_driver(&ena_pci_driver);
4473 }
4474 
4475 static void __exit ena_cleanup(void)
4476 {
4477 	pci_unregister_driver(&ena_pci_driver);
4478 
4479 	if (ena_wq) {
4480 		destroy_workqueue(ena_wq);
4481 		ena_wq = NULL;
4482 	}
4483 }
4484 
4485 /******************************************************************************
4486  ******************************** AENQ Handlers *******************************
4487  *****************************************************************************/
4488 /* ena_update_on_link_change:
4489  * Notify the network interface about the change in link status
4490  */
4491 static void ena_update_on_link_change(void *adapter_data,
4492 				      struct ena_admin_aenq_entry *aenq_e)
4493 {
4494 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4495 	struct ena_admin_aenq_link_change_desc *aenq_desc =
4496 		(struct ena_admin_aenq_link_change_desc *)aenq_e;
4497 	int status = aenq_desc->flags &
4498 		ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4499 
4500 	if (status) {
4501 		netdev_dbg(adapter->netdev, "%s\n", __func__);
4502 		set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4503 		if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4504 			netif_carrier_on(adapter->netdev);
4505 	} else {
4506 		clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4507 		netif_carrier_off(adapter->netdev);
4508 	}
4509 }
4510 
4511 static void ena_keep_alive_wd(void *adapter_data,
4512 			      struct ena_admin_aenq_entry *aenq_e)
4513 {
4514 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4515 	struct ena_admin_aenq_keep_alive_desc *desc;
4516 	u64 rx_drops;
4517 
4518 	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4519 	adapter->last_keep_alive_jiffies = jiffies;
4520 
4521 	rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4522 
4523 	u64_stats_update_begin(&adapter->syncp);
4524 	adapter->dev_stats.rx_drops = rx_drops;
4525 	u64_stats_update_end(&adapter->syncp);
4526 }
4527 
4528 static void ena_notification(void *adapter_data,
4529 			     struct ena_admin_aenq_entry *aenq_e)
4530 {
4531 	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4532 	struct ena_admin_ena_hw_hints *hints;
4533 
4534 	WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4535 	     "Invalid group(%x) expected %x\n",
4536 	     aenq_e->aenq_common_desc.group,
4537 	     ENA_ADMIN_NOTIFICATION);
4538 
4539 	switch (aenq_e->aenq_common_desc.syndrom) {
4540 	case ENA_ADMIN_UPDATE_HINTS:
4541 		hints = (struct ena_admin_ena_hw_hints *)
4542 			(&aenq_e->inline_data_w4);
4543 		ena_update_hints(adapter, hints);
4544 		break;
4545 	default:
4546 		netif_err(adapter, drv, adapter->netdev,
4547 			  "Invalid aenq notification link state %d\n",
4548 			  aenq_e->aenq_common_desc.syndrom);
4549 	}
4550 }
4551 
4552 /* This handler will called for unknown event group or unimplemented handlers*/
4553 static void unimplemented_aenq_handler(void *data,
4554 				       struct ena_admin_aenq_entry *aenq_e)
4555 {
4556 	struct ena_adapter *adapter = (struct ena_adapter *)data;
4557 
4558 	netif_err(adapter, drv, adapter->netdev,
4559 		  "Unknown event was received or event with unimplemented handler\n");
4560 }
4561 
4562 static struct ena_aenq_handlers aenq_handlers = {
4563 	.handlers = {
4564 		[ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4565 		[ENA_ADMIN_NOTIFICATION] = ena_notification,
4566 		[ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4567 	},
4568 	.unimplemented_handler = unimplemented_aenq_handler
4569 };
4570 
4571 module_init(ena_init);
4572 module_exit(ena_cleanup);
4573