1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card 4 * and other Tigon based cards. 5 * 6 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>. 7 * 8 * Thanks to Alteon and 3Com for providing hardware and documentation 9 * enabling me to write this driver. 10 * 11 * A mailing list for discussing the use of this driver has been 12 * setup, please subscribe to the lists if you have any questions 13 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to 14 * see how to subscribe. 15 * 16 * Additional credits: 17 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace 18 * dump support. The trace dump support has not been 19 * integrated yet however. 20 * Troy Benjegerdes: Big Endian (PPC) patches. 21 * Nate Stahl: Better out of memory handling and stats support. 22 * Aman Singla: Nasty race between interrupt handler and tx code dealing 23 * with 'testing the tx_ret_csm and setting tx_full' 24 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping 25 * infrastructure and Sparc support 26 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the 27 * driver under Linux/Sparc64 28 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards 29 * ETHTOOL_GDRVINFO support 30 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx 31 * handler and close() cleanup. 32 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether 33 * memory mapped IO is enabled to 34 * make the driver work on RS/6000. 35 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem 36 * where the driver would disable 37 * bus master mode if it had to disable 38 * write and invalidate. 39 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little 40 * endian systems. 41 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and 42 * rx producer index when 43 * flushing the Jumbo ring. 44 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the 45 * driver init path. 46 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes. 47 */ 48 49 #include <linux/module.h> 50 #include <linux/moduleparam.h> 51 #include <linux/types.h> 52 #include <linux/errno.h> 53 #include <linux/ioport.h> 54 #include <linux/pci.h> 55 #include <linux/dma-mapping.h> 56 #include <linux/kernel.h> 57 #include <linux/netdevice.h> 58 #include <linux/etherdevice.h> 59 #include <linux/skbuff.h> 60 #include <linux/delay.h> 61 #include <linux/mm.h> 62 #include <linux/highmem.h> 63 #include <linux/sockios.h> 64 #include <linux/firmware.h> 65 #include <linux/slab.h> 66 #include <linux/prefetch.h> 67 #include <linux/if_vlan.h> 68 69 #ifdef SIOCETHTOOL 70 #include <linux/ethtool.h> 71 #endif 72 73 #include <net/sock.h> 74 #include <net/ip.h> 75 76 #include <asm/io.h> 77 #include <asm/irq.h> 78 #include <asm/byteorder.h> 79 #include <linux/uaccess.h> 80 81 82 #define DRV_NAME "acenic" 83 84 #undef INDEX_DEBUG 85 86 #ifdef CONFIG_ACENIC_OMIT_TIGON_I 87 #define ACE_IS_TIGON_I(ap) 0 88 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES 89 #else 90 #define ACE_IS_TIGON_I(ap) (ap->version == 1) 91 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries 92 #endif 93 94 #ifndef PCI_VENDOR_ID_ALTEON 95 #define PCI_VENDOR_ID_ALTEON 0x12ae 96 #endif 97 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 98 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001 99 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002 100 #endif 101 #ifndef PCI_DEVICE_ID_3COM_3C985 102 #define PCI_DEVICE_ID_3COM_3C985 0x0001 103 #endif 104 #ifndef PCI_VENDOR_ID_NETGEAR 105 #define PCI_VENDOR_ID_NETGEAR 0x1385 106 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a 107 #endif 108 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T 109 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a 110 #endif 111 112 113 /* 114 * Farallon used the DEC vendor ID by mistake and they seem not 115 * to care - stinky! 116 */ 117 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX 118 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a 119 #endif 120 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T 121 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa 122 #endif 123 #ifndef PCI_VENDOR_ID_SGI 124 #define PCI_VENDOR_ID_SGI 0x10a9 125 #endif 126 #ifndef PCI_DEVICE_ID_SGI_ACENIC 127 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009 128 #endif 129 130 static const struct pci_device_id acenic_pci_tbl[] = { 131 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE, 132 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 133 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER, 134 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 135 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985, 136 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 137 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620, 138 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 139 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T, 140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 141 /* 142 * Farallon used the DEC vendor ID on their cards incorrectly, 143 * then later Alteon's ID. 144 */ 145 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX, 146 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 147 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T, 148 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 149 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC, 150 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 151 { } 152 }; 153 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl); 154 155 #define ace_sync_irq(irq) synchronize_irq(irq) 156 157 #ifndef offset_in_page 158 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK) 159 #endif 160 161 #define ACE_MAX_MOD_PARMS 8 162 #define BOARD_IDX_STATIC 0 163 #define BOARD_IDX_OVERFLOW -1 164 165 #include "acenic.h" 166 167 /* 168 * These must be defined before the firmware is included. 169 */ 170 #define MAX_TEXT_LEN 96*1024 171 #define MAX_RODATA_LEN 8*1024 172 #define MAX_DATA_LEN 2*1024 173 174 #ifndef tigon2FwReleaseLocal 175 #define tigon2FwReleaseLocal 0 176 #endif 177 178 /* 179 * This driver currently supports Tigon I and Tigon II based cards 180 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear 181 * GA620. The driver should also work on the SGI, DEC and Farallon 182 * versions of the card, however I have not been able to test that 183 * myself. 184 * 185 * This card is really neat, it supports receive hardware checksumming 186 * and jumbo frames (up to 9000 bytes) and does a lot of work in the 187 * firmware. Also the programming interface is quite neat, except for 188 * the parts dealing with the i2c eeprom on the card ;-) 189 * 190 * Using jumbo frames: 191 * 192 * To enable jumbo frames, simply specify an mtu between 1500 and 9000 193 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time 194 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet 195 * interface number and <MTU> being the MTU value. 196 * 197 * Module parameters: 198 * 199 * When compiled as a loadable module, the driver allows for a number 200 * of module parameters to be specified. The driver supports the 201 * following module parameters: 202 * 203 * trace=<val> - Firmware trace level. This requires special traced 204 * firmware to replace the firmware supplied with 205 * the driver - for debugging purposes only. 206 * 207 * link=<val> - Link state. Normally you want to use the default link 208 * parameters set by the driver. This can be used to 209 * override these in case your switch doesn't negotiate 210 * the link properly. Valid values are: 211 * 0x0001 - Force half duplex link. 212 * 0x0002 - Do not negotiate line speed with the other end. 213 * 0x0010 - 10Mbit/sec link. 214 * 0x0020 - 100Mbit/sec link. 215 * 0x0040 - 1000Mbit/sec link. 216 * 0x0100 - Do not negotiate flow control. 217 * 0x0200 - Enable RX flow control Y 218 * 0x0400 - Enable TX flow control Y (Tigon II NICs only). 219 * Default value is 0x0270, ie. enable link+flow 220 * control negotiation. Negotiating the highest 221 * possible link speed with RX flow control enabled. 222 * 223 * When disabling link speed negotiation, only one link 224 * speed is allowed to be specified! 225 * 226 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed 227 * to wait for more packets to arive before 228 * interrupting the host, from the time the first 229 * packet arrives. 230 * 231 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed 232 * to wait for more packets to arive in the transmit ring, 233 * before interrupting the host, after transmitting the 234 * first packet in the ring. 235 * 236 * max_tx_desc=<val> - maximum number of transmit descriptors 237 * (packets) transmitted before interrupting the host. 238 * 239 * max_rx_desc=<val> - maximum number of receive descriptors 240 * (packets) received before interrupting the host. 241 * 242 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th 243 * increments of the NIC's on board memory to be used for 244 * transmit and receive buffers. For the 1MB NIC app. 800KB 245 * is available, on the 1/2MB NIC app. 300KB is available. 246 * 68KB will always be available as a minimum for both 247 * directions. The default value is a 50/50 split. 248 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate 249 * operations, default (1) is to always disable this as 250 * that is what Alteon does on NT. I have not been able 251 * to measure any real performance differences with 252 * this on my systems. Set <val>=0 if you want to 253 * enable these operations. 254 * 255 * If you use more than one NIC, specify the parameters for the 256 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to 257 * run tracing on NIC #2 but not on NIC #1 and #3. 258 * 259 * TODO: 260 * 261 * - Proper multicast support. 262 * - NIC dump support. 263 * - More tuning parameters. 264 * 265 * The mini ring is not used under Linux and I am not sure it makes sense 266 * to actually use it. 267 * 268 * New interrupt handler strategy: 269 * 270 * The old interrupt handler worked using the traditional method of 271 * replacing an skbuff with a new one when a packet arrives. However 272 * the rx rings do not need to contain a static number of buffer 273 * descriptors, thus it makes sense to move the memory allocation out 274 * of the main interrupt handler and do it in a bottom half handler 275 * and only allocate new buffers when the number of buffers in the 276 * ring is below a certain threshold. In order to avoid starving the 277 * NIC under heavy load it is however necessary to force allocation 278 * when hitting a minimum threshold. The strategy for alloction is as 279 * follows: 280 * 281 * RX_LOW_BUF_THRES - allocate buffers in the bottom half 282 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate 283 * the buffers in the interrupt handler 284 * RX_RING_THRES - maximum number of buffers in the rx ring 285 * RX_MINI_THRES - maximum number of buffers in the mini ring 286 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring 287 * 288 * One advantagous side effect of this allocation approach is that the 289 * entire rx processing can be done without holding any spin lock 290 * since the rx rings and registers are totally independent of the tx 291 * ring and its registers. This of course includes the kmalloc's of 292 * new skb's. Thus start_xmit can run in parallel with rx processing 293 * and the memory allocation on SMP systems. 294 * 295 * Note that running the skb reallocation in a bottom half opens up 296 * another can of races which needs to be handled properly. In 297 * particular it can happen that the interrupt handler tries to run 298 * the reallocation while the bottom half is either running on another 299 * CPU or was interrupted on the same CPU. To get around this the 300 * driver uses bitops to prevent the reallocation routines from being 301 * reentered. 302 * 303 * TX handling can also be done without holding any spin lock, wheee 304 * this is fun! since tx_ret_csm is only written to by the interrupt 305 * handler. The case to be aware of is when shutting down the device 306 * and cleaning up where it is necessary to make sure that 307 * start_xmit() is not running while this is happening. Well DaveM 308 * informs me that this case is already protected against ... bye bye 309 * Mr. Spin Lock, it was nice to know you. 310 * 311 * TX interrupts are now partly disabled so the NIC will only generate 312 * TX interrupts for the number of coal ticks, not for the number of 313 * TX packets in the queue. This should reduce the number of TX only, 314 * ie. when no RX processing is done, interrupts seen. 315 */ 316 317 /* 318 * Threshold values for RX buffer allocation - the low water marks for 319 * when to start refilling the rings are set to 75% of the ring 320 * sizes. It seems to make sense to refill the rings entirely from the 321 * intrrupt handler once it gets below the panic threshold, that way 322 * we don't risk that the refilling is moved to another CPU when the 323 * one running the interrupt handler just got the slab code hot in its 324 * cache. 325 */ 326 #define RX_RING_SIZE 72 327 #define RX_MINI_SIZE 64 328 #define RX_JUMBO_SIZE 48 329 330 #define RX_PANIC_STD_THRES 16 331 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2 332 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4 333 #define RX_PANIC_MINI_THRES 12 334 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2 335 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4 336 #define RX_PANIC_JUMBO_THRES 6 337 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2 338 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4 339 340 341 /* 342 * Size of the mini ring entries, basically these just should be big 343 * enough to take TCP ACKs 344 */ 345 #define ACE_MINI_SIZE 100 346 347 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE 348 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4) 349 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4) 350 351 /* 352 * There seems to be a magic difference in the effect between 995 and 996 353 * but little difference between 900 and 995 ... no idea why. 354 * 355 * There is now a default set of tuning parameters which is set, depending 356 * on whether or not the user enables Jumbo frames. It's assumed that if 357 * Jumbo frames are enabled, the user wants optimal tuning for that case. 358 */ 359 #define DEF_TX_COAL 400 /* 996 */ 360 #define DEF_TX_MAX_DESC 60 /* was 40 */ 361 #define DEF_RX_COAL 120 /* 1000 */ 362 #define DEF_RX_MAX_DESC 25 363 #define DEF_TX_RATIO 21 /* 24 */ 364 365 #define DEF_JUMBO_TX_COAL 20 366 #define DEF_JUMBO_TX_MAX_DESC 60 367 #define DEF_JUMBO_RX_COAL 30 368 #define DEF_JUMBO_RX_MAX_DESC 6 369 #define DEF_JUMBO_TX_RATIO 21 370 371 #if tigon2FwReleaseLocal < 20001118 372 /* 373 * Standard firmware and early modifications duplicate 374 * IRQ load without this flag (coal timer is never reset). 375 * Note that with this flag tx_coal should be less than 376 * time to xmit full tx ring. 377 * 400usec is not so bad for tx ring size of 128. 378 */ 379 #define TX_COAL_INTS_ONLY 1 /* worth it */ 380 #else 381 /* 382 * With modified firmware, this is not necessary, but still useful. 383 */ 384 #define TX_COAL_INTS_ONLY 1 385 #endif 386 387 #define DEF_TRACE 0 388 #define DEF_STAT (2 * TICKS_PER_SEC) 389 390 391 static int link_state[ACE_MAX_MOD_PARMS]; 392 static int trace[ACE_MAX_MOD_PARMS]; 393 static int tx_coal_tick[ACE_MAX_MOD_PARMS]; 394 static int rx_coal_tick[ACE_MAX_MOD_PARMS]; 395 static int max_tx_desc[ACE_MAX_MOD_PARMS]; 396 static int max_rx_desc[ACE_MAX_MOD_PARMS]; 397 static int tx_ratio[ACE_MAX_MOD_PARMS]; 398 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1}; 399 400 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>"); 401 MODULE_LICENSE("GPL"); 402 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver"); 403 #ifndef CONFIG_ACENIC_OMIT_TIGON_I 404 MODULE_FIRMWARE("acenic/tg1.bin"); 405 #endif 406 MODULE_FIRMWARE("acenic/tg2.bin"); 407 408 module_param_array_named(link, link_state, int, NULL, 0); 409 module_param_array(trace, int, NULL, 0); 410 module_param_array(tx_coal_tick, int, NULL, 0); 411 module_param_array(max_tx_desc, int, NULL, 0); 412 module_param_array(rx_coal_tick, int, NULL, 0); 413 module_param_array(max_rx_desc, int, NULL, 0); 414 module_param_array(tx_ratio, int, NULL, 0); 415 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state"); 416 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level"); 417 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives"); 418 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait"); 419 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives"); 420 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait"); 421 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)"); 422 423 424 static const char version[] = 425 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n" 426 " http://home.cern.ch/~jes/gige/acenic.html\n"; 427 428 static int ace_get_link_ksettings(struct net_device *, 429 struct ethtool_link_ksettings *); 430 static int ace_set_link_ksettings(struct net_device *, 431 const struct ethtool_link_ksettings *); 432 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *); 433 434 static const struct ethtool_ops ace_ethtool_ops = { 435 .get_drvinfo = ace_get_drvinfo, 436 .get_link_ksettings = ace_get_link_ksettings, 437 .set_link_ksettings = ace_set_link_ksettings, 438 }; 439 440 static void ace_watchdog(struct net_device *dev, unsigned int txqueue); 441 442 static const struct net_device_ops ace_netdev_ops = { 443 .ndo_open = ace_open, 444 .ndo_stop = ace_close, 445 .ndo_tx_timeout = ace_watchdog, 446 .ndo_get_stats = ace_get_stats, 447 .ndo_start_xmit = ace_start_xmit, 448 .ndo_set_rx_mode = ace_set_multicast_list, 449 .ndo_validate_addr = eth_validate_addr, 450 .ndo_set_mac_address = ace_set_mac_addr, 451 .ndo_change_mtu = ace_change_mtu, 452 }; 453 454 static int acenic_probe_one(struct pci_dev *pdev, 455 const struct pci_device_id *id) 456 { 457 struct net_device *dev; 458 struct ace_private *ap; 459 static int boards_found; 460 461 dev = alloc_etherdev(sizeof(struct ace_private)); 462 if (dev == NULL) 463 return -ENOMEM; 464 465 SET_NETDEV_DEV(dev, &pdev->dev); 466 467 ap = netdev_priv(dev); 468 ap->ndev = dev; 469 ap->pdev = pdev; 470 ap->name = pci_name(pdev); 471 472 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; 473 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 474 475 dev->watchdog_timeo = 5*HZ; 476 dev->min_mtu = 0; 477 dev->max_mtu = ACE_JUMBO_MTU; 478 479 dev->netdev_ops = &ace_netdev_ops; 480 dev->ethtool_ops = &ace_ethtool_ops; 481 482 /* we only display this string ONCE */ 483 if (!boards_found) 484 printk(version); 485 486 if (pci_enable_device(pdev)) 487 goto fail_free_netdev; 488 489 /* 490 * Enable master mode before we start playing with the 491 * pci_command word since pci_set_master() will modify 492 * it. 493 */ 494 pci_set_master(pdev); 495 496 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command); 497 498 /* OpenFirmware on Mac's does not set this - DOH.. */ 499 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) { 500 printk(KERN_INFO "%s: Enabling PCI Memory Mapped " 501 "access - was not enabled by BIOS/Firmware\n", 502 ap->name); 503 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY; 504 pci_write_config_word(ap->pdev, PCI_COMMAND, 505 ap->pci_command); 506 wmb(); 507 } 508 509 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency); 510 if (ap->pci_latency <= 0x40) { 511 ap->pci_latency = 0x40; 512 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency); 513 } 514 515 /* 516 * Remap the regs into kernel space - this is abuse of 517 * dev->base_addr since it was means for I/O port 518 * addresses but who gives a damn. 519 */ 520 dev->base_addr = pci_resource_start(pdev, 0); 521 ap->regs = ioremap(dev->base_addr, 0x4000); 522 if (!ap->regs) { 523 printk(KERN_ERR "%s: Unable to map I/O register, " 524 "AceNIC %i will be disabled.\n", 525 ap->name, boards_found); 526 goto fail_free_netdev; 527 } 528 529 switch(pdev->vendor) { 530 case PCI_VENDOR_ID_ALTEON: 531 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) { 532 printk(KERN_INFO "%s: Farallon PN9100-T ", 533 ap->name); 534 } else { 535 printk(KERN_INFO "%s: Alteon AceNIC ", 536 ap->name); 537 } 538 break; 539 case PCI_VENDOR_ID_3COM: 540 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name); 541 break; 542 case PCI_VENDOR_ID_NETGEAR: 543 printk(KERN_INFO "%s: NetGear GA620 ", ap->name); 544 break; 545 case PCI_VENDOR_ID_DEC: 546 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) { 547 printk(KERN_INFO "%s: Farallon PN9000-SX ", 548 ap->name); 549 break; 550 } 551 fallthrough; 552 case PCI_VENDOR_ID_SGI: 553 printk(KERN_INFO "%s: SGI AceNIC ", ap->name); 554 break; 555 default: 556 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name); 557 break; 558 } 559 560 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr); 561 printk("irq %d\n", pdev->irq); 562 563 #ifdef CONFIG_ACENIC_OMIT_TIGON_I 564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { 565 printk(KERN_ERR "%s: Driver compiled without Tigon I" 566 " support - NIC disabled\n", dev->name); 567 goto fail_uninit; 568 } 569 #endif 570 571 if (ace_allocate_descriptors(dev)) 572 goto fail_free_netdev; 573 574 #ifdef MODULE 575 if (boards_found >= ACE_MAX_MOD_PARMS) 576 ap->board_idx = BOARD_IDX_OVERFLOW; 577 else 578 ap->board_idx = boards_found; 579 #else 580 ap->board_idx = BOARD_IDX_STATIC; 581 #endif 582 583 if (ace_init(dev)) 584 goto fail_free_netdev; 585 586 if (register_netdev(dev)) { 587 printk(KERN_ERR "acenic: device registration failed\n"); 588 goto fail_uninit; 589 } 590 ap->name = dev->name; 591 592 if (ap->pci_using_dac) 593 dev->features |= NETIF_F_HIGHDMA; 594 595 pci_set_drvdata(pdev, dev); 596 597 boards_found++; 598 return 0; 599 600 fail_uninit: 601 ace_init_cleanup(dev); 602 fail_free_netdev: 603 free_netdev(dev); 604 return -ENODEV; 605 } 606 607 static void acenic_remove_one(struct pci_dev *pdev) 608 { 609 struct net_device *dev = pci_get_drvdata(pdev); 610 struct ace_private *ap = netdev_priv(dev); 611 struct ace_regs __iomem *regs = ap->regs; 612 short i; 613 614 unregister_netdev(dev); 615 616 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); 617 if (ap->version >= 2) 618 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl); 619 620 /* 621 * This clears any pending interrupts 622 */ 623 writel(1, ®s->Mb0Lo); 624 readl(®s->CpuCtrl); /* flush */ 625 626 /* 627 * Make sure no other CPUs are processing interrupts 628 * on the card before the buffers are being released. 629 * Otherwise one might experience some `interesting' 630 * effects. 631 * 632 * Then release the RX buffers - jumbo buffers were 633 * already released in ace_close(). 634 */ 635 ace_sync_irq(dev->irq); 636 637 for (i = 0; i < RX_STD_RING_ENTRIES; i++) { 638 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb; 639 640 if (skb) { 641 struct ring_info *ringp; 642 dma_addr_t mapping; 643 644 ringp = &ap->skb->rx_std_skbuff[i]; 645 mapping = dma_unmap_addr(ringp, mapping); 646 dma_unmap_page(&ap->pdev->dev, mapping, 647 ACE_STD_BUFSIZE, DMA_FROM_DEVICE); 648 649 ap->rx_std_ring[i].size = 0; 650 ap->skb->rx_std_skbuff[i].skb = NULL; 651 dev_kfree_skb(skb); 652 } 653 } 654 655 if (ap->version >= 2) { 656 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) { 657 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb; 658 659 if (skb) { 660 struct ring_info *ringp; 661 dma_addr_t mapping; 662 663 ringp = &ap->skb->rx_mini_skbuff[i]; 664 mapping = dma_unmap_addr(ringp,mapping); 665 dma_unmap_page(&ap->pdev->dev, mapping, 666 ACE_MINI_BUFSIZE, 667 DMA_FROM_DEVICE); 668 669 ap->rx_mini_ring[i].size = 0; 670 ap->skb->rx_mini_skbuff[i].skb = NULL; 671 dev_kfree_skb(skb); 672 } 673 } 674 } 675 676 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) { 677 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb; 678 if (skb) { 679 struct ring_info *ringp; 680 dma_addr_t mapping; 681 682 ringp = &ap->skb->rx_jumbo_skbuff[i]; 683 mapping = dma_unmap_addr(ringp, mapping); 684 dma_unmap_page(&ap->pdev->dev, mapping, 685 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE); 686 687 ap->rx_jumbo_ring[i].size = 0; 688 ap->skb->rx_jumbo_skbuff[i].skb = NULL; 689 dev_kfree_skb(skb); 690 } 691 } 692 693 ace_init_cleanup(dev); 694 free_netdev(dev); 695 } 696 697 static struct pci_driver acenic_pci_driver = { 698 .name = "acenic", 699 .id_table = acenic_pci_tbl, 700 .probe = acenic_probe_one, 701 .remove = acenic_remove_one, 702 }; 703 704 static void ace_free_descriptors(struct net_device *dev) 705 { 706 struct ace_private *ap = netdev_priv(dev); 707 int size; 708 709 if (ap->rx_std_ring != NULL) { 710 size = (sizeof(struct rx_desc) * 711 (RX_STD_RING_ENTRIES + 712 RX_JUMBO_RING_ENTRIES + 713 RX_MINI_RING_ENTRIES + 714 RX_RETURN_RING_ENTRIES)); 715 dma_free_coherent(&ap->pdev->dev, size, ap->rx_std_ring, 716 ap->rx_ring_base_dma); 717 ap->rx_std_ring = NULL; 718 ap->rx_jumbo_ring = NULL; 719 ap->rx_mini_ring = NULL; 720 ap->rx_return_ring = NULL; 721 } 722 if (ap->evt_ring != NULL) { 723 size = (sizeof(struct event) * EVT_RING_ENTRIES); 724 dma_free_coherent(&ap->pdev->dev, size, ap->evt_ring, 725 ap->evt_ring_dma); 726 ap->evt_ring = NULL; 727 } 728 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) { 729 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES); 730 dma_free_coherent(&ap->pdev->dev, size, ap->tx_ring, 731 ap->tx_ring_dma); 732 } 733 ap->tx_ring = NULL; 734 735 if (ap->evt_prd != NULL) { 736 dma_free_coherent(&ap->pdev->dev, sizeof(u32), 737 (void *)ap->evt_prd, ap->evt_prd_dma); 738 ap->evt_prd = NULL; 739 } 740 if (ap->rx_ret_prd != NULL) { 741 dma_free_coherent(&ap->pdev->dev, sizeof(u32), 742 (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma); 743 ap->rx_ret_prd = NULL; 744 } 745 if (ap->tx_csm != NULL) { 746 dma_free_coherent(&ap->pdev->dev, sizeof(u32), 747 (void *)ap->tx_csm, ap->tx_csm_dma); 748 ap->tx_csm = NULL; 749 } 750 } 751 752 753 static int ace_allocate_descriptors(struct net_device *dev) 754 { 755 struct ace_private *ap = netdev_priv(dev); 756 int size; 757 758 size = (sizeof(struct rx_desc) * 759 (RX_STD_RING_ENTRIES + 760 RX_JUMBO_RING_ENTRIES + 761 RX_MINI_RING_ENTRIES + 762 RX_RETURN_RING_ENTRIES)); 763 764 ap->rx_std_ring = dma_alloc_coherent(&ap->pdev->dev, size, 765 &ap->rx_ring_base_dma, GFP_KERNEL); 766 if (ap->rx_std_ring == NULL) 767 goto fail; 768 769 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES; 770 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES; 771 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES; 772 773 size = (sizeof(struct event) * EVT_RING_ENTRIES); 774 775 ap->evt_ring = dma_alloc_coherent(&ap->pdev->dev, size, 776 &ap->evt_ring_dma, GFP_KERNEL); 777 778 if (ap->evt_ring == NULL) 779 goto fail; 780 781 /* 782 * Only allocate a host TX ring for the Tigon II, the Tigon I 783 * has to use PCI registers for this ;-( 784 */ 785 if (!ACE_IS_TIGON_I(ap)) { 786 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES); 787 788 ap->tx_ring = dma_alloc_coherent(&ap->pdev->dev, size, 789 &ap->tx_ring_dma, GFP_KERNEL); 790 791 if (ap->tx_ring == NULL) 792 goto fail; 793 } 794 795 ap->evt_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 796 &ap->evt_prd_dma, GFP_KERNEL); 797 if (ap->evt_prd == NULL) 798 goto fail; 799 800 ap->rx_ret_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 801 &ap->rx_ret_prd_dma, GFP_KERNEL); 802 if (ap->rx_ret_prd == NULL) 803 goto fail; 804 805 ap->tx_csm = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 806 &ap->tx_csm_dma, GFP_KERNEL); 807 if (ap->tx_csm == NULL) 808 goto fail; 809 810 return 0; 811 812 fail: 813 /* Clean up. */ 814 ace_init_cleanup(dev); 815 return 1; 816 } 817 818 819 /* 820 * Generic cleanup handling data allocated during init. Used when the 821 * module is unloaded or if an error occurs during initialization 822 */ 823 static void ace_init_cleanup(struct net_device *dev) 824 { 825 struct ace_private *ap; 826 827 ap = netdev_priv(dev); 828 829 ace_free_descriptors(dev); 830 831 if (ap->info) 832 dma_free_coherent(&ap->pdev->dev, sizeof(struct ace_info), 833 ap->info, ap->info_dma); 834 kfree(ap->skb); 835 kfree(ap->trace_buf); 836 837 if (dev->irq) 838 free_irq(dev->irq, dev); 839 840 iounmap(ap->regs); 841 } 842 843 844 /* 845 * Commands are considered to be slow. 846 */ 847 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd) 848 { 849 u32 idx; 850 851 idx = readl(®s->CmdPrd); 852 853 writel(*(u32 *)(cmd), ®s->CmdRng[idx]); 854 idx = (idx + 1) % CMD_RING_ENTRIES; 855 856 writel(idx, ®s->CmdPrd); 857 } 858 859 860 static int ace_init(struct net_device *dev) 861 { 862 struct ace_private *ap; 863 struct ace_regs __iomem *regs; 864 struct ace_info *info = NULL; 865 struct pci_dev *pdev; 866 unsigned long myjif; 867 u64 tmp_ptr; 868 u32 tig_ver, mac1, mac2, tmp, pci_state; 869 int board_idx, ecode = 0; 870 short i; 871 unsigned char cache_size; 872 u8 addr[ETH_ALEN]; 873 874 ap = netdev_priv(dev); 875 regs = ap->regs; 876 877 board_idx = ap->board_idx; 878 879 /* 880 * aman@sgi.com - its useful to do a NIC reset here to 881 * address the `Firmware not running' problem subsequent 882 * to any crashes involving the NIC 883 */ 884 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl); 885 readl(®s->HostCtrl); /* PCI write posting */ 886 udelay(5); 887 888 /* 889 * Don't access any other registers before this point! 890 */ 891 #ifdef __BIG_ENDIAN 892 /* 893 * This will most likely need BYTE_SWAP once we switch 894 * to using __raw_writel() 895 */ 896 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)), 897 ®s->HostCtrl); 898 #else 899 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)), 900 ®s->HostCtrl); 901 #endif 902 readl(®s->HostCtrl); /* PCI write posting */ 903 904 /* 905 * Stop the NIC CPU and clear pending interrupts 906 */ 907 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); 908 readl(®s->CpuCtrl); /* PCI write posting */ 909 writel(0, ®s->Mb0Lo); 910 911 tig_ver = readl(®s->HostCtrl) >> 28; 912 913 switch(tig_ver){ 914 #ifndef CONFIG_ACENIC_OMIT_TIGON_I 915 case 4: 916 case 5: 917 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ", 918 tig_ver, ap->firmware_major, ap->firmware_minor, 919 ap->firmware_fix); 920 writel(0, ®s->LocalCtrl); 921 ap->version = 1; 922 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES; 923 break; 924 #endif 925 case 6: 926 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ", 927 tig_ver, ap->firmware_major, ap->firmware_minor, 928 ap->firmware_fix); 929 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl); 930 readl(®s->CpuBCtrl); /* PCI write posting */ 931 /* 932 * The SRAM bank size does _not_ indicate the amount 933 * of memory on the card, it controls the _bank_ size! 934 * Ie. a 1MB AceNIC will have two banks of 512KB. 935 */ 936 writel(SRAM_BANK_512K, ®s->LocalCtrl); 937 writel(SYNC_SRAM_TIMING, ®s->MiscCfg); 938 ap->version = 2; 939 ap->tx_ring_entries = MAX_TX_RING_ENTRIES; 940 break; 941 default: 942 printk(KERN_WARNING " Unsupported Tigon version detected " 943 "(%i)\n", tig_ver); 944 ecode = -ENODEV; 945 goto init_error; 946 } 947 948 /* 949 * ModeStat _must_ be set after the SRAM settings as this change 950 * seems to corrupt the ModeStat and possible other registers. 951 * The SRAM settings survive resets and setting it to the same 952 * value a second time works as well. This is what caused the 953 * `Firmware not running' problem on the Tigon II. 954 */ 955 #ifdef __BIG_ENDIAN 956 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD | 957 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat); 958 #else 959 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | 960 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat); 961 #endif 962 readl(®s->ModeStat); /* PCI write posting */ 963 964 mac1 = 0; 965 for(i = 0; i < 4; i++) { 966 int t; 967 968 mac1 = mac1 << 8; 969 t = read_eeprom_byte(dev, 0x8c+i); 970 if (t < 0) { 971 ecode = -EIO; 972 goto init_error; 973 } else 974 mac1 |= (t & 0xff); 975 } 976 mac2 = 0; 977 for(i = 4; i < 8; i++) { 978 int t; 979 980 mac2 = mac2 << 8; 981 t = read_eeprom_byte(dev, 0x8c+i); 982 if (t < 0) { 983 ecode = -EIO; 984 goto init_error; 985 } else 986 mac2 |= (t & 0xff); 987 } 988 989 writel(mac1, ®s->MacAddrHi); 990 writel(mac2, ®s->MacAddrLo); 991 992 addr[0] = (mac1 >> 8) & 0xff; 993 addr[1] = mac1 & 0xff; 994 addr[2] = (mac2 >> 24) & 0xff; 995 addr[3] = (mac2 >> 16) & 0xff; 996 addr[4] = (mac2 >> 8) & 0xff; 997 addr[5] = mac2 & 0xff; 998 eth_hw_addr_set(dev, addr); 999 1000 printk("MAC: %pM\n", dev->dev_addr); 1001 1002 /* 1003 * Looks like this is necessary to deal with on all architectures, 1004 * even this %$#%$# N440BX Intel based thing doesn't get it right. 1005 * Ie. having two NICs in the machine, one will have the cache 1006 * line set at boot time, the other will not. 1007 */ 1008 pdev = ap->pdev; 1009 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size); 1010 cache_size <<= 2; 1011 if (cache_size != SMP_CACHE_BYTES) { 1012 printk(KERN_INFO " PCI cache line size set incorrectly " 1013 "(%i bytes) by BIOS/FW, ", cache_size); 1014 if (cache_size > SMP_CACHE_BYTES) 1015 printk("expecting %i\n", SMP_CACHE_BYTES); 1016 else { 1017 printk("correcting to %i\n", SMP_CACHE_BYTES); 1018 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 1019 SMP_CACHE_BYTES >> 2); 1020 } 1021 } 1022 1023 pci_state = readl(®s->PciState); 1024 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, " 1025 "latency: %i clks\n", 1026 (pci_state & PCI_32BIT) ? 32 : 64, 1027 (pci_state & PCI_66MHZ) ? 66 : 33, 1028 ap->pci_latency); 1029 1030 /* 1031 * Set the max DMA transfer size. Seems that for most systems 1032 * the performance is better when no MAX parameter is 1033 * set. However for systems enabling PCI write and invalidate, 1034 * DMA writes must be set to the L1 cache line size to get 1035 * optimal performance. 1036 * 1037 * The default is now to turn the PCI write and invalidate off 1038 * - that is what Alteon does for NT. 1039 */ 1040 tmp = READ_CMD_MEM | WRITE_CMD_MEM; 1041 if (ap->version >= 2) { 1042 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ)); 1043 /* 1044 * Tuning parameters only supported for 8 cards 1045 */ 1046 if (board_idx == BOARD_IDX_OVERFLOW || 1047 dis_pci_mem_inval[board_idx]) { 1048 if (ap->pci_command & PCI_COMMAND_INVALIDATE) { 1049 ap->pci_command &= ~PCI_COMMAND_INVALIDATE; 1050 pci_write_config_word(pdev, PCI_COMMAND, 1051 ap->pci_command); 1052 printk(KERN_INFO " Disabling PCI memory " 1053 "write and invalidate\n"); 1054 } 1055 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) { 1056 printk(KERN_INFO " PCI memory write & invalidate " 1057 "enabled by BIOS, enabling counter measures\n"); 1058 1059 switch(SMP_CACHE_BYTES) { 1060 case 16: 1061 tmp |= DMA_WRITE_MAX_16; 1062 break; 1063 case 32: 1064 tmp |= DMA_WRITE_MAX_32; 1065 break; 1066 case 64: 1067 tmp |= DMA_WRITE_MAX_64; 1068 break; 1069 case 128: 1070 tmp |= DMA_WRITE_MAX_128; 1071 break; 1072 default: 1073 printk(KERN_INFO " Cache line size %i not " 1074 "supported, PCI write and invalidate " 1075 "disabled\n", SMP_CACHE_BYTES); 1076 ap->pci_command &= ~PCI_COMMAND_INVALIDATE; 1077 pci_write_config_word(pdev, PCI_COMMAND, 1078 ap->pci_command); 1079 } 1080 } 1081 } 1082 1083 #ifdef __sparc__ 1084 /* 1085 * On this platform, we know what the best dma settings 1086 * are. We use 64-byte maximum bursts, because if we 1087 * burst larger than the cache line size (or even cross 1088 * a 64byte boundary in a single burst) the UltraSparc 1089 * PCI controller will disconnect at 64-byte multiples. 1090 * 1091 * Read-multiple will be properly enabled above, and when 1092 * set will give the PCI controller proper hints about 1093 * prefetching. 1094 */ 1095 tmp &= ~DMA_READ_WRITE_MASK; 1096 tmp |= DMA_READ_MAX_64; 1097 tmp |= DMA_WRITE_MAX_64; 1098 #endif 1099 #ifdef __alpha__ 1100 tmp &= ~DMA_READ_WRITE_MASK; 1101 tmp |= DMA_READ_MAX_128; 1102 /* 1103 * All the docs say MUST NOT. Well, I did. 1104 * Nothing terrible happens, if we load wrong size. 1105 * Bit w&i still works better! 1106 */ 1107 tmp |= DMA_WRITE_MAX_128; 1108 #endif 1109 writel(tmp, ®s->PciState); 1110 1111 #if 0 1112 /* 1113 * The Host PCI bus controller driver has to set FBB. 1114 * If all devices on that PCI bus support FBB, then the controller 1115 * can enable FBB support in the Host PCI Bus controller (or on 1116 * the PCI-PCI bridge if that applies). 1117 * -ggg 1118 */ 1119 /* 1120 * I have received reports from people having problems when this 1121 * bit is enabled. 1122 */ 1123 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) { 1124 printk(KERN_INFO " Enabling PCI Fast Back to Back\n"); 1125 ap->pci_command |= PCI_COMMAND_FAST_BACK; 1126 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command); 1127 } 1128 #endif 1129 1130 /* 1131 * Configure DMA attributes. 1132 */ 1133 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { 1134 ap->pci_using_dac = 1; 1135 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { 1136 ap->pci_using_dac = 0; 1137 } else { 1138 ecode = -ENODEV; 1139 goto init_error; 1140 } 1141 1142 /* 1143 * Initialize the generic info block and the command+event rings 1144 * and the control blocks for the transmit and receive rings 1145 * as they need to be setup once and for all. 1146 */ 1147 if (!(info = dma_alloc_coherent(&ap->pdev->dev, sizeof(struct ace_info), 1148 &ap->info_dma, GFP_KERNEL))) { 1149 ecode = -EAGAIN; 1150 goto init_error; 1151 } 1152 ap->info = info; 1153 1154 /* 1155 * Get the memory for the skb rings. 1156 */ 1157 if (!(ap->skb = kzalloc(sizeof(struct ace_skb), GFP_KERNEL))) { 1158 ecode = -EAGAIN; 1159 goto init_error; 1160 } 1161 1162 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED, 1163 DRV_NAME, dev); 1164 if (ecode) { 1165 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n", 1166 DRV_NAME, pdev->irq); 1167 goto init_error; 1168 } else 1169 dev->irq = pdev->irq; 1170 1171 #ifdef INDEX_DEBUG 1172 spin_lock_init(&ap->debug_lock); 1173 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1; 1174 ap->last_std_rx = 0; 1175 ap->last_mini_rx = 0; 1176 #endif 1177 1178 ecode = ace_load_firmware(dev); 1179 if (ecode) 1180 goto init_error; 1181 1182 ap->fw_running = 0; 1183 1184 tmp_ptr = ap->info_dma; 1185 writel(tmp_ptr >> 32, ®s->InfoPtrHi); 1186 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo); 1187 1188 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event)); 1189 1190 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma); 1191 info->evt_ctrl.flags = 0; 1192 1193 *(ap->evt_prd) = 0; 1194 wmb(); 1195 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma); 1196 writel(0, ®s->EvtCsm); 1197 1198 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100); 1199 info->cmd_ctrl.flags = 0; 1200 info->cmd_ctrl.max_len = 0; 1201 1202 for (i = 0; i < CMD_RING_ENTRIES; i++) 1203 writel(0, ®s->CmdRng[i]); 1204 1205 writel(0, ®s->CmdPrd); 1206 writel(0, ®s->CmdCsm); 1207 1208 tmp_ptr = ap->info_dma; 1209 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats); 1210 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr); 1211 1212 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma); 1213 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE; 1214 info->rx_std_ctrl.flags = 1215 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1216 1217 memset(ap->rx_std_ring, 0, 1218 RX_STD_RING_ENTRIES * sizeof(struct rx_desc)); 1219 1220 for (i = 0; i < RX_STD_RING_ENTRIES; i++) 1221 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM; 1222 1223 ap->rx_std_skbprd = 0; 1224 atomic_set(&ap->cur_rx_bufs, 0); 1225 1226 set_aceaddr(&info->rx_jumbo_ctrl.rngptr, 1227 (ap->rx_ring_base_dma + 1228 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES))); 1229 info->rx_jumbo_ctrl.max_len = 0; 1230 info->rx_jumbo_ctrl.flags = 1231 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1232 1233 memset(ap->rx_jumbo_ring, 0, 1234 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc)); 1235 1236 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) 1237 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO; 1238 1239 ap->rx_jumbo_skbprd = 0; 1240 atomic_set(&ap->cur_jumbo_bufs, 0); 1241 1242 memset(ap->rx_mini_ring, 0, 1243 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc)); 1244 1245 if (ap->version >= 2) { 1246 set_aceaddr(&info->rx_mini_ctrl.rngptr, 1247 (ap->rx_ring_base_dma + 1248 (sizeof(struct rx_desc) * 1249 (RX_STD_RING_ENTRIES + 1250 RX_JUMBO_RING_ENTRIES)))); 1251 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE; 1252 info->rx_mini_ctrl.flags = 1253 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST; 1254 1255 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) 1256 ap->rx_mini_ring[i].flags = 1257 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI; 1258 } else { 1259 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0); 1260 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE; 1261 info->rx_mini_ctrl.max_len = 0; 1262 } 1263 1264 ap->rx_mini_skbprd = 0; 1265 atomic_set(&ap->cur_mini_bufs, 0); 1266 1267 set_aceaddr(&info->rx_return_ctrl.rngptr, 1268 (ap->rx_ring_base_dma + 1269 (sizeof(struct rx_desc) * 1270 (RX_STD_RING_ENTRIES + 1271 RX_JUMBO_RING_ENTRIES + 1272 RX_MINI_RING_ENTRIES)))); 1273 info->rx_return_ctrl.flags = 0; 1274 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES; 1275 1276 memset(ap->rx_return_ring, 0, 1277 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc)); 1278 1279 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma); 1280 *(ap->rx_ret_prd) = 0; 1281 1282 writel(TX_RING_BASE, ®s->WinBase); 1283 1284 if (ACE_IS_TIGON_I(ap)) { 1285 ap->tx_ring = (__force struct tx_desc *) regs->Window; 1286 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES 1287 * sizeof(struct tx_desc)) / sizeof(u32); i++) 1288 writel(0, (__force void __iomem *)ap->tx_ring + i * 4); 1289 1290 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE); 1291 } else { 1292 memset(ap->tx_ring, 0, 1293 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc)); 1294 1295 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma); 1296 } 1297 1298 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap); 1299 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1300 1301 /* 1302 * The Tigon I does not like having the TX ring in host memory ;-( 1303 */ 1304 if (!ACE_IS_TIGON_I(ap)) 1305 tmp |= RCB_FLG_TX_HOST_RING; 1306 #if TX_COAL_INTS_ONLY 1307 tmp |= RCB_FLG_COAL_INT_ONLY; 1308 #endif 1309 info->tx_ctrl.flags = tmp; 1310 1311 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma); 1312 1313 /* 1314 * Potential item for tuning parameter 1315 */ 1316 #if 0 /* NO */ 1317 writel(DMA_THRESH_16W, ®s->DmaReadCfg); 1318 writel(DMA_THRESH_16W, ®s->DmaWriteCfg); 1319 #else 1320 writel(DMA_THRESH_8W, ®s->DmaReadCfg); 1321 writel(DMA_THRESH_8W, ®s->DmaWriteCfg); 1322 #endif 1323 1324 writel(0, ®s->MaskInt); 1325 writel(1, ®s->IfIdx); 1326 #if 0 1327 /* 1328 * McKinley boxes do not like us fiddling with AssistState 1329 * this early 1330 */ 1331 writel(1, ®s->AssistState); 1332 #endif 1333 1334 writel(DEF_STAT, ®s->TuneStatTicks); 1335 writel(DEF_TRACE, ®s->TuneTrace); 1336 1337 ace_set_rxtx_parms(dev, 0); 1338 1339 if (board_idx == BOARD_IDX_OVERFLOW) { 1340 printk(KERN_WARNING "%s: more than %i NICs detected, " 1341 "ignoring module parameters!\n", 1342 ap->name, ACE_MAX_MOD_PARMS); 1343 } else if (board_idx >= 0) { 1344 if (tx_coal_tick[board_idx]) 1345 writel(tx_coal_tick[board_idx], 1346 ®s->TuneTxCoalTicks); 1347 if (max_tx_desc[board_idx]) 1348 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc); 1349 1350 if (rx_coal_tick[board_idx]) 1351 writel(rx_coal_tick[board_idx], 1352 ®s->TuneRxCoalTicks); 1353 if (max_rx_desc[board_idx]) 1354 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc); 1355 1356 if (trace[board_idx]) 1357 writel(trace[board_idx], ®s->TuneTrace); 1358 1359 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64)) 1360 writel(tx_ratio[board_idx], ®s->TxBufRat); 1361 } 1362 1363 /* 1364 * Default link parameters 1365 */ 1366 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB | 1367 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE; 1368 if(ap->version >= 2) 1369 tmp |= LNK_TX_FLOW_CTL_Y; 1370 1371 /* 1372 * Override link default parameters 1373 */ 1374 if ((board_idx >= 0) && link_state[board_idx]) { 1375 int option = link_state[board_idx]; 1376 1377 tmp = LNK_ENABLE; 1378 1379 if (option & 0x01) { 1380 printk(KERN_INFO "%s: Setting half duplex link\n", 1381 ap->name); 1382 tmp &= ~LNK_FULL_DUPLEX; 1383 } 1384 if (option & 0x02) 1385 tmp &= ~LNK_NEGOTIATE; 1386 if (option & 0x10) 1387 tmp |= LNK_10MB; 1388 if (option & 0x20) 1389 tmp |= LNK_100MB; 1390 if (option & 0x40) 1391 tmp |= LNK_1000MB; 1392 if ((option & 0x70) == 0) { 1393 printk(KERN_WARNING "%s: No media speed specified, " 1394 "forcing auto negotiation\n", ap->name); 1395 tmp |= LNK_NEGOTIATE | LNK_1000MB | 1396 LNK_100MB | LNK_10MB; 1397 } 1398 if ((option & 0x100) == 0) 1399 tmp |= LNK_NEG_FCTL; 1400 else 1401 printk(KERN_INFO "%s: Disabling flow control " 1402 "negotiation\n", ap->name); 1403 if (option & 0x200) 1404 tmp |= LNK_RX_FLOW_CTL_Y; 1405 if ((option & 0x400) && (ap->version >= 2)) { 1406 printk(KERN_INFO "%s: Enabling TX flow control\n", 1407 ap->name); 1408 tmp |= LNK_TX_FLOW_CTL_Y; 1409 } 1410 } 1411 1412 ap->link = tmp; 1413 writel(tmp, ®s->TuneLink); 1414 if (ap->version >= 2) 1415 writel(tmp, ®s->TuneFastLink); 1416 1417 writel(ap->firmware_start, ®s->Pc); 1418 1419 writel(0, ®s->Mb0Lo); 1420 1421 /* 1422 * Set tx_csm before we start receiving interrupts, otherwise 1423 * the interrupt handler might think it is supposed to process 1424 * tx ints before we are up and running, which may cause a null 1425 * pointer access in the int handler. 1426 */ 1427 ap->cur_rx = 0; 1428 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0; 1429 1430 wmb(); 1431 ace_set_txprd(regs, ap, 0); 1432 writel(0, ®s->RxRetCsm); 1433 1434 /* 1435 * Enable DMA engine now. 1436 * If we do this sooner, Mckinley box pukes. 1437 * I assume it's because Tigon II DMA engine wants to check 1438 * *something* even before the CPU is started. 1439 */ 1440 writel(1, ®s->AssistState); /* enable DMA */ 1441 1442 /* 1443 * Start the NIC CPU 1444 */ 1445 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl); 1446 readl(®s->CpuCtrl); 1447 1448 /* 1449 * Wait for the firmware to spin up - max 3 seconds. 1450 */ 1451 myjif = jiffies + 3 * HZ; 1452 while (time_before(jiffies, myjif) && !ap->fw_running) 1453 cpu_relax(); 1454 1455 if (!ap->fw_running) { 1456 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name); 1457 1458 ace_dump_trace(ap); 1459 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); 1460 readl(®s->CpuCtrl); 1461 1462 /* aman@sgi.com - account for badly behaving firmware/NIC: 1463 * - have observed that the NIC may continue to generate 1464 * interrupts for some reason; attempt to stop it - halt 1465 * second CPU for Tigon II cards, and also clear Mb0 1466 * - if we're a module, we'll fail to load if this was 1467 * the only GbE card in the system => if the kernel does 1468 * see an interrupt from the NIC, code to handle it is 1469 * gone and OOps! - so free_irq also 1470 */ 1471 if (ap->version >= 2) 1472 writel(readl(®s->CpuBCtrl) | CPU_HALT, 1473 ®s->CpuBCtrl); 1474 writel(0, ®s->Mb0Lo); 1475 readl(®s->Mb0Lo); 1476 1477 ecode = -EBUSY; 1478 goto init_error; 1479 } 1480 1481 /* 1482 * We load the ring here as there seem to be no way to tell the 1483 * firmware to wipe the ring without re-initializing it. 1484 */ 1485 if (!test_and_set_bit(0, &ap->std_refill_busy)) 1486 ace_load_std_rx_ring(dev, RX_RING_SIZE); 1487 else 1488 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n", 1489 ap->name); 1490 if (ap->version >= 2) { 1491 if (!test_and_set_bit(0, &ap->mini_refill_busy)) 1492 ace_load_mini_rx_ring(dev, RX_MINI_SIZE); 1493 else 1494 printk(KERN_ERR "%s: Someone is busy refilling " 1495 "the RX mini ring\n", ap->name); 1496 } 1497 return 0; 1498 1499 init_error: 1500 ace_init_cleanup(dev); 1501 return ecode; 1502 } 1503 1504 1505 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo) 1506 { 1507 struct ace_private *ap = netdev_priv(dev); 1508 struct ace_regs __iomem *regs = ap->regs; 1509 int board_idx = ap->board_idx; 1510 1511 if (board_idx >= 0) { 1512 if (!jumbo) { 1513 if (!tx_coal_tick[board_idx]) 1514 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks); 1515 if (!max_tx_desc[board_idx]) 1516 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc); 1517 if (!rx_coal_tick[board_idx]) 1518 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks); 1519 if (!max_rx_desc[board_idx]) 1520 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc); 1521 if (!tx_ratio[board_idx]) 1522 writel(DEF_TX_RATIO, ®s->TxBufRat); 1523 } else { 1524 if (!tx_coal_tick[board_idx]) 1525 writel(DEF_JUMBO_TX_COAL, 1526 ®s->TuneTxCoalTicks); 1527 if (!max_tx_desc[board_idx]) 1528 writel(DEF_JUMBO_TX_MAX_DESC, 1529 ®s->TuneMaxTxDesc); 1530 if (!rx_coal_tick[board_idx]) 1531 writel(DEF_JUMBO_RX_COAL, 1532 ®s->TuneRxCoalTicks); 1533 if (!max_rx_desc[board_idx]) 1534 writel(DEF_JUMBO_RX_MAX_DESC, 1535 ®s->TuneMaxRxDesc); 1536 if (!tx_ratio[board_idx]) 1537 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat); 1538 } 1539 } 1540 } 1541 1542 1543 static void ace_watchdog(struct net_device *data, unsigned int txqueue) 1544 { 1545 struct net_device *dev = data; 1546 struct ace_private *ap = netdev_priv(dev); 1547 struct ace_regs __iomem *regs = ap->regs; 1548 1549 /* 1550 * We haven't received a stats update event for more than 2.5 1551 * seconds and there is data in the transmit queue, thus we 1552 * assume the card is stuck. 1553 */ 1554 if (*ap->tx_csm != ap->tx_ret_csm) { 1555 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n", 1556 dev->name, (unsigned int)readl(®s->HostCtrl)); 1557 /* This can happen due to ieee flow control. */ 1558 } else { 1559 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n", 1560 dev->name); 1561 #if 0 1562 netif_wake_queue(dev); 1563 #endif 1564 } 1565 } 1566 1567 1568 static void ace_tasklet(struct tasklet_struct *t) 1569 { 1570 struct ace_private *ap = from_tasklet(ap, t, ace_tasklet); 1571 struct net_device *dev = ap->ndev; 1572 int cur_size; 1573 1574 cur_size = atomic_read(&ap->cur_rx_bufs); 1575 if ((cur_size < RX_LOW_STD_THRES) && 1576 !test_and_set_bit(0, &ap->std_refill_busy)) { 1577 #ifdef DEBUG 1578 printk("refilling buffers (current %i)\n", cur_size); 1579 #endif 1580 ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size); 1581 } 1582 1583 if (ap->version >= 2) { 1584 cur_size = atomic_read(&ap->cur_mini_bufs); 1585 if ((cur_size < RX_LOW_MINI_THRES) && 1586 !test_and_set_bit(0, &ap->mini_refill_busy)) { 1587 #ifdef DEBUG 1588 printk("refilling mini buffers (current %i)\n", 1589 cur_size); 1590 #endif 1591 ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size); 1592 } 1593 } 1594 1595 cur_size = atomic_read(&ap->cur_jumbo_bufs); 1596 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) && 1597 !test_and_set_bit(0, &ap->jumbo_refill_busy)) { 1598 #ifdef DEBUG 1599 printk("refilling jumbo buffers (current %i)\n", cur_size); 1600 #endif 1601 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size); 1602 } 1603 ap->tasklet_pending = 0; 1604 } 1605 1606 1607 /* 1608 * Copy the contents of the NIC's trace buffer to kernel memory. 1609 */ 1610 static void ace_dump_trace(struct ace_private *ap) 1611 { 1612 #if 0 1613 if (!ap->trace_buf) 1614 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL))) 1615 return; 1616 #endif 1617 } 1618 1619 1620 /* 1621 * Load the standard rx ring. 1622 * 1623 * Loading rings is safe without holding the spin lock since this is 1624 * done only before the device is enabled, thus no interrupts are 1625 * generated and by the interrupt handler/tasklet handler. 1626 */ 1627 static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs) 1628 { 1629 struct ace_private *ap = netdev_priv(dev); 1630 struct ace_regs __iomem *regs = ap->regs; 1631 short i, idx; 1632 1633 1634 prefetchw(&ap->cur_rx_bufs); 1635 1636 idx = ap->rx_std_skbprd; 1637 1638 for (i = 0; i < nr_bufs; i++) { 1639 struct sk_buff *skb; 1640 struct rx_desc *rd; 1641 dma_addr_t mapping; 1642 1643 skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE); 1644 if (!skb) 1645 break; 1646 1647 mapping = dma_map_page(&ap->pdev->dev, 1648 virt_to_page(skb->data), 1649 offset_in_page(skb->data), 1650 ACE_STD_BUFSIZE, DMA_FROM_DEVICE); 1651 ap->skb->rx_std_skbuff[idx].skb = skb; 1652 dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx], 1653 mapping, mapping); 1654 1655 rd = &ap->rx_std_ring[idx]; 1656 set_aceaddr(&rd->addr, mapping); 1657 rd->size = ACE_STD_BUFSIZE; 1658 rd->idx = idx; 1659 idx = (idx + 1) % RX_STD_RING_ENTRIES; 1660 } 1661 1662 if (!i) 1663 goto error_out; 1664 1665 atomic_add(i, &ap->cur_rx_bufs); 1666 ap->rx_std_skbprd = idx; 1667 1668 if (ACE_IS_TIGON_I(ap)) { 1669 struct cmd cmd; 1670 cmd.evt = C_SET_RX_PRD_IDX; 1671 cmd.code = 0; 1672 cmd.idx = ap->rx_std_skbprd; 1673 ace_issue_cmd(regs, &cmd); 1674 } else { 1675 writel(idx, ®s->RxStdPrd); 1676 wmb(); 1677 } 1678 1679 out: 1680 clear_bit(0, &ap->std_refill_busy); 1681 return; 1682 1683 error_out: 1684 printk(KERN_INFO "Out of memory when allocating " 1685 "standard receive buffers\n"); 1686 goto out; 1687 } 1688 1689 1690 static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs) 1691 { 1692 struct ace_private *ap = netdev_priv(dev); 1693 struct ace_regs __iomem *regs = ap->regs; 1694 short i, idx; 1695 1696 prefetchw(&ap->cur_mini_bufs); 1697 1698 idx = ap->rx_mini_skbprd; 1699 for (i = 0; i < nr_bufs; i++) { 1700 struct sk_buff *skb; 1701 struct rx_desc *rd; 1702 dma_addr_t mapping; 1703 1704 skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE); 1705 if (!skb) 1706 break; 1707 1708 mapping = dma_map_page(&ap->pdev->dev, 1709 virt_to_page(skb->data), 1710 offset_in_page(skb->data), 1711 ACE_MINI_BUFSIZE, DMA_FROM_DEVICE); 1712 ap->skb->rx_mini_skbuff[idx].skb = skb; 1713 dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx], 1714 mapping, mapping); 1715 1716 rd = &ap->rx_mini_ring[idx]; 1717 set_aceaddr(&rd->addr, mapping); 1718 rd->size = ACE_MINI_BUFSIZE; 1719 rd->idx = idx; 1720 idx = (idx + 1) % RX_MINI_RING_ENTRIES; 1721 } 1722 1723 if (!i) 1724 goto error_out; 1725 1726 atomic_add(i, &ap->cur_mini_bufs); 1727 1728 ap->rx_mini_skbprd = idx; 1729 1730 writel(idx, ®s->RxMiniPrd); 1731 wmb(); 1732 1733 out: 1734 clear_bit(0, &ap->mini_refill_busy); 1735 return; 1736 error_out: 1737 printk(KERN_INFO "Out of memory when allocating " 1738 "mini receive buffers\n"); 1739 goto out; 1740 } 1741 1742 1743 /* 1744 * Load the jumbo rx ring, this may happen at any time if the MTU 1745 * is changed to a value > 1500. 1746 */ 1747 static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs) 1748 { 1749 struct ace_private *ap = netdev_priv(dev); 1750 struct ace_regs __iomem *regs = ap->regs; 1751 short i, idx; 1752 1753 idx = ap->rx_jumbo_skbprd; 1754 1755 for (i = 0; i < nr_bufs; i++) { 1756 struct sk_buff *skb; 1757 struct rx_desc *rd; 1758 dma_addr_t mapping; 1759 1760 skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE); 1761 if (!skb) 1762 break; 1763 1764 mapping = dma_map_page(&ap->pdev->dev, 1765 virt_to_page(skb->data), 1766 offset_in_page(skb->data), 1767 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE); 1768 ap->skb->rx_jumbo_skbuff[idx].skb = skb; 1769 dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx], 1770 mapping, mapping); 1771 1772 rd = &ap->rx_jumbo_ring[idx]; 1773 set_aceaddr(&rd->addr, mapping); 1774 rd->size = ACE_JUMBO_BUFSIZE; 1775 rd->idx = idx; 1776 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES; 1777 } 1778 1779 if (!i) 1780 goto error_out; 1781 1782 atomic_add(i, &ap->cur_jumbo_bufs); 1783 ap->rx_jumbo_skbprd = idx; 1784 1785 if (ACE_IS_TIGON_I(ap)) { 1786 struct cmd cmd; 1787 cmd.evt = C_SET_RX_JUMBO_PRD_IDX; 1788 cmd.code = 0; 1789 cmd.idx = ap->rx_jumbo_skbprd; 1790 ace_issue_cmd(regs, &cmd); 1791 } else { 1792 writel(idx, ®s->RxJumboPrd); 1793 wmb(); 1794 } 1795 1796 out: 1797 clear_bit(0, &ap->jumbo_refill_busy); 1798 return; 1799 error_out: 1800 if (net_ratelimit()) 1801 printk(KERN_INFO "Out of memory when allocating " 1802 "jumbo receive buffers\n"); 1803 goto out; 1804 } 1805 1806 1807 /* 1808 * All events are considered to be slow (RX/TX ints do not generate 1809 * events) and are handled here, outside the main interrupt handler, 1810 * to reduce the size of the handler. 1811 */ 1812 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd) 1813 { 1814 struct ace_private *ap; 1815 1816 ap = netdev_priv(dev); 1817 1818 while (evtcsm != evtprd) { 1819 switch (ap->evt_ring[evtcsm].evt) { 1820 case E_FW_RUNNING: 1821 printk(KERN_INFO "%s: Firmware up and running\n", 1822 ap->name); 1823 ap->fw_running = 1; 1824 wmb(); 1825 break; 1826 case E_STATS_UPDATED: 1827 break; 1828 case E_LNK_STATE: 1829 { 1830 u16 code = ap->evt_ring[evtcsm].code; 1831 switch (code) { 1832 case E_C_LINK_UP: 1833 { 1834 u32 state = readl(&ap->regs->GigLnkState); 1835 printk(KERN_WARNING "%s: Optical link UP " 1836 "(%s Duplex, Flow Control: %s%s)\n", 1837 ap->name, 1838 state & LNK_FULL_DUPLEX ? "Full":"Half", 1839 state & LNK_TX_FLOW_CTL_Y ? "TX " : "", 1840 state & LNK_RX_FLOW_CTL_Y ? "RX" : ""); 1841 break; 1842 } 1843 case E_C_LINK_DOWN: 1844 printk(KERN_WARNING "%s: Optical link DOWN\n", 1845 ap->name); 1846 break; 1847 case E_C_LINK_10_100: 1848 printk(KERN_WARNING "%s: 10/100BaseT link " 1849 "UP\n", ap->name); 1850 break; 1851 default: 1852 printk(KERN_ERR "%s: Unknown optical link " 1853 "state %02x\n", ap->name, code); 1854 } 1855 break; 1856 } 1857 case E_ERROR: 1858 switch(ap->evt_ring[evtcsm].code) { 1859 case E_C_ERR_INVAL_CMD: 1860 printk(KERN_ERR "%s: invalid command error\n", 1861 ap->name); 1862 break; 1863 case E_C_ERR_UNIMP_CMD: 1864 printk(KERN_ERR "%s: unimplemented command " 1865 "error\n", ap->name); 1866 break; 1867 case E_C_ERR_BAD_CFG: 1868 printk(KERN_ERR "%s: bad config error\n", 1869 ap->name); 1870 break; 1871 default: 1872 printk(KERN_ERR "%s: unknown error %02x\n", 1873 ap->name, ap->evt_ring[evtcsm].code); 1874 } 1875 break; 1876 case E_RESET_JUMBO_RNG: 1877 { 1878 int i; 1879 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) { 1880 if (ap->skb->rx_jumbo_skbuff[i].skb) { 1881 ap->rx_jumbo_ring[i].size = 0; 1882 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0); 1883 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb); 1884 ap->skb->rx_jumbo_skbuff[i].skb = NULL; 1885 } 1886 } 1887 1888 if (ACE_IS_TIGON_I(ap)) { 1889 struct cmd cmd; 1890 cmd.evt = C_SET_RX_JUMBO_PRD_IDX; 1891 cmd.code = 0; 1892 cmd.idx = 0; 1893 ace_issue_cmd(ap->regs, &cmd); 1894 } else { 1895 writel(0, &((ap->regs)->RxJumboPrd)); 1896 wmb(); 1897 } 1898 1899 ap->jumbo = 0; 1900 ap->rx_jumbo_skbprd = 0; 1901 printk(KERN_INFO "%s: Jumbo ring flushed\n", 1902 ap->name); 1903 clear_bit(0, &ap->jumbo_refill_busy); 1904 break; 1905 } 1906 default: 1907 printk(KERN_ERR "%s: Unhandled event 0x%02x\n", 1908 ap->name, ap->evt_ring[evtcsm].evt); 1909 } 1910 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES; 1911 } 1912 1913 return evtcsm; 1914 } 1915 1916 1917 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm) 1918 { 1919 struct ace_private *ap = netdev_priv(dev); 1920 u32 idx; 1921 int mini_count = 0, std_count = 0; 1922 1923 idx = rxretcsm; 1924 1925 prefetchw(&ap->cur_rx_bufs); 1926 prefetchw(&ap->cur_mini_bufs); 1927 1928 while (idx != rxretprd) { 1929 struct ring_info *rip; 1930 struct sk_buff *skb; 1931 struct rx_desc *retdesc; 1932 u32 skbidx; 1933 int bd_flags, desc_type, mapsize; 1934 u16 csum; 1935 1936 1937 /* make sure the rx descriptor isn't read before rxretprd */ 1938 if (idx == rxretcsm) 1939 rmb(); 1940 1941 retdesc = &ap->rx_return_ring[idx]; 1942 skbidx = retdesc->idx; 1943 bd_flags = retdesc->flags; 1944 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI); 1945 1946 switch(desc_type) { 1947 /* 1948 * Normal frames do not have any flags set 1949 * 1950 * Mini and normal frames arrive frequently, 1951 * so use a local counter to avoid doing 1952 * atomic operations for each packet arriving. 1953 */ 1954 case 0: 1955 rip = &ap->skb->rx_std_skbuff[skbidx]; 1956 mapsize = ACE_STD_BUFSIZE; 1957 std_count++; 1958 break; 1959 case BD_FLG_JUMBO: 1960 rip = &ap->skb->rx_jumbo_skbuff[skbidx]; 1961 mapsize = ACE_JUMBO_BUFSIZE; 1962 atomic_dec(&ap->cur_jumbo_bufs); 1963 break; 1964 case BD_FLG_MINI: 1965 rip = &ap->skb->rx_mini_skbuff[skbidx]; 1966 mapsize = ACE_MINI_BUFSIZE; 1967 mini_count++; 1968 break; 1969 default: 1970 printk(KERN_INFO "%s: unknown frame type (0x%02x) " 1971 "returned by NIC\n", dev->name, 1972 retdesc->flags); 1973 goto error; 1974 } 1975 1976 skb = rip->skb; 1977 rip->skb = NULL; 1978 dma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping), 1979 mapsize, DMA_FROM_DEVICE); 1980 skb_put(skb, retdesc->size); 1981 1982 /* 1983 * Fly baby, fly! 1984 */ 1985 csum = retdesc->tcp_udp_csum; 1986 1987 skb->protocol = eth_type_trans(skb, dev); 1988 1989 /* 1990 * Instead of forcing the poor tigon mips cpu to calculate 1991 * pseudo hdr checksum, we do this ourselves. 1992 */ 1993 if (bd_flags & BD_FLG_TCP_UDP_SUM) { 1994 skb->csum = htons(csum); 1995 skb->ip_summed = CHECKSUM_COMPLETE; 1996 } else { 1997 skb_checksum_none_assert(skb); 1998 } 1999 2000 /* send it up */ 2001 if ((bd_flags & BD_FLG_VLAN_TAG)) 2002 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), retdesc->vlan); 2003 netif_rx(skb); 2004 2005 dev->stats.rx_packets++; 2006 dev->stats.rx_bytes += retdesc->size; 2007 2008 idx = (idx + 1) % RX_RETURN_RING_ENTRIES; 2009 } 2010 2011 atomic_sub(std_count, &ap->cur_rx_bufs); 2012 if (!ACE_IS_TIGON_I(ap)) 2013 atomic_sub(mini_count, &ap->cur_mini_bufs); 2014 2015 out: 2016 /* 2017 * According to the documentation RxRetCsm is obsolete with 2018 * the 12.3.x Firmware - my Tigon I NICs seem to disagree! 2019 */ 2020 if (ACE_IS_TIGON_I(ap)) { 2021 writel(idx, &ap->regs->RxRetCsm); 2022 } 2023 ap->cur_rx = idx; 2024 2025 return; 2026 error: 2027 idx = rxretprd; 2028 goto out; 2029 } 2030 2031 2032 static inline void ace_tx_int(struct net_device *dev, 2033 u32 txcsm, u32 idx) 2034 { 2035 struct ace_private *ap = netdev_priv(dev); 2036 2037 do { 2038 struct sk_buff *skb; 2039 struct tx_ring_info *info; 2040 2041 info = ap->skb->tx_skbuff + idx; 2042 skb = info->skb; 2043 2044 if (dma_unmap_len(info, maplen)) { 2045 dma_unmap_page(&ap->pdev->dev, 2046 dma_unmap_addr(info, mapping), 2047 dma_unmap_len(info, maplen), 2048 DMA_TO_DEVICE); 2049 dma_unmap_len_set(info, maplen, 0); 2050 } 2051 2052 if (skb) { 2053 dev->stats.tx_packets++; 2054 dev->stats.tx_bytes += skb->len; 2055 dev_consume_skb_irq(skb); 2056 info->skb = NULL; 2057 } 2058 2059 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2060 } while (idx != txcsm); 2061 2062 if (netif_queue_stopped(dev)) 2063 netif_wake_queue(dev); 2064 2065 wmb(); 2066 ap->tx_ret_csm = txcsm; 2067 2068 /* So... tx_ret_csm is advanced _after_ check for device wakeup. 2069 * 2070 * We could try to make it before. In this case we would get 2071 * the following race condition: hard_start_xmit on other cpu 2072 * enters after we advanced tx_ret_csm and fills space, 2073 * which we have just freed, so that we make illegal device wakeup. 2074 * There is no good way to workaround this (at entry 2075 * to ace_start_xmit detects this condition and prevents 2076 * ring corruption, but it is not a good workaround.) 2077 * 2078 * When tx_ret_csm is advanced after, we wake up device _only_ 2079 * if we really have some space in ring (though the core doing 2080 * hard_start_xmit can see full ring for some period and has to 2081 * synchronize.) Superb. 2082 * BUT! We get another subtle race condition. hard_start_xmit 2083 * may think that ring is full between wakeup and advancing 2084 * tx_ret_csm and will stop device instantly! It is not so bad. 2085 * We are guaranteed that there is something in ring, so that 2086 * the next irq will resume transmission. To speedup this we could 2087 * mark descriptor, which closes ring with BD_FLG_COAL_NOW 2088 * (see ace_start_xmit). 2089 * 2090 * Well, this dilemma exists in all lock-free devices. 2091 * We, following scheme used in drivers by Donald Becker, 2092 * select the least dangerous. 2093 * --ANK 2094 */ 2095 } 2096 2097 2098 static irqreturn_t ace_interrupt(int irq, void *dev_id) 2099 { 2100 struct net_device *dev = (struct net_device *)dev_id; 2101 struct ace_private *ap = netdev_priv(dev); 2102 struct ace_regs __iomem *regs = ap->regs; 2103 u32 idx; 2104 u32 txcsm, rxretcsm, rxretprd; 2105 u32 evtcsm, evtprd; 2106 2107 /* 2108 * In case of PCI shared interrupts or spurious interrupts, 2109 * we want to make sure it is actually our interrupt before 2110 * spending any time in here. 2111 */ 2112 if (!(readl(®s->HostCtrl) & IN_INT)) 2113 return IRQ_NONE; 2114 2115 /* 2116 * ACK intr now. Otherwise we will lose updates to rx_ret_prd, 2117 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before 2118 * writel(0, ®s->Mb0Lo). 2119 * 2120 * "IRQ avoidance" recommended in docs applies to IRQs served 2121 * threads and it is wrong even for that case. 2122 */ 2123 writel(0, ®s->Mb0Lo); 2124 readl(®s->Mb0Lo); 2125 2126 /* 2127 * There is no conflict between transmit handling in 2128 * start_xmit and receive processing, thus there is no reason 2129 * to take a spin lock for RX handling. Wait until we start 2130 * working on the other stuff - hey we don't need a spin lock 2131 * anymore. 2132 */ 2133 rxretprd = *ap->rx_ret_prd; 2134 rxretcsm = ap->cur_rx; 2135 2136 if (rxretprd != rxretcsm) 2137 ace_rx_int(dev, rxretprd, rxretcsm); 2138 2139 txcsm = *ap->tx_csm; 2140 idx = ap->tx_ret_csm; 2141 2142 if (txcsm != idx) { 2143 /* 2144 * If each skb takes only one descriptor this check degenerates 2145 * to identity, because new space has just been opened. 2146 * But if skbs are fragmented we must check that this index 2147 * update releases enough of space, otherwise we just 2148 * wait for device to make more work. 2149 */ 2150 if (!tx_ring_full(ap, txcsm, ap->tx_prd)) 2151 ace_tx_int(dev, txcsm, idx); 2152 } 2153 2154 evtcsm = readl(®s->EvtCsm); 2155 evtprd = *ap->evt_prd; 2156 2157 if (evtcsm != evtprd) { 2158 evtcsm = ace_handle_event(dev, evtcsm, evtprd); 2159 writel(evtcsm, ®s->EvtCsm); 2160 } 2161 2162 /* 2163 * This has to go last in the interrupt handler and run with 2164 * the spin lock released ... what lock? 2165 */ 2166 if (netif_running(dev)) { 2167 int cur_size; 2168 int run_tasklet = 0; 2169 2170 cur_size = atomic_read(&ap->cur_rx_bufs); 2171 if (cur_size < RX_LOW_STD_THRES) { 2172 if ((cur_size < RX_PANIC_STD_THRES) && 2173 !test_and_set_bit(0, &ap->std_refill_busy)) { 2174 #ifdef DEBUG 2175 printk("low on std buffers %i\n", cur_size); 2176 #endif 2177 ace_load_std_rx_ring(dev, 2178 RX_RING_SIZE - cur_size); 2179 } else 2180 run_tasklet = 1; 2181 } 2182 2183 if (!ACE_IS_TIGON_I(ap)) { 2184 cur_size = atomic_read(&ap->cur_mini_bufs); 2185 if (cur_size < RX_LOW_MINI_THRES) { 2186 if ((cur_size < RX_PANIC_MINI_THRES) && 2187 !test_and_set_bit(0, 2188 &ap->mini_refill_busy)) { 2189 #ifdef DEBUG 2190 printk("low on mini buffers %i\n", 2191 cur_size); 2192 #endif 2193 ace_load_mini_rx_ring(dev, 2194 RX_MINI_SIZE - cur_size); 2195 } else 2196 run_tasklet = 1; 2197 } 2198 } 2199 2200 if (ap->jumbo) { 2201 cur_size = atomic_read(&ap->cur_jumbo_bufs); 2202 if (cur_size < RX_LOW_JUMBO_THRES) { 2203 if ((cur_size < RX_PANIC_JUMBO_THRES) && 2204 !test_and_set_bit(0, 2205 &ap->jumbo_refill_busy)){ 2206 #ifdef DEBUG 2207 printk("low on jumbo buffers %i\n", 2208 cur_size); 2209 #endif 2210 ace_load_jumbo_rx_ring(dev, 2211 RX_JUMBO_SIZE - cur_size); 2212 } else 2213 run_tasklet = 1; 2214 } 2215 } 2216 if (run_tasklet && !ap->tasklet_pending) { 2217 ap->tasklet_pending = 1; 2218 tasklet_schedule(&ap->ace_tasklet); 2219 } 2220 } 2221 2222 return IRQ_HANDLED; 2223 } 2224 2225 static int ace_open(struct net_device *dev) 2226 { 2227 struct ace_private *ap = netdev_priv(dev); 2228 struct ace_regs __iomem *regs = ap->regs; 2229 struct cmd cmd; 2230 2231 if (!(ap->fw_running)) { 2232 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name); 2233 return -EBUSY; 2234 } 2235 2236 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu); 2237 2238 cmd.evt = C_CLEAR_STATS; 2239 cmd.code = 0; 2240 cmd.idx = 0; 2241 ace_issue_cmd(regs, &cmd); 2242 2243 cmd.evt = C_HOST_STATE; 2244 cmd.code = C_C_STACK_UP; 2245 cmd.idx = 0; 2246 ace_issue_cmd(regs, &cmd); 2247 2248 if (ap->jumbo && 2249 !test_and_set_bit(0, &ap->jumbo_refill_busy)) 2250 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE); 2251 2252 if (dev->flags & IFF_PROMISC) { 2253 cmd.evt = C_SET_PROMISC_MODE; 2254 cmd.code = C_C_PROMISC_ENABLE; 2255 cmd.idx = 0; 2256 ace_issue_cmd(regs, &cmd); 2257 2258 ap->promisc = 1; 2259 }else 2260 ap->promisc = 0; 2261 ap->mcast_all = 0; 2262 2263 #if 0 2264 cmd.evt = C_LNK_NEGOTIATION; 2265 cmd.code = 0; 2266 cmd.idx = 0; 2267 ace_issue_cmd(regs, &cmd); 2268 #endif 2269 2270 netif_start_queue(dev); 2271 2272 /* 2273 * Setup the bottom half rx ring refill handler 2274 */ 2275 tasklet_setup(&ap->ace_tasklet, ace_tasklet); 2276 return 0; 2277 } 2278 2279 2280 static int ace_close(struct net_device *dev) 2281 { 2282 struct ace_private *ap = netdev_priv(dev); 2283 struct ace_regs __iomem *regs = ap->regs; 2284 struct cmd cmd; 2285 unsigned long flags; 2286 short i; 2287 2288 /* 2289 * Without (or before) releasing irq and stopping hardware, this 2290 * is an absolute non-sense, by the way. It will be reset instantly 2291 * by the first irq. 2292 */ 2293 netif_stop_queue(dev); 2294 2295 2296 if (ap->promisc) { 2297 cmd.evt = C_SET_PROMISC_MODE; 2298 cmd.code = C_C_PROMISC_DISABLE; 2299 cmd.idx = 0; 2300 ace_issue_cmd(regs, &cmd); 2301 ap->promisc = 0; 2302 } 2303 2304 cmd.evt = C_HOST_STATE; 2305 cmd.code = C_C_STACK_DOWN; 2306 cmd.idx = 0; 2307 ace_issue_cmd(regs, &cmd); 2308 2309 tasklet_kill(&ap->ace_tasklet); 2310 2311 /* 2312 * Make sure one CPU is not processing packets while 2313 * buffers are being released by another. 2314 */ 2315 2316 local_irq_save(flags); 2317 ace_mask_irq(dev); 2318 2319 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) { 2320 struct sk_buff *skb; 2321 struct tx_ring_info *info; 2322 2323 info = ap->skb->tx_skbuff + i; 2324 skb = info->skb; 2325 2326 if (dma_unmap_len(info, maplen)) { 2327 if (ACE_IS_TIGON_I(ap)) { 2328 /* NB: TIGON_1 is special, tx_ring is in io space */ 2329 struct tx_desc __iomem *tx; 2330 tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i]; 2331 writel(0, &tx->addr.addrhi); 2332 writel(0, &tx->addr.addrlo); 2333 writel(0, &tx->flagsize); 2334 } else 2335 memset(ap->tx_ring + i, 0, 2336 sizeof(struct tx_desc)); 2337 dma_unmap_page(&ap->pdev->dev, 2338 dma_unmap_addr(info, mapping), 2339 dma_unmap_len(info, maplen), 2340 DMA_TO_DEVICE); 2341 dma_unmap_len_set(info, maplen, 0); 2342 } 2343 if (skb) { 2344 dev_kfree_skb(skb); 2345 info->skb = NULL; 2346 } 2347 } 2348 2349 if (ap->jumbo) { 2350 cmd.evt = C_RESET_JUMBO_RNG; 2351 cmd.code = 0; 2352 cmd.idx = 0; 2353 ace_issue_cmd(regs, &cmd); 2354 } 2355 2356 ace_unmask_irq(dev); 2357 local_irq_restore(flags); 2358 2359 return 0; 2360 } 2361 2362 2363 static inline dma_addr_t 2364 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb, 2365 struct sk_buff *tail, u32 idx) 2366 { 2367 dma_addr_t mapping; 2368 struct tx_ring_info *info; 2369 2370 mapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data), 2371 offset_in_page(skb->data), skb->len, 2372 DMA_TO_DEVICE); 2373 2374 info = ap->skb->tx_skbuff + idx; 2375 info->skb = tail; 2376 dma_unmap_addr_set(info, mapping, mapping); 2377 dma_unmap_len_set(info, maplen, skb->len); 2378 return mapping; 2379 } 2380 2381 2382 static inline void 2383 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr, 2384 u32 flagsize, u32 vlan_tag) 2385 { 2386 #if !USE_TX_COAL_NOW 2387 flagsize &= ~BD_FLG_COAL_NOW; 2388 #endif 2389 2390 if (ACE_IS_TIGON_I(ap)) { 2391 struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc; 2392 writel(addr >> 32, &io->addr.addrhi); 2393 writel(addr & 0xffffffff, &io->addr.addrlo); 2394 writel(flagsize, &io->flagsize); 2395 writel(vlan_tag, &io->vlanres); 2396 } else { 2397 desc->addr.addrhi = addr >> 32; 2398 desc->addr.addrlo = addr; 2399 desc->flagsize = flagsize; 2400 desc->vlanres = vlan_tag; 2401 } 2402 } 2403 2404 2405 static netdev_tx_t ace_start_xmit(struct sk_buff *skb, 2406 struct net_device *dev) 2407 { 2408 struct ace_private *ap = netdev_priv(dev); 2409 struct ace_regs __iomem *regs = ap->regs; 2410 struct tx_desc *desc; 2411 u32 idx, flagsize; 2412 unsigned long maxjiff = jiffies + 3*HZ; 2413 2414 restart: 2415 idx = ap->tx_prd; 2416 2417 if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2418 goto overflow; 2419 2420 if (!skb_shinfo(skb)->nr_frags) { 2421 dma_addr_t mapping; 2422 u32 vlan_tag = 0; 2423 2424 mapping = ace_map_tx_skb(ap, skb, skb, idx); 2425 flagsize = (skb->len << 16) | (BD_FLG_END); 2426 if (skb->ip_summed == CHECKSUM_PARTIAL) 2427 flagsize |= BD_FLG_TCP_UDP_SUM; 2428 if (skb_vlan_tag_present(skb)) { 2429 flagsize |= BD_FLG_VLAN_TAG; 2430 vlan_tag = skb_vlan_tag_get(skb); 2431 } 2432 desc = ap->tx_ring + idx; 2433 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2434 2435 /* Look at ace_tx_int for explanations. */ 2436 if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2437 flagsize |= BD_FLG_COAL_NOW; 2438 2439 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag); 2440 } else { 2441 dma_addr_t mapping; 2442 u32 vlan_tag = 0; 2443 int i, len = 0; 2444 2445 mapping = ace_map_tx_skb(ap, skb, NULL, idx); 2446 flagsize = (skb_headlen(skb) << 16); 2447 if (skb->ip_summed == CHECKSUM_PARTIAL) 2448 flagsize |= BD_FLG_TCP_UDP_SUM; 2449 if (skb_vlan_tag_present(skb)) { 2450 flagsize |= BD_FLG_VLAN_TAG; 2451 vlan_tag = skb_vlan_tag_get(skb); 2452 } 2453 2454 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag); 2455 2456 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2457 2458 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2459 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2460 struct tx_ring_info *info; 2461 2462 len += skb_frag_size(frag); 2463 info = ap->skb->tx_skbuff + idx; 2464 desc = ap->tx_ring + idx; 2465 2466 mapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0, 2467 skb_frag_size(frag), 2468 DMA_TO_DEVICE); 2469 2470 flagsize = skb_frag_size(frag) << 16; 2471 if (skb->ip_summed == CHECKSUM_PARTIAL) 2472 flagsize |= BD_FLG_TCP_UDP_SUM; 2473 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2474 2475 if (i == skb_shinfo(skb)->nr_frags - 1) { 2476 flagsize |= BD_FLG_END; 2477 if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2478 flagsize |= BD_FLG_COAL_NOW; 2479 2480 /* 2481 * Only the last fragment frees 2482 * the skb! 2483 */ 2484 info->skb = skb; 2485 } else { 2486 info->skb = NULL; 2487 } 2488 dma_unmap_addr_set(info, mapping, mapping); 2489 dma_unmap_len_set(info, maplen, skb_frag_size(frag)); 2490 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag); 2491 } 2492 } 2493 2494 wmb(); 2495 ap->tx_prd = idx; 2496 ace_set_txprd(regs, ap, idx); 2497 2498 if (flagsize & BD_FLG_COAL_NOW) { 2499 netif_stop_queue(dev); 2500 2501 /* 2502 * A TX-descriptor producer (an IRQ) might have gotten 2503 * between, making the ring free again. Since xmit is 2504 * serialized, this is the only situation we have to 2505 * re-test. 2506 */ 2507 if (!tx_ring_full(ap, ap->tx_ret_csm, idx)) 2508 netif_wake_queue(dev); 2509 } 2510 2511 return NETDEV_TX_OK; 2512 2513 overflow: 2514 /* 2515 * This race condition is unavoidable with lock-free drivers. 2516 * We wake up the queue _before_ tx_prd is advanced, so that we can 2517 * enter hard_start_xmit too early, while tx ring still looks closed. 2518 * This happens ~1-4 times per 100000 packets, so that we can allow 2519 * to loop syncing to other CPU. Probably, we need an additional 2520 * wmb() in ace_tx_intr as well. 2521 * 2522 * Note that this race is relieved by reserving one more entry 2523 * in tx ring than it is necessary (see original non-SG driver). 2524 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which 2525 * is already overkill. 2526 * 2527 * Alternative is to return with 1 not throttling queue. In this 2528 * case loop becomes longer, no more useful effects. 2529 */ 2530 if (time_before(jiffies, maxjiff)) { 2531 barrier(); 2532 cpu_relax(); 2533 goto restart; 2534 } 2535 2536 /* The ring is stuck full. */ 2537 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name); 2538 return NETDEV_TX_BUSY; 2539 } 2540 2541 2542 static int ace_change_mtu(struct net_device *dev, int new_mtu) 2543 { 2544 struct ace_private *ap = netdev_priv(dev); 2545 struct ace_regs __iomem *regs = ap->regs; 2546 2547 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu); 2548 dev->mtu = new_mtu; 2549 2550 if (new_mtu > ACE_STD_MTU) { 2551 if (!(ap->jumbo)) { 2552 printk(KERN_INFO "%s: Enabling Jumbo frame " 2553 "support\n", dev->name); 2554 ap->jumbo = 1; 2555 if (!test_and_set_bit(0, &ap->jumbo_refill_busy)) 2556 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE); 2557 ace_set_rxtx_parms(dev, 1); 2558 } 2559 } else { 2560 while (test_and_set_bit(0, &ap->jumbo_refill_busy)); 2561 ace_sync_irq(dev->irq); 2562 ace_set_rxtx_parms(dev, 0); 2563 if (ap->jumbo) { 2564 struct cmd cmd; 2565 2566 cmd.evt = C_RESET_JUMBO_RNG; 2567 cmd.code = 0; 2568 cmd.idx = 0; 2569 ace_issue_cmd(regs, &cmd); 2570 } 2571 } 2572 2573 return 0; 2574 } 2575 2576 static int ace_get_link_ksettings(struct net_device *dev, 2577 struct ethtool_link_ksettings *cmd) 2578 { 2579 struct ace_private *ap = netdev_priv(dev); 2580 struct ace_regs __iomem *regs = ap->regs; 2581 u32 link; 2582 u32 supported; 2583 2584 memset(cmd, 0, sizeof(struct ethtool_link_ksettings)); 2585 2586 supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | 2587 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | 2588 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full | 2589 SUPPORTED_Autoneg | SUPPORTED_FIBRE); 2590 2591 cmd->base.port = PORT_FIBRE; 2592 2593 link = readl(®s->GigLnkState); 2594 if (link & LNK_1000MB) { 2595 cmd->base.speed = SPEED_1000; 2596 } else { 2597 link = readl(®s->FastLnkState); 2598 if (link & LNK_100MB) 2599 cmd->base.speed = SPEED_100; 2600 else if (link & LNK_10MB) 2601 cmd->base.speed = SPEED_10; 2602 else 2603 cmd->base.speed = 0; 2604 } 2605 if (link & LNK_FULL_DUPLEX) 2606 cmd->base.duplex = DUPLEX_FULL; 2607 else 2608 cmd->base.duplex = DUPLEX_HALF; 2609 2610 if (link & LNK_NEGOTIATE) 2611 cmd->base.autoneg = AUTONEG_ENABLE; 2612 else 2613 cmd->base.autoneg = AUTONEG_DISABLE; 2614 2615 #if 0 2616 /* 2617 * Current struct ethtool_cmd is insufficient 2618 */ 2619 ecmd->trace = readl(®s->TuneTrace); 2620 2621 ecmd->txcoal = readl(®s->TuneTxCoalTicks); 2622 ecmd->rxcoal = readl(®s->TuneRxCoalTicks); 2623 #endif 2624 2625 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 2626 supported); 2627 2628 return 0; 2629 } 2630 2631 static int ace_set_link_ksettings(struct net_device *dev, 2632 const struct ethtool_link_ksettings *cmd) 2633 { 2634 struct ace_private *ap = netdev_priv(dev); 2635 struct ace_regs __iomem *regs = ap->regs; 2636 u32 link, speed; 2637 2638 link = readl(®s->GigLnkState); 2639 if (link & LNK_1000MB) 2640 speed = SPEED_1000; 2641 else { 2642 link = readl(®s->FastLnkState); 2643 if (link & LNK_100MB) 2644 speed = SPEED_100; 2645 else if (link & LNK_10MB) 2646 speed = SPEED_10; 2647 else 2648 speed = SPEED_100; 2649 } 2650 2651 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB | 2652 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL; 2653 if (!ACE_IS_TIGON_I(ap)) 2654 link |= LNK_TX_FLOW_CTL_Y; 2655 if (cmd->base.autoneg == AUTONEG_ENABLE) 2656 link |= LNK_NEGOTIATE; 2657 if (cmd->base.speed != speed) { 2658 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB); 2659 switch (cmd->base.speed) { 2660 case SPEED_1000: 2661 link |= LNK_1000MB; 2662 break; 2663 case SPEED_100: 2664 link |= LNK_100MB; 2665 break; 2666 case SPEED_10: 2667 link |= LNK_10MB; 2668 break; 2669 } 2670 } 2671 2672 if (cmd->base.duplex == DUPLEX_FULL) 2673 link |= LNK_FULL_DUPLEX; 2674 2675 if (link != ap->link) { 2676 struct cmd cmd; 2677 printk(KERN_INFO "%s: Renegotiating link state\n", 2678 dev->name); 2679 2680 ap->link = link; 2681 writel(link, ®s->TuneLink); 2682 if (!ACE_IS_TIGON_I(ap)) 2683 writel(link, ®s->TuneFastLink); 2684 wmb(); 2685 2686 cmd.evt = C_LNK_NEGOTIATION; 2687 cmd.code = 0; 2688 cmd.idx = 0; 2689 ace_issue_cmd(regs, &cmd); 2690 } 2691 return 0; 2692 } 2693 2694 static void ace_get_drvinfo(struct net_device *dev, 2695 struct ethtool_drvinfo *info) 2696 { 2697 struct ace_private *ap = netdev_priv(dev); 2698 2699 strlcpy(info->driver, "acenic", sizeof(info->driver)); 2700 snprintf(info->fw_version, sizeof(info->version), "%i.%i.%i", 2701 ap->firmware_major, ap->firmware_minor, ap->firmware_fix); 2702 2703 if (ap->pdev) 2704 strlcpy(info->bus_info, pci_name(ap->pdev), 2705 sizeof(info->bus_info)); 2706 2707 } 2708 2709 /* 2710 * Set the hardware MAC address. 2711 */ 2712 static int ace_set_mac_addr(struct net_device *dev, void *p) 2713 { 2714 struct ace_private *ap = netdev_priv(dev); 2715 struct ace_regs __iomem *regs = ap->regs; 2716 struct sockaddr *addr=p; 2717 const u8 *da; 2718 struct cmd cmd; 2719 2720 if(netif_running(dev)) 2721 return -EBUSY; 2722 2723 eth_hw_addr_set(dev, addr->sa_data); 2724 2725 da = (const u8 *)dev->dev_addr; 2726 2727 writel(da[0] << 8 | da[1], ®s->MacAddrHi); 2728 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5], 2729 ®s->MacAddrLo); 2730 2731 cmd.evt = C_SET_MAC_ADDR; 2732 cmd.code = 0; 2733 cmd.idx = 0; 2734 ace_issue_cmd(regs, &cmd); 2735 2736 return 0; 2737 } 2738 2739 2740 static void ace_set_multicast_list(struct net_device *dev) 2741 { 2742 struct ace_private *ap = netdev_priv(dev); 2743 struct ace_regs __iomem *regs = ap->regs; 2744 struct cmd cmd; 2745 2746 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) { 2747 cmd.evt = C_SET_MULTICAST_MODE; 2748 cmd.code = C_C_MCAST_ENABLE; 2749 cmd.idx = 0; 2750 ace_issue_cmd(regs, &cmd); 2751 ap->mcast_all = 1; 2752 } else if (ap->mcast_all) { 2753 cmd.evt = C_SET_MULTICAST_MODE; 2754 cmd.code = C_C_MCAST_DISABLE; 2755 cmd.idx = 0; 2756 ace_issue_cmd(regs, &cmd); 2757 ap->mcast_all = 0; 2758 } 2759 2760 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) { 2761 cmd.evt = C_SET_PROMISC_MODE; 2762 cmd.code = C_C_PROMISC_ENABLE; 2763 cmd.idx = 0; 2764 ace_issue_cmd(regs, &cmd); 2765 ap->promisc = 1; 2766 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) { 2767 cmd.evt = C_SET_PROMISC_MODE; 2768 cmd.code = C_C_PROMISC_DISABLE; 2769 cmd.idx = 0; 2770 ace_issue_cmd(regs, &cmd); 2771 ap->promisc = 0; 2772 } 2773 2774 /* 2775 * For the time being multicast relies on the upper layers 2776 * filtering it properly. The Firmware does not allow one to 2777 * set the entire multicast list at a time and keeping track of 2778 * it here is going to be messy. 2779 */ 2780 if (!netdev_mc_empty(dev) && !ap->mcast_all) { 2781 cmd.evt = C_SET_MULTICAST_MODE; 2782 cmd.code = C_C_MCAST_ENABLE; 2783 cmd.idx = 0; 2784 ace_issue_cmd(regs, &cmd); 2785 }else if (!ap->mcast_all) { 2786 cmd.evt = C_SET_MULTICAST_MODE; 2787 cmd.code = C_C_MCAST_DISABLE; 2788 cmd.idx = 0; 2789 ace_issue_cmd(regs, &cmd); 2790 } 2791 } 2792 2793 2794 static struct net_device_stats *ace_get_stats(struct net_device *dev) 2795 { 2796 struct ace_private *ap = netdev_priv(dev); 2797 struct ace_mac_stats __iomem *mac_stats = 2798 (struct ace_mac_stats __iomem *)ap->regs->Stats; 2799 2800 dev->stats.rx_missed_errors = readl(&mac_stats->drop_space); 2801 dev->stats.multicast = readl(&mac_stats->kept_mc); 2802 dev->stats.collisions = readl(&mac_stats->coll); 2803 2804 return &dev->stats; 2805 } 2806 2807 2808 static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src, 2809 u32 dest, int size) 2810 { 2811 void __iomem *tdest; 2812 short tsize, i; 2813 2814 if (size <= 0) 2815 return; 2816 2817 while (size > 0) { 2818 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1), 2819 min_t(u32, size, ACE_WINDOW_SIZE)); 2820 tdest = (void __iomem *) ®s->Window + 2821 (dest & (ACE_WINDOW_SIZE - 1)); 2822 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase); 2823 for (i = 0; i < (tsize / 4); i++) { 2824 /* Firmware is big-endian */ 2825 writel(be32_to_cpup(src), tdest); 2826 src++; 2827 tdest += 4; 2828 dest += 4; 2829 size -= 4; 2830 } 2831 } 2832 } 2833 2834 2835 static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size) 2836 { 2837 void __iomem *tdest; 2838 short tsize = 0, i; 2839 2840 if (size <= 0) 2841 return; 2842 2843 while (size > 0) { 2844 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1), 2845 min_t(u32, size, ACE_WINDOW_SIZE)); 2846 tdest = (void __iomem *) ®s->Window + 2847 (dest & (ACE_WINDOW_SIZE - 1)); 2848 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase); 2849 2850 for (i = 0; i < (tsize / 4); i++) { 2851 writel(0, tdest + i*4); 2852 } 2853 2854 dest += tsize; 2855 size -= tsize; 2856 } 2857 } 2858 2859 2860 /* 2861 * Download the firmware into the SRAM on the NIC 2862 * 2863 * This operation requires the NIC to be halted and is performed with 2864 * interrupts disabled and with the spinlock hold. 2865 */ 2866 static int ace_load_firmware(struct net_device *dev) 2867 { 2868 const struct firmware *fw; 2869 const char *fw_name = "acenic/tg2.bin"; 2870 struct ace_private *ap = netdev_priv(dev); 2871 struct ace_regs __iomem *regs = ap->regs; 2872 const __be32 *fw_data; 2873 u32 load_addr; 2874 int ret; 2875 2876 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) { 2877 printk(KERN_ERR "%s: trying to download firmware while the " 2878 "CPU is running!\n", ap->name); 2879 return -EFAULT; 2880 } 2881 2882 if (ACE_IS_TIGON_I(ap)) 2883 fw_name = "acenic/tg1.bin"; 2884 2885 ret = request_firmware(&fw, fw_name, &ap->pdev->dev); 2886 if (ret) { 2887 printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n", 2888 ap->name, fw_name); 2889 return ret; 2890 } 2891 2892 fw_data = (void *)fw->data; 2893 2894 /* Firmware blob starts with version numbers, followed by 2895 load and start address. Remainder is the blob to be loaded 2896 contiguously from load address. We don't bother to represent 2897 the BSS/SBSS sections any more, since we were clearing the 2898 whole thing anyway. */ 2899 ap->firmware_major = fw->data[0]; 2900 ap->firmware_minor = fw->data[1]; 2901 ap->firmware_fix = fw->data[2]; 2902 2903 ap->firmware_start = be32_to_cpu(fw_data[1]); 2904 if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) { 2905 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n", 2906 ap->name, ap->firmware_start, fw_name); 2907 ret = -EINVAL; 2908 goto out; 2909 } 2910 2911 load_addr = be32_to_cpu(fw_data[2]); 2912 if (load_addr < 0x4000 || load_addr >= 0x80000) { 2913 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n", 2914 ap->name, load_addr, fw_name); 2915 ret = -EINVAL; 2916 goto out; 2917 } 2918 2919 /* 2920 * Do not try to clear more than 512KiB or we end up seeing 2921 * funny things on NICs with only 512KiB SRAM 2922 */ 2923 ace_clear(regs, 0x2000, 0x80000-0x2000); 2924 ace_copy(regs, &fw_data[3], load_addr, fw->size-12); 2925 out: 2926 release_firmware(fw); 2927 return ret; 2928 } 2929 2930 2931 /* 2932 * The eeprom on the AceNIC is an Atmel i2c EEPROM. 2933 * 2934 * Accessing the EEPROM is `interesting' to say the least - don't read 2935 * this code right after dinner. 2936 * 2937 * This is all about black magic and bit-banging the device .... I 2938 * wonder in what hospital they have put the guy who designed the i2c 2939 * specs. 2940 * 2941 * Oh yes, this is only the beginning! 2942 * 2943 * Thanks to Stevarino Webinski for helping tracking down the bugs in the 2944 * code i2c readout code by beta testing all my hacks. 2945 */ 2946 static void eeprom_start(struct ace_regs __iomem *regs) 2947 { 2948 u32 local; 2949 2950 readl(®s->LocalCtrl); 2951 udelay(ACE_SHORT_DELAY); 2952 local = readl(®s->LocalCtrl); 2953 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE; 2954 writel(local, ®s->LocalCtrl); 2955 readl(®s->LocalCtrl); 2956 mb(); 2957 udelay(ACE_SHORT_DELAY); 2958 local |= EEPROM_CLK_OUT; 2959 writel(local, ®s->LocalCtrl); 2960 readl(®s->LocalCtrl); 2961 mb(); 2962 udelay(ACE_SHORT_DELAY); 2963 local &= ~EEPROM_DATA_OUT; 2964 writel(local, ®s->LocalCtrl); 2965 readl(®s->LocalCtrl); 2966 mb(); 2967 udelay(ACE_SHORT_DELAY); 2968 local &= ~EEPROM_CLK_OUT; 2969 writel(local, ®s->LocalCtrl); 2970 readl(®s->LocalCtrl); 2971 mb(); 2972 } 2973 2974 2975 static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic) 2976 { 2977 short i; 2978 u32 local; 2979 2980 udelay(ACE_SHORT_DELAY); 2981 local = readl(®s->LocalCtrl); 2982 local &= ~EEPROM_DATA_OUT; 2983 local |= EEPROM_WRITE_ENABLE; 2984 writel(local, ®s->LocalCtrl); 2985 readl(®s->LocalCtrl); 2986 mb(); 2987 2988 for (i = 0; i < 8; i++, magic <<= 1) { 2989 udelay(ACE_SHORT_DELAY); 2990 if (magic & 0x80) 2991 local |= EEPROM_DATA_OUT; 2992 else 2993 local &= ~EEPROM_DATA_OUT; 2994 writel(local, ®s->LocalCtrl); 2995 readl(®s->LocalCtrl); 2996 mb(); 2997 2998 udelay(ACE_SHORT_DELAY); 2999 local |= EEPROM_CLK_OUT; 3000 writel(local, ®s->LocalCtrl); 3001 readl(®s->LocalCtrl); 3002 mb(); 3003 udelay(ACE_SHORT_DELAY); 3004 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT); 3005 writel(local, ®s->LocalCtrl); 3006 readl(®s->LocalCtrl); 3007 mb(); 3008 } 3009 } 3010 3011 3012 static int eeprom_check_ack(struct ace_regs __iomem *regs) 3013 { 3014 int state; 3015 u32 local; 3016 3017 local = readl(®s->LocalCtrl); 3018 local &= ~EEPROM_WRITE_ENABLE; 3019 writel(local, ®s->LocalCtrl); 3020 readl(®s->LocalCtrl); 3021 mb(); 3022 udelay(ACE_LONG_DELAY); 3023 local |= EEPROM_CLK_OUT; 3024 writel(local, ®s->LocalCtrl); 3025 readl(®s->LocalCtrl); 3026 mb(); 3027 udelay(ACE_SHORT_DELAY); 3028 /* sample data in middle of high clk */ 3029 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0; 3030 udelay(ACE_SHORT_DELAY); 3031 mb(); 3032 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl); 3033 readl(®s->LocalCtrl); 3034 mb(); 3035 3036 return state; 3037 } 3038 3039 3040 static void eeprom_stop(struct ace_regs __iomem *regs) 3041 { 3042 u32 local; 3043 3044 udelay(ACE_SHORT_DELAY); 3045 local = readl(®s->LocalCtrl); 3046 local |= EEPROM_WRITE_ENABLE; 3047 writel(local, ®s->LocalCtrl); 3048 readl(®s->LocalCtrl); 3049 mb(); 3050 udelay(ACE_SHORT_DELAY); 3051 local &= ~EEPROM_DATA_OUT; 3052 writel(local, ®s->LocalCtrl); 3053 readl(®s->LocalCtrl); 3054 mb(); 3055 udelay(ACE_SHORT_DELAY); 3056 local |= EEPROM_CLK_OUT; 3057 writel(local, ®s->LocalCtrl); 3058 readl(®s->LocalCtrl); 3059 mb(); 3060 udelay(ACE_SHORT_DELAY); 3061 local |= EEPROM_DATA_OUT; 3062 writel(local, ®s->LocalCtrl); 3063 readl(®s->LocalCtrl); 3064 mb(); 3065 udelay(ACE_LONG_DELAY); 3066 local &= ~EEPROM_CLK_OUT; 3067 writel(local, ®s->LocalCtrl); 3068 mb(); 3069 } 3070 3071 3072 /* 3073 * Read a whole byte from the EEPROM. 3074 */ 3075 static int read_eeprom_byte(struct net_device *dev, unsigned long offset) 3076 { 3077 struct ace_private *ap = netdev_priv(dev); 3078 struct ace_regs __iomem *regs = ap->regs; 3079 unsigned long flags; 3080 u32 local; 3081 int result = 0; 3082 short i; 3083 3084 /* 3085 * Don't take interrupts on this CPU will bit banging 3086 * the %#%#@$ I2C device 3087 */ 3088 local_irq_save(flags); 3089 3090 eeprom_start(regs); 3091 3092 eeprom_prep(regs, EEPROM_WRITE_SELECT); 3093 if (eeprom_check_ack(regs)) { 3094 local_irq_restore(flags); 3095 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name); 3096 result = -EIO; 3097 goto eeprom_read_error; 3098 } 3099 3100 eeprom_prep(regs, (offset >> 8) & 0xff); 3101 if (eeprom_check_ack(regs)) { 3102 local_irq_restore(flags); 3103 printk(KERN_ERR "%s: Unable to set address byte 0\n", 3104 ap->name); 3105 result = -EIO; 3106 goto eeprom_read_error; 3107 } 3108 3109 eeprom_prep(regs, offset & 0xff); 3110 if (eeprom_check_ack(regs)) { 3111 local_irq_restore(flags); 3112 printk(KERN_ERR "%s: Unable to set address byte 1\n", 3113 ap->name); 3114 result = -EIO; 3115 goto eeprom_read_error; 3116 } 3117 3118 eeprom_start(regs); 3119 eeprom_prep(regs, EEPROM_READ_SELECT); 3120 if (eeprom_check_ack(regs)) { 3121 local_irq_restore(flags); 3122 printk(KERN_ERR "%s: Unable to set READ_SELECT\n", 3123 ap->name); 3124 result = -EIO; 3125 goto eeprom_read_error; 3126 } 3127 3128 for (i = 0; i < 8; i++) { 3129 local = readl(®s->LocalCtrl); 3130 local &= ~EEPROM_WRITE_ENABLE; 3131 writel(local, ®s->LocalCtrl); 3132 readl(®s->LocalCtrl); 3133 udelay(ACE_LONG_DELAY); 3134 mb(); 3135 local |= EEPROM_CLK_OUT; 3136 writel(local, ®s->LocalCtrl); 3137 readl(®s->LocalCtrl); 3138 mb(); 3139 udelay(ACE_SHORT_DELAY); 3140 /* sample data mid high clk */ 3141 result = (result << 1) | 3142 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0); 3143 udelay(ACE_SHORT_DELAY); 3144 mb(); 3145 local = readl(®s->LocalCtrl); 3146 local &= ~EEPROM_CLK_OUT; 3147 writel(local, ®s->LocalCtrl); 3148 readl(®s->LocalCtrl); 3149 udelay(ACE_SHORT_DELAY); 3150 mb(); 3151 if (i == 7) { 3152 local |= EEPROM_WRITE_ENABLE; 3153 writel(local, ®s->LocalCtrl); 3154 readl(®s->LocalCtrl); 3155 mb(); 3156 udelay(ACE_SHORT_DELAY); 3157 } 3158 } 3159 3160 local |= EEPROM_DATA_OUT; 3161 writel(local, ®s->LocalCtrl); 3162 readl(®s->LocalCtrl); 3163 mb(); 3164 udelay(ACE_SHORT_DELAY); 3165 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl); 3166 readl(®s->LocalCtrl); 3167 udelay(ACE_LONG_DELAY); 3168 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl); 3169 readl(®s->LocalCtrl); 3170 mb(); 3171 udelay(ACE_SHORT_DELAY); 3172 eeprom_stop(regs); 3173 3174 local_irq_restore(flags); 3175 out: 3176 return result; 3177 3178 eeprom_read_error: 3179 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n", 3180 ap->name, offset); 3181 goto out; 3182 } 3183 3184 module_pci_driver(acenic_pci_driver); 3185