1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef GRETH_H 3 #define GRETH_H 4 5 #include <linux/phy.h> 6 7 /* Register bits and masks */ 8 #define GRETH_RESET 0x40 9 #define GRETH_MII_BUSY 0x8 10 #define GRETH_MII_NVALID 0x10 11 12 #define GRETH_CTRL_FD 0x10 13 #define GRETH_CTRL_PR 0x20 14 #define GRETH_CTRL_SP 0x80 15 #define GRETH_CTRL_GB 0x100 16 #define GRETH_CTRL_PSTATIEN 0x400 17 #define GRETH_CTRL_MCEN 0x800 18 #define GRETH_CTRL_DISDUPLEX 0x1000 19 #define GRETH_STATUS_PHYSTAT 0x100 20 21 #define GRETH_BD_EN 0x800 22 #define GRETH_BD_WR 0x1000 23 #define GRETH_BD_IE 0x2000 24 #define GRETH_BD_LEN 0x7FF 25 26 #define GRETH_TXEN 0x1 27 #define GRETH_INT_TE 0x2 28 #define GRETH_INT_TX 0x8 29 #define GRETH_TXI 0x4 30 #define GRETH_TXBD_STATUS 0x0001C000 31 #define GRETH_TXBD_MORE 0x20000 32 #define GRETH_TXBD_IPCS 0x40000 33 #define GRETH_TXBD_TCPCS 0x80000 34 #define GRETH_TXBD_UDPCS 0x100000 35 #define GRETH_TXBD_CSALL (GRETH_TXBD_IPCS | GRETH_TXBD_TCPCS | GRETH_TXBD_UDPCS) 36 #define GRETH_TXBD_ERR_LC 0x10000 37 #define GRETH_TXBD_ERR_UE 0x4000 38 #define GRETH_TXBD_ERR_AL 0x8000 39 40 #define GRETH_INT_RE 0x1 41 #define GRETH_INT_RX 0x4 42 #define GRETH_RXEN 0x2 43 #define GRETH_RXI 0x8 44 #define GRETH_RXBD_STATUS 0xFFFFC000 45 #define GRETH_RXBD_ERR_AE 0x4000 46 #define GRETH_RXBD_ERR_FT 0x8000 47 #define GRETH_RXBD_ERR_CRC 0x10000 48 #define GRETH_RXBD_ERR_OE 0x20000 49 #define GRETH_RXBD_ERR_LE 0x40000 50 #define GRETH_RXBD_IP 0x80000 51 #define GRETH_RXBD_IP_CSERR 0x100000 52 #define GRETH_RXBD_UDP 0x200000 53 #define GRETH_RXBD_UDP_CSERR 0x400000 54 #define GRETH_RXBD_TCP 0x800000 55 #define GRETH_RXBD_TCP_CSERR 0x1000000 56 #define GRETH_RXBD_IP_FRAG 0x2000000 57 #define GRETH_RXBD_MCAST 0x4000000 58 59 /* Descriptor parameters */ 60 #define GRETH_TXBD_NUM 128 61 #define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) 62 #define GRETH_TX_BUF_SIZE 2048 63 #define GRETH_RXBD_NUM 128 64 #define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) 65 #define GRETH_RX_BUF_SIZE 2048 66 67 /* Buffers per page */ 68 #define GRETH_RX_BUF_PPGAE (PAGE_SIZE/GRETH_RX_BUF_SIZE) 69 #define GRETH_TX_BUF_PPGAE (PAGE_SIZE/GRETH_TX_BUF_SIZE) 70 71 /* How many pages are needed for buffers */ 72 #define GRETH_RX_BUF_PAGE_NUM (GRETH_RXBD_NUM/GRETH_RX_BUF_PPGAE) 73 #define GRETH_TX_BUF_PAGE_NUM (GRETH_TXBD_NUM/GRETH_TX_BUF_PPGAE) 74 75 /* Buffer size. 76 * Gbit MAC uses tagged maximum frame size which is 1518 excluding CRC. 77 * Set to 1520 to make all buffers word aligned for non-gbit MAC. 78 */ 79 #define MAX_FRAME_SIZE 1520 80 81 /* GRETH APB registers */ 82 struct greth_regs { 83 u32 control; 84 u32 status; 85 u32 esa_msb; 86 u32 esa_lsb; 87 u32 mdio; 88 u32 tx_desc_p; 89 u32 rx_desc_p; 90 u32 edclip; 91 u32 hash_msb; 92 u32 hash_lsb; 93 }; 94 95 /* GRETH buffer descriptor */ 96 struct greth_bd { 97 u32 stat; 98 u32 addr; 99 }; 100 101 struct greth_private { 102 struct sk_buff *rx_skbuff[GRETH_RXBD_NUM]; 103 struct sk_buff *tx_skbuff[GRETH_TXBD_NUM]; 104 105 unsigned char *tx_bufs[GRETH_TXBD_NUM]; 106 unsigned char *rx_bufs[GRETH_RXBD_NUM]; 107 u16 tx_bufs_length[GRETH_TXBD_NUM]; 108 109 u16 tx_next; 110 u16 tx_last; 111 u16 tx_free; /* only used on 10/100Mbit */ 112 u16 rx_cur; 113 114 struct greth_regs *regs; /* Address of controller registers. */ 115 struct greth_bd *rx_bd_base; /* Address of Rx BDs. */ 116 struct greth_bd *tx_bd_base; /* Address of Tx BDs. */ 117 dma_addr_t rx_bd_base_phys; 118 dma_addr_t tx_bd_base_phys; 119 120 int irq; 121 122 struct device *dev; /* Pointer to platform_device->dev */ 123 struct net_device *netdev; 124 struct napi_struct napi; 125 spinlock_t devlock; 126 127 struct mii_bus *mdio; 128 unsigned int link; 129 unsigned int speed; 130 unsigned int duplex; 131 132 u32 msg_enable; 133 134 u8 phyaddr; 135 u8 multicast; 136 u8 gbit_mac; 137 u8 mdio_int_en; 138 u8 edcl; 139 }; 140 141 #endif 142