1 /* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC. 2 * 3 * This file is subject to the terms and conditions of the GNU General Public 4 * License. See the file "COPYING" in the main directory of this archive 5 * for more details. 6 * 7 * Copyright (C) 1999 kaz Kojima 8 */ 9 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/errno.h> 13 #include <linux/interrupt.h> 14 #include <linux/ioport.h> 15 #include <linux/netdevice.h> 16 #include <linux/etherdevice.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 20 #include <asm/io.h> 21 #include <mach-se/mach/se.h> 22 #include <asm/machvec.h> 23 #ifdef CONFIG_SH_STANDARD_BIOS 24 #include <asm/sh_bios.h> 25 #endif 26 27 #include "8390.h" 28 29 #define DRV_NAME "stnic" 30 31 #define byte unsigned char 32 #define half unsigned short 33 #define word unsigned int 34 #define vbyte volatile unsigned char 35 #define vhalf volatile unsigned short 36 #define vword volatile unsigned int 37 38 #define STNIC_RUN 0x01 /* 1 == Run, 0 == reset. */ 39 40 #define START_PG 0 /* First page of TX buffer */ 41 #define STOP_PG 128 /* Last page +1 of RX ring */ 42 43 /* Alias */ 44 #define STNIC_CR E8390_CMD 45 #define PG0_RSAR0 EN0_RSARLO 46 #define PG0_RSAR1 EN0_RSARHI 47 #define PG0_RBCR0 EN0_RCNTLO 48 #define PG0_RBCR1 EN0_RCNTHI 49 50 #define CR_RRD E8390_RREAD 51 #define CR_RWR E8390_RWRITE 52 #define CR_PG0 E8390_PAGE0 53 #define CR_STA E8390_START 54 #define CR_RDMA E8390_NODMA 55 56 /* FIXME! YOU MUST SET YOUR OWN ETHER ADDRESS. */ 57 static byte stnic_eadr[6] = 58 {0x00, 0xc0, 0x6e, 0x00, 0x00, 0x07}; 59 60 static struct net_device *stnic_dev; 61 62 static void stnic_reset (struct net_device *dev); 63 static void stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr, 64 int ring_page); 65 static void stnic_block_input (struct net_device *dev, int count, 66 struct sk_buff *skb , int ring_offset); 67 static void stnic_block_output (struct net_device *dev, int count, 68 const unsigned char *buf, int start_page); 69 70 static void stnic_init (struct net_device *dev); 71 72 static u32 stnic_msg_enable; 73 74 module_param_named(msg_enable, stnic_msg_enable, uint, 0444); 75 MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)"); 76 77 /* SH7750 specific read/write io. */ 78 static inline void 79 STNIC_DELAY (void) 80 { 81 vword trash; 82 trash = *(vword *) 0xa0000000; 83 trash = *(vword *) 0xa0000000; 84 trash = *(vword *) 0xa0000000; 85 } 86 87 static inline byte 88 STNIC_READ (int reg) 89 { 90 byte val; 91 92 val = (*(vhalf *) (PA_83902 + ((reg) << 1)) >> 8) & 0xff; 93 STNIC_DELAY (); 94 return val; 95 } 96 97 static inline void 98 STNIC_WRITE (int reg, byte val) 99 { 100 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8); 101 STNIC_DELAY (); 102 } 103 104 static int __init stnic_probe(void) 105 { 106 struct net_device *dev; 107 int i, err; 108 struct ei_device *ei_local; 109 110 /* If we are not running on a SolutionEngine, give up now */ 111 if (! MACH_SE) 112 return -ENODEV; 113 114 /* New style probing API */ 115 dev = alloc_ei_netdev(); 116 if (!dev) 117 return -ENOMEM; 118 119 #ifdef CONFIG_SH_STANDARD_BIOS 120 sh_bios_get_node_addr (stnic_eadr); 121 #endif 122 for (i = 0; i < ETH_ALEN; i++) 123 dev->dev_addr[i] = stnic_eadr[i]; 124 125 /* Set the base address to point to the NIC, not the "real" base! */ 126 dev->base_addr = 0x1000; 127 dev->irq = IRQ_STNIC; 128 dev->netdev_ops = &ei_netdev_ops; 129 130 /* Snarf the interrupt now. There's no point in waiting since we cannot 131 share and the board will usually be enabled. */ 132 err = request_irq (dev->irq, ei_interrupt, 0, DRV_NAME, dev); 133 if (err) { 134 netdev_emerg(dev, " unable to get IRQ %d.\n", dev->irq); 135 free_netdev(dev); 136 return err; 137 } 138 139 ei_status.name = dev->name; 140 ei_status.word16 = 1; 141 #ifdef __LITTLE_ENDIAN__ 142 ei_status.bigendian = 0; 143 #else 144 ei_status.bigendian = 1; 145 #endif 146 ei_status.tx_start_page = START_PG; 147 ei_status.rx_start_page = START_PG + TX_PAGES; 148 ei_status.stop_page = STOP_PG; 149 150 ei_status.reset_8390 = &stnic_reset; 151 ei_status.get_8390_hdr = &stnic_get_hdr; 152 ei_status.block_input = &stnic_block_input; 153 ei_status.block_output = &stnic_block_output; 154 155 stnic_init (dev); 156 ei_local = netdev_priv(dev); 157 ei_local->msg_enable = stnic_msg_enable; 158 159 err = register_netdev(dev); 160 if (err) { 161 free_irq(dev->irq, dev); 162 free_netdev(dev); 163 return err; 164 } 165 stnic_dev = dev; 166 167 netdev_info(dev, "NS ST-NIC 83902A\n"); 168 169 return 0; 170 } 171 172 static void 173 stnic_reset (struct net_device *dev) 174 { 175 struct ei_device *ei_local = netdev_priv(dev); 176 177 *(vhalf *) PA_83902_RST = 0; 178 udelay (5); 179 netif_warn(ei_local, hw, dev, "8390 reset done (%ld).\n", jiffies); 180 *(vhalf *) PA_83902_RST = ~0; 181 udelay (5); 182 } 183 184 static void 185 stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr, 186 int ring_page) 187 { 188 struct ei_device *ei_local = netdev_priv(dev); 189 190 half buf[2]; 191 192 STNIC_WRITE (PG0_RSAR0, 0); 193 STNIC_WRITE (PG0_RSAR1, ring_page); 194 STNIC_WRITE (PG0_RBCR0, 4); 195 STNIC_WRITE (PG0_RBCR1, 0); 196 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 197 198 buf[0] = *(vhalf *) PA_83902_IF; 199 STNIC_DELAY (); 200 buf[1] = *(vhalf *) PA_83902_IF; 201 STNIC_DELAY (); 202 hdr->next = buf[0] >> 8; 203 hdr->status = buf[0] & 0xff; 204 #ifdef __LITTLE_ENDIAN__ 205 hdr->count = buf[1]; 206 #else 207 hdr->count = ((buf[1] >> 8) & 0xff) | (buf[1] << 8); 208 #endif 209 210 netif_dbg(ei_local, probe, dev, "ring %x status %02x next %02x count %04x.\n", 211 ring_page, hdr->status, hdr->next, hdr->count); 212 213 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 214 } 215 216 /* Block input and output, similar to the Crynwr packet driver. If you are 217 porting to a new ethercard look at the packet driver source for hints. 218 The HP LAN doesn't use shared memory -- we put the packet 219 out through the "remote DMA" dataport. */ 220 221 static void 222 stnic_block_input (struct net_device *dev, int length, struct sk_buff *skb, 223 int offset) 224 { 225 char *buf = skb->data; 226 half val; 227 228 STNIC_WRITE (PG0_RSAR0, offset & 0xff); 229 STNIC_WRITE (PG0_RSAR1, offset >> 8); 230 STNIC_WRITE (PG0_RBCR0, length & 0xff); 231 STNIC_WRITE (PG0_RBCR1, length >> 8); 232 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 233 234 if (length & 1) 235 length++; 236 237 while (length > 0) 238 { 239 val = *(vhalf *) PA_83902_IF; 240 #ifdef __LITTLE_ENDIAN__ 241 *buf++ = val & 0xff; 242 *buf++ = val >> 8; 243 #else 244 *buf++ = val >> 8; 245 *buf++ = val & 0xff; 246 #endif 247 STNIC_DELAY (); 248 length -= sizeof (half); 249 } 250 251 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 252 } 253 254 static void 255 stnic_block_output (struct net_device *dev, int length, 256 const unsigned char *buf, int output_page) 257 { 258 STNIC_WRITE (PG0_RBCR0, 1); /* Write non-zero value */ 259 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 260 STNIC_DELAY (); 261 262 STNIC_WRITE (PG0_RBCR0, length & 0xff); 263 STNIC_WRITE (PG0_RBCR1, length >> 8); 264 STNIC_WRITE (PG0_RSAR0, 0); 265 STNIC_WRITE (PG0_RSAR1, output_page); 266 STNIC_WRITE (STNIC_CR, CR_RWR | CR_PG0 | CR_STA); 267 268 if (length & 1) 269 length++; 270 271 while (length > 0) 272 { 273 #ifdef __LITTLE_ENDIAN__ 274 *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0]; 275 #else 276 *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1]; 277 #endif 278 STNIC_DELAY (); 279 buf += sizeof (half); 280 length -= sizeof (half); 281 } 282 283 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 284 } 285 286 /* This function resets the STNIC if something screws up. */ 287 static void 288 stnic_init (struct net_device *dev) 289 { 290 stnic_reset (dev); 291 NS8390_init (dev, 0); 292 } 293 294 static void __exit stnic_cleanup(void) 295 { 296 unregister_netdev(stnic_dev); 297 free_irq(stnic_dev->irq, stnic_dev); 298 free_netdev(stnic_dev); 299 } 300 301 module_init(stnic_probe); 302 module_exit(stnic_cleanup); 303 MODULE_LICENSE("GPL"); 304