1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #include <linux/delay.h> 9 #include <linux/module.h> 10 #include <linux/printk.h> 11 #include <linux/spi/spi.h> 12 #include <linux/errno.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/phylink.h> 15 #include <linux/of.h> 16 #include <linux/of_net.h> 17 #include <linux/of_mdio.h> 18 #include <linux/of_device.h> 19 #include <linux/netdev_features.h> 20 #include <linux/netdevice.h> 21 #include <linux/if_bridge.h> 22 #include <linux/if_ether.h> 23 #include <linux/dsa/8021q.h> 24 #include "sja1105.h" 25 #include "sja1105_tas.h" 26 27 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len, 28 unsigned int startup_delay) 29 { 30 gpiod_set_value_cansleep(gpio, 1); 31 /* Wait for minimum reset pulse length */ 32 msleep(pulse_len); 33 gpiod_set_value_cansleep(gpio, 0); 34 /* Wait until chip is ready after reset */ 35 msleep(startup_delay); 36 } 37 38 static void 39 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd, 40 int from, int to, bool allow) 41 { 42 if (allow) { 43 l2_fwd[from].bc_domain |= BIT(to); 44 l2_fwd[from].reach_port |= BIT(to); 45 l2_fwd[from].fl_domain |= BIT(to); 46 } else { 47 l2_fwd[from].bc_domain &= ~BIT(to); 48 l2_fwd[from].reach_port &= ~BIT(to); 49 l2_fwd[from].fl_domain &= ~BIT(to); 50 } 51 } 52 53 /* Structure used to temporarily transport device tree 54 * settings into sja1105_setup 55 */ 56 struct sja1105_dt_port { 57 phy_interface_t phy_mode; 58 sja1105_mii_role_t role; 59 }; 60 61 static int sja1105_init_mac_settings(struct sja1105_private *priv) 62 { 63 struct sja1105_mac_config_entry default_mac = { 64 /* Enable all 8 priority queues on egress. 65 * Every queue i holds top[i] - base[i] frames. 66 * Sum of top[i] - base[i] is 511 (max hardware limit). 67 */ 68 .top = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF}, 69 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0}, 70 .enabled = {true, true, true, true, true, true, true, true}, 71 /* Keep standard IFG of 12 bytes on egress. */ 72 .ifg = 0, 73 /* Always put the MAC speed in automatic mode, where it can be 74 * adjusted at runtime by PHYLINK. 75 */ 76 .speed = SJA1105_SPEED_AUTO, 77 /* No static correction for 1-step 1588 events */ 78 .tp_delin = 0, 79 .tp_delout = 0, 80 /* Disable aging for critical TTEthernet traffic */ 81 .maxage = 0xFF, 82 /* Internal VLAN (pvid) to apply to untagged ingress */ 83 .vlanprio = 0, 84 .vlanid = 1, 85 .ing_mirr = false, 86 .egr_mirr = false, 87 /* Don't drop traffic with other EtherType than ETH_P_IP */ 88 .drpnona664 = false, 89 /* Don't drop double-tagged traffic */ 90 .drpdtag = false, 91 /* Don't drop untagged traffic */ 92 .drpuntag = false, 93 /* Don't retag 802.1p (VID 0) traffic with the pvid */ 94 .retag = false, 95 /* Disable learning and I/O on user ports by default - 96 * STP will enable it. 97 */ 98 .dyn_learn = false, 99 .egress = false, 100 .ingress = false, 101 }; 102 struct sja1105_mac_config_entry *mac; 103 struct sja1105_table *table; 104 int i; 105 106 table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG]; 107 108 /* Discard previous MAC Configuration Table */ 109 if (table->entry_count) { 110 kfree(table->entries); 111 table->entry_count = 0; 112 } 113 114 table->entries = kcalloc(SJA1105_NUM_PORTS, 115 table->ops->unpacked_entry_size, GFP_KERNEL); 116 if (!table->entries) 117 return -ENOMEM; 118 119 table->entry_count = SJA1105_NUM_PORTS; 120 121 mac = table->entries; 122 123 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 124 mac[i] = default_mac; 125 if (i == dsa_upstream_port(priv->ds, i)) { 126 /* STP doesn't get called for CPU port, so we need to 127 * set the I/O parameters statically. 128 */ 129 mac[i].dyn_learn = true; 130 mac[i].ingress = true; 131 mac[i].egress = true; 132 } 133 } 134 135 return 0; 136 } 137 138 static int sja1105_init_mii_settings(struct sja1105_private *priv, 139 struct sja1105_dt_port *ports) 140 { 141 struct device *dev = &priv->spidev->dev; 142 struct sja1105_xmii_params_entry *mii; 143 struct sja1105_table *table; 144 int i; 145 146 table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS]; 147 148 /* Discard previous xMII Mode Parameters Table */ 149 if (table->entry_count) { 150 kfree(table->entries); 151 table->entry_count = 0; 152 } 153 154 table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT, 155 table->ops->unpacked_entry_size, GFP_KERNEL); 156 if (!table->entries) 157 return -ENOMEM; 158 159 /* Override table based on PHYLINK DT bindings */ 160 table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT; 161 162 mii = table->entries; 163 164 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 165 switch (ports[i].phy_mode) { 166 case PHY_INTERFACE_MODE_MII: 167 mii->xmii_mode[i] = XMII_MODE_MII; 168 break; 169 case PHY_INTERFACE_MODE_RMII: 170 mii->xmii_mode[i] = XMII_MODE_RMII; 171 break; 172 case PHY_INTERFACE_MODE_RGMII: 173 case PHY_INTERFACE_MODE_RGMII_ID: 174 case PHY_INTERFACE_MODE_RGMII_RXID: 175 case PHY_INTERFACE_MODE_RGMII_TXID: 176 mii->xmii_mode[i] = XMII_MODE_RGMII; 177 break; 178 default: 179 dev_err(dev, "Unsupported PHY mode %s!\n", 180 phy_modes(ports[i].phy_mode)); 181 } 182 183 mii->phy_mac[i] = ports[i].role; 184 } 185 return 0; 186 } 187 188 static int sja1105_init_static_fdb(struct sja1105_private *priv) 189 { 190 struct sja1105_table *table; 191 192 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 193 194 /* We only populate the FDB table through dynamic 195 * L2 Address Lookup entries 196 */ 197 if (table->entry_count) { 198 kfree(table->entries); 199 table->entry_count = 0; 200 } 201 return 0; 202 } 203 204 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv) 205 { 206 struct sja1105_table *table; 207 u64 max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / SJA1105_NUM_PORTS; 208 struct sja1105_l2_lookup_params_entry default_l2_lookup_params = { 209 /* Learned FDB entries are forgotten after 300 seconds */ 210 .maxage = SJA1105_AGEING_TIME_MS(300000), 211 /* All entries within a FDB bin are available for learning */ 212 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE, 213 /* And the P/Q/R/S equivalent setting: */ 214 .start_dynspc = 0, 215 .maxaddrp = {max_fdb_entries, max_fdb_entries, max_fdb_entries, 216 max_fdb_entries, max_fdb_entries, }, 217 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */ 218 .poly = 0x97, 219 /* This selects between Independent VLAN Learning (IVL) and 220 * Shared VLAN Learning (SVL) 221 */ 222 .shared_learn = true, 223 /* Don't discard management traffic based on ENFPORT - 224 * we don't perform SMAC port enforcement anyway, so 225 * what we are setting here doesn't matter. 226 */ 227 .no_enf_hostprt = false, 228 /* Don't learn SMAC for mac_fltres1 and mac_fltres0. 229 * Maybe correlate with no_linklocal_learn from bridge driver? 230 */ 231 .no_mgmt_learn = true, 232 /* P/Q/R/S only */ 233 .use_static = true, 234 /* Dynamically learned FDB entries can overwrite other (older) 235 * dynamic FDB entries 236 */ 237 .owr_dyn = true, 238 .drpnolearn = true, 239 }; 240 241 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 242 243 if (table->entry_count) { 244 kfree(table->entries); 245 table->entry_count = 0; 246 } 247 248 table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT, 249 table->ops->unpacked_entry_size, GFP_KERNEL); 250 if (!table->entries) 251 return -ENOMEM; 252 253 table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT; 254 255 /* This table only has a single entry */ 256 ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] = 257 default_l2_lookup_params; 258 259 return 0; 260 } 261 262 static int sja1105_init_static_vlan(struct sja1105_private *priv) 263 { 264 struct sja1105_table *table; 265 struct sja1105_vlan_lookup_entry pvid = { 266 .ving_mirr = 0, 267 .vegr_mirr = 0, 268 .vmemb_port = 0, 269 .vlan_bc = 0, 270 .tag_port = 0, 271 .vlanid = 1, 272 }; 273 int i; 274 275 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; 276 277 /* The static VLAN table will only contain the initial pvid of 1. 278 * All other VLANs are to be configured through dynamic entries, 279 * and kept in the static configuration table as backing memory. 280 */ 281 if (table->entry_count) { 282 kfree(table->entries); 283 table->entry_count = 0; 284 } 285 286 table->entries = kcalloc(1, table->ops->unpacked_entry_size, 287 GFP_KERNEL); 288 if (!table->entries) 289 return -ENOMEM; 290 291 table->entry_count = 1; 292 293 /* VLAN 1: all DT-defined ports are members; no restrictions on 294 * forwarding; always transmit priority-tagged frames as untagged. 295 */ 296 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 297 pvid.vmemb_port |= BIT(i); 298 pvid.vlan_bc |= BIT(i); 299 pvid.tag_port &= ~BIT(i); 300 } 301 302 ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid; 303 return 0; 304 } 305 306 static int sja1105_init_l2_forwarding(struct sja1105_private *priv) 307 { 308 struct sja1105_l2_forwarding_entry *l2fwd; 309 struct sja1105_table *table; 310 int i, j; 311 312 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING]; 313 314 if (table->entry_count) { 315 kfree(table->entries); 316 table->entry_count = 0; 317 } 318 319 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT, 320 table->ops->unpacked_entry_size, GFP_KERNEL); 321 if (!table->entries) 322 return -ENOMEM; 323 324 table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT; 325 326 l2fwd = table->entries; 327 328 /* First 5 entries define the forwarding rules */ 329 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 330 unsigned int upstream = dsa_upstream_port(priv->ds, i); 331 332 for (j = 0; j < SJA1105_NUM_TC; j++) 333 l2fwd[i].vlan_pmap[j] = j; 334 335 if (i == upstream) 336 continue; 337 338 sja1105_port_allow_traffic(l2fwd, i, upstream, true); 339 sja1105_port_allow_traffic(l2fwd, upstream, i, true); 340 } 341 /* Next 8 entries define VLAN PCP mapping from ingress to egress. 342 * Create a one-to-one mapping. 343 */ 344 for (i = 0; i < SJA1105_NUM_TC; i++) 345 for (j = 0; j < SJA1105_NUM_PORTS; j++) 346 l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i; 347 348 return 0; 349 } 350 351 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv) 352 { 353 struct sja1105_l2_forwarding_params_entry default_l2fwd_params = { 354 /* Disallow dynamic reconfiguration of vlan_pmap */ 355 .max_dynp = 0, 356 /* Use a single memory partition for all ingress queues */ 357 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 }, 358 }; 359 struct sja1105_table *table; 360 361 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS]; 362 363 if (table->entry_count) { 364 kfree(table->entries); 365 table->entry_count = 0; 366 } 367 368 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT, 369 table->ops->unpacked_entry_size, GFP_KERNEL); 370 if (!table->entries) 371 return -ENOMEM; 372 373 table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT; 374 375 /* This table only has a single entry */ 376 ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] = 377 default_l2fwd_params; 378 379 return 0; 380 } 381 382 static int sja1105_init_general_params(struct sja1105_private *priv) 383 { 384 struct sja1105_general_params_entry default_general_params = { 385 /* Allow dynamic changing of the mirror port */ 386 .mirr_ptacu = true, 387 .switchid = priv->ds->index, 388 /* Priority queue for link-local management frames 389 * (both ingress to and egress from CPU - PTP, STP etc) 390 */ 391 .hostprio = 7, 392 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A, 393 .mac_flt1 = SJA1105_LINKLOCAL_FILTER_A_MASK, 394 .incl_srcpt1 = false, 395 .send_meta1 = false, 396 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B, 397 .mac_flt0 = SJA1105_LINKLOCAL_FILTER_B_MASK, 398 .incl_srcpt0 = false, 399 .send_meta0 = false, 400 /* The destination for traffic matching mac_fltres1 and 401 * mac_fltres0 on all ports except host_port. Such traffic 402 * receieved on host_port itself would be dropped, except 403 * by installing a temporary 'management route' 404 */ 405 .host_port = dsa_upstream_port(priv->ds, 0), 406 /* Default to an invalid value */ 407 .mirr_port = SJA1105_NUM_PORTS, 408 /* Link-local traffic received on casc_port will be forwarded 409 * to host_port without embedding the source port and device ID 410 * info in the destination MAC address (presumably because it 411 * is a cascaded port and a downstream SJA switch already did 412 * that). Default to an invalid port (to disable the feature) 413 * and overwrite this if we find any DSA (cascaded) ports. 414 */ 415 .casc_port = SJA1105_NUM_PORTS, 416 /* No TTEthernet */ 417 .vllupformat = 0, 418 .vlmarker = 0, 419 .vlmask = 0, 420 /* Only update correctionField for 1-step PTP (L2 transport) */ 421 .ignore2stf = 0, 422 /* Forcefully disable VLAN filtering by telling 423 * the switch that VLAN has a different EtherType. 424 */ 425 .tpid = ETH_P_SJA1105, 426 .tpid2 = ETH_P_SJA1105, 427 }; 428 struct sja1105_table *table; 429 int i, k = 0; 430 431 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 432 if (dsa_is_dsa_port(priv->ds, i)) 433 default_general_params.casc_port = i; 434 else if (dsa_is_user_port(priv->ds, i)) 435 priv->ports[i].mgmt_slot = k++; 436 } 437 438 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 439 440 if (table->entry_count) { 441 kfree(table->entries); 442 table->entry_count = 0; 443 } 444 445 table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT, 446 table->ops->unpacked_entry_size, GFP_KERNEL); 447 if (!table->entries) 448 return -ENOMEM; 449 450 table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT; 451 452 /* This table only has a single entry */ 453 ((struct sja1105_general_params_entry *)table->entries)[0] = 454 default_general_params; 455 456 return 0; 457 } 458 459 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000) 460 461 static void sja1105_setup_policer(struct sja1105_l2_policing_entry *policing, 462 int index) 463 { 464 policing[index].sharindx = index; 465 policing[index].smax = 65535; /* Burst size in bytes */ 466 policing[index].rate = SJA1105_RATE_MBPS(1000); 467 policing[index].maxlen = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 468 policing[index].partition = 0; 469 } 470 471 static int sja1105_init_l2_policing(struct sja1105_private *priv) 472 { 473 struct sja1105_l2_policing_entry *policing; 474 struct sja1105_table *table; 475 int i, j, k; 476 477 table = &priv->static_config.tables[BLK_IDX_L2_POLICING]; 478 479 /* Discard previous L2 Policing Table */ 480 if (table->entry_count) { 481 kfree(table->entries); 482 table->entry_count = 0; 483 } 484 485 table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT, 486 table->ops->unpacked_entry_size, GFP_KERNEL); 487 if (!table->entries) 488 return -ENOMEM; 489 490 table->entry_count = SJA1105_MAX_L2_POLICING_COUNT; 491 492 policing = table->entries; 493 494 /* k sweeps through all unicast policers (0-39). 495 * bcast sweeps through policers 40-44. 496 */ 497 for (i = 0, k = 0; i < SJA1105_NUM_PORTS; i++) { 498 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + i; 499 500 for (j = 0; j < SJA1105_NUM_TC; j++, k++) 501 sja1105_setup_policer(policing, k); 502 503 /* Set up this port's policer for broadcast traffic */ 504 sja1105_setup_policer(policing, bcast); 505 } 506 return 0; 507 } 508 509 static int sja1105_static_config_load(struct sja1105_private *priv, 510 struct sja1105_dt_port *ports) 511 { 512 int rc; 513 514 sja1105_static_config_free(&priv->static_config); 515 rc = sja1105_static_config_init(&priv->static_config, 516 priv->info->static_ops, 517 priv->info->device_id); 518 if (rc) 519 return rc; 520 521 /* Build static configuration */ 522 rc = sja1105_init_mac_settings(priv); 523 if (rc < 0) 524 return rc; 525 rc = sja1105_init_mii_settings(priv, ports); 526 if (rc < 0) 527 return rc; 528 rc = sja1105_init_static_fdb(priv); 529 if (rc < 0) 530 return rc; 531 rc = sja1105_init_static_vlan(priv); 532 if (rc < 0) 533 return rc; 534 rc = sja1105_init_l2_lookup_params(priv); 535 if (rc < 0) 536 return rc; 537 rc = sja1105_init_l2_forwarding(priv); 538 if (rc < 0) 539 return rc; 540 rc = sja1105_init_l2_forwarding_params(priv); 541 if (rc < 0) 542 return rc; 543 rc = sja1105_init_l2_policing(priv); 544 if (rc < 0) 545 return rc; 546 rc = sja1105_init_general_params(priv); 547 if (rc < 0) 548 return rc; 549 550 /* Send initial configuration to hardware via SPI */ 551 return sja1105_static_config_upload(priv); 552 } 553 554 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv, 555 const struct sja1105_dt_port *ports) 556 { 557 int i; 558 559 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 560 if (ports[i].role == XMII_MAC) 561 continue; 562 563 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_RXID || 564 ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID) 565 priv->rgmii_rx_delay[i] = true; 566 567 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_TXID || 568 ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID) 569 priv->rgmii_tx_delay[i] = true; 570 571 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) && 572 !priv->info->setup_rgmii_delay) 573 return -EINVAL; 574 } 575 return 0; 576 } 577 578 static int sja1105_parse_ports_node(struct sja1105_private *priv, 579 struct sja1105_dt_port *ports, 580 struct device_node *ports_node) 581 { 582 struct device *dev = &priv->spidev->dev; 583 struct device_node *child; 584 585 for_each_child_of_node(ports_node, child) { 586 struct device_node *phy_node; 587 phy_interface_t phy_mode; 588 u32 index; 589 int err; 590 591 /* Get switch port number from DT */ 592 if (of_property_read_u32(child, "reg", &index) < 0) { 593 dev_err(dev, "Port number not defined in device tree " 594 "(property \"reg\")\n"); 595 of_node_put(child); 596 return -ENODEV; 597 } 598 599 /* Get PHY mode from DT */ 600 err = of_get_phy_mode(child, &phy_mode); 601 if (err) { 602 dev_err(dev, "Failed to read phy-mode or " 603 "phy-interface-type property for port %d\n", 604 index); 605 of_node_put(child); 606 return -ENODEV; 607 } 608 ports[index].phy_mode = phy_mode; 609 610 phy_node = of_parse_phandle(child, "phy-handle", 0); 611 if (!phy_node) { 612 if (!of_phy_is_fixed_link(child)) { 613 dev_err(dev, "phy-handle or fixed-link " 614 "properties missing!\n"); 615 of_node_put(child); 616 return -ENODEV; 617 } 618 /* phy-handle is missing, but fixed-link isn't. 619 * So it's a fixed link. Default to PHY role. 620 */ 621 ports[index].role = XMII_PHY; 622 } else { 623 /* phy-handle present => put port in MAC role */ 624 ports[index].role = XMII_MAC; 625 of_node_put(phy_node); 626 } 627 628 /* The MAC/PHY role can be overridden with explicit bindings */ 629 if (of_property_read_bool(child, "sja1105,role-mac")) 630 ports[index].role = XMII_MAC; 631 else if (of_property_read_bool(child, "sja1105,role-phy")) 632 ports[index].role = XMII_PHY; 633 } 634 635 return 0; 636 } 637 638 static int sja1105_parse_dt(struct sja1105_private *priv, 639 struct sja1105_dt_port *ports) 640 { 641 struct device *dev = &priv->spidev->dev; 642 struct device_node *switch_node = dev->of_node; 643 struct device_node *ports_node; 644 int rc; 645 646 ports_node = of_get_child_by_name(switch_node, "ports"); 647 if (!ports_node) { 648 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 649 return -ENODEV; 650 } 651 652 rc = sja1105_parse_ports_node(priv, ports, ports_node); 653 of_node_put(ports_node); 654 655 return rc; 656 } 657 658 /* Convert link speed from SJA1105 to ethtool encoding */ 659 static int sja1105_speed[] = { 660 [SJA1105_SPEED_AUTO] = SPEED_UNKNOWN, 661 [SJA1105_SPEED_10MBPS] = SPEED_10, 662 [SJA1105_SPEED_100MBPS] = SPEED_100, 663 [SJA1105_SPEED_1000MBPS] = SPEED_1000, 664 }; 665 666 /* Set link speed in the MAC configuration for a specific port. */ 667 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port, 668 int speed_mbps) 669 { 670 struct sja1105_xmii_params_entry *mii; 671 struct sja1105_mac_config_entry *mac; 672 struct device *dev = priv->ds->dev; 673 sja1105_phy_interface_t phy_mode; 674 sja1105_speed_t speed; 675 int rc; 676 677 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration 678 * tables. On E/T, MAC reconfig tables are not readable, only writable. 679 * We have to *know* what the MAC looks like. For the sake of keeping 680 * the code common, we'll use the static configuration tables as a 681 * reasonable approximation for both E/T and P/Q/R/S. 682 */ 683 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 684 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; 685 686 switch (speed_mbps) { 687 case SPEED_UNKNOWN: 688 /* PHYLINK called sja1105_mac_config() to inform us about 689 * the state->interface, but AN has not completed and the 690 * speed is not yet valid. UM10944.pdf says that setting 691 * SJA1105_SPEED_AUTO at runtime disables the port, so that is 692 * ok for power consumption in case AN will never complete - 693 * otherwise PHYLINK should come back with a new update. 694 */ 695 speed = SJA1105_SPEED_AUTO; 696 break; 697 case SPEED_10: 698 speed = SJA1105_SPEED_10MBPS; 699 break; 700 case SPEED_100: 701 speed = SJA1105_SPEED_100MBPS; 702 break; 703 case SPEED_1000: 704 speed = SJA1105_SPEED_1000MBPS; 705 break; 706 default: 707 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps); 708 return -EINVAL; 709 } 710 711 /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration 712 * table, since this will be used for the clocking setup, and we no 713 * longer need to store it in the static config (already told hardware 714 * we want auto during upload phase). 715 */ 716 mac[port].speed = speed; 717 718 /* Write to the dynamic reconfiguration tables */ 719 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 720 &mac[port], true); 721 if (rc < 0) { 722 dev_err(dev, "Failed to write MAC config: %d\n", rc); 723 return rc; 724 } 725 726 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at 727 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and 728 * RMII no change of the clock setup is required. Actually, changing 729 * the clock setup does interrupt the clock signal for a certain time 730 * which causes trouble for all PHYs relying on this signal. 731 */ 732 phy_mode = mii->xmii_mode[port]; 733 if (phy_mode != XMII_MODE_RGMII) 734 return 0; 735 736 return sja1105_clocking_setup_port(priv, port); 737 } 738 739 /* The SJA1105 MAC programming model is through the static config (the xMII 740 * Mode table cannot be dynamically reconfigured), and we have to program 741 * that early (earlier than PHYLINK calls us, anyway). 742 * So just error out in case the connected PHY attempts to change the initial 743 * system interface MII protocol from what is defined in the DT, at least for 744 * now. 745 */ 746 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port, 747 phy_interface_t interface) 748 { 749 struct sja1105_xmii_params_entry *mii; 750 sja1105_phy_interface_t phy_mode; 751 752 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; 753 phy_mode = mii->xmii_mode[port]; 754 755 switch (interface) { 756 case PHY_INTERFACE_MODE_MII: 757 return (phy_mode != XMII_MODE_MII); 758 case PHY_INTERFACE_MODE_RMII: 759 return (phy_mode != XMII_MODE_RMII); 760 case PHY_INTERFACE_MODE_RGMII: 761 case PHY_INTERFACE_MODE_RGMII_ID: 762 case PHY_INTERFACE_MODE_RGMII_RXID: 763 case PHY_INTERFACE_MODE_RGMII_TXID: 764 return (phy_mode != XMII_MODE_RGMII); 765 default: 766 return true; 767 } 768 } 769 770 static void sja1105_mac_config(struct dsa_switch *ds, int port, 771 unsigned int link_an_mode, 772 const struct phylink_link_state *state) 773 { 774 struct sja1105_private *priv = ds->priv; 775 776 if (sja1105_phy_mode_mismatch(priv, port, state->interface)) 777 return; 778 779 if (link_an_mode == MLO_AN_INBAND) { 780 dev_err(ds->dev, "In-band AN not supported!\n"); 781 return; 782 } 783 784 sja1105_adjust_port_config(priv, port, state->speed); 785 } 786 787 static void sja1105_mac_link_down(struct dsa_switch *ds, int port, 788 unsigned int mode, 789 phy_interface_t interface) 790 { 791 sja1105_inhibit_tx(ds->priv, BIT(port), true); 792 } 793 794 static void sja1105_mac_link_up(struct dsa_switch *ds, int port, 795 unsigned int mode, 796 phy_interface_t interface, 797 struct phy_device *phydev) 798 { 799 sja1105_inhibit_tx(ds->priv, BIT(port), false); 800 } 801 802 static void sja1105_phylink_validate(struct dsa_switch *ds, int port, 803 unsigned long *supported, 804 struct phylink_link_state *state) 805 { 806 /* Construct a new mask which exhaustively contains all link features 807 * supported by the MAC, and then apply that (logical AND) to what will 808 * be sent to the PHY for "marketing". 809 */ 810 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 811 struct sja1105_private *priv = ds->priv; 812 struct sja1105_xmii_params_entry *mii; 813 814 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; 815 816 /* include/linux/phylink.h says: 817 * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink 818 * expects the MAC driver to return all supported link modes. 819 */ 820 if (state->interface != PHY_INTERFACE_MODE_NA && 821 sja1105_phy_mode_mismatch(priv, port, state->interface)) { 822 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 823 return; 824 } 825 826 /* The MAC does not support pause frames, and also doesn't 827 * support half-duplex traffic modes. 828 */ 829 phylink_set(mask, Autoneg); 830 phylink_set(mask, MII); 831 phylink_set(mask, 10baseT_Full); 832 phylink_set(mask, 100baseT_Full); 833 if (mii->xmii_mode[port] == XMII_MODE_RGMII) 834 phylink_set(mask, 1000baseT_Full); 835 836 bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); 837 bitmap_and(state->advertising, state->advertising, mask, 838 __ETHTOOL_LINK_MODE_MASK_NBITS); 839 } 840 841 static int 842 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port, 843 const struct sja1105_l2_lookup_entry *requested) 844 { 845 struct sja1105_l2_lookup_entry *l2_lookup; 846 struct sja1105_table *table; 847 int i; 848 849 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 850 l2_lookup = table->entries; 851 852 for (i = 0; i < table->entry_count; i++) 853 if (l2_lookup[i].macaddr == requested->macaddr && 854 l2_lookup[i].vlanid == requested->vlanid && 855 l2_lookup[i].destports & BIT(port)) 856 return i; 857 858 return -1; 859 } 860 861 /* We want FDB entries added statically through the bridge command to persist 862 * across switch resets, which are a common thing during normal SJA1105 863 * operation. So we have to back them up in the static configuration tables 864 * and hence apply them on next static config upload... yay! 865 */ 866 static int 867 sja1105_static_fdb_change(struct sja1105_private *priv, int port, 868 const struct sja1105_l2_lookup_entry *requested, 869 bool keep) 870 { 871 struct sja1105_l2_lookup_entry *l2_lookup; 872 struct sja1105_table *table; 873 int rc, match; 874 875 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 876 877 match = sja1105_find_static_fdb_entry(priv, port, requested); 878 if (match < 0) { 879 /* Can't delete a missing entry. */ 880 if (!keep) 881 return 0; 882 883 /* No match => new entry */ 884 rc = sja1105_table_resize(table, table->entry_count + 1); 885 if (rc) 886 return rc; 887 888 match = table->entry_count - 1; 889 } 890 891 /* Assign pointer after the resize (it may be new memory) */ 892 l2_lookup = table->entries; 893 894 /* We have a match. 895 * If the job was to add this FDB entry, it's already done (mostly 896 * anyway, since the port forwarding mask may have changed, case in 897 * which we update it). 898 * Otherwise we have to delete it. 899 */ 900 if (keep) { 901 l2_lookup[match] = *requested; 902 return 0; 903 } 904 905 /* To remove, the strategy is to overwrite the element with 906 * the last one, and then reduce the array size by 1 907 */ 908 l2_lookup[match] = l2_lookup[table->entry_count - 1]; 909 return sja1105_table_resize(table, table->entry_count - 1); 910 } 911 912 /* First-generation switches have a 4-way set associative TCAM that 913 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of 914 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin). 915 * For the placement of a newly learnt FDB entry, the switch selects the bin 916 * based on a hash function, and the way within that bin incrementally. 917 */ 918 static int sja1105et_fdb_index(int bin, int way) 919 { 920 return bin * SJA1105ET_FDB_BIN_SIZE + way; 921 } 922 923 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin, 924 const u8 *addr, u16 vid, 925 struct sja1105_l2_lookup_entry *match, 926 int *last_unused) 927 { 928 int way; 929 930 for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) { 931 struct sja1105_l2_lookup_entry l2_lookup = {0}; 932 int index = sja1105et_fdb_index(bin, way); 933 934 /* Skip unused entries, optionally marking them 935 * into the return value 936 */ 937 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 938 index, &l2_lookup)) { 939 if (last_unused) 940 *last_unused = way; 941 continue; 942 } 943 944 if (l2_lookup.macaddr == ether_addr_to_u64(addr) && 945 l2_lookup.vlanid == vid) { 946 if (match) 947 *match = l2_lookup; 948 return way; 949 } 950 } 951 /* Return an invalid entry index if not found */ 952 return -1; 953 } 954 955 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 956 const unsigned char *addr, u16 vid) 957 { 958 struct sja1105_l2_lookup_entry l2_lookup = {0}; 959 struct sja1105_private *priv = ds->priv; 960 struct device *dev = ds->dev; 961 int last_unused = -1; 962 int bin, way, rc; 963 964 bin = sja1105et_fdb_hash(priv, addr, vid); 965 966 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid, 967 &l2_lookup, &last_unused); 968 if (way >= 0) { 969 /* We have an FDB entry. Is our port in the destination 970 * mask? If yes, we need to do nothing. If not, we need 971 * to rewrite the entry by adding this port to it. 972 */ 973 if (l2_lookup.destports & BIT(port)) 974 return 0; 975 l2_lookup.destports |= BIT(port); 976 } else { 977 int index = sja1105et_fdb_index(bin, way); 978 979 /* We don't have an FDB entry. We construct a new one and 980 * try to find a place for it within the FDB table. 981 */ 982 l2_lookup.macaddr = ether_addr_to_u64(addr); 983 l2_lookup.destports = BIT(port); 984 l2_lookup.vlanid = vid; 985 986 if (last_unused >= 0) { 987 way = last_unused; 988 } else { 989 /* Bin is full, need to evict somebody. 990 * Choose victim at random. If you get these messages 991 * often, you may need to consider changing the 992 * distribution function: 993 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly 994 */ 995 get_random_bytes(&way, sizeof(u8)); 996 way %= SJA1105ET_FDB_BIN_SIZE; 997 dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n", 998 bin, addr, way); 999 /* Evict entry */ 1000 sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1001 index, NULL, false); 1002 } 1003 } 1004 l2_lookup.index = sja1105et_fdb_index(bin, way); 1005 1006 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1007 l2_lookup.index, &l2_lookup, 1008 true); 1009 if (rc < 0) 1010 return rc; 1011 1012 return sja1105_static_fdb_change(priv, port, &l2_lookup, true); 1013 } 1014 1015 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 1016 const unsigned char *addr, u16 vid) 1017 { 1018 struct sja1105_l2_lookup_entry l2_lookup = {0}; 1019 struct sja1105_private *priv = ds->priv; 1020 int index, bin, way, rc; 1021 bool keep; 1022 1023 bin = sja1105et_fdb_hash(priv, addr, vid); 1024 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid, 1025 &l2_lookup, NULL); 1026 if (way < 0) 1027 return 0; 1028 index = sja1105et_fdb_index(bin, way); 1029 1030 /* We have an FDB entry. Is our port in the destination mask? If yes, 1031 * we need to remove it. If the resulting port mask becomes empty, we 1032 * need to completely evict the FDB entry. 1033 * Otherwise we just write it back. 1034 */ 1035 l2_lookup.destports &= ~BIT(port); 1036 1037 if (l2_lookup.destports) 1038 keep = true; 1039 else 1040 keep = false; 1041 1042 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1043 index, &l2_lookup, keep); 1044 if (rc < 0) 1045 return rc; 1046 1047 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep); 1048 } 1049 1050 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 1051 const unsigned char *addr, u16 vid) 1052 { 1053 struct sja1105_l2_lookup_entry l2_lookup = {0}; 1054 struct sja1105_private *priv = ds->priv; 1055 int rc, i; 1056 1057 /* Search for an existing entry in the FDB table */ 1058 l2_lookup.macaddr = ether_addr_to_u64(addr); 1059 l2_lookup.vlanid = vid; 1060 l2_lookup.iotag = SJA1105_S_TAG; 1061 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0); 1062 if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) { 1063 l2_lookup.mask_vlanid = VLAN_VID_MASK; 1064 l2_lookup.mask_iotag = BIT(0); 1065 } else { 1066 l2_lookup.mask_vlanid = 0; 1067 l2_lookup.mask_iotag = 0; 1068 } 1069 l2_lookup.destports = BIT(port); 1070 1071 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1072 SJA1105_SEARCH, &l2_lookup); 1073 if (rc == 0) { 1074 /* Found and this port is already in the entry's 1075 * port mask => job done 1076 */ 1077 if (l2_lookup.destports & BIT(port)) 1078 return 0; 1079 /* l2_lookup.index is populated by the switch in case it 1080 * found something. 1081 */ 1082 l2_lookup.destports |= BIT(port); 1083 goto skip_finding_an_index; 1084 } 1085 1086 /* Not found, so try to find an unused spot in the FDB. 1087 * This is slightly inefficient because the strategy is knock-knock at 1088 * every possible position from 0 to 1023. 1089 */ 1090 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) { 1091 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1092 i, NULL); 1093 if (rc < 0) 1094 break; 1095 } 1096 if (i == SJA1105_MAX_L2_LOOKUP_COUNT) { 1097 dev_err(ds->dev, "FDB is full, cannot add entry.\n"); 1098 return -EINVAL; 1099 } 1100 l2_lookup.lockeds = true; 1101 l2_lookup.index = i; 1102 1103 skip_finding_an_index: 1104 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1105 l2_lookup.index, &l2_lookup, 1106 true); 1107 if (rc < 0) 1108 return rc; 1109 1110 return sja1105_static_fdb_change(priv, port, &l2_lookup, true); 1111 } 1112 1113 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 1114 const unsigned char *addr, u16 vid) 1115 { 1116 struct sja1105_l2_lookup_entry l2_lookup = {0}; 1117 struct sja1105_private *priv = ds->priv; 1118 bool keep; 1119 int rc; 1120 1121 l2_lookup.macaddr = ether_addr_to_u64(addr); 1122 l2_lookup.vlanid = vid; 1123 l2_lookup.iotag = SJA1105_S_TAG; 1124 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0); 1125 if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) { 1126 l2_lookup.mask_vlanid = VLAN_VID_MASK; 1127 l2_lookup.mask_iotag = BIT(0); 1128 } else { 1129 l2_lookup.mask_vlanid = 0; 1130 l2_lookup.mask_iotag = 0; 1131 } 1132 l2_lookup.destports = BIT(port); 1133 1134 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1135 SJA1105_SEARCH, &l2_lookup); 1136 if (rc < 0) 1137 return 0; 1138 1139 l2_lookup.destports &= ~BIT(port); 1140 1141 /* Decide whether we remove just this port from the FDB entry, 1142 * or if we remove it completely. 1143 */ 1144 if (l2_lookup.destports) 1145 keep = true; 1146 else 1147 keep = false; 1148 1149 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1150 l2_lookup.index, &l2_lookup, keep); 1151 if (rc < 0) 1152 return rc; 1153 1154 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep); 1155 } 1156 1157 static int sja1105_fdb_add(struct dsa_switch *ds, int port, 1158 const unsigned char *addr, u16 vid) 1159 { 1160 struct sja1105_private *priv = ds->priv; 1161 1162 /* dsa_8021q is in effect when the bridge's vlan_filtering isn't, 1163 * so the switch still does some VLAN processing internally. 1164 * But Shared VLAN Learning (SVL) is also active, and it will take 1165 * care of autonomous forwarding between the unique pvid's of each 1166 * port. Here we just make sure that users can't add duplicate FDB 1167 * entries when in this mode - the actual VID doesn't matter except 1168 * for what gets printed in 'bridge fdb show'. In the case of zero, 1169 * no VID gets printed at all. 1170 */ 1171 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) 1172 vid = 0; 1173 1174 return priv->info->fdb_add_cmd(ds, port, addr, vid); 1175 } 1176 1177 static int sja1105_fdb_del(struct dsa_switch *ds, int port, 1178 const unsigned char *addr, u16 vid) 1179 { 1180 struct sja1105_private *priv = ds->priv; 1181 1182 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) 1183 vid = 0; 1184 1185 return priv->info->fdb_del_cmd(ds, port, addr, vid); 1186 } 1187 1188 static int sja1105_fdb_dump(struct dsa_switch *ds, int port, 1189 dsa_fdb_dump_cb_t *cb, void *data) 1190 { 1191 struct sja1105_private *priv = ds->priv; 1192 struct device *dev = ds->dev; 1193 int i; 1194 1195 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) { 1196 struct sja1105_l2_lookup_entry l2_lookup = {0}; 1197 u8 macaddr[ETH_ALEN]; 1198 int rc; 1199 1200 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1201 i, &l2_lookup); 1202 /* No fdb entry at i, not an issue */ 1203 if (rc == -ENOENT) 1204 continue; 1205 if (rc) { 1206 dev_err(dev, "Failed to dump FDB: %d\n", rc); 1207 return rc; 1208 } 1209 1210 /* FDB dump callback is per port. This means we have to 1211 * disregard a valid entry if it's not for this port, even if 1212 * only to revisit it later. This is inefficient because the 1213 * 1024-sized FDB table needs to be traversed 4 times through 1214 * SPI during a 'bridge fdb show' command. 1215 */ 1216 if (!(l2_lookup.destports & BIT(port))) 1217 continue; 1218 u64_to_ether_addr(l2_lookup.macaddr, macaddr); 1219 1220 /* We need to hide the dsa_8021q VLANs from the user. */ 1221 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) 1222 l2_lookup.vlanid = 0; 1223 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data); 1224 } 1225 return 0; 1226 } 1227 1228 /* This callback needs to be present */ 1229 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port, 1230 const struct switchdev_obj_port_mdb *mdb) 1231 { 1232 return 0; 1233 } 1234 1235 static void sja1105_mdb_add(struct dsa_switch *ds, int port, 1236 const struct switchdev_obj_port_mdb *mdb) 1237 { 1238 sja1105_fdb_add(ds, port, mdb->addr, mdb->vid); 1239 } 1240 1241 static int sja1105_mdb_del(struct dsa_switch *ds, int port, 1242 const struct switchdev_obj_port_mdb *mdb) 1243 { 1244 return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid); 1245 } 1246 1247 static int sja1105_bridge_member(struct dsa_switch *ds, int port, 1248 struct net_device *br, bool member) 1249 { 1250 struct sja1105_l2_forwarding_entry *l2_fwd; 1251 struct sja1105_private *priv = ds->priv; 1252 int i, rc; 1253 1254 l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries; 1255 1256 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 1257 /* Add this port to the forwarding matrix of the 1258 * other ports in the same bridge, and viceversa. 1259 */ 1260 if (!dsa_is_user_port(ds, i)) 1261 continue; 1262 /* For the ports already under the bridge, only one thing needs 1263 * to be done, and that is to add this port to their 1264 * reachability domain. So we can perform the SPI write for 1265 * them immediately. However, for this port itself (the one 1266 * that is new to the bridge), we need to add all other ports 1267 * to its reachability domain. So we do that incrementally in 1268 * this loop, and perform the SPI write only at the end, once 1269 * the domain contains all other bridge ports. 1270 */ 1271 if (i == port) 1272 continue; 1273 if (dsa_to_port(ds, i)->bridge_dev != br) 1274 continue; 1275 sja1105_port_allow_traffic(l2_fwd, i, port, member); 1276 sja1105_port_allow_traffic(l2_fwd, port, i, member); 1277 1278 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING, 1279 i, &l2_fwd[i], true); 1280 if (rc < 0) 1281 return rc; 1282 } 1283 1284 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING, 1285 port, &l2_fwd[port], true); 1286 } 1287 1288 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port, 1289 u8 state) 1290 { 1291 struct sja1105_private *priv = ds->priv; 1292 struct sja1105_mac_config_entry *mac; 1293 1294 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 1295 1296 switch (state) { 1297 case BR_STATE_DISABLED: 1298 case BR_STATE_BLOCKING: 1299 /* From UM10944 description of DRPDTAG (why put this there?): 1300 * "Management traffic flows to the port regardless of the state 1301 * of the INGRESS flag". So BPDUs are still be allowed to pass. 1302 * At the moment no difference between DISABLED and BLOCKING. 1303 */ 1304 mac[port].ingress = false; 1305 mac[port].egress = false; 1306 mac[port].dyn_learn = false; 1307 break; 1308 case BR_STATE_LISTENING: 1309 mac[port].ingress = true; 1310 mac[port].egress = false; 1311 mac[port].dyn_learn = false; 1312 break; 1313 case BR_STATE_LEARNING: 1314 mac[port].ingress = true; 1315 mac[port].egress = false; 1316 mac[port].dyn_learn = true; 1317 break; 1318 case BR_STATE_FORWARDING: 1319 mac[port].ingress = true; 1320 mac[port].egress = true; 1321 mac[port].dyn_learn = true; 1322 break; 1323 default: 1324 dev_err(ds->dev, "invalid STP state: %d\n", state); 1325 return; 1326 } 1327 1328 sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 1329 &mac[port], true); 1330 } 1331 1332 static int sja1105_bridge_join(struct dsa_switch *ds, int port, 1333 struct net_device *br) 1334 { 1335 return sja1105_bridge_member(ds, port, br, true); 1336 } 1337 1338 static void sja1105_bridge_leave(struct dsa_switch *ds, int port, 1339 struct net_device *br) 1340 { 1341 sja1105_bridge_member(ds, port, br, false); 1342 } 1343 1344 static const char * const sja1105_reset_reasons[] = { 1345 [SJA1105_VLAN_FILTERING] = "VLAN filtering", 1346 [SJA1105_RX_HWTSTAMPING] = "RX timestamping", 1347 [SJA1105_AGEING_TIME] = "Ageing time", 1348 [SJA1105_SCHEDULING] = "Time-aware scheduling", 1349 }; 1350 1351 /* For situations where we need to change a setting at runtime that is only 1352 * available through the static configuration, resetting the switch in order 1353 * to upload the new static config is unavoidable. Back up the settings we 1354 * modify at runtime (currently only MAC) and restore them after uploading, 1355 * such that this operation is relatively seamless. 1356 */ 1357 int sja1105_static_config_reload(struct sja1105_private *priv, 1358 enum sja1105_reset_reason reason) 1359 { 1360 struct ptp_system_timestamp ptp_sts_before; 1361 struct ptp_system_timestamp ptp_sts_after; 1362 struct sja1105_mac_config_entry *mac; 1363 int speed_mbps[SJA1105_NUM_PORTS]; 1364 struct dsa_switch *ds = priv->ds; 1365 s64 t1, t2, t3, t4; 1366 s64 t12, t34; 1367 int rc, i; 1368 s64 now; 1369 1370 mutex_lock(&priv->mgmt_lock); 1371 1372 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 1373 1374 /* Back up the dynamic link speed changed by sja1105_adjust_port_config 1375 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the 1376 * switch wants to see in the static config in order to allow us to 1377 * change it through the dynamic interface later. 1378 */ 1379 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 1380 speed_mbps[i] = sja1105_speed[mac[i].speed]; 1381 mac[i].speed = SJA1105_SPEED_AUTO; 1382 } 1383 1384 /* No PTP operations can run right now */ 1385 mutex_lock(&priv->ptp_data.lock); 1386 1387 rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before); 1388 if (rc < 0) 1389 goto out_unlock_ptp; 1390 1391 /* Reset switch and send updated static configuration */ 1392 rc = sja1105_static_config_upload(priv); 1393 if (rc < 0) 1394 goto out_unlock_ptp; 1395 1396 rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after); 1397 if (rc < 0) 1398 goto out_unlock_ptp; 1399 1400 t1 = timespec64_to_ns(&ptp_sts_before.pre_ts); 1401 t2 = timespec64_to_ns(&ptp_sts_before.post_ts); 1402 t3 = timespec64_to_ns(&ptp_sts_after.pre_ts); 1403 t4 = timespec64_to_ns(&ptp_sts_after.post_ts); 1404 /* Mid point, corresponds to pre-reset PTPCLKVAL */ 1405 t12 = t1 + (t2 - t1) / 2; 1406 /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */ 1407 t34 = t3 + (t4 - t3) / 2; 1408 /* Advance PTPCLKVAL by the time it took since its readout */ 1409 now += (t34 - t12); 1410 1411 __sja1105_ptp_adjtime(ds, now); 1412 1413 out_unlock_ptp: 1414 mutex_unlock(&priv->ptp_data.lock); 1415 1416 dev_info(priv->ds->dev, 1417 "Reset switch and programmed static config. Reason: %s\n", 1418 sja1105_reset_reasons[reason]); 1419 1420 /* Configure the CGU (PLLs) for MII and RMII PHYs. 1421 * For these interfaces there is no dynamic configuration 1422 * needed, since PLLs have same settings at all speeds. 1423 */ 1424 rc = sja1105_clocking_setup(priv); 1425 if (rc < 0) 1426 goto out; 1427 1428 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 1429 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]); 1430 if (rc < 0) 1431 goto out; 1432 } 1433 out: 1434 mutex_unlock(&priv->mgmt_lock); 1435 1436 return rc; 1437 } 1438 1439 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid) 1440 { 1441 struct sja1105_mac_config_entry *mac; 1442 1443 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 1444 1445 mac[port].vlanid = pvid; 1446 1447 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 1448 &mac[port], true); 1449 } 1450 1451 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid) 1452 { 1453 struct sja1105_vlan_lookup_entry *vlan; 1454 int count, i; 1455 1456 vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries; 1457 count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count; 1458 1459 for (i = 0; i < count; i++) 1460 if (vlan[i].vlanid == vid) 1461 return i; 1462 1463 /* Return an invalid entry index if not found */ 1464 return -1; 1465 } 1466 1467 static int sja1105_vlan_apply(struct sja1105_private *priv, int port, u16 vid, 1468 bool enabled, bool untagged) 1469 { 1470 struct sja1105_vlan_lookup_entry *vlan; 1471 struct sja1105_table *table; 1472 bool keep = true; 1473 int match, rc; 1474 1475 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; 1476 1477 match = sja1105_is_vlan_configured(priv, vid); 1478 if (match < 0) { 1479 /* Can't delete a missing entry. */ 1480 if (!enabled) 1481 return 0; 1482 rc = sja1105_table_resize(table, table->entry_count + 1); 1483 if (rc) 1484 return rc; 1485 match = table->entry_count - 1; 1486 } 1487 /* Assign pointer after the resize (it's new memory) */ 1488 vlan = table->entries; 1489 vlan[match].vlanid = vid; 1490 if (enabled) { 1491 vlan[match].vlan_bc |= BIT(port); 1492 vlan[match].vmemb_port |= BIT(port); 1493 } else { 1494 vlan[match].vlan_bc &= ~BIT(port); 1495 vlan[match].vmemb_port &= ~BIT(port); 1496 } 1497 /* Also unset tag_port if removing this VLAN was requested, 1498 * just so we don't have a confusing bitmap (no practical purpose). 1499 */ 1500 if (untagged || !enabled) 1501 vlan[match].tag_port &= ~BIT(port); 1502 else 1503 vlan[match].tag_port |= BIT(port); 1504 /* If there's no port left as member of this VLAN, 1505 * it's time for it to go. 1506 */ 1507 if (!vlan[match].vmemb_port) 1508 keep = false; 1509 1510 dev_dbg(priv->ds->dev, 1511 "%s: port %d, vid %llu, broadcast domain 0x%llx, " 1512 "port members 0x%llx, tagged ports 0x%llx, keep %d\n", 1513 __func__, port, vlan[match].vlanid, vlan[match].vlan_bc, 1514 vlan[match].vmemb_port, vlan[match].tag_port, keep); 1515 1516 rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid, 1517 &vlan[match], keep); 1518 if (rc < 0) 1519 return rc; 1520 1521 if (!keep) 1522 return sja1105_table_delete_entry(table, match); 1523 1524 return 0; 1525 } 1526 1527 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled) 1528 { 1529 int rc, i; 1530 1531 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 1532 rc = dsa_port_setup_8021q_tagging(ds, i, enabled); 1533 if (rc < 0) { 1534 dev_err(ds->dev, "Failed to setup VLAN tagging for port %d: %d\n", 1535 i, rc); 1536 return rc; 1537 } 1538 } 1539 dev_info(ds->dev, "%s switch tagging\n", 1540 enabled ? "Enabled" : "Disabled"); 1541 return 0; 1542 } 1543 1544 static enum dsa_tag_protocol 1545 sja1105_get_tag_protocol(struct dsa_switch *ds, int port) 1546 { 1547 return DSA_TAG_PROTO_SJA1105; 1548 } 1549 1550 /* This callback needs to be present */ 1551 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port, 1552 const struct switchdev_obj_port_vlan *vlan) 1553 { 1554 return 0; 1555 } 1556 1557 /* The TPID setting belongs to the General Parameters table, 1558 * which can only be partially reconfigured at runtime (and not the TPID). 1559 * So a switch reset is required. 1560 */ 1561 static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 1562 { 1563 struct sja1105_l2_lookup_params_entry *l2_lookup_params; 1564 struct sja1105_general_params_entry *general_params; 1565 struct sja1105_private *priv = ds->priv; 1566 struct sja1105_table *table; 1567 u16 tpid, tpid2; 1568 int rc; 1569 1570 if (enabled) { 1571 /* Enable VLAN filtering. */ 1572 tpid = ETH_P_8021Q; 1573 tpid2 = ETH_P_8021AD; 1574 } else { 1575 /* Disable VLAN filtering. */ 1576 tpid = ETH_P_SJA1105; 1577 tpid2 = ETH_P_SJA1105; 1578 } 1579 1580 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 1581 general_params = table->entries; 1582 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */ 1583 general_params->tpid = tpid; 1584 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */ 1585 general_params->tpid2 = tpid2; 1586 /* When VLAN filtering is on, we need to at least be able to 1587 * decode management traffic through the "backup plan". 1588 */ 1589 general_params->incl_srcpt1 = enabled; 1590 general_params->incl_srcpt0 = enabled; 1591 1592 /* VLAN filtering => independent VLAN learning. 1593 * No VLAN filtering => shared VLAN learning. 1594 * 1595 * In shared VLAN learning mode, untagged traffic still gets 1596 * pvid-tagged, and the FDB table gets populated with entries 1597 * containing the "real" (pvid or from VLAN tag) VLAN ID. 1598 * However the switch performs a masked L2 lookup in the FDB, 1599 * effectively only looking up a frame's DMAC (and not VID) for the 1600 * forwarding decision. 1601 * 1602 * This is extremely convenient for us, because in modes with 1603 * vlan_filtering=0, dsa_8021q actually installs unique pvid's into 1604 * each front panel port. This is good for identification but breaks 1605 * learning badly - the VID of the learnt FDB entry is unique, aka 1606 * no frames coming from any other port are going to have it. So 1607 * for forwarding purposes, this is as though learning was broken 1608 * (all frames get flooded). 1609 */ 1610 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 1611 l2_lookup_params = table->entries; 1612 l2_lookup_params->shared_learn = !enabled; 1613 1614 rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING); 1615 if (rc) 1616 dev_err(ds->dev, "Failed to change VLAN Ethertype\n"); 1617 1618 /* Switch port identification based on 802.1Q is only passable 1619 * if we are not under a vlan_filtering bridge. So make sure 1620 * the two configurations are mutually exclusive. 1621 */ 1622 return sja1105_setup_8021q_tagging(ds, !enabled); 1623 } 1624 1625 static void sja1105_vlan_add(struct dsa_switch *ds, int port, 1626 const struct switchdev_obj_port_vlan *vlan) 1627 { 1628 struct sja1105_private *priv = ds->priv; 1629 u16 vid; 1630 int rc; 1631 1632 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 1633 rc = sja1105_vlan_apply(priv, port, vid, true, vlan->flags & 1634 BRIDGE_VLAN_INFO_UNTAGGED); 1635 if (rc < 0) { 1636 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 1637 vid, port, rc); 1638 return; 1639 } 1640 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) { 1641 rc = sja1105_pvid_apply(ds->priv, port, vid); 1642 if (rc < 0) { 1643 dev_err(ds->dev, "Failed to set pvid %d on port %d: %d\n", 1644 vid, port, rc); 1645 return; 1646 } 1647 } 1648 } 1649 } 1650 1651 static int sja1105_vlan_del(struct dsa_switch *ds, int port, 1652 const struct switchdev_obj_port_vlan *vlan) 1653 { 1654 struct sja1105_private *priv = ds->priv; 1655 u16 vid; 1656 int rc; 1657 1658 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 1659 rc = sja1105_vlan_apply(priv, port, vid, false, vlan->flags & 1660 BRIDGE_VLAN_INFO_UNTAGGED); 1661 if (rc < 0) { 1662 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 1663 vid, port, rc); 1664 return rc; 1665 } 1666 } 1667 return 0; 1668 } 1669 1670 /* The programming model for the SJA1105 switch is "all-at-once" via static 1671 * configuration tables. Some of these can be dynamically modified at runtime, 1672 * but not the xMII mode parameters table. 1673 * Furthermode, some PHYs may not have crystals for generating their clocks 1674 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's 1675 * ref_clk pin. So port clocking needs to be initialized early, before 1676 * connecting to PHYs is attempted, otherwise they won't respond through MDIO. 1677 * Setting correct PHY link speed does not matter now. 1678 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY 1679 * bindings are not yet parsed by DSA core. We need to parse early so that we 1680 * can populate the xMII mode parameters table. 1681 */ 1682 static int sja1105_setup(struct dsa_switch *ds) 1683 { 1684 struct sja1105_dt_port ports[SJA1105_NUM_PORTS]; 1685 struct sja1105_private *priv = ds->priv; 1686 int rc; 1687 1688 rc = sja1105_parse_dt(priv, ports); 1689 if (rc < 0) { 1690 dev_err(ds->dev, "Failed to parse DT: %d\n", rc); 1691 return rc; 1692 } 1693 1694 /* Error out early if internal delays are required through DT 1695 * and we can't apply them. 1696 */ 1697 rc = sja1105_parse_rgmii_delays(priv, ports); 1698 if (rc < 0) { 1699 dev_err(ds->dev, "RGMII delay not supported\n"); 1700 return rc; 1701 } 1702 1703 rc = sja1105_ptp_clock_register(ds); 1704 if (rc < 0) { 1705 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc); 1706 return rc; 1707 } 1708 /* Create and send configuration down to device */ 1709 rc = sja1105_static_config_load(priv, ports); 1710 if (rc < 0) { 1711 dev_err(ds->dev, "Failed to load static config: %d\n", rc); 1712 return rc; 1713 } 1714 /* Configure the CGU (PHY link modes and speeds) */ 1715 rc = sja1105_clocking_setup(priv); 1716 if (rc < 0) { 1717 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc); 1718 return rc; 1719 } 1720 /* On SJA1105, VLAN filtering per se is always enabled in hardware. 1721 * The only thing we can do to disable it is lie about what the 802.1Q 1722 * EtherType is. 1723 * So it will still try to apply VLAN filtering, but all ingress 1724 * traffic (except frames received with EtherType of ETH_P_SJA1105) 1725 * will be internally tagged with a distorted VLAN header where the 1726 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid. 1727 */ 1728 ds->vlan_filtering_is_global = true; 1729 1730 /* Advertise the 8 egress queues */ 1731 ds->num_tx_queues = SJA1105_NUM_TC; 1732 1733 /* The DSA/switchdev model brings up switch ports in standalone mode by 1734 * default, and that means vlan_filtering is 0 since they're not under 1735 * a bridge, so it's safe to set up switch tagging at this time. 1736 */ 1737 return sja1105_setup_8021q_tagging(ds, true); 1738 } 1739 1740 static void sja1105_teardown(struct dsa_switch *ds) 1741 { 1742 struct sja1105_private *priv = ds->priv; 1743 1744 sja1105_tas_teardown(ds); 1745 sja1105_ptp_clock_unregister(ds); 1746 sja1105_static_config_free(&priv->static_config); 1747 } 1748 1749 static int sja1105_port_enable(struct dsa_switch *ds, int port, 1750 struct phy_device *phy) 1751 { 1752 struct net_device *slave; 1753 1754 if (!dsa_is_user_port(ds, port)) 1755 return 0; 1756 1757 slave = dsa_to_port(ds, port)->slave; 1758 1759 slave->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 1760 1761 return 0; 1762 } 1763 1764 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot, 1765 struct sk_buff *skb, bool takets) 1766 { 1767 struct sja1105_mgmt_entry mgmt_route = {0}; 1768 struct sja1105_private *priv = ds->priv; 1769 struct ethhdr *hdr; 1770 int timeout = 10; 1771 int rc; 1772 1773 hdr = eth_hdr(skb); 1774 1775 mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest); 1776 mgmt_route.destports = BIT(port); 1777 mgmt_route.enfport = 1; 1778 mgmt_route.tsreg = 0; 1779 mgmt_route.takets = takets; 1780 1781 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE, 1782 slot, &mgmt_route, true); 1783 if (rc < 0) { 1784 kfree_skb(skb); 1785 return rc; 1786 } 1787 1788 /* Transfer skb to the host port. */ 1789 dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave); 1790 1791 /* Wait until the switch has processed the frame */ 1792 do { 1793 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE, 1794 slot, &mgmt_route); 1795 if (rc < 0) { 1796 dev_err_ratelimited(priv->ds->dev, 1797 "failed to poll for mgmt route\n"); 1798 continue; 1799 } 1800 1801 /* UM10944: The ENFPORT flag of the respective entry is 1802 * cleared when a match is found. The host can use this 1803 * flag as an acknowledgment. 1804 */ 1805 cpu_relax(); 1806 } while (mgmt_route.enfport && --timeout); 1807 1808 if (!timeout) { 1809 /* Clean up the management route so that a follow-up 1810 * frame may not match on it by mistake. 1811 * This is only hardware supported on P/Q/R/S - on E/T it is 1812 * a no-op and we are silently discarding the -EOPNOTSUPP. 1813 */ 1814 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE, 1815 slot, &mgmt_route, false); 1816 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n"); 1817 } 1818 1819 return NETDEV_TX_OK; 1820 } 1821 1822 /* Deferred work is unfortunately necessary because setting up the management 1823 * route cannot be done from atomit context (SPI transfer takes a sleepable 1824 * lock on the bus) 1825 */ 1826 static netdev_tx_t sja1105_port_deferred_xmit(struct dsa_switch *ds, int port, 1827 struct sk_buff *skb) 1828 { 1829 struct sja1105_private *priv = ds->priv; 1830 struct sja1105_port *sp = &priv->ports[port]; 1831 int slot = sp->mgmt_slot; 1832 struct sk_buff *clone; 1833 1834 /* The tragic fact about the switch having 4x2 slots for installing 1835 * management routes is that all of them except one are actually 1836 * useless. 1837 * If 2 slots are simultaneously configured for two BPDUs sent to the 1838 * same (multicast) DMAC but on different egress ports, the switch 1839 * would confuse them and redirect first frame it receives on the CPU 1840 * port towards the port configured on the numerically first slot 1841 * (therefore wrong port), then second received frame on second slot 1842 * (also wrong port). 1843 * So for all practical purposes, there needs to be a lock that 1844 * prevents that from happening. The slot used here is utterly useless 1845 * (could have simply been 0 just as fine), but we are doing it 1846 * nonetheless, in case a smarter idea ever comes up in the future. 1847 */ 1848 mutex_lock(&priv->mgmt_lock); 1849 1850 /* The clone, if there, was made by dsa_skb_tx_timestamp */ 1851 clone = DSA_SKB_CB(skb)->clone; 1852 1853 sja1105_mgmt_xmit(ds, port, slot, skb, !!clone); 1854 1855 if (!clone) 1856 goto out; 1857 1858 sja1105_ptp_txtstamp_skb(ds, port, clone); 1859 1860 out: 1861 mutex_unlock(&priv->mgmt_lock); 1862 return NETDEV_TX_OK; 1863 } 1864 1865 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table, 1866 * which cannot be reconfigured at runtime. So a switch reset is required. 1867 */ 1868 static int sja1105_set_ageing_time(struct dsa_switch *ds, 1869 unsigned int ageing_time) 1870 { 1871 struct sja1105_l2_lookup_params_entry *l2_lookup_params; 1872 struct sja1105_private *priv = ds->priv; 1873 struct sja1105_table *table; 1874 unsigned int maxage; 1875 1876 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 1877 l2_lookup_params = table->entries; 1878 1879 maxage = SJA1105_AGEING_TIME_MS(ageing_time); 1880 1881 if (l2_lookup_params->maxage == maxage) 1882 return 0; 1883 1884 l2_lookup_params->maxage = maxage; 1885 1886 return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME); 1887 } 1888 1889 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port, 1890 enum tc_setup_type type, 1891 void *type_data) 1892 { 1893 switch (type) { 1894 case TC_SETUP_QDISC_TAPRIO: 1895 return sja1105_setup_tc_taprio(ds, port, type_data); 1896 default: 1897 return -EOPNOTSUPP; 1898 } 1899 } 1900 1901 /* We have a single mirror (@to) port, but can configure ingress and egress 1902 * mirroring on all other (@from) ports. 1903 * We need to allow mirroring rules only as long as the @to port is always the 1904 * same, and we need to unset the @to port from mirr_port only when there is no 1905 * mirroring rule that references it. 1906 */ 1907 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to, 1908 bool ingress, bool enabled) 1909 { 1910 struct sja1105_general_params_entry *general_params; 1911 struct sja1105_mac_config_entry *mac; 1912 struct sja1105_table *table; 1913 bool already_enabled; 1914 u64 new_mirr_port; 1915 int rc; 1916 1917 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 1918 general_params = table->entries; 1919 1920 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 1921 1922 already_enabled = (general_params->mirr_port != SJA1105_NUM_PORTS); 1923 if (already_enabled && enabled && general_params->mirr_port != to) { 1924 dev_err(priv->ds->dev, 1925 "Delete mirroring rules towards port %llu first\n", 1926 general_params->mirr_port); 1927 return -EBUSY; 1928 } 1929 1930 new_mirr_port = to; 1931 if (!enabled) { 1932 bool keep = false; 1933 int port; 1934 1935 /* Anybody still referencing mirr_port? */ 1936 for (port = 0; port < SJA1105_NUM_PORTS; port++) { 1937 if (mac[port].ing_mirr || mac[port].egr_mirr) { 1938 keep = true; 1939 break; 1940 } 1941 } 1942 /* Unset already_enabled for next time */ 1943 if (!keep) 1944 new_mirr_port = SJA1105_NUM_PORTS; 1945 } 1946 if (new_mirr_port != general_params->mirr_port) { 1947 general_params->mirr_port = new_mirr_port; 1948 1949 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS, 1950 0, general_params, true); 1951 if (rc < 0) 1952 return rc; 1953 } 1954 1955 if (ingress) 1956 mac[from].ing_mirr = enabled; 1957 else 1958 mac[from].egr_mirr = enabled; 1959 1960 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from, 1961 &mac[from], true); 1962 } 1963 1964 static int sja1105_mirror_add(struct dsa_switch *ds, int port, 1965 struct dsa_mall_mirror_tc_entry *mirror, 1966 bool ingress) 1967 { 1968 return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port, 1969 ingress, true); 1970 } 1971 1972 static void sja1105_mirror_del(struct dsa_switch *ds, int port, 1973 struct dsa_mall_mirror_tc_entry *mirror) 1974 { 1975 sja1105_mirror_apply(ds->priv, port, mirror->to_local_port, 1976 mirror->ingress, false); 1977 } 1978 1979 static const struct dsa_switch_ops sja1105_switch_ops = { 1980 .get_tag_protocol = sja1105_get_tag_protocol, 1981 .setup = sja1105_setup, 1982 .teardown = sja1105_teardown, 1983 .set_ageing_time = sja1105_set_ageing_time, 1984 .phylink_validate = sja1105_phylink_validate, 1985 .phylink_mac_config = sja1105_mac_config, 1986 .phylink_mac_link_up = sja1105_mac_link_up, 1987 .phylink_mac_link_down = sja1105_mac_link_down, 1988 .get_strings = sja1105_get_strings, 1989 .get_ethtool_stats = sja1105_get_ethtool_stats, 1990 .get_sset_count = sja1105_get_sset_count, 1991 .get_ts_info = sja1105_get_ts_info, 1992 .port_enable = sja1105_port_enable, 1993 .port_fdb_dump = sja1105_fdb_dump, 1994 .port_fdb_add = sja1105_fdb_add, 1995 .port_fdb_del = sja1105_fdb_del, 1996 .port_bridge_join = sja1105_bridge_join, 1997 .port_bridge_leave = sja1105_bridge_leave, 1998 .port_stp_state_set = sja1105_bridge_stp_state_set, 1999 .port_vlan_prepare = sja1105_vlan_prepare, 2000 .port_vlan_filtering = sja1105_vlan_filtering, 2001 .port_vlan_add = sja1105_vlan_add, 2002 .port_vlan_del = sja1105_vlan_del, 2003 .port_mdb_prepare = sja1105_mdb_prepare, 2004 .port_mdb_add = sja1105_mdb_add, 2005 .port_mdb_del = sja1105_mdb_del, 2006 .port_deferred_xmit = sja1105_port_deferred_xmit, 2007 .port_hwtstamp_get = sja1105_hwtstamp_get, 2008 .port_hwtstamp_set = sja1105_hwtstamp_set, 2009 .port_rxtstamp = sja1105_port_rxtstamp, 2010 .port_txtstamp = sja1105_port_txtstamp, 2011 .port_setup_tc = sja1105_port_setup_tc, 2012 .port_mirror_add = sja1105_mirror_add, 2013 .port_mirror_del = sja1105_mirror_del, 2014 }; 2015 2016 static int sja1105_check_device_id(struct sja1105_private *priv) 2017 { 2018 const struct sja1105_regs *regs = priv->info->regs; 2019 u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0}; 2020 struct device *dev = &priv->spidev->dev; 2021 u32 device_id; 2022 u64 part_no; 2023 int rc; 2024 2025 rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id, 2026 NULL); 2027 if (rc < 0) 2028 return rc; 2029 2030 if (device_id != priv->info->device_id) { 2031 dev_err(dev, "Expected device ID 0x%llx but read 0x%x\n", 2032 priv->info->device_id, device_id); 2033 return -ENODEV; 2034 } 2035 2036 rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id, 2037 SJA1105_SIZE_DEVICE_ID); 2038 if (rc < 0) 2039 return rc; 2040 2041 sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID); 2042 2043 if (part_no != priv->info->part_no) { 2044 dev_err(dev, "Expected part number 0x%llx but read 0x%llx\n", 2045 priv->info->part_no, part_no); 2046 return -ENODEV; 2047 } 2048 2049 return 0; 2050 } 2051 2052 static int sja1105_probe(struct spi_device *spi) 2053 { 2054 struct sja1105_tagger_data *tagger_data; 2055 struct device *dev = &spi->dev; 2056 struct sja1105_private *priv; 2057 struct dsa_switch *ds; 2058 int rc, i; 2059 2060 if (!dev->of_node) { 2061 dev_err(dev, "No DTS bindings for SJA1105 driver\n"); 2062 return -EINVAL; 2063 } 2064 2065 priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL); 2066 if (!priv) 2067 return -ENOMEM; 2068 2069 /* Configure the optional reset pin and bring up switch */ 2070 priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 2071 if (IS_ERR(priv->reset_gpio)) 2072 dev_dbg(dev, "reset-gpios not defined, ignoring\n"); 2073 else 2074 sja1105_hw_reset(priv->reset_gpio, 1, 1); 2075 2076 /* Populate our driver private structure (priv) based on 2077 * the device tree node that was probed (spi) 2078 */ 2079 priv->spidev = spi; 2080 spi_set_drvdata(spi, priv); 2081 2082 /* Configure the SPI bus */ 2083 spi->bits_per_word = 8; 2084 rc = spi_setup(spi); 2085 if (rc < 0) { 2086 dev_err(dev, "Could not init SPI\n"); 2087 return rc; 2088 } 2089 2090 priv->info = of_device_get_match_data(dev); 2091 2092 /* Detect hardware device */ 2093 rc = sja1105_check_device_id(priv); 2094 if (rc < 0) { 2095 dev_err(dev, "Device ID check failed: %d\n", rc); 2096 return rc; 2097 } 2098 2099 dev_info(dev, "Probed switch chip: %s\n", priv->info->name); 2100 2101 ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL); 2102 if (!ds) 2103 return -ENOMEM; 2104 2105 ds->dev = dev; 2106 ds->num_ports = SJA1105_NUM_PORTS; 2107 ds->ops = &sja1105_switch_ops; 2108 ds->priv = priv; 2109 priv->ds = ds; 2110 2111 tagger_data = &priv->tagger_data; 2112 2113 mutex_init(&priv->ptp_data.lock); 2114 mutex_init(&priv->mgmt_lock); 2115 2116 sja1105_tas_setup(ds); 2117 2118 rc = dsa_register_switch(priv->ds); 2119 if (rc) 2120 return rc; 2121 2122 /* Connections between dsa_port and sja1105_port */ 2123 for (i = 0; i < SJA1105_NUM_PORTS; i++) { 2124 struct sja1105_port *sp = &priv->ports[i]; 2125 2126 dsa_to_port(ds, i)->priv = sp; 2127 sp->dp = dsa_to_port(ds, i); 2128 sp->data = tagger_data; 2129 } 2130 2131 return 0; 2132 } 2133 2134 static int sja1105_remove(struct spi_device *spi) 2135 { 2136 struct sja1105_private *priv = spi_get_drvdata(spi); 2137 2138 dsa_unregister_switch(priv->ds); 2139 return 0; 2140 } 2141 2142 static const struct of_device_id sja1105_dt_ids[] = { 2143 { .compatible = "nxp,sja1105e", .data = &sja1105e_info }, 2144 { .compatible = "nxp,sja1105t", .data = &sja1105t_info }, 2145 { .compatible = "nxp,sja1105p", .data = &sja1105p_info }, 2146 { .compatible = "nxp,sja1105q", .data = &sja1105q_info }, 2147 { .compatible = "nxp,sja1105r", .data = &sja1105r_info }, 2148 { .compatible = "nxp,sja1105s", .data = &sja1105s_info }, 2149 { /* sentinel */ }, 2150 }; 2151 MODULE_DEVICE_TABLE(of, sja1105_dt_ids); 2152 2153 static struct spi_driver sja1105_driver = { 2154 .driver = { 2155 .name = "sja1105", 2156 .owner = THIS_MODULE, 2157 .of_match_table = of_match_ptr(sja1105_dt_ids), 2158 }, 2159 .probe = sja1105_probe, 2160 .remove = sja1105_remove, 2161 }; 2162 2163 module_spi_driver(sja1105_driver); 2164 2165 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>"); 2166 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>"); 2167 MODULE_DESCRIPTION("SJA1105 Driver"); 2168 MODULE_LICENSE("GPL v2"); 2169