1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 23 typedef enum { 24 SPI_READ = 0, 25 SPI_WRITE = 1, 26 } sja1105_spi_rw_mode_t; 27 28 #include "sja1105_tas.h" 29 #include "sja1105_ptp.h" 30 31 /* Keeps the different addresses between E/T and P/Q/R/S */ 32 struct sja1105_regs { 33 u64 device_id; 34 u64 prod_id; 35 u64 status; 36 u64 port_control; 37 u64 rgu; 38 u64 config; 39 u64 rmii_pll1; 40 u64 ptp_control; 41 u64 ptpclkval; 42 u64 ptpclkrate; 43 u64 ptpclkcorp; 44 u64 ptpschtm; 45 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 46 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 47 u64 pad_mii_id[SJA1105_NUM_PORTS]; 48 u64 cgu_idiv[SJA1105_NUM_PORTS]; 49 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 50 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 51 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 52 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 53 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 54 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 55 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 56 u64 mac[SJA1105_NUM_PORTS]; 57 u64 mac_hl1[SJA1105_NUM_PORTS]; 58 u64 mac_hl2[SJA1105_NUM_PORTS]; 59 u64 qlevel[SJA1105_NUM_PORTS]; 60 }; 61 62 struct sja1105_info { 63 u64 device_id; 64 /* Needed for distinction between P and R, and between Q and S 65 * (since the parts with/without SGMII share the same 66 * switch core and device_id) 67 */ 68 u64 part_no; 69 /* E/T and P/Q/R/S have partial timestamps of different sizes. 70 * They must be reconstructed on both families anyway to get the full 71 * 64-bit values back. 72 */ 73 int ptp_ts_bits; 74 /* Also SPI commands are of different sizes to retrieve 75 * the egress timestamps. 76 */ 77 int ptpegr_ts_bytes; 78 const struct sja1105_dynamic_table_ops *dyn_ops; 79 const struct sja1105_table_ops *static_ops; 80 const struct sja1105_regs *regs; 81 int (*reset_cmd)(struct dsa_switch *ds); 82 int (*setup_rgmii_delay)(const void *ctx, int port); 83 /* Prototypes from include/net/dsa.h */ 84 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 85 const unsigned char *addr, u16 vid); 86 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 87 const unsigned char *addr, u16 vid); 88 void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 89 enum packing_op op); 90 const char *name; 91 }; 92 93 struct sja1105_private { 94 struct sja1105_static_config static_config; 95 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 96 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 97 const struct sja1105_info *info; 98 struct gpio_desc *reset_gpio; 99 struct spi_device *spidev; 100 struct dsa_switch *ds; 101 struct sja1105_port ports[SJA1105_NUM_PORTS]; 102 /* Serializes transmission of management frames so that 103 * the switch doesn't confuse them with one another. 104 */ 105 struct mutex mgmt_lock; 106 struct sja1105_tagger_data tagger_data; 107 struct sja1105_ptp_data ptp_data; 108 struct sja1105_tas_data tas_data; 109 }; 110 111 #include "sja1105_dynamic_config.h" 112 113 struct sja1105_spi_message { 114 u64 access; 115 u64 read_count; 116 u64 address; 117 }; 118 119 /* From sja1105_main.c */ 120 enum sja1105_reset_reason { 121 SJA1105_VLAN_FILTERING = 0, 122 SJA1105_RX_HWTSTAMPING, 123 SJA1105_AGEING_TIME, 124 SJA1105_SCHEDULING, 125 }; 126 127 int sja1105_static_config_reload(struct sja1105_private *priv, 128 enum sja1105_reset_reason reason); 129 130 /* From sja1105_spi.c */ 131 int sja1105_xfer_buf(const struct sja1105_private *priv, 132 sja1105_spi_rw_mode_t rw, u64 reg_addr, 133 u8 *buf, size_t len); 134 int sja1105_xfer_u32(const struct sja1105_private *priv, 135 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 136 struct ptp_system_timestamp *ptp_sts); 137 int sja1105_xfer_u64(const struct sja1105_private *priv, 138 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 139 struct ptp_system_timestamp *ptp_sts); 140 int sja1105_static_config_upload(struct sja1105_private *priv); 141 int sja1105_inhibit_tx(const struct sja1105_private *priv, 142 unsigned long port_bitmap, bool tx_inhibited); 143 144 extern struct sja1105_info sja1105e_info; 145 extern struct sja1105_info sja1105t_info; 146 extern struct sja1105_info sja1105p_info; 147 extern struct sja1105_info sja1105q_info; 148 extern struct sja1105_info sja1105r_info; 149 extern struct sja1105_info sja1105s_info; 150 151 /* From sja1105_clocking.c */ 152 153 typedef enum { 154 XMII_MAC = 0, 155 XMII_PHY = 1, 156 } sja1105_mii_role_t; 157 158 typedef enum { 159 XMII_MODE_MII = 0, 160 XMII_MODE_RMII = 1, 161 XMII_MODE_RGMII = 2, 162 } sja1105_phy_interface_t; 163 164 typedef enum { 165 SJA1105_SPEED_10MBPS = 3, 166 SJA1105_SPEED_100MBPS = 2, 167 SJA1105_SPEED_1000MBPS = 1, 168 SJA1105_SPEED_AUTO = 0, 169 } sja1105_speed_t; 170 171 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 172 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 173 int sja1105_clocking_setup(struct sja1105_private *priv); 174 175 /* From sja1105_ethtool.c */ 176 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 177 void sja1105_get_strings(struct dsa_switch *ds, int port, 178 u32 stringset, u8 *data); 179 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 180 181 /* From sja1105_dynamic_config.c */ 182 int sja1105_dynamic_config_read(struct sja1105_private *priv, 183 enum sja1105_blk_idx blk_idx, 184 int index, void *entry); 185 int sja1105_dynamic_config_write(struct sja1105_private *priv, 186 enum sja1105_blk_idx blk_idx, 187 int index, void *entry, bool keep); 188 189 enum sja1105_iotag { 190 SJA1105_C_TAG = 0, /* Inner VLAN header */ 191 SJA1105_S_TAG = 1, /* Outer VLAN header */ 192 }; 193 194 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 195 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 196 const unsigned char *addr, u16 vid); 197 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 198 const unsigned char *addr, u16 vid); 199 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 200 const unsigned char *addr, u16 vid); 201 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 202 const unsigned char *addr, u16 vid); 203 204 /* Common implementations for the static and dynamic configs */ 205 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 206 enum packing_op op); 207 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 208 enum packing_op op); 209 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 210 enum packing_op op); 211 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 212 enum packing_op op); 213 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 214 enum packing_op op); 215 216 #endif 217