1 /* SPDX-License-Identifier: GPL-2.0 2 * Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 23 /* Keeps the different addresses between E/T and P/Q/R/S */ 24 struct sja1105_regs { 25 u64 device_id; 26 u64 prod_id; 27 u64 status; 28 u64 port_control; 29 u64 rgu; 30 u64 config; 31 u64 rmii_pll1; 32 u64 ptp_control; 33 u64 ptpclk; 34 u64 ptpclkrate; 35 u64 ptptsclk; 36 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 37 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 38 u64 pad_mii_id[SJA1105_NUM_PORTS]; 39 u64 cgu_idiv[SJA1105_NUM_PORTS]; 40 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 41 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 42 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 43 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 44 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 45 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 46 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 47 u64 mac[SJA1105_NUM_PORTS]; 48 u64 mac_hl1[SJA1105_NUM_PORTS]; 49 u64 mac_hl2[SJA1105_NUM_PORTS]; 50 u64 qlevel[SJA1105_NUM_PORTS]; 51 }; 52 53 struct sja1105_info { 54 u64 device_id; 55 /* Needed for distinction between P and R, and between Q and S 56 * (since the parts with/without SGMII share the same 57 * switch core and device_id) 58 */ 59 u64 part_no; 60 /* E/T and P/Q/R/S have partial timestamps of different sizes. 61 * They must be reconstructed on both families anyway to get the full 62 * 64-bit values back. 63 */ 64 int ptp_ts_bits; 65 /* Also SPI commands are of different sizes to retrieve 66 * the egress timestamps. 67 */ 68 int ptpegr_ts_bytes; 69 const struct sja1105_dynamic_table_ops *dyn_ops; 70 const struct sja1105_table_ops *static_ops; 71 const struct sja1105_regs *regs; 72 int (*ptp_cmd)(const void *ctx, const void *data); 73 int (*reset_cmd)(const void *ctx, const void *data); 74 int (*setup_rgmii_delay)(const void *ctx, int port); 75 /* Prototypes from include/net/dsa.h */ 76 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 77 const unsigned char *addr, u16 vid); 78 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 79 const unsigned char *addr, u16 vid); 80 const char *name; 81 }; 82 83 struct sja1105_private { 84 struct sja1105_static_config static_config; 85 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 86 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 87 const struct sja1105_info *info; 88 struct gpio_desc *reset_gpio; 89 struct spi_device *spidev; 90 struct dsa_switch *ds; 91 struct sja1105_port ports[SJA1105_NUM_PORTS]; 92 struct ptp_clock_info ptp_caps; 93 struct ptp_clock *clock; 94 /* The cycle counter translates the PTP timestamps (based on 95 * a free-running counter) into a software time domain. 96 */ 97 struct cyclecounter tstamp_cc; 98 struct timecounter tstamp_tc; 99 struct delayed_work refresh_work; 100 /* Serializes all operations on the cycle counter */ 101 struct mutex ptp_lock; 102 /* Serializes transmission of management frames so that 103 * the switch doesn't confuse them with one another. 104 */ 105 struct mutex mgmt_lock; 106 struct sja1105_tagger_data tagger_data; 107 }; 108 109 #include "sja1105_dynamic_config.h" 110 #include "sja1105_ptp.h" 111 112 struct sja1105_spi_message { 113 u64 access; 114 u64 read_count; 115 u64 address; 116 }; 117 118 typedef enum { 119 SPI_READ = 0, 120 SPI_WRITE = 1, 121 } sja1105_spi_rw_mode_t; 122 123 /* From sja1105_spi.c */ 124 int sja1105_spi_send_packed_buf(const struct sja1105_private *priv, 125 sja1105_spi_rw_mode_t rw, u64 reg_addr, 126 void *packed_buf, size_t size_bytes); 127 int sja1105_spi_send_int(const struct sja1105_private *priv, 128 sja1105_spi_rw_mode_t rw, u64 reg_addr, 129 u64 *value, u64 size_bytes); 130 int sja1105_spi_send_long_packed_buf(const struct sja1105_private *priv, 131 sja1105_spi_rw_mode_t rw, u64 base_addr, 132 void *packed_buf, u64 buf_len); 133 int sja1105_static_config_upload(struct sja1105_private *priv); 134 int sja1105_inhibit_tx(const struct sja1105_private *priv, 135 unsigned long port_bitmap, bool tx_inhibited); 136 137 extern struct sja1105_info sja1105e_info; 138 extern struct sja1105_info sja1105t_info; 139 extern struct sja1105_info sja1105p_info; 140 extern struct sja1105_info sja1105q_info; 141 extern struct sja1105_info sja1105r_info; 142 extern struct sja1105_info sja1105s_info; 143 144 /* From sja1105_clocking.c */ 145 146 typedef enum { 147 XMII_MAC = 0, 148 XMII_PHY = 1, 149 } sja1105_mii_role_t; 150 151 typedef enum { 152 XMII_MODE_MII = 0, 153 XMII_MODE_RMII = 1, 154 XMII_MODE_RGMII = 2, 155 } sja1105_phy_interface_t; 156 157 typedef enum { 158 SJA1105_SPEED_10MBPS = 3, 159 SJA1105_SPEED_100MBPS = 2, 160 SJA1105_SPEED_1000MBPS = 1, 161 SJA1105_SPEED_AUTO = 0, 162 } sja1105_speed_t; 163 164 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 165 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 166 int sja1105_clocking_setup(struct sja1105_private *priv); 167 168 /* From sja1105_ethtool.c */ 169 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 170 void sja1105_get_strings(struct dsa_switch *ds, int port, 171 u32 stringset, u8 *data); 172 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 173 174 /* From sja1105_dynamic_config.c */ 175 int sja1105_dynamic_config_read(struct sja1105_private *priv, 176 enum sja1105_blk_idx blk_idx, 177 int index, void *entry); 178 int sja1105_dynamic_config_write(struct sja1105_private *priv, 179 enum sja1105_blk_idx blk_idx, 180 int index, void *entry, bool keep); 181 182 enum sja1105_iotag { 183 SJA1105_C_TAG = 0, /* Inner VLAN header */ 184 SJA1105_S_TAG = 1, /* Outer VLAN header */ 185 }; 186 187 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 188 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 189 const unsigned char *addr, u16 vid); 190 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 191 const unsigned char *addr, u16 vid); 192 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 193 const unsigned char *addr, u16 vid); 194 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 195 const unsigned char *addr, u16 vid); 196 197 /* Common implementations for the static and dynamic configs */ 198 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 199 enum packing_op op); 200 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 201 enum packing_op op); 202 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 203 enum packing_op op); 204 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 205 enum packing_op op); 206 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 207 enum packing_op op); 208 209 #endif 210