1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 #define SJA1105_NUM_L2_POLICERS 45 23 24 typedef enum { 25 SPI_READ = 0, 26 SPI_WRITE = 1, 27 } sja1105_spi_rw_mode_t; 28 29 #include "sja1105_tas.h" 30 #include "sja1105_ptp.h" 31 32 /* Keeps the different addresses between E/T and P/Q/R/S */ 33 struct sja1105_regs { 34 u64 device_id; 35 u64 prod_id; 36 u64 status; 37 u64 port_control; 38 u64 rgu; 39 u64 config; 40 u64 sgmii; 41 u64 rmii_pll1; 42 u64 ptppinst; 43 u64 ptppindur; 44 u64 ptp_control; 45 u64 ptpclkval; 46 u64 ptpclkrate; 47 u64 ptpclkcorp; 48 u64 ptpsyncts; 49 u64 ptpschtm; 50 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 51 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 52 u64 pad_mii_rx[SJA1105_NUM_PORTS]; 53 u64 pad_mii_id[SJA1105_NUM_PORTS]; 54 u64 cgu_idiv[SJA1105_NUM_PORTS]; 55 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 56 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 57 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 58 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 59 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 60 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 61 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 62 u64 mac[SJA1105_NUM_PORTS]; 63 u64 mac_hl1[SJA1105_NUM_PORTS]; 64 u64 mac_hl2[SJA1105_NUM_PORTS]; 65 u64 ether_stats[SJA1105_NUM_PORTS]; 66 u64 qlevel[SJA1105_NUM_PORTS]; 67 }; 68 69 struct sja1105_info { 70 u64 device_id; 71 /* Needed for distinction between P and R, and between Q and S 72 * (since the parts with/without SGMII share the same 73 * switch core and device_id) 74 */ 75 u64 part_no; 76 /* E/T and P/Q/R/S have partial timestamps of different sizes. 77 * They must be reconstructed on both families anyway to get the full 78 * 64-bit values back. 79 */ 80 int ptp_ts_bits; 81 /* Also SPI commands are of different sizes to retrieve 82 * the egress timestamps. 83 */ 84 int ptpegr_ts_bytes; 85 const struct sja1105_dynamic_table_ops *dyn_ops; 86 const struct sja1105_table_ops *static_ops; 87 const struct sja1105_regs *regs; 88 int (*reset_cmd)(struct dsa_switch *ds); 89 int (*setup_rgmii_delay)(const void *ctx, int port); 90 /* Prototypes from include/net/dsa.h */ 91 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 92 const unsigned char *addr, u16 vid); 93 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 94 const unsigned char *addr, u16 vid); 95 void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 96 enum packing_op op); 97 const char *name; 98 }; 99 100 enum sja1105_key_type { 101 SJA1105_KEY_BCAST, 102 SJA1105_KEY_TC, 103 SJA1105_KEY_VLAN_UNAWARE_VL, 104 SJA1105_KEY_VLAN_AWARE_VL, 105 }; 106 107 struct sja1105_key { 108 enum sja1105_key_type type; 109 110 union { 111 /* SJA1105_KEY_TC */ 112 struct { 113 int pcp; 114 } tc; 115 116 /* SJA1105_KEY_VLAN_UNAWARE_VL */ 117 /* SJA1105_KEY_VLAN_AWARE_VL */ 118 struct { 119 u64 dmac; 120 u16 vid; 121 u16 pcp; 122 } vl; 123 }; 124 }; 125 126 enum sja1105_rule_type { 127 SJA1105_RULE_BCAST_POLICER, 128 SJA1105_RULE_TC_POLICER, 129 }; 130 131 struct sja1105_rule { 132 struct list_head list; 133 unsigned long cookie; 134 unsigned long port_mask; 135 struct sja1105_key key; 136 enum sja1105_rule_type type; 137 138 union { 139 /* SJA1105_RULE_BCAST_POLICER */ 140 struct { 141 int sharindx; 142 } bcast_pol; 143 144 /* SJA1105_RULE_TC_POLICER */ 145 struct { 146 int sharindx; 147 } tc_pol; 148 }; 149 }; 150 151 struct sja1105_flow_block { 152 struct list_head rules; 153 bool l2_policer_used[SJA1105_NUM_L2_POLICERS]; 154 }; 155 156 struct sja1105_private { 157 struct sja1105_static_config static_config; 158 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 159 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 160 const struct sja1105_info *info; 161 struct gpio_desc *reset_gpio; 162 struct spi_device *spidev; 163 struct dsa_switch *ds; 164 struct sja1105_flow_block flow_block; 165 struct sja1105_port ports[SJA1105_NUM_PORTS]; 166 /* Serializes transmission of management frames so that 167 * the switch doesn't confuse them with one another. 168 */ 169 struct mutex mgmt_lock; 170 struct sja1105_tagger_data tagger_data; 171 struct sja1105_ptp_data ptp_data; 172 struct sja1105_tas_data tas_data; 173 }; 174 175 #include "sja1105_dynamic_config.h" 176 177 struct sja1105_spi_message { 178 u64 access; 179 u64 read_count; 180 u64 address; 181 }; 182 183 /* From sja1105_main.c */ 184 enum sja1105_reset_reason { 185 SJA1105_VLAN_FILTERING = 0, 186 SJA1105_RX_HWTSTAMPING, 187 SJA1105_AGEING_TIME, 188 SJA1105_SCHEDULING, 189 SJA1105_BEST_EFFORT_POLICING, 190 }; 191 192 int sja1105_static_config_reload(struct sja1105_private *priv, 193 enum sja1105_reset_reason reason); 194 195 /* From sja1105_spi.c */ 196 int sja1105_xfer_buf(const struct sja1105_private *priv, 197 sja1105_spi_rw_mode_t rw, u64 reg_addr, 198 u8 *buf, size_t len); 199 int sja1105_xfer_u32(const struct sja1105_private *priv, 200 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 201 struct ptp_system_timestamp *ptp_sts); 202 int sja1105_xfer_u64(const struct sja1105_private *priv, 203 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 204 struct ptp_system_timestamp *ptp_sts); 205 int sja1105_static_config_upload(struct sja1105_private *priv); 206 int sja1105_inhibit_tx(const struct sja1105_private *priv, 207 unsigned long port_bitmap, bool tx_inhibited); 208 209 extern struct sja1105_info sja1105e_info; 210 extern struct sja1105_info sja1105t_info; 211 extern struct sja1105_info sja1105p_info; 212 extern struct sja1105_info sja1105q_info; 213 extern struct sja1105_info sja1105r_info; 214 extern struct sja1105_info sja1105s_info; 215 216 /* From sja1105_clocking.c */ 217 218 typedef enum { 219 XMII_MAC = 0, 220 XMII_PHY = 1, 221 } sja1105_mii_role_t; 222 223 typedef enum { 224 XMII_MODE_MII = 0, 225 XMII_MODE_RMII = 1, 226 XMII_MODE_RGMII = 2, 227 XMII_MODE_SGMII = 3, 228 } sja1105_phy_interface_t; 229 230 typedef enum { 231 SJA1105_SPEED_10MBPS = 3, 232 SJA1105_SPEED_100MBPS = 2, 233 SJA1105_SPEED_1000MBPS = 1, 234 SJA1105_SPEED_AUTO = 0, 235 } sja1105_speed_t; 236 237 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 238 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 239 int sja1105_clocking_setup(struct sja1105_private *priv); 240 241 /* From sja1105_ethtool.c */ 242 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 243 void sja1105_get_strings(struct dsa_switch *ds, int port, 244 u32 stringset, u8 *data); 245 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 246 247 /* From sja1105_dynamic_config.c */ 248 int sja1105_dynamic_config_read(struct sja1105_private *priv, 249 enum sja1105_blk_idx blk_idx, 250 int index, void *entry); 251 int sja1105_dynamic_config_write(struct sja1105_private *priv, 252 enum sja1105_blk_idx blk_idx, 253 int index, void *entry, bool keep); 254 255 enum sja1105_iotag { 256 SJA1105_C_TAG = 0, /* Inner VLAN header */ 257 SJA1105_S_TAG = 1, /* Outer VLAN header */ 258 }; 259 260 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 261 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 262 const unsigned char *addr, u16 vid); 263 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 264 const unsigned char *addr, u16 vid); 265 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 266 const unsigned char *addr, u16 vid); 267 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 268 const unsigned char *addr, u16 vid); 269 270 /* Common implementations for the static and dynamic configs */ 271 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 272 enum packing_op op); 273 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 274 enum packing_op op); 275 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 276 enum packing_op op); 277 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 278 enum packing_op op); 279 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 280 enum packing_op op); 281 size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr, 282 enum packing_op op); 283 size_t sja1105_vl_lookup_entry_packing(void *buf, void *entry_ptr, 284 enum packing_op op); 285 286 /* From sja1105_flower.c */ 287 int sja1105_cls_flower_del(struct dsa_switch *ds, int port, 288 struct flow_cls_offload *cls, bool ingress); 289 int sja1105_cls_flower_add(struct dsa_switch *ds, int port, 290 struct flow_cls_offload *cls, bool ingress); 291 void sja1105_flower_setup(struct dsa_switch *ds); 292 void sja1105_flower_teardown(struct dsa_switch *ds); 293 294 #endif 295