xref: /openbmc/linux/drivers/net/dsa/sja1105/sja1105.h (revision 94f94d4a)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4  */
5 #ifndef _SJA1105_H
6 #define _SJA1105_H
7 
8 #include <linux/ptp_clock_kernel.h>
9 #include <linux/timecounter.h>
10 #include <linux/dsa/sja1105.h>
11 #include <net/dsa.h>
12 #include <linux/mutex.h>
13 #include "sja1105_static_config.h"
14 
15 #define SJA1105_NUM_PORTS		5
16 #define SJA1105_NUM_TC			8
17 #define SJA1105ET_FDB_BIN_SIZE		4
18 /* The hardware value is in multiples of 10 ms.
19  * The passed parameter is in multiples of 1 ms.
20  */
21 #define SJA1105_AGEING_TIME_MS(ms)	((ms) / 10)
22 #define SJA1105_NUM_L2_POLICERS		45
23 
24 typedef enum {
25 	SPI_READ = 0,
26 	SPI_WRITE = 1,
27 } sja1105_spi_rw_mode_t;
28 
29 #include "sja1105_tas.h"
30 #include "sja1105_ptp.h"
31 
32 /* Keeps the different addresses between E/T and P/Q/R/S */
33 struct sja1105_regs {
34 	u64 device_id;
35 	u64 prod_id;
36 	u64 status;
37 	u64 port_control;
38 	u64 rgu;
39 	u64 config;
40 	u64 sgmii;
41 	u64 rmii_pll1;
42 	u64 ptppinst;
43 	u64 ptppindur;
44 	u64 ptp_control;
45 	u64 ptpclkval;
46 	u64 ptpclkrate;
47 	u64 ptpclkcorp;
48 	u64 ptpsyncts;
49 	u64 ptpschtm;
50 	u64 ptpegr_ts[SJA1105_NUM_PORTS];
51 	u64 pad_mii_tx[SJA1105_NUM_PORTS];
52 	u64 pad_mii_rx[SJA1105_NUM_PORTS];
53 	u64 pad_mii_id[SJA1105_NUM_PORTS];
54 	u64 cgu_idiv[SJA1105_NUM_PORTS];
55 	u64 mii_tx_clk[SJA1105_NUM_PORTS];
56 	u64 mii_rx_clk[SJA1105_NUM_PORTS];
57 	u64 mii_ext_tx_clk[SJA1105_NUM_PORTS];
58 	u64 mii_ext_rx_clk[SJA1105_NUM_PORTS];
59 	u64 rgmii_tx_clk[SJA1105_NUM_PORTS];
60 	u64 rmii_ref_clk[SJA1105_NUM_PORTS];
61 	u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS];
62 	u64 mac[SJA1105_NUM_PORTS];
63 	u64 mac_hl1[SJA1105_NUM_PORTS];
64 	u64 mac_hl2[SJA1105_NUM_PORTS];
65 	u64 ether_stats[SJA1105_NUM_PORTS];
66 	u64 qlevel[SJA1105_NUM_PORTS];
67 };
68 
69 struct sja1105_info {
70 	u64 device_id;
71 	/* Needed for distinction between P and R, and between Q and S
72 	 * (since the parts with/without SGMII share the same
73 	 * switch core and device_id)
74 	 */
75 	u64 part_no;
76 	/* E/T and P/Q/R/S have partial timestamps of different sizes.
77 	 * They must be reconstructed on both families anyway to get the full
78 	 * 64-bit values back.
79 	 */
80 	int ptp_ts_bits;
81 	/* Also SPI commands are of different sizes to retrieve
82 	 * the egress timestamps.
83 	 */
84 	int ptpegr_ts_bytes;
85 	const struct sja1105_dynamic_table_ops *dyn_ops;
86 	const struct sja1105_table_ops *static_ops;
87 	const struct sja1105_regs *regs;
88 	int (*reset_cmd)(struct dsa_switch *ds);
89 	int (*setup_rgmii_delay)(const void *ctx, int port);
90 	/* Prototypes from include/net/dsa.h */
91 	int (*fdb_add_cmd)(struct dsa_switch *ds, int port,
92 			   const unsigned char *addr, u16 vid);
93 	int (*fdb_del_cmd)(struct dsa_switch *ds, int port,
94 			   const unsigned char *addr, u16 vid);
95 	void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd,
96 				enum packing_op op);
97 	const char *name;
98 };
99 
100 enum sja1105_rule_type {
101 	SJA1105_RULE_BCAST_POLICER,
102 	SJA1105_RULE_TC_POLICER,
103 };
104 
105 struct sja1105_rule {
106 	struct list_head list;
107 	unsigned long cookie;
108 	unsigned long port_mask;
109 	enum sja1105_rule_type type;
110 
111 	union {
112 		/* SJA1105_RULE_BCAST_POLICER */
113 		struct {
114 			int sharindx;
115 		} bcast_pol;
116 
117 		/* SJA1105_RULE_TC_POLICER */
118 		struct {
119 			int sharindx;
120 			int tc;
121 		} tc_pol;
122 	};
123 };
124 
125 struct sja1105_flow_block {
126 	struct list_head rules;
127 	bool l2_policer_used[SJA1105_NUM_L2_POLICERS];
128 };
129 
130 struct sja1105_private {
131 	struct sja1105_static_config static_config;
132 	bool rgmii_rx_delay[SJA1105_NUM_PORTS];
133 	bool rgmii_tx_delay[SJA1105_NUM_PORTS];
134 	const struct sja1105_info *info;
135 	struct gpio_desc *reset_gpio;
136 	struct spi_device *spidev;
137 	struct dsa_switch *ds;
138 	struct sja1105_flow_block flow_block;
139 	struct sja1105_port ports[SJA1105_NUM_PORTS];
140 	/* Serializes transmission of management frames so that
141 	 * the switch doesn't confuse them with one another.
142 	 */
143 	struct mutex mgmt_lock;
144 	struct sja1105_tagger_data tagger_data;
145 	struct sja1105_ptp_data ptp_data;
146 	struct sja1105_tas_data tas_data;
147 };
148 
149 #include "sja1105_dynamic_config.h"
150 
151 struct sja1105_spi_message {
152 	u64 access;
153 	u64 read_count;
154 	u64 address;
155 };
156 
157 /* From sja1105_main.c */
158 enum sja1105_reset_reason {
159 	SJA1105_VLAN_FILTERING = 0,
160 	SJA1105_RX_HWTSTAMPING,
161 	SJA1105_AGEING_TIME,
162 	SJA1105_SCHEDULING,
163 	SJA1105_BEST_EFFORT_POLICING,
164 };
165 
166 int sja1105_static_config_reload(struct sja1105_private *priv,
167 				 enum sja1105_reset_reason reason);
168 
169 /* From sja1105_spi.c */
170 int sja1105_xfer_buf(const struct sja1105_private *priv,
171 		     sja1105_spi_rw_mode_t rw, u64 reg_addr,
172 		     u8 *buf, size_t len);
173 int sja1105_xfer_u32(const struct sja1105_private *priv,
174 		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,
175 		     struct ptp_system_timestamp *ptp_sts);
176 int sja1105_xfer_u64(const struct sja1105_private *priv,
177 		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,
178 		     struct ptp_system_timestamp *ptp_sts);
179 int sja1105_static_config_upload(struct sja1105_private *priv);
180 int sja1105_inhibit_tx(const struct sja1105_private *priv,
181 		       unsigned long port_bitmap, bool tx_inhibited);
182 
183 extern struct sja1105_info sja1105e_info;
184 extern struct sja1105_info sja1105t_info;
185 extern struct sja1105_info sja1105p_info;
186 extern struct sja1105_info sja1105q_info;
187 extern struct sja1105_info sja1105r_info;
188 extern struct sja1105_info sja1105s_info;
189 
190 /* From sja1105_clocking.c */
191 
192 typedef enum {
193 	XMII_MAC = 0,
194 	XMII_PHY = 1,
195 } sja1105_mii_role_t;
196 
197 typedef enum {
198 	XMII_MODE_MII		= 0,
199 	XMII_MODE_RMII		= 1,
200 	XMII_MODE_RGMII		= 2,
201 	XMII_MODE_SGMII		= 3,
202 } sja1105_phy_interface_t;
203 
204 typedef enum {
205 	SJA1105_SPEED_10MBPS	= 3,
206 	SJA1105_SPEED_100MBPS	= 2,
207 	SJA1105_SPEED_1000MBPS	= 1,
208 	SJA1105_SPEED_AUTO	= 0,
209 } sja1105_speed_t;
210 
211 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port);
212 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port);
213 int sja1105_clocking_setup(struct sja1105_private *priv);
214 
215 /* From sja1105_ethtool.c */
216 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data);
217 void sja1105_get_strings(struct dsa_switch *ds, int port,
218 			 u32 stringset, u8 *data);
219 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset);
220 
221 /* From sja1105_dynamic_config.c */
222 int sja1105_dynamic_config_read(struct sja1105_private *priv,
223 				enum sja1105_blk_idx blk_idx,
224 				int index, void *entry);
225 int sja1105_dynamic_config_write(struct sja1105_private *priv,
226 				 enum sja1105_blk_idx blk_idx,
227 				 int index, void *entry, bool keep);
228 
229 enum sja1105_iotag {
230 	SJA1105_C_TAG = 0, /* Inner VLAN header */
231 	SJA1105_S_TAG = 1, /* Outer VLAN header */
232 };
233 
234 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid);
235 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
236 		      const unsigned char *addr, u16 vid);
237 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
238 		      const unsigned char *addr, u16 vid);
239 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
240 			const unsigned char *addr, u16 vid);
241 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
242 			const unsigned char *addr, u16 vid);
243 
244 /* Common implementations for the static and dynamic configs */
245 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr,
246 					   enum packing_op op);
247 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr,
248 					   enum packing_op op);
249 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr,
250 					 enum packing_op op);
251 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr,
252 					 enum packing_op op);
253 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr,
254 					    enum packing_op op);
255 size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr,
256 					    enum packing_op op);
257 size_t sja1105_vl_lookup_entry_packing(void *buf, void *entry_ptr,
258 				       enum packing_op op);
259 
260 /* From sja1105_flower.c */
261 int sja1105_cls_flower_del(struct dsa_switch *ds, int port,
262 			   struct flow_cls_offload *cls, bool ingress);
263 int sja1105_cls_flower_add(struct dsa_switch *ds, int port,
264 			   struct flow_cls_offload *cls, bool ingress);
265 void sja1105_flower_setup(struct dsa_switch *ds);
266 void sja1105_flower_teardown(struct dsa_switch *ds);
267 
268 #endif
269