1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 #define SJA1105_NUM_L2_POLICERS 45 23 24 typedef enum { 25 SPI_READ = 0, 26 SPI_WRITE = 1, 27 } sja1105_spi_rw_mode_t; 28 29 #include "sja1105_tas.h" 30 #include "sja1105_ptp.h" 31 32 /* Keeps the different addresses between E/T and P/Q/R/S */ 33 struct sja1105_regs { 34 u64 device_id; 35 u64 prod_id; 36 u64 status; 37 u64 port_control; 38 u64 rgu; 39 u64 vl_status; 40 u64 config; 41 u64 sgmii; 42 u64 rmii_pll1; 43 u64 ptppinst; 44 u64 ptppindur; 45 u64 ptp_control; 46 u64 ptpclkval; 47 u64 ptpclkrate; 48 u64 ptpclkcorp; 49 u64 ptpsyncts; 50 u64 ptpschtm; 51 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 52 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 53 u64 pad_mii_rx[SJA1105_NUM_PORTS]; 54 u64 pad_mii_id[SJA1105_NUM_PORTS]; 55 u64 cgu_idiv[SJA1105_NUM_PORTS]; 56 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 57 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 58 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 59 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 60 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 61 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 62 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 63 u64 mac[SJA1105_NUM_PORTS]; 64 u64 mac_hl1[SJA1105_NUM_PORTS]; 65 u64 mac_hl2[SJA1105_NUM_PORTS]; 66 u64 ether_stats[SJA1105_NUM_PORTS]; 67 u64 qlevel[SJA1105_NUM_PORTS]; 68 }; 69 70 struct sja1105_info { 71 u64 device_id; 72 /* Needed for distinction between P and R, and between Q and S 73 * (since the parts with/without SGMII share the same 74 * switch core and device_id) 75 */ 76 u64 part_no; 77 /* E/T and P/Q/R/S have partial timestamps of different sizes. 78 * They must be reconstructed on both families anyway to get the full 79 * 64-bit values back. 80 */ 81 int ptp_ts_bits; 82 /* Also SPI commands are of different sizes to retrieve 83 * the egress timestamps. 84 */ 85 int ptpegr_ts_bytes; 86 const struct sja1105_dynamic_table_ops *dyn_ops; 87 const struct sja1105_table_ops *static_ops; 88 const struct sja1105_regs *regs; 89 int (*reset_cmd)(struct dsa_switch *ds); 90 int (*setup_rgmii_delay)(const void *ctx, int port); 91 /* Prototypes from include/net/dsa.h */ 92 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 93 const unsigned char *addr, u16 vid); 94 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 95 const unsigned char *addr, u16 vid); 96 void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 97 enum packing_op op); 98 const char *name; 99 }; 100 101 enum sja1105_key_type { 102 SJA1105_KEY_BCAST, 103 SJA1105_KEY_TC, 104 SJA1105_KEY_VLAN_UNAWARE_VL, 105 SJA1105_KEY_VLAN_AWARE_VL, 106 }; 107 108 struct sja1105_key { 109 enum sja1105_key_type type; 110 111 union { 112 /* SJA1105_KEY_TC */ 113 struct { 114 int pcp; 115 } tc; 116 117 /* SJA1105_KEY_VLAN_UNAWARE_VL */ 118 /* SJA1105_KEY_VLAN_AWARE_VL */ 119 struct { 120 u64 dmac; 121 u16 vid; 122 u16 pcp; 123 } vl; 124 }; 125 }; 126 127 enum sja1105_rule_type { 128 SJA1105_RULE_BCAST_POLICER, 129 SJA1105_RULE_TC_POLICER, 130 SJA1105_RULE_VL, 131 }; 132 133 enum sja1105_vl_type { 134 SJA1105_VL_NONCRITICAL, 135 SJA1105_VL_RATE_CONSTRAINED, 136 SJA1105_VL_TIME_TRIGGERED, 137 }; 138 139 struct sja1105_rule { 140 struct list_head list; 141 unsigned long cookie; 142 unsigned long port_mask; 143 struct sja1105_key key; 144 enum sja1105_rule_type type; 145 146 /* Action */ 147 union { 148 /* SJA1105_RULE_BCAST_POLICER */ 149 struct { 150 int sharindx; 151 } bcast_pol; 152 153 /* SJA1105_RULE_TC_POLICER */ 154 struct { 155 int sharindx; 156 } tc_pol; 157 158 /* SJA1105_RULE_VL */ 159 struct { 160 enum sja1105_vl_type type; 161 unsigned long destports; 162 int sharindx; 163 int maxlen; 164 int ipv; 165 u64 base_time; 166 u64 cycle_time; 167 int num_entries; 168 struct action_gate_entry *entries; 169 struct flow_stats stats; 170 } vl; 171 }; 172 }; 173 174 struct sja1105_flow_block { 175 struct list_head rules; 176 bool l2_policer_used[SJA1105_NUM_L2_POLICERS]; 177 int num_virtual_links; 178 }; 179 180 struct sja1105_private { 181 struct sja1105_static_config static_config; 182 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 183 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 184 const struct sja1105_info *info; 185 struct gpio_desc *reset_gpio; 186 struct spi_device *spidev; 187 struct dsa_switch *ds; 188 struct sja1105_flow_block flow_block; 189 struct sja1105_port ports[SJA1105_NUM_PORTS]; 190 /* Serializes transmission of management frames so that 191 * the switch doesn't confuse them with one another. 192 */ 193 struct mutex mgmt_lock; 194 struct sja1105_tagger_data tagger_data; 195 struct sja1105_ptp_data ptp_data; 196 struct sja1105_tas_data tas_data; 197 }; 198 199 #include "sja1105_dynamic_config.h" 200 201 struct sja1105_spi_message { 202 u64 access; 203 u64 read_count; 204 u64 address; 205 }; 206 207 /* From sja1105_main.c */ 208 enum sja1105_reset_reason { 209 SJA1105_VLAN_FILTERING = 0, 210 SJA1105_RX_HWTSTAMPING, 211 SJA1105_AGEING_TIME, 212 SJA1105_SCHEDULING, 213 SJA1105_BEST_EFFORT_POLICING, 214 SJA1105_VIRTUAL_LINKS, 215 }; 216 217 int sja1105_static_config_reload(struct sja1105_private *priv, 218 enum sja1105_reset_reason reason); 219 220 /* From sja1105_spi.c */ 221 int sja1105_xfer_buf(const struct sja1105_private *priv, 222 sja1105_spi_rw_mode_t rw, u64 reg_addr, 223 u8 *buf, size_t len); 224 int sja1105_xfer_u32(const struct sja1105_private *priv, 225 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 226 struct ptp_system_timestamp *ptp_sts); 227 int sja1105_xfer_u64(const struct sja1105_private *priv, 228 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 229 struct ptp_system_timestamp *ptp_sts); 230 int sja1105_static_config_upload(struct sja1105_private *priv); 231 int sja1105_inhibit_tx(const struct sja1105_private *priv, 232 unsigned long port_bitmap, bool tx_inhibited); 233 234 extern struct sja1105_info sja1105e_info; 235 extern struct sja1105_info sja1105t_info; 236 extern struct sja1105_info sja1105p_info; 237 extern struct sja1105_info sja1105q_info; 238 extern struct sja1105_info sja1105r_info; 239 extern struct sja1105_info sja1105s_info; 240 241 /* From sja1105_clocking.c */ 242 243 typedef enum { 244 XMII_MAC = 0, 245 XMII_PHY = 1, 246 } sja1105_mii_role_t; 247 248 typedef enum { 249 XMII_MODE_MII = 0, 250 XMII_MODE_RMII = 1, 251 XMII_MODE_RGMII = 2, 252 XMII_MODE_SGMII = 3, 253 } sja1105_phy_interface_t; 254 255 typedef enum { 256 SJA1105_SPEED_10MBPS = 3, 257 SJA1105_SPEED_100MBPS = 2, 258 SJA1105_SPEED_1000MBPS = 1, 259 SJA1105_SPEED_AUTO = 0, 260 } sja1105_speed_t; 261 262 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 263 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 264 int sja1105_clocking_setup(struct sja1105_private *priv); 265 266 /* From sja1105_ethtool.c */ 267 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 268 void sja1105_get_strings(struct dsa_switch *ds, int port, 269 u32 stringset, u8 *data); 270 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 271 272 /* From sja1105_dynamic_config.c */ 273 int sja1105_dynamic_config_read(struct sja1105_private *priv, 274 enum sja1105_blk_idx blk_idx, 275 int index, void *entry); 276 int sja1105_dynamic_config_write(struct sja1105_private *priv, 277 enum sja1105_blk_idx blk_idx, 278 int index, void *entry, bool keep); 279 280 enum sja1105_iotag { 281 SJA1105_C_TAG = 0, /* Inner VLAN header */ 282 SJA1105_S_TAG = 1, /* Outer VLAN header */ 283 }; 284 285 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 286 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 287 const unsigned char *addr, u16 vid); 288 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 289 const unsigned char *addr, u16 vid); 290 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 291 const unsigned char *addr, u16 vid); 292 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 293 const unsigned char *addr, u16 vid); 294 295 /* Common implementations for the static and dynamic configs */ 296 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 297 enum packing_op op); 298 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 299 enum packing_op op); 300 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 301 enum packing_op op); 302 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 303 enum packing_op op); 304 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 305 enum packing_op op); 306 size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr, 307 enum packing_op op); 308 size_t sja1105_vl_lookup_entry_packing(void *buf, void *entry_ptr, 309 enum packing_op op); 310 311 /* From sja1105_flower.c */ 312 int sja1105_cls_flower_del(struct dsa_switch *ds, int port, 313 struct flow_cls_offload *cls, bool ingress); 314 int sja1105_cls_flower_add(struct dsa_switch *ds, int port, 315 struct flow_cls_offload *cls, bool ingress); 316 int sja1105_cls_flower_stats(struct dsa_switch *ds, int port, 317 struct flow_cls_offload *cls, bool ingress); 318 void sja1105_flower_setup(struct dsa_switch *ds); 319 void sja1105_flower_teardown(struct dsa_switch *ds); 320 struct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv, 321 unsigned long cookie); 322 323 #endif 324