1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 23 #include "sja1105_tas.h" 24 #include "sja1105_ptp.h" 25 26 /* Keeps the different addresses between E/T and P/Q/R/S */ 27 struct sja1105_regs { 28 u64 device_id; 29 u64 prod_id; 30 u64 status; 31 u64 port_control; 32 u64 rgu; 33 u64 config; 34 u64 rmii_pll1; 35 u64 ptp_control; 36 u64 ptpclkval; 37 u64 ptpclkrate; 38 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 39 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 40 u64 pad_mii_id[SJA1105_NUM_PORTS]; 41 u64 cgu_idiv[SJA1105_NUM_PORTS]; 42 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 43 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 44 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 45 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 46 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 47 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 48 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 49 u64 mac[SJA1105_NUM_PORTS]; 50 u64 mac_hl1[SJA1105_NUM_PORTS]; 51 u64 mac_hl2[SJA1105_NUM_PORTS]; 52 u64 qlevel[SJA1105_NUM_PORTS]; 53 }; 54 55 struct sja1105_info { 56 u64 device_id; 57 /* Needed for distinction between P and R, and between Q and S 58 * (since the parts with/without SGMII share the same 59 * switch core and device_id) 60 */ 61 u64 part_no; 62 /* E/T and P/Q/R/S have partial timestamps of different sizes. 63 * They must be reconstructed on both families anyway to get the full 64 * 64-bit values back. 65 */ 66 int ptp_ts_bits; 67 /* Also SPI commands are of different sizes to retrieve 68 * the egress timestamps. 69 */ 70 int ptpegr_ts_bytes; 71 const struct sja1105_dynamic_table_ops *dyn_ops; 72 const struct sja1105_table_ops *static_ops; 73 const struct sja1105_regs *regs; 74 int (*ptp_cmd)(const struct dsa_switch *ds, 75 const struct sja1105_ptp_cmd *cmd); 76 int (*reset_cmd)(const void *ctx, const void *data); 77 int (*setup_rgmii_delay)(const void *ctx, int port); 78 /* Prototypes from include/net/dsa.h */ 79 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 80 const unsigned char *addr, u16 vid); 81 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 82 const unsigned char *addr, u16 vid); 83 const char *name; 84 }; 85 86 struct sja1105_private { 87 struct sja1105_static_config static_config; 88 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 89 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 90 const struct sja1105_info *info; 91 struct gpio_desc *reset_gpio; 92 struct spi_device *spidev; 93 struct dsa_switch *ds; 94 struct sja1105_port ports[SJA1105_NUM_PORTS]; 95 /* Serializes transmission of management frames so that 96 * the switch doesn't confuse them with one another. 97 */ 98 struct mutex mgmt_lock; 99 struct sja1105_tagger_data tagger_data; 100 struct sja1105_ptp_data ptp_data; 101 struct sja1105_tas_data tas_data; 102 }; 103 104 #include "sja1105_dynamic_config.h" 105 106 struct sja1105_spi_message { 107 u64 access; 108 u64 read_count; 109 u64 address; 110 }; 111 112 typedef enum { 113 SPI_READ = 0, 114 SPI_WRITE = 1, 115 } sja1105_spi_rw_mode_t; 116 117 /* From sja1105_main.c */ 118 int sja1105_static_config_reload(struct sja1105_private *priv); 119 120 /* From sja1105_spi.c */ 121 int sja1105_xfer_buf(const struct sja1105_private *priv, 122 sja1105_spi_rw_mode_t rw, u64 reg_addr, 123 u8 *buf, size_t len); 124 int sja1105_xfer_u32(const struct sja1105_private *priv, 125 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 126 struct ptp_system_timestamp *ptp_sts); 127 int sja1105_xfer_u64(const struct sja1105_private *priv, 128 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 129 struct ptp_system_timestamp *ptp_sts); 130 int sja1105_static_config_upload(struct sja1105_private *priv); 131 int sja1105_inhibit_tx(const struct sja1105_private *priv, 132 unsigned long port_bitmap, bool tx_inhibited); 133 134 extern struct sja1105_info sja1105e_info; 135 extern struct sja1105_info sja1105t_info; 136 extern struct sja1105_info sja1105p_info; 137 extern struct sja1105_info sja1105q_info; 138 extern struct sja1105_info sja1105r_info; 139 extern struct sja1105_info sja1105s_info; 140 141 /* From sja1105_clocking.c */ 142 143 typedef enum { 144 XMII_MAC = 0, 145 XMII_PHY = 1, 146 } sja1105_mii_role_t; 147 148 typedef enum { 149 XMII_MODE_MII = 0, 150 XMII_MODE_RMII = 1, 151 XMII_MODE_RGMII = 2, 152 } sja1105_phy_interface_t; 153 154 typedef enum { 155 SJA1105_SPEED_10MBPS = 3, 156 SJA1105_SPEED_100MBPS = 2, 157 SJA1105_SPEED_1000MBPS = 1, 158 SJA1105_SPEED_AUTO = 0, 159 } sja1105_speed_t; 160 161 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 162 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 163 int sja1105_clocking_setup(struct sja1105_private *priv); 164 165 /* From sja1105_ethtool.c */ 166 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 167 void sja1105_get_strings(struct dsa_switch *ds, int port, 168 u32 stringset, u8 *data); 169 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 170 171 /* From sja1105_dynamic_config.c */ 172 int sja1105_dynamic_config_read(struct sja1105_private *priv, 173 enum sja1105_blk_idx blk_idx, 174 int index, void *entry); 175 int sja1105_dynamic_config_write(struct sja1105_private *priv, 176 enum sja1105_blk_idx blk_idx, 177 int index, void *entry, bool keep); 178 179 enum sja1105_iotag { 180 SJA1105_C_TAG = 0, /* Inner VLAN header */ 181 SJA1105_S_TAG = 1, /* Outer VLAN header */ 182 }; 183 184 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 185 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 186 const unsigned char *addr, u16 vid); 187 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 188 const unsigned char *addr, u16 vid); 189 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 190 const unsigned char *addr, u16 vid); 191 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 192 const unsigned char *addr, u16 vid); 193 194 /* Common implementations for the static and dynamic configs */ 195 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 196 enum packing_op op); 197 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 198 enum packing_op op); 199 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 200 enum packing_op op); 201 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 202 enum packing_op op); 203 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 204 enum packing_op op); 205 206 #endif 207