1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <linux/dsa/8021q.h> 12 #include <net/dsa.h> 13 #include <linux/mutex.h> 14 #include "sja1105_static_config.h" 15 16 #define SJA1105_NUM_PORTS 5 17 #define SJA1105_NUM_TC 8 18 #define SJA1105ET_FDB_BIN_SIZE 4 19 /* The hardware value is in multiples of 10 ms. 20 * The passed parameter is in multiples of 1 ms. 21 */ 22 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 23 #define SJA1105_NUM_L2_POLICERS 45 24 25 typedef enum { 26 SPI_READ = 0, 27 SPI_WRITE = 1, 28 } sja1105_spi_rw_mode_t; 29 30 #include "sja1105_tas.h" 31 #include "sja1105_ptp.h" 32 33 /* Keeps the different addresses between E/T and P/Q/R/S */ 34 struct sja1105_regs { 35 u64 device_id; 36 u64 prod_id; 37 u64 status; 38 u64 port_control; 39 u64 rgu; 40 u64 vl_status; 41 u64 config; 42 u64 sgmii; 43 u64 rmii_pll1; 44 u64 ptppinst; 45 u64 ptppindur; 46 u64 ptp_control; 47 u64 ptpclkval; 48 u64 ptpclkrate; 49 u64 ptpclkcorp; 50 u64 ptpsyncts; 51 u64 ptpschtm; 52 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 53 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 54 u64 pad_mii_rx[SJA1105_NUM_PORTS]; 55 u64 pad_mii_id[SJA1105_NUM_PORTS]; 56 u64 cgu_idiv[SJA1105_NUM_PORTS]; 57 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 58 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 59 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 60 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 61 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 62 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 63 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 64 u64 mac[SJA1105_NUM_PORTS]; 65 u64 mac_hl1[SJA1105_NUM_PORTS]; 66 u64 mac_hl2[SJA1105_NUM_PORTS]; 67 u64 ether_stats[SJA1105_NUM_PORTS]; 68 u64 qlevel[SJA1105_NUM_PORTS]; 69 }; 70 71 struct sja1105_info { 72 u64 device_id; 73 /* Needed for distinction between P and R, and between Q and S 74 * (since the parts with/without SGMII share the same 75 * switch core and device_id) 76 */ 77 u64 part_no; 78 /* E/T and P/Q/R/S have partial timestamps of different sizes. 79 * They must be reconstructed on both families anyway to get the full 80 * 64-bit values back. 81 */ 82 int ptp_ts_bits; 83 /* Also SPI commands are of different sizes to retrieve 84 * the egress timestamps. 85 */ 86 int ptpegr_ts_bytes; 87 int num_cbs_shapers; 88 const struct sja1105_dynamic_table_ops *dyn_ops; 89 const struct sja1105_table_ops *static_ops; 90 const struct sja1105_regs *regs; 91 /* Both E/T and P/Q/R/S have quirks when it comes to popping the S-Tag 92 * from double-tagged frames. E/T will pop it only when it's equal to 93 * TPID from the General Parameters Table, while P/Q/R/S will only 94 * pop it when it's equal to TPID2. 95 */ 96 u16 qinq_tpid; 97 bool can_limit_mcast_flood; 98 int (*reset_cmd)(struct dsa_switch *ds); 99 int (*setup_rgmii_delay)(const void *ctx, int port); 100 /* Prototypes from include/net/dsa.h */ 101 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 102 const unsigned char *addr, u16 vid); 103 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 104 const unsigned char *addr, u16 vid); 105 void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 106 enum packing_op op); 107 const char *name; 108 }; 109 110 enum sja1105_key_type { 111 SJA1105_KEY_BCAST, 112 SJA1105_KEY_TC, 113 SJA1105_KEY_VLAN_UNAWARE_VL, 114 SJA1105_KEY_VLAN_AWARE_VL, 115 }; 116 117 struct sja1105_key { 118 enum sja1105_key_type type; 119 120 union { 121 /* SJA1105_KEY_TC */ 122 struct { 123 int pcp; 124 } tc; 125 126 /* SJA1105_KEY_VLAN_UNAWARE_VL */ 127 /* SJA1105_KEY_VLAN_AWARE_VL */ 128 struct { 129 u64 dmac; 130 u16 vid; 131 u16 pcp; 132 } vl; 133 }; 134 }; 135 136 enum sja1105_rule_type { 137 SJA1105_RULE_BCAST_POLICER, 138 SJA1105_RULE_TC_POLICER, 139 SJA1105_RULE_VL, 140 }; 141 142 enum sja1105_vl_type { 143 SJA1105_VL_NONCRITICAL, 144 SJA1105_VL_RATE_CONSTRAINED, 145 SJA1105_VL_TIME_TRIGGERED, 146 }; 147 148 struct sja1105_rule { 149 struct list_head list; 150 unsigned long cookie; 151 unsigned long port_mask; 152 struct sja1105_key key; 153 enum sja1105_rule_type type; 154 155 /* Action */ 156 union { 157 /* SJA1105_RULE_BCAST_POLICER */ 158 struct { 159 int sharindx; 160 } bcast_pol; 161 162 /* SJA1105_RULE_TC_POLICER */ 163 struct { 164 int sharindx; 165 } tc_pol; 166 167 /* SJA1105_RULE_VL */ 168 struct { 169 enum sja1105_vl_type type; 170 unsigned long destports; 171 int sharindx; 172 int maxlen; 173 int ipv; 174 u64 base_time; 175 u64 cycle_time; 176 int num_entries; 177 struct action_gate_entry *entries; 178 struct flow_stats stats; 179 } vl; 180 }; 181 }; 182 183 struct sja1105_flow_block { 184 struct list_head rules; 185 bool l2_policer_used[SJA1105_NUM_L2_POLICERS]; 186 int num_virtual_links; 187 }; 188 189 struct sja1105_bridge_vlan { 190 struct list_head list; 191 int port; 192 u16 vid; 193 bool pvid; 194 bool untagged; 195 }; 196 197 enum sja1105_vlan_state { 198 SJA1105_VLAN_UNAWARE, 199 SJA1105_VLAN_BEST_EFFORT, 200 SJA1105_VLAN_FILTERING_FULL, 201 }; 202 203 struct sja1105_private { 204 struct sja1105_static_config static_config; 205 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 206 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 207 bool best_effort_vlan_filtering; 208 unsigned long learn_ena; 209 unsigned long ucast_egress_floods; 210 unsigned long bcast_egress_floods; 211 const struct sja1105_info *info; 212 struct gpio_desc *reset_gpio; 213 struct spi_device *spidev; 214 struct dsa_switch *ds; 215 struct list_head dsa_8021q_vlans; 216 struct list_head bridge_vlans; 217 struct sja1105_flow_block flow_block; 218 struct sja1105_port ports[SJA1105_NUM_PORTS]; 219 /* Serializes transmission of management frames so that 220 * the switch doesn't confuse them with one another. 221 */ 222 struct mutex mgmt_lock; 223 struct dsa_8021q_context *dsa_8021q_ctx; 224 enum sja1105_vlan_state vlan_state; 225 struct devlink_region **regions; 226 struct sja1105_cbs_entry *cbs; 227 struct sja1105_tagger_data tagger_data; 228 struct sja1105_ptp_data ptp_data; 229 struct sja1105_tas_data tas_data; 230 }; 231 232 #include "sja1105_dynamic_config.h" 233 234 struct sja1105_spi_message { 235 u64 access; 236 u64 read_count; 237 u64 address; 238 }; 239 240 /* From sja1105_main.c */ 241 enum sja1105_reset_reason { 242 SJA1105_VLAN_FILTERING = 0, 243 SJA1105_RX_HWTSTAMPING, 244 SJA1105_AGEING_TIME, 245 SJA1105_SCHEDULING, 246 SJA1105_BEST_EFFORT_POLICING, 247 SJA1105_VIRTUAL_LINKS, 248 }; 249 250 int sja1105_static_config_reload(struct sja1105_private *priv, 251 enum sja1105_reset_reason reason); 252 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, 253 struct netlink_ext_ack *extack); 254 void sja1105_frame_memory_partitioning(struct sja1105_private *priv); 255 256 /* From sja1105_devlink.c */ 257 int sja1105_devlink_setup(struct dsa_switch *ds); 258 void sja1105_devlink_teardown(struct dsa_switch *ds); 259 int sja1105_devlink_param_get(struct dsa_switch *ds, u32 id, 260 struct devlink_param_gset_ctx *ctx); 261 int sja1105_devlink_param_set(struct dsa_switch *ds, u32 id, 262 struct devlink_param_gset_ctx *ctx); 263 int sja1105_devlink_info_get(struct dsa_switch *ds, 264 struct devlink_info_req *req, 265 struct netlink_ext_ack *extack); 266 267 /* From sja1105_spi.c */ 268 int sja1105_xfer_buf(const struct sja1105_private *priv, 269 sja1105_spi_rw_mode_t rw, u64 reg_addr, 270 u8 *buf, size_t len); 271 int sja1105_xfer_u32(const struct sja1105_private *priv, 272 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 273 struct ptp_system_timestamp *ptp_sts); 274 int sja1105_xfer_u64(const struct sja1105_private *priv, 275 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 276 struct ptp_system_timestamp *ptp_sts); 277 int static_config_buf_prepare_for_upload(struct sja1105_private *priv, 278 void *config_buf, int buf_len); 279 int sja1105_static_config_upload(struct sja1105_private *priv); 280 int sja1105_inhibit_tx(const struct sja1105_private *priv, 281 unsigned long port_bitmap, bool tx_inhibited); 282 283 extern const struct sja1105_info sja1105e_info; 284 extern const struct sja1105_info sja1105t_info; 285 extern const struct sja1105_info sja1105p_info; 286 extern const struct sja1105_info sja1105q_info; 287 extern const struct sja1105_info sja1105r_info; 288 extern const struct sja1105_info sja1105s_info; 289 290 /* From sja1105_clocking.c */ 291 292 typedef enum { 293 XMII_MAC = 0, 294 XMII_PHY = 1, 295 } sja1105_mii_role_t; 296 297 typedef enum { 298 XMII_MODE_MII = 0, 299 XMII_MODE_RMII = 1, 300 XMII_MODE_RGMII = 2, 301 XMII_MODE_SGMII = 3, 302 } sja1105_phy_interface_t; 303 304 typedef enum { 305 SJA1105_SPEED_10MBPS = 3, 306 SJA1105_SPEED_100MBPS = 2, 307 SJA1105_SPEED_1000MBPS = 1, 308 SJA1105_SPEED_AUTO = 0, 309 } sja1105_speed_t; 310 311 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 312 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 313 int sja1105_clocking_setup(struct sja1105_private *priv); 314 315 /* From sja1105_ethtool.c */ 316 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 317 void sja1105_get_strings(struct dsa_switch *ds, int port, 318 u32 stringset, u8 *data); 319 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 320 321 /* From sja1105_dynamic_config.c */ 322 int sja1105_dynamic_config_read(struct sja1105_private *priv, 323 enum sja1105_blk_idx blk_idx, 324 int index, void *entry); 325 int sja1105_dynamic_config_write(struct sja1105_private *priv, 326 enum sja1105_blk_idx blk_idx, 327 int index, void *entry, bool keep); 328 329 enum sja1105_iotag { 330 SJA1105_C_TAG = 0, /* Inner VLAN header */ 331 SJA1105_S_TAG = 1, /* Outer VLAN header */ 332 }; 333 334 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 335 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 336 const unsigned char *addr, u16 vid); 337 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 338 const unsigned char *addr, u16 vid); 339 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 340 const unsigned char *addr, u16 vid); 341 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 342 const unsigned char *addr, u16 vid); 343 344 /* From sja1105_flower.c */ 345 int sja1105_cls_flower_del(struct dsa_switch *ds, int port, 346 struct flow_cls_offload *cls, bool ingress); 347 int sja1105_cls_flower_add(struct dsa_switch *ds, int port, 348 struct flow_cls_offload *cls, bool ingress); 349 int sja1105_cls_flower_stats(struct dsa_switch *ds, int port, 350 struct flow_cls_offload *cls, bool ingress); 351 void sja1105_flower_setup(struct dsa_switch *ds); 352 void sja1105_flower_teardown(struct dsa_switch *ds); 353 struct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv, 354 unsigned long cookie); 355 356 #endif 357