1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/ptp_clock_kernel.h> 9 #include <linux/timecounter.h> 10 #include <linux/dsa/sja1105.h> 11 #include <net/dsa.h> 12 #include <linux/mutex.h> 13 #include "sja1105_static_config.h" 14 15 #define SJA1105_NUM_PORTS 5 16 #define SJA1105_NUM_TC 8 17 #define SJA1105ET_FDB_BIN_SIZE 4 18 /* The hardware value is in multiples of 10 ms. 19 * The passed parameter is in multiples of 1 ms. 20 */ 21 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 22 #define SJA1105_NUM_L2_POLICERS 45 23 24 typedef enum { 25 SPI_READ = 0, 26 SPI_WRITE = 1, 27 } sja1105_spi_rw_mode_t; 28 29 #include "sja1105_tas.h" 30 #include "sja1105_ptp.h" 31 32 /* Keeps the different addresses between E/T and P/Q/R/S */ 33 struct sja1105_regs { 34 u64 device_id; 35 u64 prod_id; 36 u64 status; 37 u64 port_control; 38 u64 rgu; 39 u64 config; 40 u64 sgmii; 41 u64 rmii_pll1; 42 u64 ptppinst; 43 u64 ptppindur; 44 u64 ptp_control; 45 u64 ptpclkval; 46 u64 ptpclkrate; 47 u64 ptpclkcorp; 48 u64 ptpsyncts; 49 u64 ptpschtm; 50 u64 ptpegr_ts[SJA1105_NUM_PORTS]; 51 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 52 u64 pad_mii_id[SJA1105_NUM_PORTS]; 53 u64 cgu_idiv[SJA1105_NUM_PORTS]; 54 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 55 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 56 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 57 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 58 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 59 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 60 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 61 u64 mac[SJA1105_NUM_PORTS]; 62 u64 mac_hl1[SJA1105_NUM_PORTS]; 63 u64 mac_hl2[SJA1105_NUM_PORTS]; 64 u64 ether_stats[SJA1105_NUM_PORTS]; 65 u64 qlevel[SJA1105_NUM_PORTS]; 66 }; 67 68 struct sja1105_info { 69 u64 device_id; 70 /* Needed for distinction between P and R, and between Q and S 71 * (since the parts with/without SGMII share the same 72 * switch core and device_id) 73 */ 74 u64 part_no; 75 /* E/T and P/Q/R/S have partial timestamps of different sizes. 76 * They must be reconstructed on both families anyway to get the full 77 * 64-bit values back. 78 */ 79 int ptp_ts_bits; 80 /* Also SPI commands are of different sizes to retrieve 81 * the egress timestamps. 82 */ 83 int ptpegr_ts_bytes; 84 const struct sja1105_dynamic_table_ops *dyn_ops; 85 const struct sja1105_table_ops *static_ops; 86 const struct sja1105_regs *regs; 87 int (*reset_cmd)(struct dsa_switch *ds); 88 int (*setup_rgmii_delay)(const void *ctx, int port); 89 /* Prototypes from include/net/dsa.h */ 90 int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 91 const unsigned char *addr, u16 vid); 92 int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 93 const unsigned char *addr, u16 vid); 94 void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 95 enum packing_op op); 96 const char *name; 97 }; 98 99 enum sja1105_rule_type { 100 SJA1105_RULE_BCAST_POLICER, 101 SJA1105_RULE_TC_POLICER, 102 }; 103 104 struct sja1105_rule { 105 struct list_head list; 106 unsigned long cookie; 107 unsigned long port_mask; 108 enum sja1105_rule_type type; 109 110 union { 111 /* SJA1105_RULE_BCAST_POLICER */ 112 struct { 113 int sharindx; 114 } bcast_pol; 115 116 /* SJA1105_RULE_TC_POLICER */ 117 struct { 118 int sharindx; 119 int tc; 120 } tc_pol; 121 }; 122 }; 123 124 struct sja1105_flow_block { 125 struct list_head rules; 126 bool l2_policer_used[SJA1105_NUM_L2_POLICERS]; 127 }; 128 129 struct sja1105_private { 130 struct sja1105_static_config static_config; 131 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 132 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 133 const struct sja1105_info *info; 134 struct gpio_desc *reset_gpio; 135 struct spi_device *spidev; 136 struct dsa_switch *ds; 137 struct sja1105_flow_block flow_block; 138 struct sja1105_port ports[SJA1105_NUM_PORTS]; 139 /* Serializes transmission of management frames so that 140 * the switch doesn't confuse them with one another. 141 */ 142 struct mutex mgmt_lock; 143 struct sja1105_tagger_data tagger_data; 144 struct sja1105_ptp_data ptp_data; 145 struct sja1105_tas_data tas_data; 146 }; 147 148 #include "sja1105_dynamic_config.h" 149 150 struct sja1105_spi_message { 151 u64 access; 152 u64 read_count; 153 u64 address; 154 }; 155 156 /* From sja1105_main.c */ 157 enum sja1105_reset_reason { 158 SJA1105_VLAN_FILTERING = 0, 159 SJA1105_RX_HWTSTAMPING, 160 SJA1105_AGEING_TIME, 161 SJA1105_SCHEDULING, 162 SJA1105_BEST_EFFORT_POLICING, 163 }; 164 165 int sja1105_static_config_reload(struct sja1105_private *priv, 166 enum sja1105_reset_reason reason); 167 168 /* From sja1105_spi.c */ 169 int sja1105_xfer_buf(const struct sja1105_private *priv, 170 sja1105_spi_rw_mode_t rw, u64 reg_addr, 171 u8 *buf, size_t len); 172 int sja1105_xfer_u32(const struct sja1105_private *priv, 173 sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 174 struct ptp_system_timestamp *ptp_sts); 175 int sja1105_xfer_u64(const struct sja1105_private *priv, 176 sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 177 struct ptp_system_timestamp *ptp_sts); 178 int sja1105_static_config_upload(struct sja1105_private *priv); 179 int sja1105_inhibit_tx(const struct sja1105_private *priv, 180 unsigned long port_bitmap, bool tx_inhibited); 181 182 extern struct sja1105_info sja1105e_info; 183 extern struct sja1105_info sja1105t_info; 184 extern struct sja1105_info sja1105p_info; 185 extern struct sja1105_info sja1105q_info; 186 extern struct sja1105_info sja1105r_info; 187 extern struct sja1105_info sja1105s_info; 188 189 /* From sja1105_clocking.c */ 190 191 typedef enum { 192 XMII_MAC = 0, 193 XMII_PHY = 1, 194 } sja1105_mii_role_t; 195 196 typedef enum { 197 XMII_MODE_MII = 0, 198 XMII_MODE_RMII = 1, 199 XMII_MODE_RGMII = 2, 200 XMII_MODE_SGMII = 3, 201 } sja1105_phy_interface_t; 202 203 typedef enum { 204 SJA1105_SPEED_10MBPS = 3, 205 SJA1105_SPEED_100MBPS = 2, 206 SJA1105_SPEED_1000MBPS = 1, 207 SJA1105_SPEED_AUTO = 0, 208 } sja1105_speed_t; 209 210 int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 211 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 212 int sja1105_clocking_setup(struct sja1105_private *priv); 213 214 /* From sja1105_ethtool.c */ 215 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 216 void sja1105_get_strings(struct dsa_switch *ds, int port, 217 u32 stringset, u8 *data); 218 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 219 220 /* From sja1105_dynamic_config.c */ 221 int sja1105_dynamic_config_read(struct sja1105_private *priv, 222 enum sja1105_blk_idx blk_idx, 223 int index, void *entry); 224 int sja1105_dynamic_config_write(struct sja1105_private *priv, 225 enum sja1105_blk_idx blk_idx, 226 int index, void *entry, bool keep); 227 228 enum sja1105_iotag { 229 SJA1105_C_TAG = 0, /* Inner VLAN header */ 230 SJA1105_S_TAG = 1, /* Outer VLAN header */ 231 }; 232 233 u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 234 int sja1105et_fdb_add(struct dsa_switch *ds, int port, 235 const unsigned char *addr, u16 vid); 236 int sja1105et_fdb_del(struct dsa_switch *ds, int port, 237 const unsigned char *addr, u16 vid); 238 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 239 const unsigned char *addr, u16 vid); 240 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 241 const unsigned char *addr, u16 vid); 242 243 /* Common implementations for the static and dynamic configs */ 244 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 245 enum packing_op op); 246 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 247 enum packing_op op); 248 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 249 enum packing_op op); 250 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 251 enum packing_op op); 252 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 253 enum packing_op op); 254 size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr, 255 enum packing_op op); 256 257 /* From sja1105_flower.c */ 258 int sja1105_cls_flower_del(struct dsa_switch *ds, int port, 259 struct flow_cls_offload *cls, bool ingress); 260 int sja1105_cls_flower_add(struct dsa_switch *ds, int port, 261 struct flow_cls_offload *cls, bool ingress); 262 void sja1105_flower_setup(struct dsa_switch *ds); 263 void sja1105_flower_teardown(struct dsa_switch *ds); 264 265 #endif 266