1 /* SPDX-License-Identifier: GPL-2.0 2 * Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4 */ 5 #ifndef _SJA1105_H 6 #define _SJA1105_H 7 8 #include <linux/dsa/sja1105.h> 9 #include <net/dsa.h> 10 #include <linux/mutex.h> 11 #include "sja1105_static_config.h" 12 13 #define SJA1105_NUM_PORTS 5 14 #define SJA1105_NUM_TC 8 15 #define SJA1105ET_FDB_BIN_SIZE 4 16 /* The hardware value is in multiples of 10 ms. 17 * The passed parameter is in multiples of 1 ms. 18 */ 19 #define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 20 21 /* Keeps the different addresses between E/T and P/Q/R/S */ 22 struct sja1105_regs { 23 u64 device_id; 24 u64 prod_id; 25 u64 status; 26 u64 port_control; 27 u64 rgu; 28 u64 config; 29 u64 rmii_pll1; 30 u64 pad_mii_tx[SJA1105_NUM_PORTS]; 31 u64 cgu_idiv[SJA1105_NUM_PORTS]; 32 u64 rgmii_pad_mii_tx[SJA1105_NUM_PORTS]; 33 u64 mii_tx_clk[SJA1105_NUM_PORTS]; 34 u64 mii_rx_clk[SJA1105_NUM_PORTS]; 35 u64 mii_ext_tx_clk[SJA1105_NUM_PORTS]; 36 u64 mii_ext_rx_clk[SJA1105_NUM_PORTS]; 37 u64 rgmii_tx_clk[SJA1105_NUM_PORTS]; 38 u64 rmii_ref_clk[SJA1105_NUM_PORTS]; 39 u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS]; 40 u64 mac[SJA1105_NUM_PORTS]; 41 u64 mac_hl1[SJA1105_NUM_PORTS]; 42 u64 mac_hl2[SJA1105_NUM_PORTS]; 43 u64 qlevel[SJA1105_NUM_PORTS]; 44 }; 45 46 struct sja1105_info { 47 u64 device_id; 48 /* Needed for distinction between P and R, and between Q and S 49 * (since the parts with/without SGMII share the same 50 * switch core and device_id) 51 */ 52 u64 part_no; 53 const struct sja1105_dynamic_table_ops *dyn_ops; 54 const struct sja1105_table_ops *static_ops; 55 const struct sja1105_regs *regs; 56 int (*reset_cmd)(const void *ctx, const void *data); 57 int (*setup_rgmii_delay)(const void *ctx, int port); 58 const char *name; 59 }; 60 61 struct sja1105_private { 62 struct sja1105_static_config static_config; 63 bool rgmii_rx_delay[SJA1105_NUM_PORTS]; 64 bool rgmii_tx_delay[SJA1105_NUM_PORTS]; 65 const struct sja1105_info *info; 66 struct gpio_desc *reset_gpio; 67 struct spi_device *spidev; 68 struct dsa_switch *ds; 69 struct sja1105_port ports[SJA1105_NUM_PORTS]; 70 /* Serializes transmission of management frames so that 71 * the switch doesn't confuse them with one another. 72 */ 73 struct mutex mgmt_lock; 74 }; 75 76 #include "sja1105_dynamic_config.h" 77 78 struct sja1105_spi_message { 79 u64 access; 80 u64 read_count; 81 u64 address; 82 }; 83 84 typedef enum { 85 SPI_READ = 0, 86 SPI_WRITE = 1, 87 } sja1105_spi_rw_mode_t; 88 89 /* From sja1105_spi.c */ 90 int sja1105_spi_send_packed_buf(const struct sja1105_private *priv, 91 sja1105_spi_rw_mode_t rw, u64 reg_addr, 92 void *packed_buf, size_t size_bytes); 93 int sja1105_spi_send_int(const struct sja1105_private *priv, 94 sja1105_spi_rw_mode_t rw, u64 reg_addr, 95 u64 *value, u64 size_bytes); 96 int sja1105_spi_send_long_packed_buf(const struct sja1105_private *priv, 97 sja1105_spi_rw_mode_t rw, u64 base_addr, 98 void *packed_buf, u64 buf_len); 99 int sja1105_static_config_upload(struct sja1105_private *priv); 100 101 extern struct sja1105_info sja1105e_info; 102 extern struct sja1105_info sja1105t_info; 103 extern struct sja1105_info sja1105p_info; 104 extern struct sja1105_info sja1105q_info; 105 extern struct sja1105_info sja1105r_info; 106 extern struct sja1105_info sja1105s_info; 107 108 /* From sja1105_clocking.c */ 109 110 typedef enum { 111 XMII_MAC = 0, 112 XMII_PHY = 1, 113 } sja1105_mii_role_t; 114 115 typedef enum { 116 XMII_MODE_MII = 0, 117 XMII_MODE_RMII = 1, 118 XMII_MODE_RGMII = 2, 119 } sja1105_phy_interface_t; 120 121 typedef enum { 122 SJA1105_SPEED_10MBPS = 3, 123 SJA1105_SPEED_100MBPS = 2, 124 SJA1105_SPEED_1000MBPS = 1, 125 SJA1105_SPEED_AUTO = 0, 126 } sja1105_speed_t; 127 128 int sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 129 int sja1105_clocking_setup(struct sja1105_private *priv); 130 131 /* From sja1105_ethtool.c */ 132 void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 133 void sja1105_get_strings(struct dsa_switch *ds, int port, 134 u32 stringset, u8 *data); 135 int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 136 137 /* From sja1105_dynamic_config.c */ 138 int sja1105_dynamic_config_read(struct sja1105_private *priv, 139 enum sja1105_blk_idx blk_idx, 140 int index, void *entry); 141 int sja1105_dynamic_config_write(struct sja1105_private *priv, 142 enum sja1105_blk_idx blk_idx, 143 int index, void *entry, bool keep); 144 145 u8 sja1105_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 146 147 /* Common implementations for the static and dynamic configs */ 148 size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, 149 enum packing_op op); 150 size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr, 151 enum packing_op op); 152 size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr, 153 enum packing_op op); 154 size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, 155 enum packing_op op); 156 size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, 157 enum packing_op op); 158 159 #endif 160