1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright 2019 NXP 3 */ 4 #ifndef _MSCC_FELIX_H 5 #define _MSCC_FELIX_H 6 7 #define ocelot_to_felix(o) container_of((o), struct felix, ocelot) 8 #define FELIX_MAC_QUIRKS OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION 9 10 #define OCELOT_PORT_MODE_INTERNAL BIT(0) 11 #define OCELOT_PORT_MODE_SGMII BIT(1) 12 #define OCELOT_PORT_MODE_QSGMII BIT(2) 13 #define OCELOT_PORT_MODE_2500BASEX BIT(3) 14 #define OCELOT_PORT_MODE_USXGMII BIT(4) 15 #define OCELOT_PORT_MODE_1000BASEX BIT(5) 16 17 /* Platform-specific information */ 18 struct felix_info { 19 const struct resource *target_io_res; 20 const struct resource *port_io_res; 21 const struct resource *imdio_res; 22 const struct reg_field *regfields; 23 const u32 *const *map; 24 const struct ocelot_ops *ops; 25 const u32 *port_modes; 26 int num_mact_rows; 27 const struct ocelot_stat_layout *stats_layout; 28 int num_ports; 29 int num_tx_queues; 30 struct vcap_props *vcap; 31 u16 vcap_pol_base; 32 u16 vcap_pol_max; 33 u16 vcap_pol_base2; 34 u16 vcap_pol_max2; 35 const struct ptp_clock_info *ptp_caps; 36 37 /* Some Ocelot switches are integrated into the SoC without the 38 * extraction IRQ line connected to the ARM GIC. By enabling this 39 * workaround, the few packets that are delivered to the CPU port 40 * module (currently only PTP) are copied not only to the hardware CPU 41 * port module, but also to the 802.1Q Ethernet CPU port, and polling 42 * the extraction registers is triggered once the DSA tagger sees a PTP 43 * frame. The Ethernet frame is only used as a notification: it is 44 * dropped, and the original frame is extracted over MMIO and annotated 45 * with the RX timestamp. 46 */ 47 bool quirk_no_xtr_irq; 48 49 int (*mdio_bus_alloc)(struct ocelot *ocelot); 50 void (*mdio_bus_free)(struct ocelot *ocelot); 51 void (*phylink_validate)(struct ocelot *ocelot, int port, 52 unsigned long *supported, 53 struct phylink_link_state *state); 54 int (*port_setup_tc)(struct dsa_switch *ds, int port, 55 enum tc_setup_type type, void *type_data); 56 void (*port_sched_speed_set)(struct ocelot *ocelot, int port, 57 u32 speed); 58 struct regmap *(*init_regmap)(struct ocelot *ocelot, 59 struct resource *res); 60 }; 61 62 /* Methods for initializing the hardware resources specific to a tagging 63 * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs, 64 * for "ocelot-8021q"). 65 * It is important that the resources configured here do not have side effects 66 * for the other tagging protocols. If that is the case, their configuration 67 * needs to go to felix_tag_proto_setup_shared(). 68 */ 69 struct felix_tag_proto_ops { 70 int (*setup)(struct dsa_switch *ds); 71 void (*teardown)(struct dsa_switch *ds); 72 unsigned long (*get_host_fwd_mask)(struct dsa_switch *ds); 73 }; 74 75 extern const struct dsa_switch_ops felix_switch_ops; 76 77 /* DSA glue / front-end for struct ocelot */ 78 struct felix { 79 struct dsa_switch *ds; 80 const struct felix_info *info; 81 struct ocelot ocelot; 82 struct mii_bus *imdio; 83 struct phylink_pcs **pcs; 84 resource_size_t switch_base; 85 resource_size_t imdio_base; 86 enum dsa_tag_protocol tag_proto; 87 const struct felix_tag_proto_ops *tag_proto_ops; 88 struct kthread_worker *xmit_worker; 89 unsigned long host_flood_uc_mask; 90 unsigned long host_flood_mc_mask; 91 }; 92 93 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port); 94 int felix_netdev_to_port(struct net_device *dev); 95 96 #endif 97