1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 * 4 * This is an umbrella module for all network switches that are 5 * register-compatible with Ocelot and that perform I/O to their host CPU 6 * through an NPI (Node Processor Interface) Ethernet port. 7 */ 8 #include <uapi/linux/if_bridge.h> 9 #include <soc/mscc/ocelot_vcap.h> 10 #include <soc/mscc/ocelot_qsys.h> 11 #include <soc/mscc/ocelot_sys.h> 12 #include <soc/mscc/ocelot_dev.h> 13 #include <soc/mscc/ocelot_ana.h> 14 #include <soc/mscc/ocelot_ptp.h> 15 #include <soc/mscc/ocelot.h> 16 #include <linux/platform_device.h> 17 #include <linux/packing.h> 18 #include <linux/module.h> 19 #include <linux/of_net.h> 20 #include <linux/pci.h> 21 #include <linux/of.h> 22 #include <linux/pcs-lynx.h> 23 #include <net/pkt_sched.h> 24 #include <net/dsa.h> 25 #include "felix.h" 26 27 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 28 int port, 29 enum dsa_tag_protocol mp) 30 { 31 return DSA_TAG_PROTO_OCELOT; 32 } 33 34 static int felix_set_ageing_time(struct dsa_switch *ds, 35 unsigned int ageing_time) 36 { 37 struct ocelot *ocelot = ds->priv; 38 39 ocelot_set_ageing_time(ocelot, ageing_time); 40 41 return 0; 42 } 43 44 static int felix_fdb_dump(struct dsa_switch *ds, int port, 45 dsa_fdb_dump_cb_t *cb, void *data) 46 { 47 struct ocelot *ocelot = ds->priv; 48 49 return ocelot_fdb_dump(ocelot, port, cb, data); 50 } 51 52 static int felix_fdb_add(struct dsa_switch *ds, int port, 53 const unsigned char *addr, u16 vid) 54 { 55 struct ocelot *ocelot = ds->priv; 56 57 return ocelot_fdb_add(ocelot, port, addr, vid); 58 } 59 60 static int felix_fdb_del(struct dsa_switch *ds, int port, 61 const unsigned char *addr, u16 vid) 62 { 63 struct ocelot *ocelot = ds->priv; 64 65 return ocelot_fdb_del(ocelot, port, addr, vid); 66 } 67 68 /* This callback needs to be present */ 69 static int felix_mdb_prepare(struct dsa_switch *ds, int port, 70 const struct switchdev_obj_port_mdb *mdb) 71 { 72 return 0; 73 } 74 75 static void felix_mdb_add(struct dsa_switch *ds, int port, 76 const struct switchdev_obj_port_mdb *mdb) 77 { 78 struct ocelot *ocelot = ds->priv; 79 80 ocelot_port_mdb_add(ocelot, port, mdb); 81 } 82 83 static int felix_mdb_del(struct dsa_switch *ds, int port, 84 const struct switchdev_obj_port_mdb *mdb) 85 { 86 struct ocelot *ocelot = ds->priv; 87 88 return ocelot_port_mdb_del(ocelot, port, mdb); 89 } 90 91 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 92 u8 state) 93 { 94 struct ocelot *ocelot = ds->priv; 95 96 return ocelot_bridge_stp_state_set(ocelot, port, state); 97 } 98 99 static int felix_bridge_join(struct dsa_switch *ds, int port, 100 struct net_device *br) 101 { 102 struct ocelot *ocelot = ds->priv; 103 104 return ocelot_port_bridge_join(ocelot, port, br); 105 } 106 107 static void felix_bridge_leave(struct dsa_switch *ds, int port, 108 struct net_device *br) 109 { 110 struct ocelot *ocelot = ds->priv; 111 112 ocelot_port_bridge_leave(ocelot, port, br); 113 } 114 115 /* This callback needs to be present */ 116 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 117 const struct switchdev_obj_port_vlan *vlan) 118 { 119 return 0; 120 } 121 122 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, 123 struct switchdev_trans *trans) 124 { 125 struct ocelot *ocelot = ds->priv; 126 127 return ocelot_port_vlan_filtering(ocelot, port, enabled, trans); 128 } 129 130 static void felix_vlan_add(struct dsa_switch *ds, int port, 131 const struct switchdev_obj_port_vlan *vlan) 132 { 133 struct ocelot *ocelot = ds->priv; 134 u16 flags = vlan->flags; 135 u16 vid; 136 int err; 137 138 if (dsa_is_cpu_port(ds, port)) 139 flags &= ~BRIDGE_VLAN_INFO_UNTAGGED; 140 141 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 142 err = ocelot_vlan_add(ocelot, port, vid, 143 flags & BRIDGE_VLAN_INFO_PVID, 144 flags & BRIDGE_VLAN_INFO_UNTAGGED); 145 if (err) { 146 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 147 vid, port, err); 148 return; 149 } 150 } 151 } 152 153 static int felix_vlan_del(struct dsa_switch *ds, int port, 154 const struct switchdev_obj_port_vlan *vlan) 155 { 156 struct ocelot *ocelot = ds->priv; 157 u16 vid; 158 int err; 159 160 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 161 err = ocelot_vlan_del(ocelot, port, vid); 162 if (err) { 163 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 164 vid, port, err); 165 return err; 166 } 167 } 168 return 0; 169 } 170 171 static int felix_port_enable(struct dsa_switch *ds, int port, 172 struct phy_device *phy) 173 { 174 struct ocelot *ocelot = ds->priv; 175 176 ocelot_port_enable(ocelot, port, phy); 177 178 return 0; 179 } 180 181 static void felix_port_disable(struct dsa_switch *ds, int port) 182 { 183 struct ocelot *ocelot = ds->priv; 184 185 return ocelot_port_disable(ocelot, port); 186 } 187 188 static void felix_phylink_validate(struct dsa_switch *ds, int port, 189 unsigned long *supported, 190 struct phylink_link_state *state) 191 { 192 struct ocelot *ocelot = ds->priv; 193 struct felix *felix = ocelot_to_felix(ocelot); 194 195 if (felix->info->phylink_validate) 196 felix->info->phylink_validate(ocelot, port, supported, state); 197 } 198 199 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 200 unsigned int link_an_mode, 201 const struct phylink_link_state *state) 202 { 203 struct ocelot *ocelot = ds->priv; 204 struct felix *felix = ocelot_to_felix(ocelot); 205 struct dsa_port *dp = dsa_to_port(ds, port); 206 207 if (felix->pcs[port]) 208 phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs); 209 } 210 211 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 212 unsigned int link_an_mode, 213 phy_interface_t interface) 214 { 215 struct ocelot *ocelot = ds->priv; 216 struct ocelot_port *ocelot_port = ocelot->ports[port]; 217 218 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 219 ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0); 220 } 221 222 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 223 unsigned int link_an_mode, 224 phy_interface_t interface, 225 struct phy_device *phydev, 226 int speed, int duplex, 227 bool tx_pause, bool rx_pause) 228 { 229 struct ocelot *ocelot = ds->priv; 230 struct ocelot_port *ocelot_port = ocelot->ports[port]; 231 struct felix *felix = ocelot_to_felix(ocelot); 232 u32 mac_fc_cfg; 233 234 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 235 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is 236 * integrated is that the MAC speed is fixed and it's the PCS who is 237 * performing the rate adaptation, so we have to write "1000Mbps" into 238 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default 239 * value). 240 */ 241 ocelot_port_writel(ocelot_port, 242 DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000), 243 DEV_CLOCK_CFG); 244 245 switch (speed) { 246 case SPEED_10: 247 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3); 248 break; 249 case SPEED_100: 250 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2); 251 break; 252 case SPEED_1000: 253 case SPEED_2500: 254 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1); 255 break; 256 default: 257 dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n", 258 port, speed); 259 return; 260 } 261 262 /* handle Rx pause in all cases, with 2500base-X this is used for rate 263 * adaptation. 264 */ 265 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 266 267 if (tx_pause) 268 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 269 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 270 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 271 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 272 273 /* Flow control. Link speed is only used here to evaluate the time 274 * specification in incoming pause frames. 275 */ 276 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 277 278 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 279 280 /* Undo the effects of felix_phylink_mac_link_down: 281 * enable MAC module 282 */ 283 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 284 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 285 286 /* Enable receiving frames on the port, and activate auto-learning of 287 * MAC addresses. 288 */ 289 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 290 ANA_PORT_PORT_CFG_RECV_ENA | 291 ANA_PORT_PORT_CFG_PORTID_VAL(port), 292 ANA_PORT_PORT_CFG, port); 293 294 /* Core: Enable port for frame transfer */ 295 ocelot_fields_write(ocelot, port, 296 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1); 297 298 if (felix->info->port_sched_speed_set) 299 felix->info->port_sched_speed_set(ocelot, port, speed); 300 } 301 302 static void felix_port_qos_map_init(struct ocelot *ocelot, int port) 303 { 304 int i; 305 306 ocelot_rmw_gix(ocelot, 307 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 308 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 309 ANA_PORT_QOS_CFG, 310 port); 311 312 for (i = 0; i < FELIX_NUM_TC * 2; i++) { 313 ocelot_rmw_ix(ocelot, 314 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) | 315 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i), 316 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL | 317 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M, 318 ANA_PORT_PCP_DEI_MAP, 319 port, i); 320 } 321 } 322 323 static void felix_get_strings(struct dsa_switch *ds, int port, 324 u32 stringset, u8 *data) 325 { 326 struct ocelot *ocelot = ds->priv; 327 328 return ocelot_get_strings(ocelot, port, stringset, data); 329 } 330 331 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 332 { 333 struct ocelot *ocelot = ds->priv; 334 335 ocelot_get_ethtool_stats(ocelot, port, data); 336 } 337 338 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 339 { 340 struct ocelot *ocelot = ds->priv; 341 342 return ocelot_get_sset_count(ocelot, port, sset); 343 } 344 345 static int felix_get_ts_info(struct dsa_switch *ds, int port, 346 struct ethtool_ts_info *info) 347 { 348 struct ocelot *ocelot = ds->priv; 349 350 return ocelot_get_ts_info(ocelot, port, info); 351 } 352 353 static int felix_parse_ports_node(struct felix *felix, 354 struct device_node *ports_node, 355 phy_interface_t *port_phy_modes) 356 { 357 struct ocelot *ocelot = &felix->ocelot; 358 struct device *dev = felix->ocelot.dev; 359 struct device_node *child; 360 361 for_each_available_child_of_node(ports_node, child) { 362 phy_interface_t phy_mode; 363 u32 port; 364 int err; 365 366 /* Get switch port number from DT */ 367 if (of_property_read_u32(child, "reg", &port) < 0) { 368 dev_err(dev, "Port number not defined in device tree " 369 "(property \"reg\")\n"); 370 of_node_put(child); 371 return -ENODEV; 372 } 373 374 /* Get PHY mode from DT */ 375 err = of_get_phy_mode(child, &phy_mode); 376 if (err) { 377 dev_err(dev, "Failed to read phy-mode or " 378 "phy-interface-type property for port %d\n", 379 port); 380 of_node_put(child); 381 return -ENODEV; 382 } 383 384 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 385 if (err < 0) { 386 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 387 phy_modes(phy_mode), port); 388 of_node_put(child); 389 return err; 390 } 391 392 port_phy_modes[port] = phy_mode; 393 } 394 395 return 0; 396 } 397 398 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 399 { 400 struct device *dev = felix->ocelot.dev; 401 struct device_node *switch_node; 402 struct device_node *ports_node; 403 int err; 404 405 switch_node = dev->of_node; 406 407 ports_node = of_get_child_by_name(switch_node, "ports"); 408 if (!ports_node) { 409 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 410 return -ENODEV; 411 } 412 413 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 414 of_node_put(ports_node); 415 416 return err; 417 } 418 419 static int felix_init_structs(struct felix *felix, int num_phys_ports) 420 { 421 struct ocelot *ocelot = &felix->ocelot; 422 phy_interface_t *port_phy_modes; 423 struct resource res; 424 int port, i, err; 425 426 ocelot->num_phys_ports = num_phys_ports; 427 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 428 sizeof(struct ocelot_port *), GFP_KERNEL); 429 if (!ocelot->ports) 430 return -ENOMEM; 431 432 ocelot->map = felix->info->map; 433 ocelot->stats_layout = felix->info->stats_layout; 434 ocelot->num_stats = felix->info->num_stats; 435 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 436 ocelot->num_mact_rows = felix->info->num_mact_rows; 437 ocelot->vcap = felix->info->vcap; 438 ocelot->ops = felix->info->ops; 439 ocelot->inj_prefix = OCELOT_TAG_PREFIX_SHORT; 440 ocelot->xtr_prefix = OCELOT_TAG_PREFIX_SHORT; 441 442 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 443 GFP_KERNEL); 444 if (!port_phy_modes) 445 return -ENOMEM; 446 447 err = felix_parse_dt(felix, port_phy_modes); 448 if (err) { 449 kfree(port_phy_modes); 450 return err; 451 } 452 453 for (i = 0; i < TARGET_MAX; i++) { 454 struct regmap *target; 455 456 if (!felix->info->target_io_res[i].name) 457 continue; 458 459 memcpy(&res, &felix->info->target_io_res[i], sizeof(res)); 460 res.flags = IORESOURCE_MEM; 461 res.start += felix->switch_base; 462 res.end += felix->switch_base; 463 464 target = ocelot_regmap_init(ocelot, &res); 465 if (IS_ERR(target)) { 466 dev_err(ocelot->dev, 467 "Failed to map device memory space\n"); 468 kfree(port_phy_modes); 469 return PTR_ERR(target); 470 } 471 472 ocelot->targets[i] = target; 473 } 474 475 err = ocelot_regfields_init(ocelot, felix->info->regfields); 476 if (err) { 477 dev_err(ocelot->dev, "failed to init reg fields map\n"); 478 kfree(port_phy_modes); 479 return err; 480 } 481 482 for (port = 0; port < num_phys_ports; port++) { 483 struct ocelot_port *ocelot_port; 484 struct regmap *target; 485 u8 *template; 486 487 ocelot_port = devm_kzalloc(ocelot->dev, 488 sizeof(struct ocelot_port), 489 GFP_KERNEL); 490 if (!ocelot_port) { 491 dev_err(ocelot->dev, 492 "failed to allocate port memory\n"); 493 kfree(port_phy_modes); 494 return -ENOMEM; 495 } 496 497 memcpy(&res, &felix->info->port_io_res[port], sizeof(res)); 498 res.flags = IORESOURCE_MEM; 499 res.start += felix->switch_base; 500 res.end += felix->switch_base; 501 502 target = ocelot_regmap_init(ocelot, &res); 503 if (IS_ERR(target)) { 504 dev_err(ocelot->dev, 505 "Failed to map memory space for port %d\n", 506 port); 507 kfree(port_phy_modes); 508 return PTR_ERR(target); 509 } 510 511 template = devm_kzalloc(ocelot->dev, OCELOT_TOTAL_TAG_LEN, 512 GFP_KERNEL); 513 if (!template) { 514 dev_err(ocelot->dev, 515 "Failed to allocate memory for DSA tag\n"); 516 kfree(port_phy_modes); 517 return -ENOMEM; 518 } 519 520 ocelot_port->phy_mode = port_phy_modes[port]; 521 ocelot_port->ocelot = ocelot; 522 ocelot_port->target = target; 523 ocelot_port->xmit_template = template; 524 ocelot->ports[port] = ocelot_port; 525 526 felix->info->xmit_template_populate(ocelot, port); 527 } 528 529 kfree(port_phy_modes); 530 531 if (felix->info->mdio_bus_alloc) { 532 err = felix->info->mdio_bus_alloc(ocelot); 533 if (err < 0) 534 return err; 535 } 536 537 return 0; 538 } 539 540 /* The CPU port module is connected to the Node Processor Interface (NPI). This 541 * is the mode through which frames can be injected from and extracted to an 542 * external CPU, over Ethernet. 543 */ 544 static void felix_npi_port_init(struct ocelot *ocelot, int port) 545 { 546 ocelot->npi = port; 547 548 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M | 549 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port), 550 QSYS_EXT_CPU_CFG); 551 552 /* NPI port Injection/Extraction configuration */ 553 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, 554 ocelot->xtr_prefix); 555 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, 556 ocelot->inj_prefix); 557 558 /* Disable transmission of pause frames */ 559 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); 560 } 561 562 /* Hardware initialization done here so that we can allocate structures with 563 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 564 * us to allocate structures twice (leak memory) and map PCI memory twice 565 * (which will not work). 566 */ 567 static int felix_setup(struct dsa_switch *ds) 568 { 569 struct ocelot *ocelot = ds->priv; 570 struct felix *felix = ocelot_to_felix(ocelot); 571 int port, err; 572 int tc; 573 574 err = felix_init_structs(felix, ds->num_ports); 575 if (err) 576 return err; 577 578 err = ocelot_init(ocelot); 579 if (err) 580 return err; 581 582 if (ocelot->ptp) { 583 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps); 584 if (err) { 585 dev_err(ocelot->dev, 586 "Timestamp initialization failed\n"); 587 ocelot->ptp = 0; 588 } 589 } 590 591 for (port = 0; port < ds->num_ports; port++) { 592 ocelot_init_port(ocelot, port); 593 594 if (dsa_is_cpu_port(ds, port)) 595 felix_npi_port_init(ocelot, port); 596 597 /* Set the default QoS Classification based on PCP and DEI 598 * bits of vlan tag. 599 */ 600 felix_port_qos_map_init(ocelot, port); 601 } 602 603 /* Include the CPU port module in the forwarding mask for unknown 604 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 605 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 606 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 607 */ 608 ocelot_write_rix(ocelot, 609 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 610 ANA_PGID_PGID, PGID_UC); 611 /* Setup the per-traffic class flooding PGIDs */ 612 for (tc = 0; tc < FELIX_NUM_TC; tc++) 613 ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) | 614 ANA_FLOODING_FLD_BROADCAST(PGID_MC) | 615 ANA_FLOODING_FLD_UNICAST(PGID_UC), 616 ANA_FLOODING, tc); 617 618 ds->mtu_enforcement_ingress = true; 619 ds->configure_vlan_while_not_filtering = true; 620 621 return 0; 622 } 623 624 static void felix_teardown(struct dsa_switch *ds) 625 { 626 struct ocelot *ocelot = ds->priv; 627 struct felix *felix = ocelot_to_felix(ocelot); 628 int port; 629 630 if (felix->info->mdio_bus_free) 631 felix->info->mdio_bus_free(ocelot); 632 633 for (port = 0; port < ocelot->num_phys_ports; port++) 634 ocelot_deinit_port(ocelot, port); 635 ocelot_deinit_timestamp(ocelot); 636 /* stop workqueue thread */ 637 ocelot_deinit(ocelot); 638 } 639 640 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 641 struct ifreq *ifr) 642 { 643 struct ocelot *ocelot = ds->priv; 644 645 return ocelot_hwstamp_get(ocelot, port, ifr); 646 } 647 648 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 649 struct ifreq *ifr) 650 { 651 struct ocelot *ocelot = ds->priv; 652 653 return ocelot_hwstamp_set(ocelot, port, ifr); 654 } 655 656 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 657 struct sk_buff *skb, unsigned int type) 658 { 659 struct skb_shared_hwtstamps *shhwtstamps; 660 struct ocelot *ocelot = ds->priv; 661 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 662 u32 tstamp_lo, tstamp_hi; 663 struct timespec64 ts; 664 u64 tstamp, val; 665 666 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 667 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 668 669 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 670 tstamp_lo = (u32)val; 671 672 tstamp_hi = tstamp >> 32; 673 if ((tstamp & 0xffffffff) < tstamp_lo) 674 tstamp_hi--; 675 676 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 677 678 shhwtstamps = skb_hwtstamps(skb); 679 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 680 shhwtstamps->hwtstamp = tstamp; 681 return false; 682 } 683 684 static bool felix_txtstamp(struct dsa_switch *ds, int port, 685 struct sk_buff *clone, unsigned int type) 686 { 687 struct ocelot *ocelot = ds->priv; 688 struct ocelot_port *ocelot_port = ocelot->ports[port]; 689 690 if (ocelot->ptp && (skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP) && 691 ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) { 692 ocelot_port_add_txtstamp_skb(ocelot, port, clone); 693 return true; 694 } 695 696 return false; 697 } 698 699 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 700 { 701 struct ocelot *ocelot = ds->priv; 702 703 ocelot_port_set_maxlen(ocelot, port, new_mtu); 704 705 return 0; 706 } 707 708 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 709 { 710 struct ocelot *ocelot = ds->priv; 711 712 return ocelot_get_max_mtu(ocelot, port); 713 } 714 715 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 716 struct flow_cls_offload *cls, bool ingress) 717 { 718 struct ocelot *ocelot = ds->priv; 719 720 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 721 } 722 723 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 724 struct flow_cls_offload *cls, bool ingress) 725 { 726 struct ocelot *ocelot = ds->priv; 727 728 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 729 } 730 731 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 732 struct flow_cls_offload *cls, bool ingress) 733 { 734 struct ocelot *ocelot = ds->priv; 735 736 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 737 } 738 739 static int felix_port_policer_add(struct dsa_switch *ds, int port, 740 struct dsa_mall_policer_tc_entry *policer) 741 { 742 struct ocelot *ocelot = ds->priv; 743 struct ocelot_policer pol = { 744 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 745 .burst = policer->burst, 746 }; 747 748 return ocelot_port_policer_add(ocelot, port, &pol); 749 } 750 751 static void felix_port_policer_del(struct dsa_switch *ds, int port) 752 { 753 struct ocelot *ocelot = ds->priv; 754 755 ocelot_port_policer_del(ocelot, port); 756 } 757 758 static int felix_port_setup_tc(struct dsa_switch *ds, int port, 759 enum tc_setup_type type, 760 void *type_data) 761 { 762 struct ocelot *ocelot = ds->priv; 763 struct felix *felix = ocelot_to_felix(ocelot); 764 765 if (felix->info->port_setup_tc) 766 return felix->info->port_setup_tc(ds, port, type, type_data); 767 else 768 return -EOPNOTSUPP; 769 } 770 771 const struct dsa_switch_ops felix_switch_ops = { 772 .get_tag_protocol = felix_get_tag_protocol, 773 .setup = felix_setup, 774 .teardown = felix_teardown, 775 .set_ageing_time = felix_set_ageing_time, 776 .get_strings = felix_get_strings, 777 .get_ethtool_stats = felix_get_ethtool_stats, 778 .get_sset_count = felix_get_sset_count, 779 .get_ts_info = felix_get_ts_info, 780 .phylink_validate = felix_phylink_validate, 781 .phylink_mac_config = felix_phylink_mac_config, 782 .phylink_mac_link_down = felix_phylink_mac_link_down, 783 .phylink_mac_link_up = felix_phylink_mac_link_up, 784 .port_enable = felix_port_enable, 785 .port_disable = felix_port_disable, 786 .port_fdb_dump = felix_fdb_dump, 787 .port_fdb_add = felix_fdb_add, 788 .port_fdb_del = felix_fdb_del, 789 .port_mdb_prepare = felix_mdb_prepare, 790 .port_mdb_add = felix_mdb_add, 791 .port_mdb_del = felix_mdb_del, 792 .port_bridge_join = felix_bridge_join, 793 .port_bridge_leave = felix_bridge_leave, 794 .port_stp_state_set = felix_bridge_stp_state_set, 795 .port_vlan_prepare = felix_vlan_prepare, 796 .port_vlan_filtering = felix_vlan_filtering, 797 .port_vlan_add = felix_vlan_add, 798 .port_vlan_del = felix_vlan_del, 799 .port_hwtstamp_get = felix_hwtstamp_get, 800 .port_hwtstamp_set = felix_hwtstamp_set, 801 .port_rxtstamp = felix_rxtstamp, 802 .port_txtstamp = felix_txtstamp, 803 .port_change_mtu = felix_change_mtu, 804 .port_max_mtu = felix_get_max_mtu, 805 .port_policer_add = felix_port_policer_add, 806 .port_policer_del = felix_port_policer_del, 807 .cls_flower_add = felix_cls_flower_add, 808 .cls_flower_del = felix_cls_flower_del, 809 .cls_flower_stats = felix_cls_flower_stats, 810 .port_setup_tc = felix_port_setup_tc, 811 }; 812 813 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port) 814 { 815 struct felix *felix = ocelot_to_felix(ocelot); 816 struct dsa_switch *ds = felix->ds; 817 818 if (!dsa_is_user_port(ds, port)) 819 return NULL; 820 821 return dsa_to_port(ds, port)->slave; 822 } 823 824 int felix_netdev_to_port(struct net_device *dev) 825 { 826 struct dsa_port *dp; 827 828 dp = dsa_port_from_netdev(dev); 829 if (IS_ERR(dp)) 830 return -EINVAL; 831 832 return dp->index; 833 } 834