1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 */ 4 #include <uapi/linux/if_bridge.h> 5 #include <soc/mscc/ocelot_vcap.h> 6 #include <soc/mscc/ocelot_qsys.h> 7 #include <soc/mscc/ocelot_sys.h> 8 #include <soc/mscc/ocelot_dev.h> 9 #include <soc/mscc/ocelot_ana.h> 10 #include <soc/mscc/ocelot.h> 11 #include <linux/packing.h> 12 #include <linux/module.h> 13 #include <linux/of_net.h> 14 #include <linux/pci.h> 15 #include <linux/of.h> 16 #include <net/pkt_sched.h> 17 #include <net/dsa.h> 18 #include "felix.h" 19 20 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 21 int port, 22 enum dsa_tag_protocol mp) 23 { 24 return DSA_TAG_PROTO_OCELOT; 25 } 26 27 static int felix_set_ageing_time(struct dsa_switch *ds, 28 unsigned int ageing_time) 29 { 30 struct ocelot *ocelot = ds->priv; 31 32 ocelot_set_ageing_time(ocelot, ageing_time); 33 34 return 0; 35 } 36 37 static int felix_fdb_dump(struct dsa_switch *ds, int port, 38 dsa_fdb_dump_cb_t *cb, void *data) 39 { 40 struct ocelot *ocelot = ds->priv; 41 42 return ocelot_fdb_dump(ocelot, port, cb, data); 43 } 44 45 static int felix_fdb_add(struct dsa_switch *ds, int port, 46 const unsigned char *addr, u16 vid) 47 { 48 struct ocelot *ocelot = ds->priv; 49 50 return ocelot_fdb_add(ocelot, port, addr, vid); 51 } 52 53 static int felix_fdb_del(struct dsa_switch *ds, int port, 54 const unsigned char *addr, u16 vid) 55 { 56 struct ocelot *ocelot = ds->priv; 57 58 return ocelot_fdb_del(ocelot, port, addr, vid); 59 } 60 61 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 62 u8 state) 63 { 64 struct ocelot *ocelot = ds->priv; 65 66 return ocelot_bridge_stp_state_set(ocelot, port, state); 67 } 68 69 static int felix_bridge_join(struct dsa_switch *ds, int port, 70 struct net_device *br) 71 { 72 struct ocelot *ocelot = ds->priv; 73 74 return ocelot_port_bridge_join(ocelot, port, br); 75 } 76 77 static void felix_bridge_leave(struct dsa_switch *ds, int port, 78 struct net_device *br) 79 { 80 struct ocelot *ocelot = ds->priv; 81 82 ocelot_port_bridge_leave(ocelot, port, br); 83 } 84 85 /* This callback needs to be present */ 86 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 87 const struct switchdev_obj_port_vlan *vlan) 88 { 89 return 0; 90 } 91 92 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 93 { 94 struct ocelot *ocelot = ds->priv; 95 96 ocelot_port_vlan_filtering(ocelot, port, enabled); 97 98 return 0; 99 } 100 101 static void felix_vlan_add(struct dsa_switch *ds, int port, 102 const struct switchdev_obj_port_vlan *vlan) 103 { 104 struct ocelot *ocelot = ds->priv; 105 u16 vid; 106 int err; 107 108 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 109 err = ocelot_vlan_add(ocelot, port, vid, 110 vlan->flags & BRIDGE_VLAN_INFO_PVID, 111 vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED); 112 if (err) { 113 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 114 vid, port, err); 115 return; 116 } 117 } 118 } 119 120 static int felix_vlan_del(struct dsa_switch *ds, int port, 121 const struct switchdev_obj_port_vlan *vlan) 122 { 123 struct ocelot *ocelot = ds->priv; 124 u16 vid; 125 int err; 126 127 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 128 err = ocelot_vlan_del(ocelot, port, vid); 129 if (err) { 130 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 131 vid, port, err); 132 return err; 133 } 134 } 135 return 0; 136 } 137 138 static int felix_port_enable(struct dsa_switch *ds, int port, 139 struct phy_device *phy) 140 { 141 struct ocelot *ocelot = ds->priv; 142 143 ocelot_port_enable(ocelot, port, phy); 144 145 return 0; 146 } 147 148 static void felix_port_disable(struct dsa_switch *ds, int port) 149 { 150 struct ocelot *ocelot = ds->priv; 151 152 return ocelot_port_disable(ocelot, port); 153 } 154 155 static void felix_phylink_validate(struct dsa_switch *ds, int port, 156 unsigned long *supported, 157 struct phylink_link_state *state) 158 { 159 struct ocelot *ocelot = ds->priv; 160 struct ocelot_port *ocelot_port = ocelot->ports[port]; 161 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 162 163 if (state->interface != PHY_INTERFACE_MODE_NA && 164 state->interface != ocelot_port->phy_mode) { 165 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 166 return; 167 } 168 169 /* No half-duplex. */ 170 phylink_set_port_modes(mask); 171 phylink_set(mask, Autoneg); 172 phylink_set(mask, Pause); 173 phylink_set(mask, Asym_Pause); 174 phylink_set(mask, 10baseT_Full); 175 phylink_set(mask, 100baseT_Full); 176 phylink_set(mask, 1000baseT_Full); 177 178 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 179 state->interface == PHY_INTERFACE_MODE_2500BASEX || 180 state->interface == PHY_INTERFACE_MODE_USXGMII) { 181 phylink_set(mask, 2500baseT_Full); 182 phylink_set(mask, 2500baseX_Full); 183 } 184 185 bitmap_and(supported, supported, mask, 186 __ETHTOOL_LINK_MODE_MASK_NBITS); 187 bitmap_and(state->advertising, state->advertising, mask, 188 __ETHTOOL_LINK_MODE_MASK_NBITS); 189 } 190 191 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port, 192 struct phylink_link_state *state) 193 { 194 struct ocelot *ocelot = ds->priv; 195 struct felix *felix = ocelot_to_felix(ocelot); 196 197 if (felix->info->pcs_link_state) 198 felix->info->pcs_link_state(ocelot, port, state); 199 200 return 0; 201 } 202 203 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 204 unsigned int link_an_mode, 205 const struct phylink_link_state *state) 206 { 207 struct ocelot *ocelot = ds->priv; 208 struct ocelot_port *ocelot_port = ocelot->ports[port]; 209 struct felix *felix = ocelot_to_felix(ocelot); 210 u32 mac_fc_cfg; 211 212 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 213 * PORT_RST bits in CLOCK_CFG 214 */ 215 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed), 216 DEV_CLOCK_CFG); 217 218 /* Flow control. Link speed is only used here to evaluate the time 219 * specification in incoming pause frames. 220 */ 221 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed); 222 223 /* handle Rx pause in all cases, with 2500base-X this is used for rate 224 * adaptation. 225 */ 226 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 227 228 if (state->pause & MLO_PAUSE_TX) 229 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 230 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 231 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 232 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 233 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 234 235 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 236 237 if (felix->info->pcs_init) 238 felix->info->pcs_init(ocelot, port, link_an_mode, state); 239 } 240 241 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port) 242 { 243 struct ocelot *ocelot = ds->priv; 244 struct felix *felix = ocelot_to_felix(ocelot); 245 246 if (felix->info->pcs_an_restart) 247 felix->info->pcs_an_restart(ocelot, port); 248 } 249 250 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 251 unsigned int link_an_mode, 252 phy_interface_t interface) 253 { 254 struct ocelot *ocelot = ds->priv; 255 struct ocelot_port *ocelot_port = ocelot->ports[port]; 256 257 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 258 ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA, 259 QSYS_SWITCH_PORT_MODE, port); 260 } 261 262 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 263 unsigned int link_an_mode, 264 phy_interface_t interface, 265 struct phy_device *phydev, 266 int speed, int duplex, 267 bool tx_pause, bool rx_pause) 268 { 269 struct ocelot *ocelot = ds->priv; 270 struct ocelot_port *ocelot_port = ocelot->ports[port]; 271 272 /* Enable MAC module */ 273 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 274 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 275 276 /* Enable receiving frames on the port, and activate auto-learning of 277 * MAC addresses. 278 */ 279 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 280 ANA_PORT_PORT_CFG_RECV_ENA | 281 ANA_PORT_PORT_CFG_PORTID_VAL(port), 282 ANA_PORT_PORT_CFG, port); 283 284 /* Core: Enable port for frame transfer */ 285 ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | 286 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) | 287 QSYS_SWITCH_PORT_MODE_PORT_ENA, 288 QSYS_SWITCH_PORT_MODE, port); 289 } 290 291 static void felix_get_strings(struct dsa_switch *ds, int port, 292 u32 stringset, u8 *data) 293 { 294 struct ocelot *ocelot = ds->priv; 295 296 return ocelot_get_strings(ocelot, port, stringset, data); 297 } 298 299 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 300 { 301 struct ocelot *ocelot = ds->priv; 302 303 ocelot_get_ethtool_stats(ocelot, port, data); 304 } 305 306 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 307 { 308 struct ocelot *ocelot = ds->priv; 309 310 return ocelot_get_sset_count(ocelot, port, sset); 311 } 312 313 static int felix_get_ts_info(struct dsa_switch *ds, int port, 314 struct ethtool_ts_info *info) 315 { 316 struct ocelot *ocelot = ds->priv; 317 318 return ocelot_get_ts_info(ocelot, port, info); 319 } 320 321 static int felix_parse_ports_node(struct felix *felix, 322 struct device_node *ports_node, 323 phy_interface_t *port_phy_modes) 324 { 325 struct ocelot *ocelot = &felix->ocelot; 326 struct device *dev = felix->ocelot.dev; 327 struct device_node *child; 328 329 for_each_available_child_of_node(ports_node, child) { 330 phy_interface_t phy_mode; 331 u32 port; 332 int err; 333 334 /* Get switch port number from DT */ 335 if (of_property_read_u32(child, "reg", &port) < 0) { 336 dev_err(dev, "Port number not defined in device tree " 337 "(property \"reg\")\n"); 338 of_node_put(child); 339 return -ENODEV; 340 } 341 342 /* Get PHY mode from DT */ 343 err = of_get_phy_mode(child, &phy_mode); 344 if (err) { 345 dev_err(dev, "Failed to read phy-mode or " 346 "phy-interface-type property for port %d\n", 347 port); 348 of_node_put(child); 349 return -ENODEV; 350 } 351 352 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 353 if (err < 0) { 354 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 355 phy_modes(phy_mode), port); 356 return err; 357 } 358 359 port_phy_modes[port] = phy_mode; 360 } 361 362 return 0; 363 } 364 365 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 366 { 367 struct device *dev = felix->ocelot.dev; 368 struct device_node *switch_node; 369 struct device_node *ports_node; 370 int err; 371 372 switch_node = dev->of_node; 373 374 ports_node = of_get_child_by_name(switch_node, "ports"); 375 if (!ports_node) { 376 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 377 return -ENODEV; 378 } 379 380 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 381 of_node_put(ports_node); 382 383 return err; 384 } 385 386 static int felix_init_structs(struct felix *felix, int num_phys_ports) 387 { 388 struct ocelot *ocelot = &felix->ocelot; 389 phy_interface_t *port_phy_modes; 390 resource_size_t switch_base; 391 int port, i, err; 392 393 ocelot->num_phys_ports = num_phys_ports; 394 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 395 sizeof(struct ocelot_port *), GFP_KERNEL); 396 if (!ocelot->ports) 397 return -ENOMEM; 398 399 ocelot->map = felix->info->map; 400 ocelot->stats_layout = felix->info->stats_layout; 401 ocelot->num_stats = felix->info->num_stats; 402 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 403 ocelot->num_mact_rows = felix->info->num_mact_rows; 404 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; 405 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; 406 ocelot->vcap = felix->info->vcap; 407 ocelot->ops = felix->info->ops; 408 409 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 410 GFP_KERNEL); 411 if (!port_phy_modes) 412 return -ENOMEM; 413 414 err = felix_parse_dt(felix, port_phy_modes); 415 if (err) { 416 kfree(port_phy_modes); 417 return err; 418 } 419 420 switch_base = pci_resource_start(felix->pdev, 421 felix->info->switch_pci_bar); 422 423 for (i = 0; i < TARGET_MAX; i++) { 424 struct regmap *target; 425 struct resource *res; 426 427 if (!felix->info->target_io_res[i].name) 428 continue; 429 430 res = &felix->info->target_io_res[i]; 431 res->flags = IORESOURCE_MEM; 432 res->start += switch_base; 433 res->end += switch_base; 434 435 target = ocelot_regmap_init(ocelot, res); 436 if (IS_ERR(target)) { 437 dev_err(ocelot->dev, 438 "Failed to map device memory space\n"); 439 kfree(port_phy_modes); 440 return PTR_ERR(target); 441 } 442 443 ocelot->targets[i] = target; 444 } 445 446 err = ocelot_regfields_init(ocelot, felix->info->regfields); 447 if (err) { 448 dev_err(ocelot->dev, "failed to init reg fields map\n"); 449 kfree(port_phy_modes); 450 return err; 451 } 452 453 for (port = 0; port < num_phys_ports; port++) { 454 struct ocelot_port *ocelot_port; 455 void __iomem *port_regs; 456 struct resource *res; 457 458 ocelot_port = devm_kzalloc(ocelot->dev, 459 sizeof(struct ocelot_port), 460 GFP_KERNEL); 461 if (!ocelot_port) { 462 dev_err(ocelot->dev, 463 "failed to allocate port memory\n"); 464 kfree(port_phy_modes); 465 return -ENOMEM; 466 } 467 468 res = &felix->info->port_io_res[port]; 469 res->flags = IORESOURCE_MEM; 470 res->start += switch_base; 471 res->end += switch_base; 472 473 port_regs = devm_ioremap_resource(ocelot->dev, res); 474 if (IS_ERR(port_regs)) { 475 dev_err(ocelot->dev, 476 "failed to map registers for port %d\n", port); 477 kfree(port_phy_modes); 478 return PTR_ERR(port_regs); 479 } 480 481 ocelot_port->phy_mode = port_phy_modes[port]; 482 ocelot_port->ocelot = ocelot; 483 ocelot_port->regs = port_regs; 484 ocelot->ports[port] = ocelot_port; 485 } 486 487 kfree(port_phy_modes); 488 489 if (felix->info->mdio_bus_alloc) { 490 err = felix->info->mdio_bus_alloc(ocelot); 491 if (err < 0) 492 return err; 493 } 494 495 return 0; 496 } 497 498 /* Hardware initialization done here so that we can allocate structures with 499 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 500 * us to allocate structures twice (leak memory) and map PCI memory twice 501 * (which will not work). 502 */ 503 static int felix_setup(struct dsa_switch *ds) 504 { 505 struct ocelot *ocelot = ds->priv; 506 struct felix *felix = ocelot_to_felix(ocelot); 507 int port, err; 508 509 err = felix_init_structs(felix, ds->num_ports); 510 if (err) 511 return err; 512 513 ocelot_init(ocelot); 514 515 for (port = 0; port < ds->num_ports; port++) { 516 ocelot_init_port(ocelot, port); 517 518 /* Bring up the CPU port module and configure the NPI port */ 519 if (dsa_is_cpu_port(ds, port)) 520 ocelot_configure_cpu(ocelot, port, 521 OCELOT_TAG_PREFIX_NONE, 522 OCELOT_TAG_PREFIX_LONG); 523 } 524 525 /* Include the CPU port module in the forwarding mask for unknown 526 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 527 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 528 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 529 */ 530 ocelot_write_rix(ocelot, 531 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 532 ANA_PGID_PGID, PGID_UC); 533 534 ds->mtu_enforcement_ingress = true; 535 /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040) 536 * isn't instantiated for the Felix PF. 537 * In-band AN may take a few ms to complete, so we need to poll. 538 */ 539 ds->pcs_poll = true; 540 541 return 0; 542 } 543 544 static void felix_teardown(struct dsa_switch *ds) 545 { 546 struct ocelot *ocelot = ds->priv; 547 struct felix *felix = ocelot_to_felix(ocelot); 548 549 if (felix->info->mdio_bus_free) 550 felix->info->mdio_bus_free(ocelot); 551 552 /* stop workqueue thread */ 553 ocelot_deinit(ocelot); 554 } 555 556 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 557 struct ifreq *ifr) 558 { 559 struct ocelot *ocelot = ds->priv; 560 561 return ocelot_hwstamp_get(ocelot, port, ifr); 562 } 563 564 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 565 struct ifreq *ifr) 566 { 567 struct ocelot *ocelot = ds->priv; 568 569 return ocelot_hwstamp_set(ocelot, port, ifr); 570 } 571 572 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 573 struct sk_buff *skb, unsigned int type) 574 { 575 struct skb_shared_hwtstamps *shhwtstamps; 576 struct ocelot *ocelot = ds->priv; 577 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 578 u32 tstamp_lo, tstamp_hi; 579 struct timespec64 ts; 580 u64 tstamp, val; 581 582 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 583 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 584 585 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 586 tstamp_lo = (u32)val; 587 588 tstamp_hi = tstamp >> 32; 589 if ((tstamp & 0xffffffff) < tstamp_lo) 590 tstamp_hi--; 591 592 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 593 594 shhwtstamps = skb_hwtstamps(skb); 595 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 596 shhwtstamps->hwtstamp = tstamp; 597 return false; 598 } 599 600 static bool felix_txtstamp(struct dsa_switch *ds, int port, 601 struct sk_buff *clone, unsigned int type) 602 { 603 struct ocelot *ocelot = ds->priv; 604 struct ocelot_port *ocelot_port = ocelot->ports[port]; 605 606 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) 607 return true; 608 609 return false; 610 } 611 612 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 613 { 614 struct ocelot *ocelot = ds->priv; 615 616 ocelot_port_set_maxlen(ocelot, port, new_mtu); 617 618 return 0; 619 } 620 621 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 622 { 623 struct ocelot *ocelot = ds->priv; 624 625 return ocelot_get_max_mtu(ocelot, port); 626 } 627 628 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 629 struct flow_cls_offload *cls, bool ingress) 630 { 631 struct ocelot *ocelot = ds->priv; 632 633 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 634 } 635 636 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 637 struct flow_cls_offload *cls, bool ingress) 638 { 639 struct ocelot *ocelot = ds->priv; 640 641 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 642 } 643 644 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 645 struct flow_cls_offload *cls, bool ingress) 646 { 647 struct ocelot *ocelot = ds->priv; 648 649 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 650 } 651 652 static int felix_port_policer_add(struct dsa_switch *ds, int port, 653 struct dsa_mall_policer_tc_entry *policer) 654 { 655 struct ocelot *ocelot = ds->priv; 656 struct ocelot_policer pol = { 657 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 658 .burst = div_u64(policer->rate_bytes_per_sec * 659 PSCHED_NS2TICKS(policer->burst), 660 PSCHED_TICKS_PER_SEC), 661 }; 662 663 return ocelot_port_policer_add(ocelot, port, &pol); 664 } 665 666 static void felix_port_policer_del(struct dsa_switch *ds, int port) 667 { 668 struct ocelot *ocelot = ds->priv; 669 670 ocelot_port_policer_del(ocelot, port); 671 } 672 673 static const struct dsa_switch_ops felix_switch_ops = { 674 .get_tag_protocol = felix_get_tag_protocol, 675 .setup = felix_setup, 676 .teardown = felix_teardown, 677 .set_ageing_time = felix_set_ageing_time, 678 .get_strings = felix_get_strings, 679 .get_ethtool_stats = felix_get_ethtool_stats, 680 .get_sset_count = felix_get_sset_count, 681 .get_ts_info = felix_get_ts_info, 682 .phylink_validate = felix_phylink_validate, 683 .phylink_mac_link_state = felix_phylink_mac_pcs_get_state, 684 .phylink_mac_config = felix_phylink_mac_config, 685 .phylink_mac_an_restart = felix_phylink_mac_an_restart, 686 .phylink_mac_link_down = felix_phylink_mac_link_down, 687 .phylink_mac_link_up = felix_phylink_mac_link_up, 688 .port_enable = felix_port_enable, 689 .port_disable = felix_port_disable, 690 .port_fdb_dump = felix_fdb_dump, 691 .port_fdb_add = felix_fdb_add, 692 .port_fdb_del = felix_fdb_del, 693 .port_bridge_join = felix_bridge_join, 694 .port_bridge_leave = felix_bridge_leave, 695 .port_stp_state_set = felix_bridge_stp_state_set, 696 .port_vlan_prepare = felix_vlan_prepare, 697 .port_vlan_filtering = felix_vlan_filtering, 698 .port_vlan_add = felix_vlan_add, 699 .port_vlan_del = felix_vlan_del, 700 .port_hwtstamp_get = felix_hwtstamp_get, 701 .port_hwtstamp_set = felix_hwtstamp_set, 702 .port_rxtstamp = felix_rxtstamp, 703 .port_txtstamp = felix_txtstamp, 704 .port_change_mtu = felix_change_mtu, 705 .port_max_mtu = felix_get_max_mtu, 706 .port_policer_add = felix_port_policer_add, 707 .port_policer_del = felix_port_policer_del, 708 .cls_flower_add = felix_cls_flower_add, 709 .cls_flower_del = felix_cls_flower_del, 710 .cls_flower_stats = felix_cls_flower_stats, 711 }; 712 713 static struct felix_info *felix_instance_tbl[] = { 714 [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959, 715 }; 716 717 static irqreturn_t felix_irq_handler(int irq, void *data) 718 { 719 struct ocelot *ocelot = (struct ocelot *)data; 720 721 /* The INTB interrupt is used for both PTP TX timestamp interrupt 722 * and preemption status change interrupt on each port. 723 * 724 * - Get txtstamp if have 725 * - TODO: handle preemption. Without handling it, driver may get 726 * interrupt storm. 727 */ 728 729 ocelot_get_txtstamp(ocelot); 730 731 return IRQ_HANDLED; 732 } 733 734 static int felix_pci_probe(struct pci_dev *pdev, 735 const struct pci_device_id *id) 736 { 737 enum felix_instance instance = id->driver_data; 738 struct dsa_switch *ds; 739 struct ocelot *ocelot; 740 struct felix *felix; 741 int err; 742 743 err = pci_enable_device(pdev); 744 if (err) { 745 dev_err(&pdev->dev, "device enable failed\n"); 746 goto err_pci_enable; 747 } 748 749 /* set up for high or low dma */ 750 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 751 if (err) { 752 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 753 if (err) { 754 dev_err(&pdev->dev, 755 "DMA configuration failed: 0x%x\n", err); 756 goto err_dma; 757 } 758 } 759 760 felix = kzalloc(sizeof(struct felix), GFP_KERNEL); 761 if (!felix) { 762 err = -ENOMEM; 763 dev_err(&pdev->dev, "Failed to allocate driver memory\n"); 764 goto err_alloc_felix; 765 } 766 767 pci_set_drvdata(pdev, felix); 768 ocelot = &felix->ocelot; 769 ocelot->dev = &pdev->dev; 770 felix->pdev = pdev; 771 felix->info = felix_instance_tbl[instance]; 772 773 pci_set_master(pdev); 774 775 err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL, 776 &felix_irq_handler, IRQF_ONESHOT, 777 "felix-intb", ocelot); 778 if (err) { 779 dev_err(&pdev->dev, "Failed to request irq\n"); 780 goto err_alloc_irq; 781 } 782 783 ocelot->ptp = 1; 784 785 ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); 786 if (!ds) { 787 err = -ENOMEM; 788 dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); 789 goto err_alloc_ds; 790 } 791 792 ds->dev = &pdev->dev; 793 ds->num_ports = felix->info->num_ports; 794 ds->ops = &felix_switch_ops; 795 ds->priv = ocelot; 796 felix->ds = ds; 797 798 err = dsa_register_switch(ds); 799 if (err) { 800 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); 801 goto err_register_ds; 802 } 803 804 return 0; 805 806 err_register_ds: 807 kfree(ds); 808 err_alloc_ds: 809 err_alloc_irq: 810 err_alloc_felix: 811 kfree(felix); 812 err_dma: 813 pci_disable_device(pdev); 814 err_pci_enable: 815 return err; 816 } 817 818 static void felix_pci_remove(struct pci_dev *pdev) 819 { 820 struct felix *felix; 821 822 felix = pci_get_drvdata(pdev); 823 824 dsa_unregister_switch(felix->ds); 825 826 kfree(felix->ds); 827 kfree(felix); 828 829 pci_disable_device(pdev); 830 } 831 832 static struct pci_device_id felix_ids[] = { 833 { 834 /* NXP LS1028A */ 835 PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0), 836 .driver_data = FELIX_INSTANCE_VSC9959, 837 }, 838 { 0, } 839 }; 840 MODULE_DEVICE_TABLE(pci, felix_ids); 841 842 static struct pci_driver felix_pci_driver = { 843 .name = KBUILD_MODNAME, 844 .id_table = felix_ids, 845 .probe = felix_pci_probe, 846 .remove = felix_pci_remove, 847 }; 848 849 module_pci_driver(felix_pci_driver); 850 851 MODULE_DESCRIPTION("Felix Switch driver"); 852 MODULE_LICENSE("GPL v2"); 853