1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 */ 4 #include <uapi/linux/if_bridge.h> 5 #include <soc/mscc/ocelot_vcap.h> 6 #include <soc/mscc/ocelot_qsys.h> 7 #include <soc/mscc/ocelot_sys.h> 8 #include <soc/mscc/ocelot_dev.h> 9 #include <soc/mscc/ocelot_ana.h> 10 #include <soc/mscc/ocelot.h> 11 #include <linux/packing.h> 12 #include <linux/module.h> 13 #include <linux/of_net.h> 14 #include <linux/pci.h> 15 #include <linux/of.h> 16 #include <net/pkt_sched.h> 17 #include <net/dsa.h> 18 #include "felix.h" 19 20 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 21 int port, 22 enum dsa_tag_protocol mp) 23 { 24 return DSA_TAG_PROTO_OCELOT; 25 } 26 27 static int felix_set_ageing_time(struct dsa_switch *ds, 28 unsigned int ageing_time) 29 { 30 struct ocelot *ocelot = ds->priv; 31 32 ocelot_set_ageing_time(ocelot, ageing_time); 33 34 return 0; 35 } 36 37 static int felix_fdb_dump(struct dsa_switch *ds, int port, 38 dsa_fdb_dump_cb_t *cb, void *data) 39 { 40 struct ocelot *ocelot = ds->priv; 41 42 return ocelot_fdb_dump(ocelot, port, cb, data); 43 } 44 45 static int felix_fdb_add(struct dsa_switch *ds, int port, 46 const unsigned char *addr, u16 vid) 47 { 48 struct ocelot *ocelot = ds->priv; 49 bool vlan_aware; 50 51 vlan_aware = dsa_port_is_vlan_filtering(dsa_to_port(ds, port)); 52 53 return ocelot_fdb_add(ocelot, port, addr, vid, vlan_aware); 54 } 55 56 static int felix_fdb_del(struct dsa_switch *ds, int port, 57 const unsigned char *addr, u16 vid) 58 { 59 struct ocelot *ocelot = ds->priv; 60 61 return ocelot_fdb_del(ocelot, port, addr, vid); 62 } 63 64 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 65 u8 state) 66 { 67 struct ocelot *ocelot = ds->priv; 68 69 return ocelot_bridge_stp_state_set(ocelot, port, state); 70 } 71 72 static int felix_bridge_join(struct dsa_switch *ds, int port, 73 struct net_device *br) 74 { 75 struct ocelot *ocelot = ds->priv; 76 77 return ocelot_port_bridge_join(ocelot, port, br); 78 } 79 80 static void felix_bridge_leave(struct dsa_switch *ds, int port, 81 struct net_device *br) 82 { 83 struct ocelot *ocelot = ds->priv; 84 85 ocelot_port_bridge_leave(ocelot, port, br); 86 } 87 88 /* This callback needs to be present */ 89 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 90 const struct switchdev_obj_port_vlan *vlan) 91 { 92 return 0; 93 } 94 95 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 96 { 97 struct ocelot *ocelot = ds->priv; 98 99 ocelot_port_vlan_filtering(ocelot, port, enabled); 100 101 return 0; 102 } 103 104 static void felix_vlan_add(struct dsa_switch *ds, int port, 105 const struct switchdev_obj_port_vlan *vlan) 106 { 107 struct ocelot *ocelot = ds->priv; 108 u16 vid; 109 int err; 110 111 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 112 err = ocelot_vlan_add(ocelot, port, vid, 113 vlan->flags & BRIDGE_VLAN_INFO_PVID, 114 vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED); 115 if (err) { 116 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 117 vid, port, err); 118 return; 119 } 120 } 121 } 122 123 static int felix_vlan_del(struct dsa_switch *ds, int port, 124 const struct switchdev_obj_port_vlan *vlan) 125 { 126 struct ocelot *ocelot = ds->priv; 127 u16 vid; 128 int err; 129 130 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 131 err = ocelot_vlan_del(ocelot, port, vid); 132 if (err) { 133 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 134 vid, port, err); 135 return err; 136 } 137 } 138 return 0; 139 } 140 141 static int felix_port_enable(struct dsa_switch *ds, int port, 142 struct phy_device *phy) 143 { 144 struct ocelot *ocelot = ds->priv; 145 146 ocelot_port_enable(ocelot, port, phy); 147 148 return 0; 149 } 150 151 static void felix_port_disable(struct dsa_switch *ds, int port) 152 { 153 struct ocelot *ocelot = ds->priv; 154 155 return ocelot_port_disable(ocelot, port); 156 } 157 158 static void felix_phylink_validate(struct dsa_switch *ds, int port, 159 unsigned long *supported, 160 struct phylink_link_state *state) 161 { 162 struct ocelot *ocelot = ds->priv; 163 struct ocelot_port *ocelot_port = ocelot->ports[port]; 164 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 165 166 if (state->interface != PHY_INTERFACE_MODE_NA && 167 state->interface != ocelot_port->phy_mode) { 168 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 169 return; 170 } 171 172 /* No half-duplex. */ 173 phylink_set_port_modes(mask); 174 phylink_set(mask, Autoneg); 175 phylink_set(mask, Pause); 176 phylink_set(mask, Asym_Pause); 177 phylink_set(mask, 10baseT_Full); 178 phylink_set(mask, 100baseT_Full); 179 phylink_set(mask, 1000baseT_Full); 180 181 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 182 state->interface == PHY_INTERFACE_MODE_2500BASEX || 183 state->interface == PHY_INTERFACE_MODE_USXGMII) { 184 phylink_set(mask, 2500baseT_Full); 185 phylink_set(mask, 2500baseX_Full); 186 } 187 188 bitmap_and(supported, supported, mask, 189 __ETHTOOL_LINK_MODE_MASK_NBITS); 190 bitmap_and(state->advertising, state->advertising, mask, 191 __ETHTOOL_LINK_MODE_MASK_NBITS); 192 } 193 194 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port, 195 struct phylink_link_state *state) 196 { 197 struct ocelot *ocelot = ds->priv; 198 struct felix *felix = ocelot_to_felix(ocelot); 199 200 if (felix->info->pcs_link_state) 201 felix->info->pcs_link_state(ocelot, port, state); 202 203 return 0; 204 } 205 206 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 207 unsigned int link_an_mode, 208 const struct phylink_link_state *state) 209 { 210 struct ocelot *ocelot = ds->priv; 211 struct ocelot_port *ocelot_port = ocelot->ports[port]; 212 struct felix *felix = ocelot_to_felix(ocelot); 213 u32 mac_fc_cfg; 214 215 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 216 * PORT_RST bits in CLOCK_CFG 217 */ 218 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed), 219 DEV_CLOCK_CFG); 220 221 /* Flow control. Link speed is only used here to evaluate the time 222 * specification in incoming pause frames. 223 */ 224 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed); 225 226 /* handle Rx pause in all cases, with 2500base-X this is used for rate 227 * adaptation. 228 */ 229 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 230 231 if (state->pause & MLO_PAUSE_TX) 232 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 233 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 234 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 235 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 236 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 237 238 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 239 240 if (felix->info->pcs_init) 241 felix->info->pcs_init(ocelot, port, link_an_mode, state); 242 } 243 244 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port) 245 { 246 struct ocelot *ocelot = ds->priv; 247 struct felix *felix = ocelot_to_felix(ocelot); 248 249 if (felix->info->pcs_an_restart) 250 felix->info->pcs_an_restart(ocelot, port); 251 } 252 253 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 254 unsigned int link_an_mode, 255 phy_interface_t interface) 256 { 257 struct ocelot *ocelot = ds->priv; 258 struct ocelot_port *ocelot_port = ocelot->ports[port]; 259 260 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 261 ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA, 262 QSYS_SWITCH_PORT_MODE, port); 263 } 264 265 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 266 unsigned int link_an_mode, 267 phy_interface_t interface, 268 struct phy_device *phydev, 269 int speed, int duplex, 270 bool tx_pause, bool rx_pause) 271 { 272 struct ocelot *ocelot = ds->priv; 273 struct ocelot_port *ocelot_port = ocelot->ports[port]; 274 275 /* Enable MAC module */ 276 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 277 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 278 279 /* Enable receiving frames on the port, and activate auto-learning of 280 * MAC addresses. 281 */ 282 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 283 ANA_PORT_PORT_CFG_RECV_ENA | 284 ANA_PORT_PORT_CFG_PORTID_VAL(port), 285 ANA_PORT_PORT_CFG, port); 286 287 /* Core: Enable port for frame transfer */ 288 ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | 289 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) | 290 QSYS_SWITCH_PORT_MODE_PORT_ENA, 291 QSYS_SWITCH_PORT_MODE, port); 292 } 293 294 static void felix_get_strings(struct dsa_switch *ds, int port, 295 u32 stringset, u8 *data) 296 { 297 struct ocelot *ocelot = ds->priv; 298 299 return ocelot_get_strings(ocelot, port, stringset, data); 300 } 301 302 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 303 { 304 struct ocelot *ocelot = ds->priv; 305 306 ocelot_get_ethtool_stats(ocelot, port, data); 307 } 308 309 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 310 { 311 struct ocelot *ocelot = ds->priv; 312 313 return ocelot_get_sset_count(ocelot, port, sset); 314 } 315 316 static int felix_get_ts_info(struct dsa_switch *ds, int port, 317 struct ethtool_ts_info *info) 318 { 319 struct ocelot *ocelot = ds->priv; 320 321 return ocelot_get_ts_info(ocelot, port, info); 322 } 323 324 static int felix_parse_ports_node(struct felix *felix, 325 struct device_node *ports_node, 326 phy_interface_t *port_phy_modes) 327 { 328 struct ocelot *ocelot = &felix->ocelot; 329 struct device *dev = felix->ocelot.dev; 330 struct device_node *child; 331 332 for_each_available_child_of_node(ports_node, child) { 333 phy_interface_t phy_mode; 334 u32 port; 335 int err; 336 337 /* Get switch port number from DT */ 338 if (of_property_read_u32(child, "reg", &port) < 0) { 339 dev_err(dev, "Port number not defined in device tree " 340 "(property \"reg\")\n"); 341 of_node_put(child); 342 return -ENODEV; 343 } 344 345 /* Get PHY mode from DT */ 346 err = of_get_phy_mode(child, &phy_mode); 347 if (err) { 348 dev_err(dev, "Failed to read phy-mode or " 349 "phy-interface-type property for port %d\n", 350 port); 351 of_node_put(child); 352 return -ENODEV; 353 } 354 355 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 356 if (err < 0) { 357 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 358 phy_modes(phy_mode), port); 359 return err; 360 } 361 362 port_phy_modes[port] = phy_mode; 363 } 364 365 return 0; 366 } 367 368 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 369 { 370 struct device *dev = felix->ocelot.dev; 371 struct device_node *switch_node; 372 struct device_node *ports_node; 373 int err; 374 375 switch_node = dev->of_node; 376 377 ports_node = of_get_child_by_name(switch_node, "ports"); 378 if (!ports_node) { 379 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 380 return -ENODEV; 381 } 382 383 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 384 of_node_put(ports_node); 385 386 return err; 387 } 388 389 static int felix_init_structs(struct felix *felix, int num_phys_ports) 390 { 391 struct ocelot *ocelot = &felix->ocelot; 392 phy_interface_t *port_phy_modes; 393 resource_size_t switch_base; 394 int port, i, err; 395 396 ocelot->num_phys_ports = num_phys_ports; 397 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 398 sizeof(struct ocelot_port *), GFP_KERNEL); 399 if (!ocelot->ports) 400 return -ENOMEM; 401 402 ocelot->map = felix->info->map; 403 ocelot->stats_layout = felix->info->stats_layout; 404 ocelot->num_stats = felix->info->num_stats; 405 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 406 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; 407 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; 408 ocelot->vcap = felix->info->vcap; 409 ocelot->ops = felix->info->ops; 410 411 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 412 GFP_KERNEL); 413 if (!port_phy_modes) 414 return -ENOMEM; 415 416 err = felix_parse_dt(felix, port_phy_modes); 417 if (err) { 418 kfree(port_phy_modes); 419 return err; 420 } 421 422 switch_base = pci_resource_start(felix->pdev, 423 felix->info->switch_pci_bar); 424 425 for (i = 0; i < TARGET_MAX; i++) { 426 struct regmap *target; 427 struct resource *res; 428 429 if (!felix->info->target_io_res[i].name) 430 continue; 431 432 res = &felix->info->target_io_res[i]; 433 res->flags = IORESOURCE_MEM; 434 res->start += switch_base; 435 res->end += switch_base; 436 437 target = ocelot_regmap_init(ocelot, res); 438 if (IS_ERR(target)) { 439 dev_err(ocelot->dev, 440 "Failed to map device memory space\n"); 441 kfree(port_phy_modes); 442 return PTR_ERR(target); 443 } 444 445 ocelot->targets[i] = target; 446 } 447 448 err = ocelot_regfields_init(ocelot, felix->info->regfields); 449 if (err) { 450 dev_err(ocelot->dev, "failed to init reg fields map\n"); 451 kfree(port_phy_modes); 452 return err; 453 } 454 455 for (port = 0; port < num_phys_ports; port++) { 456 struct ocelot_port *ocelot_port; 457 void __iomem *port_regs; 458 struct resource *res; 459 460 ocelot_port = devm_kzalloc(ocelot->dev, 461 sizeof(struct ocelot_port), 462 GFP_KERNEL); 463 if (!ocelot_port) { 464 dev_err(ocelot->dev, 465 "failed to allocate port memory\n"); 466 kfree(port_phy_modes); 467 return -ENOMEM; 468 } 469 470 res = &felix->info->port_io_res[port]; 471 res->flags = IORESOURCE_MEM; 472 res->start += switch_base; 473 res->end += switch_base; 474 475 port_regs = devm_ioremap_resource(ocelot->dev, res); 476 if (IS_ERR(port_regs)) { 477 dev_err(ocelot->dev, 478 "failed to map registers for port %d\n", port); 479 kfree(port_phy_modes); 480 return PTR_ERR(port_regs); 481 } 482 483 ocelot_port->phy_mode = port_phy_modes[port]; 484 ocelot_port->ocelot = ocelot; 485 ocelot_port->regs = port_regs; 486 ocelot->ports[port] = ocelot_port; 487 } 488 489 kfree(port_phy_modes); 490 491 if (felix->info->mdio_bus_alloc) { 492 err = felix->info->mdio_bus_alloc(ocelot); 493 if (err < 0) 494 return err; 495 } 496 497 return 0; 498 } 499 500 /* Hardware initialization done here so that we can allocate structures with 501 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 502 * us to allocate structures twice (leak memory) and map PCI memory twice 503 * (which will not work). 504 */ 505 static int felix_setup(struct dsa_switch *ds) 506 { 507 struct ocelot *ocelot = ds->priv; 508 struct felix *felix = ocelot_to_felix(ocelot); 509 int port, err; 510 511 err = felix_init_structs(felix, ds->num_ports); 512 if (err) 513 return err; 514 515 ocelot_init(ocelot); 516 517 for (port = 0; port < ds->num_ports; port++) { 518 ocelot_init_port(ocelot, port); 519 520 /* Bring up the CPU port module and configure the NPI port */ 521 if (dsa_is_cpu_port(ds, port)) 522 ocelot_configure_cpu(ocelot, port, 523 OCELOT_TAG_PREFIX_NONE, 524 OCELOT_TAG_PREFIX_LONG); 525 } 526 527 /* Include the CPU port module in the forwarding mask for unknown 528 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 529 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 530 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 531 */ 532 ocelot_write_rix(ocelot, 533 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 534 ANA_PGID_PGID, PGID_UC); 535 536 ds->mtu_enforcement_ingress = true; 537 /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040) 538 * isn't instantiated for the Felix PF. 539 * In-band AN may take a few ms to complete, so we need to poll. 540 */ 541 ds->pcs_poll = true; 542 543 return 0; 544 } 545 546 static void felix_teardown(struct dsa_switch *ds) 547 { 548 struct ocelot *ocelot = ds->priv; 549 struct felix *felix = ocelot_to_felix(ocelot); 550 551 if (felix->info->mdio_bus_free) 552 felix->info->mdio_bus_free(ocelot); 553 554 /* stop workqueue thread */ 555 ocelot_deinit(ocelot); 556 } 557 558 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 559 struct ifreq *ifr) 560 { 561 struct ocelot *ocelot = ds->priv; 562 563 return ocelot_hwstamp_get(ocelot, port, ifr); 564 } 565 566 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 567 struct ifreq *ifr) 568 { 569 struct ocelot *ocelot = ds->priv; 570 571 return ocelot_hwstamp_set(ocelot, port, ifr); 572 } 573 574 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 575 struct sk_buff *skb, unsigned int type) 576 { 577 struct skb_shared_hwtstamps *shhwtstamps; 578 struct ocelot *ocelot = ds->priv; 579 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 580 u32 tstamp_lo, tstamp_hi; 581 struct timespec64 ts; 582 u64 tstamp, val; 583 584 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 585 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 586 587 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 588 tstamp_lo = (u32)val; 589 590 tstamp_hi = tstamp >> 32; 591 if ((tstamp & 0xffffffff) < tstamp_lo) 592 tstamp_hi--; 593 594 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 595 596 shhwtstamps = skb_hwtstamps(skb); 597 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 598 shhwtstamps->hwtstamp = tstamp; 599 return false; 600 } 601 602 static bool felix_txtstamp(struct dsa_switch *ds, int port, 603 struct sk_buff *clone, unsigned int type) 604 { 605 struct ocelot *ocelot = ds->priv; 606 struct ocelot_port *ocelot_port = ocelot->ports[port]; 607 608 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) 609 return true; 610 611 return false; 612 } 613 614 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 615 { 616 struct ocelot *ocelot = ds->priv; 617 618 ocelot_port_set_maxlen(ocelot, port, new_mtu); 619 620 return 0; 621 } 622 623 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 624 { 625 struct ocelot *ocelot = ds->priv; 626 627 return ocelot_get_max_mtu(ocelot, port); 628 } 629 630 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 631 struct flow_cls_offload *cls, bool ingress) 632 { 633 struct ocelot *ocelot = ds->priv; 634 635 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 636 } 637 638 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 639 struct flow_cls_offload *cls, bool ingress) 640 { 641 struct ocelot *ocelot = ds->priv; 642 643 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 644 } 645 646 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 647 struct flow_cls_offload *cls, bool ingress) 648 { 649 struct ocelot *ocelot = ds->priv; 650 651 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 652 } 653 654 static int felix_port_policer_add(struct dsa_switch *ds, int port, 655 struct dsa_mall_policer_tc_entry *policer) 656 { 657 struct ocelot *ocelot = ds->priv; 658 struct ocelot_policer pol = { 659 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 660 .burst = div_u64(policer->rate_bytes_per_sec * 661 PSCHED_NS2TICKS(policer->burst), 662 PSCHED_TICKS_PER_SEC), 663 }; 664 665 return ocelot_port_policer_add(ocelot, port, &pol); 666 } 667 668 static void felix_port_policer_del(struct dsa_switch *ds, int port) 669 { 670 struct ocelot *ocelot = ds->priv; 671 672 ocelot_port_policer_del(ocelot, port); 673 } 674 675 static const struct dsa_switch_ops felix_switch_ops = { 676 .get_tag_protocol = felix_get_tag_protocol, 677 .setup = felix_setup, 678 .teardown = felix_teardown, 679 .set_ageing_time = felix_set_ageing_time, 680 .get_strings = felix_get_strings, 681 .get_ethtool_stats = felix_get_ethtool_stats, 682 .get_sset_count = felix_get_sset_count, 683 .get_ts_info = felix_get_ts_info, 684 .phylink_validate = felix_phylink_validate, 685 .phylink_mac_link_state = felix_phylink_mac_pcs_get_state, 686 .phylink_mac_config = felix_phylink_mac_config, 687 .phylink_mac_an_restart = felix_phylink_mac_an_restart, 688 .phylink_mac_link_down = felix_phylink_mac_link_down, 689 .phylink_mac_link_up = felix_phylink_mac_link_up, 690 .port_enable = felix_port_enable, 691 .port_disable = felix_port_disable, 692 .port_fdb_dump = felix_fdb_dump, 693 .port_fdb_add = felix_fdb_add, 694 .port_fdb_del = felix_fdb_del, 695 .port_bridge_join = felix_bridge_join, 696 .port_bridge_leave = felix_bridge_leave, 697 .port_stp_state_set = felix_bridge_stp_state_set, 698 .port_vlan_prepare = felix_vlan_prepare, 699 .port_vlan_filtering = felix_vlan_filtering, 700 .port_vlan_add = felix_vlan_add, 701 .port_vlan_del = felix_vlan_del, 702 .port_hwtstamp_get = felix_hwtstamp_get, 703 .port_hwtstamp_set = felix_hwtstamp_set, 704 .port_rxtstamp = felix_rxtstamp, 705 .port_txtstamp = felix_txtstamp, 706 .port_change_mtu = felix_change_mtu, 707 .port_max_mtu = felix_get_max_mtu, 708 .port_policer_add = felix_port_policer_add, 709 .port_policer_del = felix_port_policer_del, 710 .cls_flower_add = felix_cls_flower_add, 711 .cls_flower_del = felix_cls_flower_del, 712 .cls_flower_stats = felix_cls_flower_stats, 713 }; 714 715 static struct felix_info *felix_instance_tbl[] = { 716 [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959, 717 }; 718 719 static irqreturn_t felix_irq_handler(int irq, void *data) 720 { 721 struct ocelot *ocelot = (struct ocelot *)data; 722 723 /* The INTB interrupt is used for both PTP TX timestamp interrupt 724 * and preemption status change interrupt on each port. 725 * 726 * - Get txtstamp if have 727 * - TODO: handle preemption. Without handling it, driver may get 728 * interrupt storm. 729 */ 730 731 ocelot_get_txtstamp(ocelot); 732 733 return IRQ_HANDLED; 734 } 735 736 static int felix_pci_probe(struct pci_dev *pdev, 737 const struct pci_device_id *id) 738 { 739 enum felix_instance instance = id->driver_data; 740 struct dsa_switch *ds; 741 struct ocelot *ocelot; 742 struct felix *felix; 743 int err; 744 745 err = pci_enable_device(pdev); 746 if (err) { 747 dev_err(&pdev->dev, "device enable failed\n"); 748 goto err_pci_enable; 749 } 750 751 /* set up for high or low dma */ 752 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 753 if (err) { 754 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 755 if (err) { 756 dev_err(&pdev->dev, 757 "DMA configuration failed: 0x%x\n", err); 758 goto err_dma; 759 } 760 } 761 762 felix = kzalloc(sizeof(struct felix), GFP_KERNEL); 763 if (!felix) { 764 err = -ENOMEM; 765 dev_err(&pdev->dev, "Failed to allocate driver memory\n"); 766 goto err_alloc_felix; 767 } 768 769 pci_set_drvdata(pdev, felix); 770 ocelot = &felix->ocelot; 771 ocelot->dev = &pdev->dev; 772 felix->pdev = pdev; 773 felix->info = felix_instance_tbl[instance]; 774 775 pci_set_master(pdev); 776 777 err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL, 778 &felix_irq_handler, IRQF_ONESHOT, 779 "felix-intb", ocelot); 780 if (err) { 781 dev_err(&pdev->dev, "Failed to request irq\n"); 782 goto err_alloc_irq; 783 } 784 785 ocelot->ptp = 1; 786 787 ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL); 788 if (!ds) { 789 err = -ENOMEM; 790 dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); 791 goto err_alloc_ds; 792 } 793 794 ds->dev = &pdev->dev; 795 ds->num_ports = felix->info->num_ports; 796 ds->ops = &felix_switch_ops; 797 ds->priv = ocelot; 798 felix->ds = ds; 799 800 err = dsa_register_switch(ds); 801 if (err) { 802 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); 803 goto err_register_ds; 804 } 805 806 return 0; 807 808 err_register_ds: 809 kfree(ds); 810 err_alloc_ds: 811 err_alloc_irq: 812 err_alloc_felix: 813 kfree(felix); 814 err_dma: 815 pci_disable_device(pdev); 816 err_pci_enable: 817 return err; 818 } 819 820 static void felix_pci_remove(struct pci_dev *pdev) 821 { 822 struct felix *felix; 823 824 felix = pci_get_drvdata(pdev); 825 826 dsa_unregister_switch(felix->ds); 827 828 kfree(felix->ds); 829 kfree(felix); 830 831 pci_disable_device(pdev); 832 } 833 834 static struct pci_device_id felix_ids[] = { 835 { 836 /* NXP LS1028A */ 837 PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0), 838 .driver_data = FELIX_INSTANCE_VSC9959, 839 }, 840 { 0, } 841 }; 842 MODULE_DEVICE_TABLE(pci, felix_ids); 843 844 static struct pci_driver felix_pci_driver = { 845 .name = KBUILD_MODNAME, 846 .id_table = felix_ids, 847 .probe = felix_pci_probe, 848 .remove = felix_pci_remove, 849 }; 850 851 module_pci_driver(felix_pci_driver); 852 853 MODULE_DESCRIPTION("Felix Switch driver"); 854 MODULE_LICENSE("GPL v2"); 855