xref: /openbmc/linux/drivers/net/dsa/ocelot/felix.c (revision 14474950)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019 NXP Semiconductors
3  */
4 #include <uapi/linux/if_bridge.h>
5 #include <soc/mscc/ocelot_vcap.h>
6 #include <soc/mscc/ocelot_qsys.h>
7 #include <soc/mscc/ocelot_sys.h>
8 #include <soc/mscc/ocelot_dev.h>
9 #include <soc/mscc/ocelot_ana.h>
10 #include <soc/mscc/ocelot_ptp.h>
11 #include <soc/mscc/ocelot.h>
12 #include <linux/packing.h>
13 #include <linux/module.h>
14 #include <linux/of_net.h>
15 #include <linux/pci.h>
16 #include <linux/of.h>
17 #include <net/pkt_sched.h>
18 #include <net/dsa.h>
19 #include "felix.h"
20 
21 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
22 						    int port,
23 						    enum dsa_tag_protocol mp)
24 {
25 	return DSA_TAG_PROTO_OCELOT;
26 }
27 
28 static int felix_set_ageing_time(struct dsa_switch *ds,
29 				 unsigned int ageing_time)
30 {
31 	struct ocelot *ocelot = ds->priv;
32 
33 	ocelot_set_ageing_time(ocelot, ageing_time);
34 
35 	return 0;
36 }
37 
38 static int felix_fdb_dump(struct dsa_switch *ds, int port,
39 			  dsa_fdb_dump_cb_t *cb, void *data)
40 {
41 	struct ocelot *ocelot = ds->priv;
42 
43 	return ocelot_fdb_dump(ocelot, port, cb, data);
44 }
45 
46 static int felix_fdb_add(struct dsa_switch *ds, int port,
47 			 const unsigned char *addr, u16 vid)
48 {
49 	struct ocelot *ocelot = ds->priv;
50 
51 	return ocelot_fdb_add(ocelot, port, addr, vid);
52 }
53 
54 static int felix_fdb_del(struct dsa_switch *ds, int port,
55 			 const unsigned char *addr, u16 vid)
56 {
57 	struct ocelot *ocelot = ds->priv;
58 
59 	return ocelot_fdb_del(ocelot, port, addr, vid);
60 }
61 
62 /* This callback needs to be present */
63 static int felix_mdb_prepare(struct dsa_switch *ds, int port,
64 			     const struct switchdev_obj_port_mdb *mdb)
65 {
66 	return 0;
67 }
68 
69 static void felix_mdb_add(struct dsa_switch *ds, int port,
70 			  const struct switchdev_obj_port_mdb *mdb)
71 {
72 	struct ocelot *ocelot = ds->priv;
73 
74 	ocelot_port_mdb_add(ocelot, port, mdb);
75 }
76 
77 static int felix_mdb_del(struct dsa_switch *ds, int port,
78 			 const struct switchdev_obj_port_mdb *mdb)
79 {
80 	struct ocelot *ocelot = ds->priv;
81 
82 	return ocelot_port_mdb_del(ocelot, port, mdb);
83 }
84 
85 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
86 				       u8 state)
87 {
88 	struct ocelot *ocelot = ds->priv;
89 
90 	return ocelot_bridge_stp_state_set(ocelot, port, state);
91 }
92 
93 static int felix_bridge_join(struct dsa_switch *ds, int port,
94 			     struct net_device *br)
95 {
96 	struct ocelot *ocelot = ds->priv;
97 
98 	return ocelot_port_bridge_join(ocelot, port, br);
99 }
100 
101 static void felix_bridge_leave(struct dsa_switch *ds, int port,
102 			       struct net_device *br)
103 {
104 	struct ocelot *ocelot = ds->priv;
105 
106 	ocelot_port_bridge_leave(ocelot, port, br);
107 }
108 
109 /* This callback needs to be present */
110 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
111 			      const struct switchdev_obj_port_vlan *vlan)
112 {
113 	return 0;
114 }
115 
116 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
117 {
118 	struct ocelot *ocelot = ds->priv;
119 
120 	ocelot_port_vlan_filtering(ocelot, port, enabled);
121 
122 	return 0;
123 }
124 
125 static void felix_vlan_add(struct dsa_switch *ds, int port,
126 			   const struct switchdev_obj_port_vlan *vlan)
127 {
128 	struct ocelot *ocelot = ds->priv;
129 	u16 flags = vlan->flags;
130 	u16 vid;
131 	int err;
132 
133 	if (dsa_is_cpu_port(ds, port))
134 		flags &= ~BRIDGE_VLAN_INFO_UNTAGGED;
135 
136 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
137 		err = ocelot_vlan_add(ocelot, port, vid,
138 				      flags & BRIDGE_VLAN_INFO_PVID,
139 				      flags & BRIDGE_VLAN_INFO_UNTAGGED);
140 		if (err) {
141 			dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
142 				vid, port, err);
143 			return;
144 		}
145 	}
146 }
147 
148 static int felix_vlan_del(struct dsa_switch *ds, int port,
149 			  const struct switchdev_obj_port_vlan *vlan)
150 {
151 	struct ocelot *ocelot = ds->priv;
152 	u16 vid;
153 	int err;
154 
155 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
156 		err = ocelot_vlan_del(ocelot, port, vid);
157 		if (err) {
158 			dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
159 				vid, port, err);
160 			return err;
161 		}
162 	}
163 	return 0;
164 }
165 
166 static int felix_port_enable(struct dsa_switch *ds, int port,
167 			     struct phy_device *phy)
168 {
169 	struct ocelot *ocelot = ds->priv;
170 
171 	ocelot_port_enable(ocelot, port, phy);
172 
173 	return 0;
174 }
175 
176 static void felix_port_disable(struct dsa_switch *ds, int port)
177 {
178 	struct ocelot *ocelot = ds->priv;
179 
180 	return ocelot_port_disable(ocelot, port);
181 }
182 
183 static void felix_phylink_validate(struct dsa_switch *ds, int port,
184 				   unsigned long *supported,
185 				   struct phylink_link_state *state)
186 {
187 	struct ocelot *ocelot = ds->priv;
188 	struct ocelot_port *ocelot_port = ocelot->ports[port];
189 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
190 
191 	if (state->interface != PHY_INTERFACE_MODE_NA &&
192 	    state->interface != ocelot_port->phy_mode) {
193 		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
194 		return;
195 	}
196 
197 	/* No half-duplex. */
198 	phylink_set_port_modes(mask);
199 	phylink_set(mask, Autoneg);
200 	phylink_set(mask, Pause);
201 	phylink_set(mask, Asym_Pause);
202 	phylink_set(mask, 10baseT_Full);
203 	phylink_set(mask, 100baseT_Full);
204 	phylink_set(mask, 1000baseT_Full);
205 
206 	if (state->interface == PHY_INTERFACE_MODE_INTERNAL ||
207 	    state->interface == PHY_INTERFACE_MODE_2500BASEX ||
208 	    state->interface == PHY_INTERFACE_MODE_USXGMII) {
209 		phylink_set(mask, 2500baseT_Full);
210 		phylink_set(mask, 2500baseX_Full);
211 	}
212 
213 	bitmap_and(supported, supported, mask,
214 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
215 	bitmap_and(state->advertising, state->advertising, mask,
216 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
217 }
218 
219 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port,
220 					   struct phylink_link_state *state)
221 {
222 	struct ocelot *ocelot = ds->priv;
223 	struct felix *felix = ocelot_to_felix(ocelot);
224 
225 	if (felix->info->pcs_link_state)
226 		felix->info->pcs_link_state(ocelot, port, state);
227 
228 	return 0;
229 }
230 
231 static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
232 				     unsigned int link_an_mode,
233 				     const struct phylink_link_state *state)
234 {
235 	struct ocelot *ocelot = ds->priv;
236 	struct ocelot_port *ocelot_port = ocelot->ports[port];
237 	struct felix *felix = ocelot_to_felix(ocelot);
238 	u32 mac_fc_cfg;
239 
240 	/* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and
241 	 * PORT_RST bits in CLOCK_CFG
242 	 */
243 	ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed),
244 			   DEV_CLOCK_CFG);
245 
246 	/* Flow control. Link speed is only used here to evaluate the time
247 	 * specification in incoming pause frames.
248 	 */
249 	mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed);
250 
251 	/* handle Rx pause in all cases, with 2500base-X this is used for rate
252 	 * adaptation.
253 	 */
254 	mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
255 
256 	if (state->pause & MLO_PAUSE_TX)
257 		mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
258 			      SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |
259 			      SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) |
260 			      SYS_MAC_FC_CFG_ZERO_PAUSE_ENA;
261 	ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port);
262 
263 	ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port);
264 
265 	if (felix->info->pcs_init)
266 		felix->info->pcs_init(ocelot, port, link_an_mode, state);
267 
268 	if (felix->info->port_sched_speed_set)
269 		felix->info->port_sched_speed_set(ocelot, port,
270 						  state->speed);
271 }
272 
273 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port)
274 {
275 	struct ocelot *ocelot = ds->priv;
276 	struct felix *felix = ocelot_to_felix(ocelot);
277 
278 	if (felix->info->pcs_an_restart)
279 		felix->info->pcs_an_restart(ocelot, port);
280 }
281 
282 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
283 					unsigned int link_an_mode,
284 					phy_interface_t interface)
285 {
286 	struct ocelot *ocelot = ds->priv;
287 	struct ocelot_port *ocelot_port = ocelot->ports[port];
288 
289 	ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG);
290 	ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA,
291 		       QSYS_SWITCH_PORT_MODE, port);
292 }
293 
294 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
295 				      unsigned int link_an_mode,
296 				      phy_interface_t interface,
297 				      struct phy_device *phydev,
298 				      int speed, int duplex,
299 				      bool tx_pause, bool rx_pause)
300 {
301 	struct ocelot *ocelot = ds->priv;
302 	struct ocelot_port *ocelot_port = ocelot->ports[port];
303 
304 	/* Enable MAC module */
305 	ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
306 			   DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
307 
308 	/* Enable receiving frames on the port, and activate auto-learning of
309 	 * MAC addresses.
310 	 */
311 	ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO |
312 			 ANA_PORT_PORT_CFG_RECV_ENA |
313 			 ANA_PORT_PORT_CFG_PORTID_VAL(port),
314 			 ANA_PORT_PORT_CFG, port);
315 
316 	/* Core: Enable port for frame transfer */
317 	ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE |
318 			 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) |
319 			 QSYS_SWITCH_PORT_MODE_PORT_ENA,
320 			 QSYS_SWITCH_PORT_MODE, port);
321 }
322 
323 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
324 {
325 	int i;
326 
327 	ocelot_rmw_gix(ocelot,
328 		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,
329 		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,
330 		       ANA_PORT_QOS_CFG,
331 		       port);
332 
333 	for (i = 0; i < FELIX_NUM_TC * 2; i++) {
334 		ocelot_rmw_ix(ocelot,
335 			      (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
336 			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
337 			      ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
338 			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
339 			      ANA_PORT_PCP_DEI_MAP,
340 			      port, i);
341 	}
342 }
343 
344 static void felix_get_strings(struct dsa_switch *ds, int port,
345 			      u32 stringset, u8 *data)
346 {
347 	struct ocelot *ocelot = ds->priv;
348 
349 	return ocelot_get_strings(ocelot, port, stringset, data);
350 }
351 
352 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
353 {
354 	struct ocelot *ocelot = ds->priv;
355 
356 	ocelot_get_ethtool_stats(ocelot, port, data);
357 }
358 
359 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
360 {
361 	struct ocelot *ocelot = ds->priv;
362 
363 	return ocelot_get_sset_count(ocelot, port, sset);
364 }
365 
366 static int felix_get_ts_info(struct dsa_switch *ds, int port,
367 			     struct ethtool_ts_info *info)
368 {
369 	struct ocelot *ocelot = ds->priv;
370 
371 	return ocelot_get_ts_info(ocelot, port, info);
372 }
373 
374 static int felix_parse_ports_node(struct felix *felix,
375 				  struct device_node *ports_node,
376 				  phy_interface_t *port_phy_modes)
377 {
378 	struct ocelot *ocelot = &felix->ocelot;
379 	struct device *dev = felix->ocelot.dev;
380 	struct device_node *child;
381 
382 	for_each_available_child_of_node(ports_node, child) {
383 		phy_interface_t phy_mode;
384 		u32 port;
385 		int err;
386 
387 		/* Get switch port number from DT */
388 		if (of_property_read_u32(child, "reg", &port) < 0) {
389 			dev_err(dev, "Port number not defined in device tree "
390 				"(property \"reg\")\n");
391 			of_node_put(child);
392 			return -ENODEV;
393 		}
394 
395 		/* Get PHY mode from DT */
396 		err = of_get_phy_mode(child, &phy_mode);
397 		if (err) {
398 			dev_err(dev, "Failed to read phy-mode or "
399 				"phy-interface-type property for port %d\n",
400 				port);
401 			of_node_put(child);
402 			return -ENODEV;
403 		}
404 
405 		err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode);
406 		if (err < 0) {
407 			dev_err(dev, "Unsupported PHY mode %s on port %d\n",
408 				phy_modes(phy_mode), port);
409 			return err;
410 		}
411 
412 		port_phy_modes[port] = phy_mode;
413 	}
414 
415 	return 0;
416 }
417 
418 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
419 {
420 	struct device *dev = felix->ocelot.dev;
421 	struct device_node *switch_node;
422 	struct device_node *ports_node;
423 	int err;
424 
425 	switch_node = dev->of_node;
426 
427 	ports_node = of_get_child_by_name(switch_node, "ports");
428 	if (!ports_node) {
429 		dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
430 		return -ENODEV;
431 	}
432 
433 	err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
434 	of_node_put(ports_node);
435 
436 	return err;
437 }
438 
439 static int felix_init_structs(struct felix *felix, int num_phys_ports)
440 {
441 	struct ocelot *ocelot = &felix->ocelot;
442 	phy_interface_t *port_phy_modes;
443 	resource_size_t switch_base;
444 	struct resource res;
445 	int port, i, err;
446 
447 	ocelot->num_phys_ports = num_phys_ports;
448 	ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
449 				     sizeof(struct ocelot_port *), GFP_KERNEL);
450 	if (!ocelot->ports)
451 		return -ENOMEM;
452 
453 	ocelot->map		= felix->info->map;
454 	ocelot->stats_layout	= felix->info->stats_layout;
455 	ocelot->num_stats	= felix->info->num_stats;
456 	ocelot->shared_queue_sz	= felix->info->shared_queue_sz;
457 	ocelot->num_mact_rows	= felix->info->num_mact_rows;
458 	ocelot->vcap_is2_keys	= felix->info->vcap_is2_keys;
459 	ocelot->vcap_is2_actions= felix->info->vcap_is2_actions;
460 	ocelot->vcap		= felix->info->vcap;
461 	ocelot->ops		= felix->info->ops;
462 
463 	port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
464 				 GFP_KERNEL);
465 	if (!port_phy_modes)
466 		return -ENOMEM;
467 
468 	err = felix_parse_dt(felix, port_phy_modes);
469 	if (err) {
470 		kfree(port_phy_modes);
471 		return err;
472 	}
473 
474 	switch_base = pci_resource_start(felix->pdev,
475 					 felix->info->switch_pci_bar);
476 
477 	for (i = 0; i < TARGET_MAX; i++) {
478 		struct regmap *target;
479 
480 		if (!felix->info->target_io_res[i].name)
481 			continue;
482 
483 		memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
484 		res.flags = IORESOURCE_MEM;
485 		res.start += switch_base;
486 		res.end += switch_base;
487 
488 		target = ocelot_regmap_init(ocelot, &res);
489 		if (IS_ERR(target)) {
490 			dev_err(ocelot->dev,
491 				"Failed to map device memory space\n");
492 			kfree(port_phy_modes);
493 			return PTR_ERR(target);
494 		}
495 
496 		ocelot->targets[i] = target;
497 	}
498 
499 	err = ocelot_regfields_init(ocelot, felix->info->regfields);
500 	if (err) {
501 		dev_err(ocelot->dev, "failed to init reg fields map\n");
502 		kfree(port_phy_modes);
503 		return err;
504 	}
505 
506 	for (port = 0; port < num_phys_ports; port++) {
507 		struct ocelot_port *ocelot_port;
508 		void __iomem *port_regs;
509 
510 		ocelot_port = devm_kzalloc(ocelot->dev,
511 					   sizeof(struct ocelot_port),
512 					   GFP_KERNEL);
513 		if (!ocelot_port) {
514 			dev_err(ocelot->dev,
515 				"failed to allocate port memory\n");
516 			kfree(port_phy_modes);
517 			return -ENOMEM;
518 		}
519 
520 		memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
521 		res.flags = IORESOURCE_MEM;
522 		res.start += switch_base;
523 		res.end += switch_base;
524 
525 		port_regs = devm_ioremap_resource(ocelot->dev, &res);
526 		if (IS_ERR(port_regs)) {
527 			dev_err(ocelot->dev,
528 				"failed to map registers for port %d\n", port);
529 			kfree(port_phy_modes);
530 			return PTR_ERR(port_regs);
531 		}
532 
533 		ocelot_port->phy_mode = port_phy_modes[port];
534 		ocelot_port->ocelot = ocelot;
535 		ocelot_port->regs = port_regs;
536 		ocelot->ports[port] = ocelot_port;
537 	}
538 
539 	kfree(port_phy_modes);
540 
541 	if (felix->info->mdio_bus_alloc) {
542 		err = felix->info->mdio_bus_alloc(ocelot);
543 		if (err < 0)
544 			return err;
545 	}
546 
547 	return 0;
548 }
549 
550 static struct ptp_clock_info ocelot_ptp_clock_info = {
551 	.owner		= THIS_MODULE,
552 	.name		= "felix ptp",
553 	.max_adj	= 0x7fffffff,
554 	.n_alarm	= 0,
555 	.n_ext_ts	= 0,
556 	.n_per_out	= OCELOT_PTP_PINS_NUM,
557 	.n_pins		= OCELOT_PTP_PINS_NUM,
558 	.pps		= 0,
559 	.gettime64	= ocelot_ptp_gettime64,
560 	.settime64	= ocelot_ptp_settime64,
561 	.adjtime	= ocelot_ptp_adjtime,
562 	.adjfine	= ocelot_ptp_adjfine,
563 	.verify		= ocelot_ptp_verify,
564 	.enable		= ocelot_ptp_enable,
565 };
566 
567 /* Hardware initialization done here so that we can allocate structures with
568  * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
569  * us to allocate structures twice (leak memory) and map PCI memory twice
570  * (which will not work).
571  */
572 static int felix_setup(struct dsa_switch *ds)
573 {
574 	struct ocelot *ocelot = ds->priv;
575 	struct felix *felix = ocelot_to_felix(ocelot);
576 	int port, err;
577 	int tc;
578 
579 	err = felix_init_structs(felix, ds->num_ports);
580 	if (err)
581 		return err;
582 
583 	ocelot_init(ocelot);
584 	if (ocelot->ptp) {
585 		err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info);
586 		if (err) {
587 			dev_err(ocelot->dev,
588 				"Timestamp initialization failed\n");
589 			ocelot->ptp = 0;
590 		}
591 	}
592 
593 	for (port = 0; port < ds->num_ports; port++) {
594 		ocelot_init_port(ocelot, port);
595 
596 		/* Bring up the CPU port module and configure the NPI port */
597 		if (dsa_is_cpu_port(ds, port))
598 			ocelot_configure_cpu(ocelot, port,
599 					     OCELOT_TAG_PREFIX_NONE,
600 					     OCELOT_TAG_PREFIX_LONG);
601 
602 		/* Set the default QoS Classification based on PCP and DEI
603 		 * bits of vlan tag.
604 		 */
605 		felix_port_qos_map_init(ocelot, port);
606 	}
607 
608 	/* Include the CPU port module in the forwarding mask for unknown
609 	 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST
610 	 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since
611 	 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU.
612 	 */
613 	ocelot_write_rix(ocelot,
614 			 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
615 			 ANA_PGID_PGID, PGID_UC);
616 	/* Setup the per-traffic class flooding PGIDs */
617 	for (tc = 0; tc < FELIX_NUM_TC; tc++)
618 		ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) |
619 				 ANA_FLOODING_FLD_BROADCAST(PGID_MC) |
620 				 ANA_FLOODING_FLD_UNICAST(PGID_UC),
621 				 ANA_FLOODING, tc);
622 
623 	ds->mtu_enforcement_ingress = true;
624 	ds->configure_vlan_while_not_filtering = true;
625 	/* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040)
626 	 * isn't instantiated for the Felix PF.
627 	 * In-band AN may take a few ms to complete, so we need to poll.
628 	 */
629 	ds->pcs_poll = true;
630 
631 	return 0;
632 }
633 
634 static void felix_teardown(struct dsa_switch *ds)
635 {
636 	struct ocelot *ocelot = ds->priv;
637 	struct felix *felix = ocelot_to_felix(ocelot);
638 
639 	if (felix->info->mdio_bus_free)
640 		felix->info->mdio_bus_free(ocelot);
641 
642 	ocelot_deinit_timestamp(ocelot);
643 	/* stop workqueue thread */
644 	ocelot_deinit(ocelot);
645 }
646 
647 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
648 			      struct ifreq *ifr)
649 {
650 	struct ocelot *ocelot = ds->priv;
651 
652 	return ocelot_hwstamp_get(ocelot, port, ifr);
653 }
654 
655 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
656 			      struct ifreq *ifr)
657 {
658 	struct ocelot *ocelot = ds->priv;
659 
660 	return ocelot_hwstamp_set(ocelot, port, ifr);
661 }
662 
663 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
664 			   struct sk_buff *skb, unsigned int type)
665 {
666 	struct skb_shared_hwtstamps *shhwtstamps;
667 	struct ocelot *ocelot = ds->priv;
668 	u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN;
669 	u32 tstamp_lo, tstamp_hi;
670 	struct timespec64 ts;
671 	u64 tstamp, val;
672 
673 	ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
674 	tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
675 
676 	packing(extraction, &val,  116, 85, OCELOT_TAG_LEN, UNPACK, 0);
677 	tstamp_lo = (u32)val;
678 
679 	tstamp_hi = tstamp >> 32;
680 	if ((tstamp & 0xffffffff) < tstamp_lo)
681 		tstamp_hi--;
682 
683 	tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
684 
685 	shhwtstamps = skb_hwtstamps(skb);
686 	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
687 	shhwtstamps->hwtstamp = tstamp;
688 	return false;
689 }
690 
691 static bool felix_txtstamp(struct dsa_switch *ds, int port,
692 			   struct sk_buff *clone, unsigned int type)
693 {
694 	struct ocelot *ocelot = ds->priv;
695 	struct ocelot_port *ocelot_port = ocelot->ports[port];
696 
697 	if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone))
698 		return true;
699 
700 	return false;
701 }
702 
703 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
704 {
705 	struct ocelot *ocelot = ds->priv;
706 
707 	ocelot_port_set_maxlen(ocelot, port, new_mtu);
708 
709 	return 0;
710 }
711 
712 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
713 {
714 	struct ocelot *ocelot = ds->priv;
715 
716 	return ocelot_get_max_mtu(ocelot, port);
717 }
718 
719 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
720 				struct flow_cls_offload *cls, bool ingress)
721 {
722 	struct ocelot *ocelot = ds->priv;
723 
724 	return ocelot_cls_flower_replace(ocelot, port, cls, ingress);
725 }
726 
727 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
728 				struct flow_cls_offload *cls, bool ingress)
729 {
730 	struct ocelot *ocelot = ds->priv;
731 
732 	return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
733 }
734 
735 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
736 				  struct flow_cls_offload *cls, bool ingress)
737 {
738 	struct ocelot *ocelot = ds->priv;
739 
740 	return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
741 }
742 
743 static int felix_port_policer_add(struct dsa_switch *ds, int port,
744 				  struct dsa_mall_policer_tc_entry *policer)
745 {
746 	struct ocelot *ocelot = ds->priv;
747 	struct ocelot_policer pol = {
748 		.rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
749 		.burst = div_u64(policer->rate_bytes_per_sec *
750 				 PSCHED_NS2TICKS(policer->burst),
751 				 PSCHED_TICKS_PER_SEC),
752 	};
753 
754 	return ocelot_port_policer_add(ocelot, port, &pol);
755 }
756 
757 static void felix_port_policer_del(struct dsa_switch *ds, int port)
758 {
759 	struct ocelot *ocelot = ds->priv;
760 
761 	ocelot_port_policer_del(ocelot, port);
762 }
763 
764 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
765 			       enum tc_setup_type type,
766 			       void *type_data)
767 {
768 	struct ocelot *ocelot = ds->priv;
769 	struct felix *felix = ocelot_to_felix(ocelot);
770 
771 	if (felix->info->port_setup_tc)
772 		return felix->info->port_setup_tc(ds, port, type, type_data);
773 	else
774 		return -EOPNOTSUPP;
775 }
776 
777 static const struct dsa_switch_ops felix_switch_ops = {
778 	.get_tag_protocol	= felix_get_tag_protocol,
779 	.setup			= felix_setup,
780 	.teardown		= felix_teardown,
781 	.set_ageing_time	= felix_set_ageing_time,
782 	.get_strings		= felix_get_strings,
783 	.get_ethtool_stats	= felix_get_ethtool_stats,
784 	.get_sset_count		= felix_get_sset_count,
785 	.get_ts_info		= felix_get_ts_info,
786 	.phylink_validate	= felix_phylink_validate,
787 	.phylink_mac_link_state	= felix_phylink_mac_pcs_get_state,
788 	.phylink_mac_config	= felix_phylink_mac_config,
789 	.phylink_mac_an_restart	= felix_phylink_mac_an_restart,
790 	.phylink_mac_link_down	= felix_phylink_mac_link_down,
791 	.phylink_mac_link_up	= felix_phylink_mac_link_up,
792 	.port_enable		= felix_port_enable,
793 	.port_disable		= felix_port_disable,
794 	.port_fdb_dump		= felix_fdb_dump,
795 	.port_fdb_add		= felix_fdb_add,
796 	.port_fdb_del		= felix_fdb_del,
797 	.port_mdb_prepare	= felix_mdb_prepare,
798 	.port_mdb_add		= felix_mdb_add,
799 	.port_mdb_del		= felix_mdb_del,
800 	.port_bridge_join	= felix_bridge_join,
801 	.port_bridge_leave	= felix_bridge_leave,
802 	.port_stp_state_set	= felix_bridge_stp_state_set,
803 	.port_vlan_prepare	= felix_vlan_prepare,
804 	.port_vlan_filtering	= felix_vlan_filtering,
805 	.port_vlan_add		= felix_vlan_add,
806 	.port_vlan_del		= felix_vlan_del,
807 	.port_hwtstamp_get	= felix_hwtstamp_get,
808 	.port_hwtstamp_set	= felix_hwtstamp_set,
809 	.port_rxtstamp		= felix_rxtstamp,
810 	.port_txtstamp		= felix_txtstamp,
811 	.port_change_mtu	= felix_change_mtu,
812 	.port_max_mtu		= felix_get_max_mtu,
813 	.port_policer_add	= felix_port_policer_add,
814 	.port_policer_del	= felix_port_policer_del,
815 	.cls_flower_add		= felix_cls_flower_add,
816 	.cls_flower_del		= felix_cls_flower_del,
817 	.cls_flower_stats	= felix_cls_flower_stats,
818 	.port_setup_tc          = felix_port_setup_tc,
819 };
820 
821 static struct felix_info *felix_instance_tbl[] = {
822 	[FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959,
823 };
824 
825 static irqreturn_t felix_irq_handler(int irq, void *data)
826 {
827 	struct ocelot *ocelot = (struct ocelot *)data;
828 
829 	/* The INTB interrupt is used for both PTP TX timestamp interrupt
830 	 * and preemption status change interrupt on each port.
831 	 *
832 	 * - Get txtstamp if have
833 	 * - TODO: handle preemption. Without handling it, driver may get
834 	 *   interrupt storm.
835 	 */
836 
837 	ocelot_get_txtstamp(ocelot);
838 
839 	return IRQ_HANDLED;
840 }
841 
842 static int felix_pci_probe(struct pci_dev *pdev,
843 			   const struct pci_device_id *id)
844 {
845 	enum felix_instance instance = id->driver_data;
846 	struct dsa_switch *ds;
847 	struct ocelot *ocelot;
848 	struct felix *felix;
849 	int err;
850 
851 	if (pdev->dev.of_node && !of_device_is_available(pdev->dev.of_node)) {
852 		dev_info(&pdev->dev, "device is disabled, skipping\n");
853 		return -ENODEV;
854 	}
855 
856 	err = pci_enable_device(pdev);
857 	if (err) {
858 		dev_err(&pdev->dev, "device enable failed\n");
859 		goto err_pci_enable;
860 	}
861 
862 	/* set up for high or low dma */
863 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
864 	if (err) {
865 		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
866 		if (err) {
867 			dev_err(&pdev->dev,
868 				"DMA configuration failed: 0x%x\n", err);
869 			goto err_dma;
870 		}
871 	}
872 
873 	felix = kzalloc(sizeof(struct felix), GFP_KERNEL);
874 	if (!felix) {
875 		err = -ENOMEM;
876 		dev_err(&pdev->dev, "Failed to allocate driver memory\n");
877 		goto err_alloc_felix;
878 	}
879 
880 	pci_set_drvdata(pdev, felix);
881 	ocelot = &felix->ocelot;
882 	ocelot->dev = &pdev->dev;
883 	felix->pdev = pdev;
884 	felix->info = felix_instance_tbl[instance];
885 
886 	pci_set_master(pdev);
887 
888 	err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL,
889 					&felix_irq_handler, IRQF_ONESHOT,
890 					"felix-intb", ocelot);
891 	if (err) {
892 		dev_err(&pdev->dev, "Failed to request irq\n");
893 		goto err_alloc_irq;
894 	}
895 
896 	ocelot->ptp = 1;
897 
898 	ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL);
899 	if (!ds) {
900 		err = -ENOMEM;
901 		dev_err(&pdev->dev, "Failed to allocate DSA switch\n");
902 		goto err_alloc_ds;
903 	}
904 
905 	ds->dev = &pdev->dev;
906 	ds->num_ports = felix->info->num_ports;
907 	ds->num_tx_queues = felix->info->num_tx_queues;
908 	ds->ops = &felix_switch_ops;
909 	ds->priv = ocelot;
910 	felix->ds = ds;
911 
912 	err = dsa_register_switch(ds);
913 	if (err) {
914 		dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err);
915 		goto err_register_ds;
916 	}
917 
918 	return 0;
919 
920 err_register_ds:
921 	kfree(ds);
922 err_alloc_ds:
923 err_alloc_irq:
924 err_alloc_felix:
925 	kfree(felix);
926 err_dma:
927 	pci_disable_device(pdev);
928 err_pci_enable:
929 	return err;
930 }
931 
932 static void felix_pci_remove(struct pci_dev *pdev)
933 {
934 	struct felix *felix;
935 
936 	felix = pci_get_drvdata(pdev);
937 
938 	dsa_unregister_switch(felix->ds);
939 
940 	kfree(felix->ds);
941 	kfree(felix);
942 
943 	pci_disable_device(pdev);
944 }
945 
946 static struct pci_device_id felix_ids[] = {
947 	{
948 		/* NXP LS1028A */
949 		PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0),
950 		.driver_data = FELIX_INSTANCE_VSC9959,
951 	},
952 	{ 0, }
953 };
954 MODULE_DEVICE_TABLE(pci, felix_ids);
955 
956 static struct pci_driver felix_pci_driver = {
957 	.name		= KBUILD_MODNAME,
958 	.id_table	= felix_ids,
959 	.probe		= felix_pci_probe,
960 	.remove		= felix_pci_remove,
961 };
962 
963 module_pci_driver(felix_pci_driver);
964 
965 MODULE_DESCRIPTION("Felix Switch driver");
966 MODULE_LICENSE("GPL v2");
967