1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 NXP Semiconductors 3 * 4 * This is an umbrella module for all network switches that are 5 * register-compatible with Ocelot and that perform I/O to their host CPU 6 * through an NPI (Node Processor Interface) Ethernet port. 7 */ 8 #include <uapi/linux/if_bridge.h> 9 #include <soc/mscc/ocelot_vcap.h> 10 #include <soc/mscc/ocelot_qsys.h> 11 #include <soc/mscc/ocelot_sys.h> 12 #include <soc/mscc/ocelot_dev.h> 13 #include <soc/mscc/ocelot_ana.h> 14 #include <soc/mscc/ocelot_ptp.h> 15 #include <soc/mscc/ocelot.h> 16 #include <linux/platform_device.h> 17 #include <linux/packing.h> 18 #include <linux/module.h> 19 #include <linux/of_net.h> 20 #include <linux/pci.h> 21 #include <linux/of.h> 22 #include <linux/pcs-lynx.h> 23 #include <net/pkt_sched.h> 24 #include <net/dsa.h> 25 #include "felix.h" 26 27 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, 28 int port, 29 enum dsa_tag_protocol mp) 30 { 31 return DSA_TAG_PROTO_OCELOT; 32 } 33 34 static int felix_set_ageing_time(struct dsa_switch *ds, 35 unsigned int ageing_time) 36 { 37 struct ocelot *ocelot = ds->priv; 38 39 ocelot_set_ageing_time(ocelot, ageing_time); 40 41 return 0; 42 } 43 44 static int felix_fdb_dump(struct dsa_switch *ds, int port, 45 dsa_fdb_dump_cb_t *cb, void *data) 46 { 47 struct ocelot *ocelot = ds->priv; 48 49 return ocelot_fdb_dump(ocelot, port, cb, data); 50 } 51 52 static int felix_fdb_add(struct dsa_switch *ds, int port, 53 const unsigned char *addr, u16 vid) 54 { 55 struct ocelot *ocelot = ds->priv; 56 57 return ocelot_fdb_add(ocelot, port, addr, vid); 58 } 59 60 static int felix_fdb_del(struct dsa_switch *ds, int port, 61 const unsigned char *addr, u16 vid) 62 { 63 struct ocelot *ocelot = ds->priv; 64 65 return ocelot_fdb_del(ocelot, port, addr, vid); 66 } 67 68 /* This callback needs to be present */ 69 static int felix_mdb_prepare(struct dsa_switch *ds, int port, 70 const struct switchdev_obj_port_mdb *mdb) 71 { 72 return 0; 73 } 74 75 static void felix_mdb_add(struct dsa_switch *ds, int port, 76 const struct switchdev_obj_port_mdb *mdb) 77 { 78 struct ocelot *ocelot = ds->priv; 79 80 ocelot_port_mdb_add(ocelot, port, mdb); 81 } 82 83 static int felix_mdb_del(struct dsa_switch *ds, int port, 84 const struct switchdev_obj_port_mdb *mdb) 85 { 86 struct ocelot *ocelot = ds->priv; 87 88 return ocelot_port_mdb_del(ocelot, port, mdb); 89 } 90 91 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port, 92 u8 state) 93 { 94 struct ocelot *ocelot = ds->priv; 95 96 return ocelot_bridge_stp_state_set(ocelot, port, state); 97 } 98 99 static int felix_bridge_join(struct dsa_switch *ds, int port, 100 struct net_device *br) 101 { 102 struct ocelot *ocelot = ds->priv; 103 104 return ocelot_port_bridge_join(ocelot, port, br); 105 } 106 107 static void felix_bridge_leave(struct dsa_switch *ds, int port, 108 struct net_device *br) 109 { 110 struct ocelot *ocelot = ds->priv; 111 112 ocelot_port_bridge_leave(ocelot, port, br); 113 } 114 115 /* This callback needs to be present */ 116 static int felix_vlan_prepare(struct dsa_switch *ds, int port, 117 const struct switchdev_obj_port_vlan *vlan) 118 { 119 return 0; 120 } 121 122 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) 123 { 124 struct ocelot *ocelot = ds->priv; 125 126 ocelot_port_vlan_filtering(ocelot, port, enabled); 127 128 return 0; 129 } 130 131 static void felix_vlan_add(struct dsa_switch *ds, int port, 132 const struct switchdev_obj_port_vlan *vlan) 133 { 134 struct ocelot *ocelot = ds->priv; 135 u16 flags = vlan->flags; 136 u16 vid; 137 int err; 138 139 if (dsa_is_cpu_port(ds, port)) 140 flags &= ~BRIDGE_VLAN_INFO_UNTAGGED; 141 142 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 143 err = ocelot_vlan_add(ocelot, port, vid, 144 flags & BRIDGE_VLAN_INFO_PVID, 145 flags & BRIDGE_VLAN_INFO_UNTAGGED); 146 if (err) { 147 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n", 148 vid, port, err); 149 return; 150 } 151 } 152 } 153 154 static int felix_vlan_del(struct dsa_switch *ds, int port, 155 const struct switchdev_obj_port_vlan *vlan) 156 { 157 struct ocelot *ocelot = ds->priv; 158 u16 vid; 159 int err; 160 161 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) { 162 err = ocelot_vlan_del(ocelot, port, vid); 163 if (err) { 164 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n", 165 vid, port, err); 166 return err; 167 } 168 } 169 return 0; 170 } 171 172 static int felix_port_enable(struct dsa_switch *ds, int port, 173 struct phy_device *phy) 174 { 175 struct ocelot *ocelot = ds->priv; 176 177 ocelot_port_enable(ocelot, port, phy); 178 179 return 0; 180 } 181 182 static void felix_port_disable(struct dsa_switch *ds, int port) 183 { 184 struct ocelot *ocelot = ds->priv; 185 186 return ocelot_port_disable(ocelot, port); 187 } 188 189 static void felix_phylink_validate(struct dsa_switch *ds, int port, 190 unsigned long *supported, 191 struct phylink_link_state *state) 192 { 193 struct ocelot *ocelot = ds->priv; 194 struct felix *felix = ocelot_to_felix(ocelot); 195 196 if (felix->info->phylink_validate) 197 felix->info->phylink_validate(ocelot, port, supported, state); 198 } 199 200 static void felix_phylink_mac_config(struct dsa_switch *ds, int port, 201 unsigned int link_an_mode, 202 const struct phylink_link_state *state) 203 { 204 struct ocelot *ocelot = ds->priv; 205 struct felix *felix = ocelot_to_felix(ocelot); 206 struct dsa_port *dp = dsa_to_port(ds, port); 207 208 if (felix->pcs[port]) 209 phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs); 210 } 211 212 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port, 213 unsigned int link_an_mode, 214 phy_interface_t interface) 215 { 216 struct ocelot *ocelot = ds->priv; 217 struct ocelot_port *ocelot_port = ocelot->ports[port]; 218 219 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG); 220 ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0); 221 } 222 223 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port, 224 unsigned int link_an_mode, 225 phy_interface_t interface, 226 struct phy_device *phydev, 227 int speed, int duplex, 228 bool tx_pause, bool rx_pause) 229 { 230 struct ocelot *ocelot = ds->priv; 231 struct ocelot_port *ocelot_port = ocelot->ports[port]; 232 struct felix *felix = ocelot_to_felix(ocelot); 233 u32 mac_fc_cfg; 234 235 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and 236 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is 237 * integrated is that the MAC speed is fixed and it's the PCS who is 238 * performing the rate adaptation, so we have to write "1000Mbps" into 239 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default 240 * value). 241 */ 242 ocelot_port_writel(ocelot_port, 243 DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000), 244 DEV_CLOCK_CFG); 245 246 switch (speed) { 247 case SPEED_10: 248 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3); 249 break; 250 case SPEED_100: 251 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2); 252 break; 253 case SPEED_1000: 254 case SPEED_2500: 255 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1); 256 break; 257 default: 258 dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n", 259 port, speed); 260 return; 261 } 262 263 /* handle Rx pause in all cases, with 2500base-X this is used for rate 264 * adaptation. 265 */ 266 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA; 267 268 if (tx_pause) 269 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA | 270 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) | 271 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) | 272 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA; 273 274 /* Flow control. Link speed is only used here to evaluate the time 275 * specification in incoming pause frames. 276 */ 277 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port); 278 279 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port); 280 281 /* Undo the effects of felix_phylink_mac_link_down: 282 * enable MAC module 283 */ 284 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | 285 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG); 286 287 /* Enable receiving frames on the port, and activate auto-learning of 288 * MAC addresses. 289 */ 290 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO | 291 ANA_PORT_PORT_CFG_RECV_ENA | 292 ANA_PORT_PORT_CFG_PORTID_VAL(port), 293 ANA_PORT_PORT_CFG, port); 294 295 /* Core: Enable port for frame transfer */ 296 ocelot_fields_write(ocelot, port, 297 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1); 298 299 if (felix->info->port_sched_speed_set) 300 felix->info->port_sched_speed_set(ocelot, port, speed); 301 } 302 303 static void felix_port_qos_map_init(struct ocelot *ocelot, int port) 304 { 305 int i; 306 307 ocelot_rmw_gix(ocelot, 308 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 309 ANA_PORT_QOS_CFG_QOS_PCP_ENA, 310 ANA_PORT_QOS_CFG, 311 port); 312 313 for (i = 0; i < FELIX_NUM_TC * 2; i++) { 314 ocelot_rmw_ix(ocelot, 315 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) | 316 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i), 317 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL | 318 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M, 319 ANA_PORT_PCP_DEI_MAP, 320 port, i); 321 } 322 } 323 324 static void felix_get_strings(struct dsa_switch *ds, int port, 325 u32 stringset, u8 *data) 326 { 327 struct ocelot *ocelot = ds->priv; 328 329 return ocelot_get_strings(ocelot, port, stringset, data); 330 } 331 332 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data) 333 { 334 struct ocelot *ocelot = ds->priv; 335 336 ocelot_get_ethtool_stats(ocelot, port, data); 337 } 338 339 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset) 340 { 341 struct ocelot *ocelot = ds->priv; 342 343 return ocelot_get_sset_count(ocelot, port, sset); 344 } 345 346 static int felix_get_ts_info(struct dsa_switch *ds, int port, 347 struct ethtool_ts_info *info) 348 { 349 struct ocelot *ocelot = ds->priv; 350 351 return ocelot_get_ts_info(ocelot, port, info); 352 } 353 354 static int felix_parse_ports_node(struct felix *felix, 355 struct device_node *ports_node, 356 phy_interface_t *port_phy_modes) 357 { 358 struct ocelot *ocelot = &felix->ocelot; 359 struct device *dev = felix->ocelot.dev; 360 struct device_node *child; 361 362 for_each_available_child_of_node(ports_node, child) { 363 phy_interface_t phy_mode; 364 u32 port; 365 int err; 366 367 /* Get switch port number from DT */ 368 if (of_property_read_u32(child, "reg", &port) < 0) { 369 dev_err(dev, "Port number not defined in device tree " 370 "(property \"reg\")\n"); 371 of_node_put(child); 372 return -ENODEV; 373 } 374 375 /* Get PHY mode from DT */ 376 err = of_get_phy_mode(child, &phy_mode); 377 if (err) { 378 dev_err(dev, "Failed to read phy-mode or " 379 "phy-interface-type property for port %d\n", 380 port); 381 of_node_put(child); 382 return -ENODEV; 383 } 384 385 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode); 386 if (err < 0) { 387 dev_err(dev, "Unsupported PHY mode %s on port %d\n", 388 phy_modes(phy_mode), port); 389 of_node_put(child); 390 return err; 391 } 392 393 port_phy_modes[port] = phy_mode; 394 } 395 396 return 0; 397 } 398 399 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes) 400 { 401 struct device *dev = felix->ocelot.dev; 402 struct device_node *switch_node; 403 struct device_node *ports_node; 404 int err; 405 406 switch_node = dev->of_node; 407 408 ports_node = of_get_child_by_name(switch_node, "ports"); 409 if (!ports_node) { 410 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 411 return -ENODEV; 412 } 413 414 err = felix_parse_ports_node(felix, ports_node, port_phy_modes); 415 of_node_put(ports_node); 416 417 return err; 418 } 419 420 static int felix_init_structs(struct felix *felix, int num_phys_ports) 421 { 422 struct ocelot *ocelot = &felix->ocelot; 423 phy_interface_t *port_phy_modes; 424 struct resource res; 425 int port, i, err; 426 427 ocelot->num_phys_ports = num_phys_ports; 428 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports, 429 sizeof(struct ocelot_port *), GFP_KERNEL); 430 if (!ocelot->ports) 431 return -ENOMEM; 432 433 ocelot->map = felix->info->map; 434 ocelot->stats_layout = felix->info->stats_layout; 435 ocelot->num_stats = felix->info->num_stats; 436 ocelot->shared_queue_sz = felix->info->shared_queue_sz; 437 ocelot->num_mact_rows = felix->info->num_mact_rows; 438 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; 439 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; 440 ocelot->vcap = felix->info->vcap; 441 ocelot->ops = felix->info->ops; 442 443 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), 444 GFP_KERNEL); 445 if (!port_phy_modes) 446 return -ENOMEM; 447 448 err = felix_parse_dt(felix, port_phy_modes); 449 if (err) { 450 kfree(port_phy_modes); 451 return err; 452 } 453 454 for (i = 0; i < TARGET_MAX; i++) { 455 struct regmap *target; 456 457 if (!felix->info->target_io_res[i].name) 458 continue; 459 460 memcpy(&res, &felix->info->target_io_res[i], sizeof(res)); 461 res.flags = IORESOURCE_MEM; 462 res.start += felix->switch_base; 463 res.end += felix->switch_base; 464 465 target = ocelot_regmap_init(ocelot, &res); 466 if (IS_ERR(target)) { 467 dev_err(ocelot->dev, 468 "Failed to map device memory space\n"); 469 kfree(port_phy_modes); 470 return PTR_ERR(target); 471 } 472 473 ocelot->targets[i] = target; 474 } 475 476 err = ocelot_regfields_init(ocelot, felix->info->regfields); 477 if (err) { 478 dev_err(ocelot->dev, "failed to init reg fields map\n"); 479 kfree(port_phy_modes); 480 return err; 481 } 482 483 for (port = 0; port < num_phys_ports; port++) { 484 struct ocelot_port *ocelot_port; 485 struct regmap *target; 486 u8 *template; 487 488 ocelot_port = devm_kzalloc(ocelot->dev, 489 sizeof(struct ocelot_port), 490 GFP_KERNEL); 491 if (!ocelot_port) { 492 dev_err(ocelot->dev, 493 "failed to allocate port memory\n"); 494 kfree(port_phy_modes); 495 return -ENOMEM; 496 } 497 498 memcpy(&res, &felix->info->port_io_res[port], sizeof(res)); 499 res.flags = IORESOURCE_MEM; 500 res.start += felix->switch_base; 501 res.end += felix->switch_base; 502 503 target = ocelot_regmap_init(ocelot, &res); 504 if (IS_ERR(target)) { 505 dev_err(ocelot->dev, 506 "Failed to map memory space for port %d\n", 507 port); 508 kfree(port_phy_modes); 509 return PTR_ERR(target); 510 } 511 512 template = devm_kzalloc(ocelot->dev, OCELOT_TAG_LEN, 513 GFP_KERNEL); 514 if (!template) { 515 dev_err(ocelot->dev, 516 "Failed to allocate memory for DSA tag\n"); 517 kfree(port_phy_modes); 518 return -ENOMEM; 519 } 520 521 ocelot_port->phy_mode = port_phy_modes[port]; 522 ocelot_port->ocelot = ocelot; 523 ocelot_port->target = target; 524 ocelot_port->xmit_template = template; 525 ocelot->ports[port] = ocelot_port; 526 527 felix->info->xmit_template_populate(ocelot, port); 528 } 529 530 kfree(port_phy_modes); 531 532 if (felix->info->mdio_bus_alloc) { 533 err = felix->info->mdio_bus_alloc(ocelot); 534 if (err < 0) 535 return err; 536 } 537 538 return 0; 539 } 540 541 static struct ptp_clock_info ocelot_ptp_clock_info = { 542 .owner = THIS_MODULE, 543 .name = "felix ptp", 544 .max_adj = 0x7fffffff, 545 .n_alarm = 0, 546 .n_ext_ts = 0, 547 .n_per_out = OCELOT_PTP_PINS_NUM, 548 .n_pins = OCELOT_PTP_PINS_NUM, 549 .pps = 0, 550 .gettime64 = ocelot_ptp_gettime64, 551 .settime64 = ocelot_ptp_settime64, 552 .adjtime = ocelot_ptp_adjtime, 553 .adjfine = ocelot_ptp_adjfine, 554 .verify = ocelot_ptp_verify, 555 .enable = ocelot_ptp_enable, 556 }; 557 558 /* Hardware initialization done here so that we can allocate structures with 559 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing 560 * us to allocate structures twice (leak memory) and map PCI memory twice 561 * (which will not work). 562 */ 563 static int felix_setup(struct dsa_switch *ds) 564 { 565 struct ocelot *ocelot = ds->priv; 566 struct felix *felix = ocelot_to_felix(ocelot); 567 int port, err; 568 int tc; 569 570 err = felix_init_structs(felix, ds->num_ports); 571 if (err) 572 return err; 573 574 ocelot_init(ocelot); 575 if (ocelot->ptp) { 576 err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info); 577 if (err) { 578 dev_err(ocelot->dev, 579 "Timestamp initialization failed\n"); 580 ocelot->ptp = 0; 581 } 582 } 583 584 for (port = 0; port < ds->num_ports; port++) { 585 ocelot_init_port(ocelot, port); 586 587 /* Bring up the CPU port module and configure the NPI port */ 588 if (dsa_is_cpu_port(ds, port)) 589 ocelot_configure_cpu(ocelot, port, 590 OCELOT_TAG_PREFIX_NONE, 591 OCELOT_TAG_PREFIX_LONG); 592 593 /* Set the default QoS Classification based on PCP and DEI 594 * bits of vlan tag. 595 */ 596 felix_port_qos_map_init(ocelot, port); 597 } 598 599 /* Include the CPU port module in the forwarding mask for unknown 600 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST 601 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since 602 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. 603 */ 604 ocelot_write_rix(ocelot, 605 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), 606 ANA_PGID_PGID, PGID_UC); 607 /* Setup the per-traffic class flooding PGIDs */ 608 for (tc = 0; tc < FELIX_NUM_TC; tc++) 609 ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) | 610 ANA_FLOODING_FLD_BROADCAST(PGID_MC) | 611 ANA_FLOODING_FLD_UNICAST(PGID_UC), 612 ANA_FLOODING, tc); 613 614 ds->mtu_enforcement_ingress = true; 615 ds->configure_vlan_while_not_filtering = true; 616 617 return 0; 618 } 619 620 static void felix_teardown(struct dsa_switch *ds) 621 { 622 struct ocelot *ocelot = ds->priv; 623 struct felix *felix = ocelot_to_felix(ocelot); 624 625 if (felix->info->mdio_bus_free) 626 felix->info->mdio_bus_free(ocelot); 627 628 ocelot_deinit_timestamp(ocelot); 629 /* stop workqueue thread */ 630 ocelot_deinit(ocelot); 631 } 632 633 static int felix_hwtstamp_get(struct dsa_switch *ds, int port, 634 struct ifreq *ifr) 635 { 636 struct ocelot *ocelot = ds->priv; 637 638 return ocelot_hwstamp_get(ocelot, port, ifr); 639 } 640 641 static int felix_hwtstamp_set(struct dsa_switch *ds, int port, 642 struct ifreq *ifr) 643 { 644 struct ocelot *ocelot = ds->priv; 645 646 return ocelot_hwstamp_set(ocelot, port, ifr); 647 } 648 649 static bool felix_rxtstamp(struct dsa_switch *ds, int port, 650 struct sk_buff *skb, unsigned int type) 651 { 652 struct skb_shared_hwtstamps *shhwtstamps; 653 struct ocelot *ocelot = ds->priv; 654 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN; 655 u32 tstamp_lo, tstamp_hi; 656 struct timespec64 ts; 657 u64 tstamp, val; 658 659 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); 660 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 661 662 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); 663 tstamp_lo = (u32)val; 664 665 tstamp_hi = tstamp >> 32; 666 if ((tstamp & 0xffffffff) < tstamp_lo) 667 tstamp_hi--; 668 669 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo; 670 671 shhwtstamps = skb_hwtstamps(skb); 672 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 673 shhwtstamps->hwtstamp = tstamp; 674 return false; 675 } 676 677 static bool felix_txtstamp(struct dsa_switch *ds, int port, 678 struct sk_buff *clone, unsigned int type) 679 { 680 struct ocelot *ocelot = ds->priv; 681 struct ocelot_port *ocelot_port = ocelot->ports[port]; 682 683 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone)) 684 return true; 685 686 return false; 687 } 688 689 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 690 { 691 struct ocelot *ocelot = ds->priv; 692 693 ocelot_port_set_maxlen(ocelot, port, new_mtu); 694 695 return 0; 696 } 697 698 static int felix_get_max_mtu(struct dsa_switch *ds, int port) 699 { 700 struct ocelot *ocelot = ds->priv; 701 702 return ocelot_get_max_mtu(ocelot, port); 703 } 704 705 static int felix_cls_flower_add(struct dsa_switch *ds, int port, 706 struct flow_cls_offload *cls, bool ingress) 707 { 708 struct ocelot *ocelot = ds->priv; 709 710 return ocelot_cls_flower_replace(ocelot, port, cls, ingress); 711 } 712 713 static int felix_cls_flower_del(struct dsa_switch *ds, int port, 714 struct flow_cls_offload *cls, bool ingress) 715 { 716 struct ocelot *ocelot = ds->priv; 717 718 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress); 719 } 720 721 static int felix_cls_flower_stats(struct dsa_switch *ds, int port, 722 struct flow_cls_offload *cls, bool ingress) 723 { 724 struct ocelot *ocelot = ds->priv; 725 726 return ocelot_cls_flower_stats(ocelot, port, cls, ingress); 727 } 728 729 static int felix_port_policer_add(struct dsa_switch *ds, int port, 730 struct dsa_mall_policer_tc_entry *policer) 731 { 732 struct ocelot *ocelot = ds->priv; 733 struct ocelot_policer pol = { 734 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8, 735 .burst = policer->burst, 736 }; 737 738 return ocelot_port_policer_add(ocelot, port, &pol); 739 } 740 741 static void felix_port_policer_del(struct dsa_switch *ds, int port) 742 { 743 struct ocelot *ocelot = ds->priv; 744 745 ocelot_port_policer_del(ocelot, port); 746 } 747 748 static int felix_port_setup_tc(struct dsa_switch *ds, int port, 749 enum tc_setup_type type, 750 void *type_data) 751 { 752 struct ocelot *ocelot = ds->priv; 753 struct felix *felix = ocelot_to_felix(ocelot); 754 755 if (felix->info->port_setup_tc) 756 return felix->info->port_setup_tc(ds, port, type, type_data); 757 else 758 return -EOPNOTSUPP; 759 } 760 761 const struct dsa_switch_ops felix_switch_ops = { 762 .get_tag_protocol = felix_get_tag_protocol, 763 .setup = felix_setup, 764 .teardown = felix_teardown, 765 .set_ageing_time = felix_set_ageing_time, 766 .get_strings = felix_get_strings, 767 .get_ethtool_stats = felix_get_ethtool_stats, 768 .get_sset_count = felix_get_sset_count, 769 .get_ts_info = felix_get_ts_info, 770 .phylink_validate = felix_phylink_validate, 771 .phylink_mac_config = felix_phylink_mac_config, 772 .phylink_mac_link_down = felix_phylink_mac_link_down, 773 .phylink_mac_link_up = felix_phylink_mac_link_up, 774 .port_enable = felix_port_enable, 775 .port_disable = felix_port_disable, 776 .port_fdb_dump = felix_fdb_dump, 777 .port_fdb_add = felix_fdb_add, 778 .port_fdb_del = felix_fdb_del, 779 .port_mdb_prepare = felix_mdb_prepare, 780 .port_mdb_add = felix_mdb_add, 781 .port_mdb_del = felix_mdb_del, 782 .port_bridge_join = felix_bridge_join, 783 .port_bridge_leave = felix_bridge_leave, 784 .port_stp_state_set = felix_bridge_stp_state_set, 785 .port_vlan_prepare = felix_vlan_prepare, 786 .port_vlan_filtering = felix_vlan_filtering, 787 .port_vlan_add = felix_vlan_add, 788 .port_vlan_del = felix_vlan_del, 789 .port_hwtstamp_get = felix_hwtstamp_get, 790 .port_hwtstamp_set = felix_hwtstamp_set, 791 .port_rxtstamp = felix_rxtstamp, 792 .port_txtstamp = felix_txtstamp, 793 .port_change_mtu = felix_change_mtu, 794 .port_max_mtu = felix_get_max_mtu, 795 .port_policer_add = felix_port_policer_add, 796 .port_policer_del = felix_port_policer_del, 797 .cls_flower_add = felix_cls_flower_add, 798 .cls_flower_del = felix_cls_flower_del, 799 .cls_flower_stats = felix_cls_flower_stats, 800 .port_setup_tc = felix_port_setup_tc, 801 }; 802 803 static int __init felix_init(void) 804 { 805 int err; 806 807 err = pci_register_driver(&felix_vsc9959_pci_driver); 808 if (err) 809 return err; 810 811 err = platform_driver_register(&seville_vsc9953_driver); 812 if (err) 813 return err; 814 815 return 0; 816 } 817 module_init(felix_init); 818 819 static void __exit felix_exit(void) 820 { 821 pci_unregister_driver(&felix_vsc9959_pci_driver); 822 platform_driver_unregister(&seville_vsc9953_driver); 823 } 824 module_exit(felix_exit); 825 826 MODULE_DESCRIPTION("Felix Switch driver"); 827 MODULE_LICENSE("GPL v2"); 828