1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8 #include <uapi/linux/if_bridge.h>
9 #include <soc/mscc/ocelot_vcap.h>
10 #include <soc/mscc/ocelot_qsys.h>
11 #include <soc/mscc/ocelot_sys.h>
12 #include <soc/mscc/ocelot_dev.h>
13 #include <soc/mscc/ocelot_ana.h>
14 #include <soc/mscc/ocelot_ptp.h>
15 #include <soc/mscc/ocelot.h>
16 #include <linux/dsa/8021q.h>
17 #include <linux/dsa/ocelot.h>
18 #include <linux/platform_device.h>
19 #include <linux/ptp_classify.h>
20 #include <linux/module.h>
21 #include <linux/of_net.h>
22 #include <linux/pci.h>
23 #include <linux/of.h>
24 #include <net/pkt_sched.h>
25 #include <net/dsa.h>
26 #include "felix.h"
27
28 /* Translate the DSA database API into the ocelot switch library API,
29 * which uses VID 0 for all ports that aren't part of a bridge,
30 * and expects the bridge_dev to be NULL in that case.
31 */
felix_classify_db(struct dsa_db db)32 static struct net_device *felix_classify_db(struct dsa_db db)
33 {
34 switch (db.type) {
35 case DSA_DB_PORT:
36 case DSA_DB_LAG:
37 return NULL;
38 case DSA_DB_BRIDGE:
39 return db.bridge.dev;
40 default:
41 return ERR_PTR(-EOPNOTSUPP);
42 }
43 }
44
felix_cpu_port_for_master(struct dsa_switch * ds,struct net_device * master)45 static int felix_cpu_port_for_master(struct dsa_switch *ds,
46 struct net_device *master)
47 {
48 struct ocelot *ocelot = ds->priv;
49 struct dsa_port *cpu_dp;
50 int lag;
51
52 if (netif_is_lag_master(master)) {
53 mutex_lock(&ocelot->fwd_domain_lock);
54 lag = ocelot_bond_get_id(ocelot, master);
55 mutex_unlock(&ocelot->fwd_domain_lock);
56
57 return lag;
58 }
59
60 cpu_dp = master->dsa_ptr;
61 return cpu_dp->index;
62 }
63
64 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
65 * the tagger can perform RX source port identification.
66 */
felix_tag_8021q_vlan_add_rx(struct dsa_switch * ds,int port,int upstream,u16 vid)67 static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
68 int upstream, u16 vid)
69 {
70 struct ocelot_vcap_filter *outer_tagging_rule;
71 struct ocelot *ocelot = ds->priv;
72 unsigned long cookie;
73 int key_length, err;
74
75 key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
76
77 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
78 GFP_KERNEL);
79 if (!outer_tagging_rule)
80 return -ENOMEM;
81
82 cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
83
84 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
85 outer_tagging_rule->prio = 1;
86 outer_tagging_rule->id.cookie = cookie;
87 outer_tagging_rule->id.tc_offload = false;
88 outer_tagging_rule->block_id = VCAP_ES0;
89 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
90 outer_tagging_rule->lookup = 0;
91 outer_tagging_rule->ingress_port.value = port;
92 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
93 outer_tagging_rule->egress_port.value = upstream;
94 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
95 outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
96 outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
97 outer_tagging_rule->action.tag_a_vid_sel = 1;
98 outer_tagging_rule->action.vid_a_val = vid;
99
100 err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
101 if (err)
102 kfree(outer_tagging_rule);
103
104 return err;
105 }
106
felix_tag_8021q_vlan_del_rx(struct dsa_switch * ds,int port,int upstream,u16 vid)107 static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,
108 int upstream, u16 vid)
109 {
110 struct ocelot_vcap_filter *outer_tagging_rule;
111 struct ocelot_vcap_block *block_vcap_es0;
112 struct ocelot *ocelot = ds->priv;
113 unsigned long cookie;
114
115 block_vcap_es0 = &ocelot->block[VCAP_ES0];
116 cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
117
118 outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
119 cookie, false);
120 if (!outer_tagging_rule)
121 return -ENOENT;
122
123 return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
124 }
125
126 /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
127 * rules for steering those tagged packets towards the correct destination port
128 */
felix_tag_8021q_vlan_add_tx(struct dsa_switch * ds,int port,u16 vid)129 static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,
130 u16 vid)
131 {
132 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
133 unsigned long cpu_ports = dsa_cpu_ports(ds);
134 struct ocelot *ocelot = ds->priv;
135 unsigned long cookie;
136 int err;
137
138 untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
139 if (!untagging_rule)
140 return -ENOMEM;
141
142 redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
143 if (!redirect_rule) {
144 kfree(untagging_rule);
145 return -ENOMEM;
146 }
147
148 cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
149
150 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
151 untagging_rule->ingress_port_mask = cpu_ports;
152 untagging_rule->vlan.vid.value = vid;
153 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
154 untagging_rule->prio = 1;
155 untagging_rule->id.cookie = cookie;
156 untagging_rule->id.tc_offload = false;
157 untagging_rule->block_id = VCAP_IS1;
158 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
159 untagging_rule->lookup = 0;
160 untagging_rule->action.vlan_pop_cnt_ena = true;
161 untagging_rule->action.vlan_pop_cnt = 1;
162 untagging_rule->action.pag_override_mask = 0xff;
163 untagging_rule->action.pag_val = port;
164
165 err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
166 if (err) {
167 kfree(untagging_rule);
168 kfree(redirect_rule);
169 return err;
170 }
171
172 cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
173
174 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
175 redirect_rule->ingress_port_mask = cpu_ports;
176 redirect_rule->pag = port;
177 redirect_rule->prio = 1;
178 redirect_rule->id.cookie = cookie;
179 redirect_rule->id.tc_offload = false;
180 redirect_rule->block_id = VCAP_IS2;
181 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
182 redirect_rule->lookup = 0;
183 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
184 redirect_rule->action.port_mask = BIT(port);
185
186 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
187 if (err) {
188 ocelot_vcap_filter_del(ocelot, untagging_rule);
189 kfree(redirect_rule);
190 return err;
191 }
192
193 return 0;
194 }
195
felix_tag_8021q_vlan_del_tx(struct dsa_switch * ds,int port,u16 vid)196 static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)
197 {
198 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
199 struct ocelot_vcap_block *block_vcap_is1;
200 struct ocelot_vcap_block *block_vcap_is2;
201 struct ocelot *ocelot = ds->priv;
202 unsigned long cookie;
203 int err;
204
205 block_vcap_is1 = &ocelot->block[VCAP_IS1];
206 block_vcap_is2 = &ocelot->block[VCAP_IS2];
207
208 cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
209 untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
210 cookie, false);
211 if (!untagging_rule)
212 return -ENOENT;
213
214 err = ocelot_vcap_filter_del(ocelot, untagging_rule);
215 if (err)
216 return err;
217
218 cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
219 redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
220 cookie, false);
221 if (!redirect_rule)
222 return -ENOENT;
223
224 return ocelot_vcap_filter_del(ocelot, redirect_rule);
225 }
226
felix_tag_8021q_vlan_add(struct dsa_switch * ds,int port,u16 vid,u16 flags)227 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
228 u16 flags)
229 {
230 struct dsa_port *cpu_dp;
231 int err;
232
233 /* tag_8021q.c assumes we are implementing this via port VLAN
234 * membership, which we aren't. So we don't need to add any VCAP filter
235 * for the CPU port.
236 */
237 if (!dsa_is_user_port(ds, port))
238 return 0;
239
240 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
241 err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
242 if (err)
243 return err;
244 }
245
246 err = felix_tag_8021q_vlan_add_tx(ds, port, vid);
247 if (err)
248 goto add_tx_failed;
249
250 return 0;
251
252 add_tx_failed:
253 dsa_switch_for_each_cpu_port(cpu_dp, ds)
254 felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
255
256 return err;
257 }
258
felix_tag_8021q_vlan_del(struct dsa_switch * ds,int port,u16 vid)259 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
260 {
261 struct dsa_port *cpu_dp;
262 int err;
263
264 if (!dsa_is_user_port(ds, port))
265 return 0;
266
267 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
268 err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
269 if (err)
270 return err;
271 }
272
273 err = felix_tag_8021q_vlan_del_tx(ds, port, vid);
274 if (err)
275 goto del_tx_failed;
276
277 return 0;
278
279 del_tx_failed:
280 dsa_switch_for_each_cpu_port(cpu_dp, ds)
281 felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
282
283 return err;
284 }
285
felix_trap_get_cpu_port(struct dsa_switch * ds,const struct ocelot_vcap_filter * trap)286 static int felix_trap_get_cpu_port(struct dsa_switch *ds,
287 const struct ocelot_vcap_filter *trap)
288 {
289 struct dsa_port *dp;
290 int first_port;
291
292 if (WARN_ON(!trap->ingress_port_mask))
293 return -1;
294
295 first_port = __ffs(trap->ingress_port_mask);
296 dp = dsa_to_port(ds, first_port);
297
298 return dp->cpu_dp->index;
299 }
300
301 /* On switches with no extraction IRQ wired, trapped packets need to be
302 * replicated over Ethernet as well, otherwise we'd get no notification of
303 * their arrival when using the ocelot-8021q tagging protocol.
304 */
felix_update_trapping_destinations(struct dsa_switch * ds,bool using_tag_8021q)305 static int felix_update_trapping_destinations(struct dsa_switch *ds,
306 bool using_tag_8021q)
307 {
308 struct ocelot *ocelot = ds->priv;
309 struct felix *felix = ocelot_to_felix(ocelot);
310 struct ocelot_vcap_block *block_vcap_is2;
311 struct ocelot_vcap_filter *trap;
312 enum ocelot_mask_mode mask_mode;
313 unsigned long port_mask;
314 bool cpu_copy_ena;
315 int err;
316
317 if (!felix->info->quirk_no_xtr_irq)
318 return 0;
319
320 /* We are sure that "cpu" was found, otherwise
321 * dsa_tree_setup_default_cpu() would have failed earlier.
322 */
323 block_vcap_is2 = &ocelot->block[VCAP_IS2];
324
325 /* Make sure all traps are set up for that destination */
326 list_for_each_entry(trap, &block_vcap_is2->rules, list) {
327 if (!trap->is_trap)
328 continue;
329
330 /* Figure out the current trapping destination */
331 if (using_tag_8021q) {
332 /* Redirect to the tag_8021q CPU port. If timestamps
333 * are necessary, also copy trapped packets to the CPU
334 * port module.
335 */
336 mask_mode = OCELOT_MASK_MODE_REDIRECT;
337 port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
338 cpu_copy_ena = !!trap->take_ts;
339 } else {
340 /* Trap packets only to the CPU port module, which is
341 * redirected to the NPI port (the DSA CPU port)
342 */
343 mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
344 port_mask = 0;
345 cpu_copy_ena = true;
346 }
347
348 if (trap->action.mask_mode == mask_mode &&
349 trap->action.port_mask == port_mask &&
350 trap->action.cpu_copy_ena == cpu_copy_ena)
351 continue;
352
353 trap->action.mask_mode = mask_mode;
354 trap->action.port_mask = port_mask;
355 trap->action.cpu_copy_ena = cpu_copy_ena;
356
357 err = ocelot_vcap_filter_replace(ocelot, trap);
358 if (err)
359 return err;
360 }
361
362 return 0;
363 }
364
365 /* The CPU port module is connected to the Node Processor Interface (NPI). This
366 * is the mode through which frames can be injected from and extracted to an
367 * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
368 * running Linux, and this forms a DSA setup together with the enetc or fman
369 * DSA master.
370 */
felix_npi_port_init(struct ocelot * ocelot,int port)371 static void felix_npi_port_init(struct ocelot *ocelot, int port)
372 {
373 ocelot->npi = port;
374
375 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
376 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
377 QSYS_EXT_CPU_CFG);
378
379 /* NPI port Injection/Extraction configuration */
380 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
381 ocelot->npi_xtr_prefix);
382 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
383 ocelot->npi_inj_prefix);
384
385 /* Disable transmission of pause frames */
386 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
387 }
388
felix_npi_port_deinit(struct ocelot * ocelot,int port)389 static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
390 {
391 /* Restore hardware defaults */
392 int unused_port = ocelot->num_phys_ports + 2;
393
394 ocelot->npi = -1;
395
396 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
397 QSYS_EXT_CPU_CFG);
398
399 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
400 OCELOT_TAG_PREFIX_DISABLED);
401 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
402 OCELOT_TAG_PREFIX_DISABLED);
403
404 /* Enable transmission of pause frames */
405 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
406 }
407
felix_tag_npi_setup(struct dsa_switch * ds)408 static int felix_tag_npi_setup(struct dsa_switch *ds)
409 {
410 struct dsa_port *dp, *first_cpu_dp = NULL;
411 struct ocelot *ocelot = ds->priv;
412
413 dsa_switch_for_each_user_port(dp, ds) {
414 if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
415 dev_err(ds->dev, "Multiple NPI ports not supported\n");
416 return -EINVAL;
417 }
418
419 first_cpu_dp = dp->cpu_dp;
420 }
421
422 if (!first_cpu_dp)
423 return -EINVAL;
424
425 felix_npi_port_init(ocelot, first_cpu_dp->index);
426
427 return 0;
428 }
429
felix_tag_npi_teardown(struct dsa_switch * ds)430 static void felix_tag_npi_teardown(struct dsa_switch *ds)
431 {
432 struct ocelot *ocelot = ds->priv;
433
434 felix_npi_port_deinit(ocelot, ocelot->npi);
435 }
436
felix_tag_npi_get_host_fwd_mask(struct dsa_switch * ds)437 static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)
438 {
439 struct ocelot *ocelot = ds->priv;
440
441 return BIT(ocelot->num_phys_ports);
442 }
443
felix_tag_npi_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)444 static int felix_tag_npi_change_master(struct dsa_switch *ds, int port,
445 struct net_device *master,
446 struct netlink_ext_ack *extack)
447 {
448 struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
449 struct ocelot *ocelot = ds->priv;
450
451 if (netif_is_lag_master(master)) {
452 NL_SET_ERR_MSG_MOD(extack,
453 "LAG DSA master only supported using ocelot-8021q");
454 return -EOPNOTSUPP;
455 }
456
457 /* Changing the NPI port breaks user ports still assigned to the old
458 * one, so only allow it while they're down, and don't allow them to
459 * come back up until they're all changed to the new one.
460 */
461 dsa_switch_for_each_user_port(other_dp, ds) {
462 struct net_device *slave = other_dp->slave;
463
464 if (other_dp != dp && (slave->flags & IFF_UP) &&
465 dsa_port_to_master(other_dp) != master) {
466 NL_SET_ERR_MSG_MOD(extack,
467 "Cannot change while old master still has users");
468 return -EOPNOTSUPP;
469 }
470 }
471
472 felix_npi_port_deinit(ocelot, ocelot->npi);
473 felix_npi_port_init(ocelot, felix_cpu_port_for_master(ds, master));
474
475 return 0;
476 }
477
478 /* Alternatively to using the NPI functionality, that same hardware MAC
479 * connected internally to the enetc or fman DSA master can be configured to
480 * use the software-defined tag_8021q frame format. As far as the hardware is
481 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
482 * module are now disconnected from it, but can still be accessed through
483 * register-based MMIO.
484 */
485 static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {
486 .setup = felix_tag_npi_setup,
487 .teardown = felix_tag_npi_teardown,
488 .get_host_fwd_mask = felix_tag_npi_get_host_fwd_mask,
489 .change_master = felix_tag_npi_change_master,
490 };
491
felix_tag_8021q_setup(struct dsa_switch * ds)492 static int felix_tag_8021q_setup(struct dsa_switch *ds)
493 {
494 struct ocelot *ocelot = ds->priv;
495 struct dsa_port *dp;
496 int err;
497
498 err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
499 if (err)
500 return err;
501
502 dsa_switch_for_each_cpu_port(dp, ds)
503 ocelot_port_setup_dsa_8021q_cpu(ocelot, dp->index);
504
505 dsa_switch_for_each_user_port(dp, ds)
506 ocelot_port_assign_dsa_8021q_cpu(ocelot, dp->index,
507 dp->cpu_dp->index);
508
509 dsa_switch_for_each_available_port(dp, ds)
510 /* This overwrites ocelot_init():
511 * Do not forward BPDU frames to the CPU port module,
512 * for 2 reasons:
513 * - When these packets are injected from the tag_8021q
514 * CPU port, we want them to go out, not loop back
515 * into the system.
516 * - STP traffic ingressing on a user port should go to
517 * the tag_8021q CPU port, not to the hardware CPU
518 * port module.
519 */
520 ocelot_write_gix(ocelot,
521 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
522 ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
523
524 /* The ownership of the CPU port module's queues might have just been
525 * transferred to the tag_8021q tagger from the NPI-based tagger.
526 * So there might still be all sorts of crap in the queues. On the
527 * other hand, the MMIO-based matching of PTP frames is very brittle,
528 * so we need to be careful that there are no extra frames to be
529 * dequeued over MMIO, since we would never know to discard them.
530 */
531 ocelot_lock_xtr_grp_bh(ocelot, 0);
532 ocelot_drain_cpu_queue(ocelot, 0);
533 ocelot_unlock_xtr_grp_bh(ocelot, 0);
534
535 return 0;
536 }
537
felix_tag_8021q_teardown(struct dsa_switch * ds)538 static void felix_tag_8021q_teardown(struct dsa_switch *ds)
539 {
540 struct ocelot *ocelot = ds->priv;
541 struct dsa_port *dp;
542
543 dsa_switch_for_each_available_port(dp, ds)
544 /* Restore the logic from ocelot_init:
545 * do not forward BPDU frames to the front ports.
546 */
547 ocelot_write_gix(ocelot,
548 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
549 ANA_PORT_CPU_FWD_BPDU_CFG,
550 dp->index);
551
552 dsa_switch_for_each_user_port(dp, ds)
553 ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp->index);
554
555 dsa_switch_for_each_cpu_port(dp, ds)
556 ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp->index);
557
558 dsa_tag_8021q_unregister(ds);
559 }
560
felix_tag_8021q_get_host_fwd_mask(struct dsa_switch * ds)561 static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
562 {
563 return dsa_cpu_ports(ds);
564 }
565
felix_tag_8021q_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)566 static int felix_tag_8021q_change_master(struct dsa_switch *ds, int port,
567 struct net_device *master,
568 struct netlink_ext_ack *extack)
569 {
570 int cpu = felix_cpu_port_for_master(ds, master);
571 struct ocelot *ocelot = ds->priv;
572
573 ocelot_port_unassign_dsa_8021q_cpu(ocelot, port);
574 ocelot_port_assign_dsa_8021q_cpu(ocelot, port, cpu);
575
576 return felix_update_trapping_destinations(ds, true);
577 }
578
579 static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {
580 .setup = felix_tag_8021q_setup,
581 .teardown = felix_tag_8021q_teardown,
582 .get_host_fwd_mask = felix_tag_8021q_get_host_fwd_mask,
583 .change_master = felix_tag_8021q_change_master,
584 };
585
felix_set_host_flood(struct dsa_switch * ds,unsigned long mask,bool uc,bool mc,bool bc)586 static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,
587 bool uc, bool mc, bool bc)
588 {
589 struct ocelot *ocelot = ds->priv;
590 unsigned long val;
591
592 val = uc ? mask : 0;
593 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);
594
595 val = mc ? mask : 0;
596 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);
597 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);
598 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);
599
600 val = bc ? mask : 0;
601 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);
602 }
603
604 static void
felix_migrate_host_flood(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)605 felix_migrate_host_flood(struct dsa_switch *ds,
606 const struct felix_tag_proto_ops *proto_ops,
607 const struct felix_tag_proto_ops *old_proto_ops)
608 {
609 struct ocelot *ocelot = ds->priv;
610 struct felix *felix = ocelot_to_felix(ocelot);
611 unsigned long mask;
612
613 if (old_proto_ops) {
614 mask = old_proto_ops->get_host_fwd_mask(ds);
615 felix_set_host_flood(ds, mask, false, false, false);
616 }
617
618 mask = proto_ops->get_host_fwd_mask(ds);
619 felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
620 !!felix->host_flood_mc_mask, true);
621 }
622
felix_migrate_mdbs(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)623 static int felix_migrate_mdbs(struct dsa_switch *ds,
624 const struct felix_tag_proto_ops *proto_ops,
625 const struct felix_tag_proto_ops *old_proto_ops)
626 {
627 struct ocelot *ocelot = ds->priv;
628 unsigned long from, to;
629
630 if (!old_proto_ops)
631 return 0;
632
633 from = old_proto_ops->get_host_fwd_mask(ds);
634 to = proto_ops->get_host_fwd_mask(ds);
635
636 return ocelot_migrate_mdbs(ocelot, from, to);
637 }
638
639 /* Configure the shared hardware resources for a transition between
640 * @old_proto_ops and @proto_ops.
641 * Manual migration is needed because as far as DSA is concerned, no change of
642 * the CPU port is taking place here, just of the tagging protocol.
643 */
644 static int
felix_tag_proto_setup_shared(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)645 felix_tag_proto_setup_shared(struct dsa_switch *ds,
646 const struct felix_tag_proto_ops *proto_ops,
647 const struct felix_tag_proto_ops *old_proto_ops)
648 {
649 bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops);
650 int err;
651
652 err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);
653 if (err)
654 return err;
655
656 felix_update_trapping_destinations(ds, using_tag_8021q);
657
658 felix_migrate_host_flood(ds, proto_ops, old_proto_ops);
659
660 return 0;
661 }
662
663 /* This always leaves the switch in a consistent state, because although the
664 * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
665 * or the restoration is guaranteed to work.
666 */
felix_change_tag_protocol(struct dsa_switch * ds,enum dsa_tag_protocol proto)667 static int felix_change_tag_protocol(struct dsa_switch *ds,
668 enum dsa_tag_protocol proto)
669 {
670 const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;
671 struct ocelot *ocelot = ds->priv;
672 struct felix *felix = ocelot_to_felix(ocelot);
673 int err;
674
675 switch (proto) {
676 case DSA_TAG_PROTO_SEVILLE:
677 case DSA_TAG_PROTO_OCELOT:
678 proto_ops = &felix_tag_npi_proto_ops;
679 break;
680 case DSA_TAG_PROTO_OCELOT_8021Q:
681 proto_ops = &felix_tag_8021q_proto_ops;
682 break;
683 default:
684 return -EPROTONOSUPPORT;
685 }
686
687 old_proto_ops = felix->tag_proto_ops;
688
689 if (proto_ops == old_proto_ops)
690 return 0;
691
692 err = proto_ops->setup(ds);
693 if (err)
694 goto setup_failed;
695
696 err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);
697 if (err)
698 goto setup_shared_failed;
699
700 if (old_proto_ops)
701 old_proto_ops->teardown(ds);
702
703 felix->tag_proto_ops = proto_ops;
704 felix->tag_proto = proto;
705
706 return 0;
707
708 setup_shared_failed:
709 proto_ops->teardown(ds);
710 setup_failed:
711 return err;
712 }
713
felix_get_tag_protocol(struct dsa_switch * ds,int port,enum dsa_tag_protocol mp)714 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
715 int port,
716 enum dsa_tag_protocol mp)
717 {
718 struct ocelot *ocelot = ds->priv;
719 struct felix *felix = ocelot_to_felix(ocelot);
720
721 return felix->tag_proto;
722 }
723
felix_port_set_host_flood(struct dsa_switch * ds,int port,bool uc,bool mc)724 static void felix_port_set_host_flood(struct dsa_switch *ds, int port,
725 bool uc, bool mc)
726 {
727 struct ocelot *ocelot = ds->priv;
728 struct felix *felix = ocelot_to_felix(ocelot);
729 unsigned long mask;
730
731 if (uc)
732 felix->host_flood_uc_mask |= BIT(port);
733 else
734 felix->host_flood_uc_mask &= ~BIT(port);
735
736 if (mc)
737 felix->host_flood_mc_mask |= BIT(port);
738 else
739 felix->host_flood_mc_mask &= ~BIT(port);
740
741 mask = felix->tag_proto_ops->get_host_fwd_mask(ds);
742 felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
743 !!felix->host_flood_mc_mask, true);
744 }
745
felix_port_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)746 static int felix_port_change_master(struct dsa_switch *ds, int port,
747 struct net_device *master,
748 struct netlink_ext_ack *extack)
749 {
750 struct ocelot *ocelot = ds->priv;
751 struct felix *felix = ocelot_to_felix(ocelot);
752
753 return felix->tag_proto_ops->change_master(ds, port, master, extack);
754 }
755
felix_set_ageing_time(struct dsa_switch * ds,unsigned int ageing_time)756 static int felix_set_ageing_time(struct dsa_switch *ds,
757 unsigned int ageing_time)
758 {
759 struct ocelot *ocelot = ds->priv;
760
761 ocelot_set_ageing_time(ocelot, ageing_time);
762
763 return 0;
764 }
765
felix_port_fast_age(struct dsa_switch * ds,int port)766 static void felix_port_fast_age(struct dsa_switch *ds, int port)
767 {
768 struct ocelot *ocelot = ds->priv;
769 int err;
770
771 err = ocelot_mact_flush(ocelot, port);
772 if (err)
773 dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
774 port, ERR_PTR(err));
775 }
776
felix_fdb_dump(struct dsa_switch * ds,int port,dsa_fdb_dump_cb_t * cb,void * data)777 static int felix_fdb_dump(struct dsa_switch *ds, int port,
778 dsa_fdb_dump_cb_t *cb, void *data)
779 {
780 struct ocelot *ocelot = ds->priv;
781
782 return ocelot_fdb_dump(ocelot, port, cb, data);
783 }
784
felix_fdb_add(struct dsa_switch * ds,int port,const unsigned char * addr,u16 vid,struct dsa_db db)785 static int felix_fdb_add(struct dsa_switch *ds, int port,
786 const unsigned char *addr, u16 vid,
787 struct dsa_db db)
788 {
789 struct net_device *bridge_dev = felix_classify_db(db);
790 struct dsa_port *dp = dsa_to_port(ds, port);
791 struct ocelot *ocelot = ds->priv;
792
793 if (IS_ERR(bridge_dev))
794 return PTR_ERR(bridge_dev);
795
796 if (dsa_port_is_cpu(dp) && !bridge_dev &&
797 dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
798 return 0;
799
800 if (dsa_port_is_cpu(dp))
801 port = PGID_CPU;
802
803 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
804 }
805
felix_fdb_del(struct dsa_switch * ds,int port,const unsigned char * addr,u16 vid,struct dsa_db db)806 static int felix_fdb_del(struct dsa_switch *ds, int port,
807 const unsigned char *addr, u16 vid,
808 struct dsa_db db)
809 {
810 struct net_device *bridge_dev = felix_classify_db(db);
811 struct dsa_port *dp = dsa_to_port(ds, port);
812 struct ocelot *ocelot = ds->priv;
813
814 if (IS_ERR(bridge_dev))
815 return PTR_ERR(bridge_dev);
816
817 if (dsa_port_is_cpu(dp) && !bridge_dev &&
818 dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
819 return 0;
820
821 if (dsa_port_is_cpu(dp))
822 port = PGID_CPU;
823
824 return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
825 }
826
felix_lag_fdb_add(struct dsa_switch * ds,struct dsa_lag lag,const unsigned char * addr,u16 vid,struct dsa_db db)827 static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
828 const unsigned char *addr, u16 vid,
829 struct dsa_db db)
830 {
831 struct net_device *bridge_dev = felix_classify_db(db);
832 struct ocelot *ocelot = ds->priv;
833
834 if (IS_ERR(bridge_dev))
835 return PTR_ERR(bridge_dev);
836
837 return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
838 }
839
felix_lag_fdb_del(struct dsa_switch * ds,struct dsa_lag lag,const unsigned char * addr,u16 vid,struct dsa_db db)840 static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
841 const unsigned char *addr, u16 vid,
842 struct dsa_db db)
843 {
844 struct net_device *bridge_dev = felix_classify_db(db);
845 struct ocelot *ocelot = ds->priv;
846
847 if (IS_ERR(bridge_dev))
848 return PTR_ERR(bridge_dev);
849
850 return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
851 }
852
felix_mdb_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)853 static int felix_mdb_add(struct dsa_switch *ds, int port,
854 const struct switchdev_obj_port_mdb *mdb,
855 struct dsa_db db)
856 {
857 struct net_device *bridge_dev = felix_classify_db(db);
858 struct ocelot *ocelot = ds->priv;
859
860 if (IS_ERR(bridge_dev))
861 return PTR_ERR(bridge_dev);
862
863 if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
864 dsa_mdb_present_in_other_db(ds, port, mdb, db))
865 return 0;
866
867 if (port == ocelot->npi)
868 port = ocelot->num_phys_ports;
869
870 return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
871 }
872
felix_mdb_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)873 static int felix_mdb_del(struct dsa_switch *ds, int port,
874 const struct switchdev_obj_port_mdb *mdb,
875 struct dsa_db db)
876 {
877 struct net_device *bridge_dev = felix_classify_db(db);
878 struct ocelot *ocelot = ds->priv;
879
880 if (IS_ERR(bridge_dev))
881 return PTR_ERR(bridge_dev);
882
883 if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
884 dsa_mdb_present_in_other_db(ds, port, mdb, db))
885 return 0;
886
887 if (port == ocelot->npi)
888 port = ocelot->num_phys_ports;
889
890 return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
891 }
892
felix_bridge_stp_state_set(struct dsa_switch * ds,int port,u8 state)893 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
894 u8 state)
895 {
896 struct ocelot *ocelot = ds->priv;
897
898 return ocelot_bridge_stp_state_set(ocelot, port, state);
899 }
900
felix_pre_bridge_flags(struct dsa_switch * ds,int port,struct switchdev_brport_flags val,struct netlink_ext_ack * extack)901 static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
902 struct switchdev_brport_flags val,
903 struct netlink_ext_ack *extack)
904 {
905 struct ocelot *ocelot = ds->priv;
906
907 return ocelot_port_pre_bridge_flags(ocelot, port, val);
908 }
909
felix_bridge_flags(struct dsa_switch * ds,int port,struct switchdev_brport_flags val,struct netlink_ext_ack * extack)910 static int felix_bridge_flags(struct dsa_switch *ds, int port,
911 struct switchdev_brport_flags val,
912 struct netlink_ext_ack *extack)
913 {
914 struct ocelot *ocelot = ds->priv;
915
916 if (port == ocelot->npi)
917 port = ocelot->num_phys_ports;
918
919 ocelot_port_bridge_flags(ocelot, port, val);
920
921 return 0;
922 }
923
felix_bridge_join(struct dsa_switch * ds,int port,struct dsa_bridge bridge,bool * tx_fwd_offload,struct netlink_ext_ack * extack)924 static int felix_bridge_join(struct dsa_switch *ds, int port,
925 struct dsa_bridge bridge, bool *tx_fwd_offload,
926 struct netlink_ext_ack *extack)
927 {
928 struct ocelot *ocelot = ds->priv;
929
930 return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
931 extack);
932 }
933
felix_bridge_leave(struct dsa_switch * ds,int port,struct dsa_bridge bridge)934 static void felix_bridge_leave(struct dsa_switch *ds, int port,
935 struct dsa_bridge bridge)
936 {
937 struct ocelot *ocelot = ds->priv;
938
939 ocelot_port_bridge_leave(ocelot, port, bridge.dev);
940 }
941
felix_lag_join(struct dsa_switch * ds,int port,struct dsa_lag lag,struct netdev_lag_upper_info * info,struct netlink_ext_ack * extack)942 static int felix_lag_join(struct dsa_switch *ds, int port,
943 struct dsa_lag lag,
944 struct netdev_lag_upper_info *info,
945 struct netlink_ext_ack *extack)
946 {
947 struct ocelot *ocelot = ds->priv;
948 int err;
949
950 err = ocelot_port_lag_join(ocelot, port, lag.dev, info, extack);
951 if (err)
952 return err;
953
954 /* Update the logical LAG port that serves as tag_8021q CPU port */
955 if (!dsa_is_cpu_port(ds, port))
956 return 0;
957
958 return felix_port_change_master(ds, port, lag.dev, extack);
959 }
960
felix_lag_leave(struct dsa_switch * ds,int port,struct dsa_lag lag)961 static int felix_lag_leave(struct dsa_switch *ds, int port,
962 struct dsa_lag lag)
963 {
964 struct ocelot *ocelot = ds->priv;
965
966 ocelot_port_lag_leave(ocelot, port, lag.dev);
967
968 /* Update the logical LAG port that serves as tag_8021q CPU port */
969 if (!dsa_is_cpu_port(ds, port))
970 return 0;
971
972 return felix_port_change_master(ds, port, lag.dev, NULL);
973 }
974
felix_lag_change(struct dsa_switch * ds,int port)975 static int felix_lag_change(struct dsa_switch *ds, int port)
976 {
977 struct dsa_port *dp = dsa_to_port(ds, port);
978 struct ocelot *ocelot = ds->priv;
979
980 ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
981
982 return 0;
983 }
984
felix_vlan_prepare(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)985 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
986 const struct switchdev_obj_port_vlan *vlan,
987 struct netlink_ext_ack *extack)
988 {
989 struct ocelot *ocelot = ds->priv;
990 u16 flags = vlan->flags;
991
992 /* Ocelot switches copy frames as-is to the CPU, so the flags:
993 * egress-untagged or not, pvid or not, make no difference. This
994 * behavior is already better than what DSA just tries to approximate
995 * when it installs the VLAN with the same flags on the CPU port.
996 * Just accept any configuration, and don't let ocelot deny installing
997 * multiple native VLANs on the NPI port, because the switch doesn't
998 * look at the port tag settings towards the NPI interface anyway.
999 */
1000 if (port == ocelot->npi)
1001 return 0;
1002
1003 return ocelot_vlan_prepare(ocelot, port, vlan->vid,
1004 flags & BRIDGE_VLAN_INFO_PVID,
1005 flags & BRIDGE_VLAN_INFO_UNTAGGED,
1006 extack);
1007 }
1008
felix_vlan_filtering(struct dsa_switch * ds,int port,bool enabled,struct netlink_ext_ack * extack)1009 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
1010 struct netlink_ext_ack *extack)
1011 {
1012 struct ocelot *ocelot = ds->priv;
1013
1014 return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
1015 }
1016
felix_vlan_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)1017 static int felix_vlan_add(struct dsa_switch *ds, int port,
1018 const struct switchdev_obj_port_vlan *vlan,
1019 struct netlink_ext_ack *extack)
1020 {
1021 struct ocelot *ocelot = ds->priv;
1022 u16 flags = vlan->flags;
1023 int err;
1024
1025 err = felix_vlan_prepare(ds, port, vlan, extack);
1026 if (err)
1027 return err;
1028
1029 return ocelot_vlan_add(ocelot, port, vlan->vid,
1030 flags & BRIDGE_VLAN_INFO_PVID,
1031 flags & BRIDGE_VLAN_INFO_UNTAGGED);
1032 }
1033
felix_vlan_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan)1034 static int felix_vlan_del(struct dsa_switch *ds, int port,
1035 const struct switchdev_obj_port_vlan *vlan)
1036 {
1037 struct ocelot *ocelot = ds->priv;
1038
1039 return ocelot_vlan_del(ocelot, port, vlan->vid);
1040 }
1041
felix_phylink_get_caps(struct dsa_switch * ds,int port,struct phylink_config * config)1042 static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
1043 struct phylink_config *config)
1044 {
1045 struct ocelot *ocelot = ds->priv;
1046
1047 config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
1048 MAC_10 | MAC_100 | MAC_1000FD |
1049 MAC_2500FD;
1050
1051 __set_bit(ocelot->ports[port]->phy_mode,
1052 config->supported_interfaces);
1053 }
1054
felix_phylink_mac_config(struct dsa_switch * ds,int port,unsigned int mode,const struct phylink_link_state * state)1055 static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
1056 unsigned int mode,
1057 const struct phylink_link_state *state)
1058 {
1059 struct ocelot *ocelot = ds->priv;
1060 struct felix *felix = ocelot_to_felix(ocelot);
1061
1062 if (felix->info->phylink_mac_config)
1063 felix->info->phylink_mac_config(ocelot, port, mode, state);
1064 }
1065
felix_phylink_mac_select_pcs(struct dsa_switch * ds,int port,phy_interface_t iface)1066 static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
1067 int port,
1068 phy_interface_t iface)
1069 {
1070 struct ocelot *ocelot = ds->priv;
1071 struct felix *felix = ocelot_to_felix(ocelot);
1072 struct phylink_pcs *pcs = NULL;
1073
1074 if (felix->pcs && felix->pcs[port])
1075 pcs = felix->pcs[port];
1076
1077 return pcs;
1078 }
1079
felix_phylink_mac_link_down(struct dsa_switch * ds,int port,unsigned int link_an_mode,phy_interface_t interface)1080 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
1081 unsigned int link_an_mode,
1082 phy_interface_t interface)
1083 {
1084 struct ocelot *ocelot = ds->priv;
1085 struct felix *felix;
1086
1087 felix = ocelot_to_felix(ocelot);
1088
1089 ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
1090 felix->info->quirks);
1091 }
1092
felix_phylink_mac_link_up(struct dsa_switch * ds,int port,unsigned int link_an_mode,phy_interface_t interface,struct phy_device * phydev,int speed,int duplex,bool tx_pause,bool rx_pause)1093 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
1094 unsigned int link_an_mode,
1095 phy_interface_t interface,
1096 struct phy_device *phydev,
1097 int speed, int duplex,
1098 bool tx_pause, bool rx_pause)
1099 {
1100 struct ocelot *ocelot = ds->priv;
1101 struct felix *felix = ocelot_to_felix(ocelot);
1102
1103 ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
1104 interface, speed, duplex, tx_pause, rx_pause,
1105 felix->info->quirks);
1106
1107 if (felix->info->port_sched_speed_set)
1108 felix->info->port_sched_speed_set(ocelot, port, speed);
1109 }
1110
felix_port_enable(struct dsa_switch * ds,int port,struct phy_device * phydev)1111 static int felix_port_enable(struct dsa_switch *ds, int port,
1112 struct phy_device *phydev)
1113 {
1114 struct dsa_port *dp = dsa_to_port(ds, port);
1115 struct ocelot *ocelot = ds->priv;
1116
1117 if (!dsa_port_is_user(dp))
1118 return 0;
1119
1120 if (ocelot->npi >= 0) {
1121 struct net_device *master = dsa_port_to_master(dp);
1122
1123 if (felix_cpu_port_for_master(ds, master) != ocelot->npi) {
1124 dev_err(ds->dev, "Multiple masters are not allowed\n");
1125 return -EINVAL;
1126 }
1127 }
1128
1129 return 0;
1130 }
1131
felix_port_qos_map_init(struct ocelot * ocelot,int port)1132 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
1133 {
1134 int i;
1135
1136 ocelot_rmw_gix(ocelot,
1137 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1138 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1139 ANA_PORT_QOS_CFG,
1140 port);
1141
1142 for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
1143 ocelot_rmw_ix(ocelot,
1144 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
1145 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
1146 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
1147 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
1148 ANA_PORT_PCP_DEI_MAP,
1149 port, i);
1150 }
1151 }
1152
felix_get_stats64(struct dsa_switch * ds,int port,struct rtnl_link_stats64 * stats)1153 static void felix_get_stats64(struct dsa_switch *ds, int port,
1154 struct rtnl_link_stats64 *stats)
1155 {
1156 struct ocelot *ocelot = ds->priv;
1157
1158 ocelot_port_get_stats64(ocelot, port, stats);
1159 }
1160
felix_get_pause_stats(struct dsa_switch * ds,int port,struct ethtool_pause_stats * pause_stats)1161 static void felix_get_pause_stats(struct dsa_switch *ds, int port,
1162 struct ethtool_pause_stats *pause_stats)
1163 {
1164 struct ocelot *ocelot = ds->priv;
1165
1166 ocelot_port_get_pause_stats(ocelot, port, pause_stats);
1167 }
1168
felix_get_rmon_stats(struct dsa_switch * ds,int port,struct ethtool_rmon_stats * rmon_stats,const struct ethtool_rmon_hist_range ** ranges)1169 static void felix_get_rmon_stats(struct dsa_switch *ds, int port,
1170 struct ethtool_rmon_stats *rmon_stats,
1171 const struct ethtool_rmon_hist_range **ranges)
1172 {
1173 struct ocelot *ocelot = ds->priv;
1174
1175 ocelot_port_get_rmon_stats(ocelot, port, rmon_stats, ranges);
1176 }
1177
felix_get_eth_ctrl_stats(struct dsa_switch * ds,int port,struct ethtool_eth_ctrl_stats * ctrl_stats)1178 static void felix_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
1179 struct ethtool_eth_ctrl_stats *ctrl_stats)
1180 {
1181 struct ocelot *ocelot = ds->priv;
1182
1183 ocelot_port_get_eth_ctrl_stats(ocelot, port, ctrl_stats);
1184 }
1185
felix_get_eth_mac_stats(struct dsa_switch * ds,int port,struct ethtool_eth_mac_stats * mac_stats)1186 static void felix_get_eth_mac_stats(struct dsa_switch *ds, int port,
1187 struct ethtool_eth_mac_stats *mac_stats)
1188 {
1189 struct ocelot *ocelot = ds->priv;
1190
1191 ocelot_port_get_eth_mac_stats(ocelot, port, mac_stats);
1192 }
1193
felix_get_eth_phy_stats(struct dsa_switch * ds,int port,struct ethtool_eth_phy_stats * phy_stats)1194 static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,
1195 struct ethtool_eth_phy_stats *phy_stats)
1196 {
1197 struct ocelot *ocelot = ds->priv;
1198
1199 ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);
1200 }
1201
felix_get_strings(struct dsa_switch * ds,int port,u32 stringset,u8 * data)1202 static void felix_get_strings(struct dsa_switch *ds, int port,
1203 u32 stringset, u8 *data)
1204 {
1205 struct ocelot *ocelot = ds->priv;
1206
1207 return ocelot_get_strings(ocelot, port, stringset, data);
1208 }
1209
felix_get_ethtool_stats(struct dsa_switch * ds,int port,u64 * data)1210 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
1211 {
1212 struct ocelot *ocelot = ds->priv;
1213
1214 ocelot_get_ethtool_stats(ocelot, port, data);
1215 }
1216
felix_get_sset_count(struct dsa_switch * ds,int port,int sset)1217 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
1218 {
1219 struct ocelot *ocelot = ds->priv;
1220
1221 return ocelot_get_sset_count(ocelot, port, sset);
1222 }
1223
felix_get_ts_info(struct dsa_switch * ds,int port,struct ethtool_ts_info * info)1224 static int felix_get_ts_info(struct dsa_switch *ds, int port,
1225 struct ethtool_ts_info *info)
1226 {
1227 struct ocelot *ocelot = ds->priv;
1228
1229 return ocelot_get_ts_info(ocelot, port, info);
1230 }
1231
1232 static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
1233 [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
1234 [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
1235 [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
1236 [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
1237 [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
1238 [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
1239 };
1240
felix_validate_phy_mode(struct felix * felix,int port,phy_interface_t phy_mode)1241 static int felix_validate_phy_mode(struct felix *felix, int port,
1242 phy_interface_t phy_mode)
1243 {
1244 u32 modes = felix->info->port_modes[port];
1245
1246 if (felix_phy_match_table[phy_mode] & modes)
1247 return 0;
1248 return -EOPNOTSUPP;
1249 }
1250
felix_parse_ports_node(struct felix * felix,struct device_node * ports_node,phy_interface_t * port_phy_modes)1251 static int felix_parse_ports_node(struct felix *felix,
1252 struct device_node *ports_node,
1253 phy_interface_t *port_phy_modes)
1254 {
1255 struct device *dev = felix->ocelot.dev;
1256 struct device_node *child;
1257
1258 for_each_available_child_of_node(ports_node, child) {
1259 phy_interface_t phy_mode;
1260 u32 port;
1261 int err;
1262
1263 /* Get switch port number from DT */
1264 if (of_property_read_u32(child, "reg", &port) < 0) {
1265 dev_err(dev, "Port number not defined in device tree "
1266 "(property \"reg\")\n");
1267 of_node_put(child);
1268 return -ENODEV;
1269 }
1270
1271 /* Get PHY mode from DT */
1272 err = of_get_phy_mode(child, &phy_mode);
1273 if (err) {
1274 dev_err(dev, "Failed to read phy-mode or "
1275 "phy-interface-type property for port %d\n",
1276 port);
1277 of_node_put(child);
1278 return -ENODEV;
1279 }
1280
1281 err = felix_validate_phy_mode(felix, port, phy_mode);
1282 if (err < 0) {
1283 dev_info(dev, "Unsupported PHY mode %s on port %d\n",
1284 phy_modes(phy_mode), port);
1285
1286 /* Leave port_phy_modes[port] = 0, which is also
1287 * PHY_INTERFACE_MODE_NA. This will perform a
1288 * best-effort to bring up as many ports as possible.
1289 */
1290 continue;
1291 }
1292
1293 port_phy_modes[port] = phy_mode;
1294 }
1295
1296 return 0;
1297 }
1298
felix_parse_dt(struct felix * felix,phy_interface_t * port_phy_modes)1299 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
1300 {
1301 struct device *dev = felix->ocelot.dev;
1302 struct device_node *switch_node;
1303 struct device_node *ports_node;
1304 int err;
1305
1306 switch_node = dev->of_node;
1307
1308 ports_node = of_get_child_by_name(switch_node, "ports");
1309 if (!ports_node)
1310 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1311 if (!ports_node) {
1312 dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
1313 return -ENODEV;
1314 }
1315
1316 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
1317 of_node_put(ports_node);
1318
1319 return err;
1320 }
1321
felix_request_regmap_by_name(struct felix * felix,const char * resource_name)1322 static struct regmap *felix_request_regmap_by_name(struct felix *felix,
1323 const char *resource_name)
1324 {
1325 struct ocelot *ocelot = &felix->ocelot;
1326 struct resource res;
1327 int i;
1328
1329 /* In an MFD configuration, regmaps are registered directly to the
1330 * parent device before the child devices are probed, so there is no
1331 * need to initialize a new one.
1332 */
1333 if (!felix->info->resources)
1334 return dev_get_regmap(ocelot->dev->parent, resource_name);
1335
1336 for (i = 0; i < felix->info->num_resources; i++) {
1337 if (strcmp(resource_name, felix->info->resources[i].name))
1338 continue;
1339
1340 memcpy(&res, &felix->info->resources[i], sizeof(res));
1341 res.start += felix->switch_base;
1342 res.end += felix->switch_base;
1343
1344 return ocelot_regmap_init(ocelot, &res);
1345 }
1346
1347 return ERR_PTR(-ENOENT);
1348 }
1349
felix_request_regmap(struct felix * felix,enum ocelot_target target)1350 static struct regmap *felix_request_regmap(struct felix *felix,
1351 enum ocelot_target target)
1352 {
1353 const char *resource_name = felix->info->resource_names[target];
1354
1355 /* If the driver didn't provide a resource name for the target,
1356 * the resource is optional.
1357 */
1358 if (!resource_name)
1359 return NULL;
1360
1361 return felix_request_regmap_by_name(felix, resource_name);
1362 }
1363
felix_request_port_regmap(struct felix * felix,int port)1364 static struct regmap *felix_request_port_regmap(struct felix *felix, int port)
1365 {
1366 char resource_name[32];
1367
1368 sprintf(resource_name, "port%d", port);
1369
1370 return felix_request_regmap_by_name(felix, resource_name);
1371 }
1372
felix_init_structs(struct felix * felix,int num_phys_ports)1373 static int felix_init_structs(struct felix *felix, int num_phys_ports)
1374 {
1375 struct ocelot *ocelot = &felix->ocelot;
1376 phy_interface_t *port_phy_modes;
1377 struct regmap *target;
1378 int port, i, err;
1379
1380 ocelot->num_phys_ports = num_phys_ports;
1381 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
1382 sizeof(struct ocelot_port *), GFP_KERNEL);
1383 if (!ocelot->ports)
1384 return -ENOMEM;
1385
1386 ocelot->map = felix->info->map;
1387 ocelot->num_mact_rows = felix->info->num_mact_rows;
1388 ocelot->vcap = felix->info->vcap;
1389 ocelot->vcap_pol.base = felix->info->vcap_pol_base;
1390 ocelot->vcap_pol.max = felix->info->vcap_pol_max;
1391 ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
1392 ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
1393 ocelot->ops = felix->info->ops;
1394 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
1395 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
1396 ocelot->devlink = felix->ds->devlink;
1397
1398 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1399 GFP_KERNEL);
1400 if (!port_phy_modes)
1401 return -ENOMEM;
1402
1403 err = felix_parse_dt(felix, port_phy_modes);
1404 if (err) {
1405 kfree(port_phy_modes);
1406 return err;
1407 }
1408
1409 for (i = 0; i < TARGET_MAX; i++) {
1410 target = felix_request_regmap(felix, i);
1411 if (IS_ERR(target)) {
1412 dev_err(ocelot->dev,
1413 "Failed to map device memory space: %pe\n",
1414 target);
1415 kfree(port_phy_modes);
1416 return PTR_ERR(target);
1417 }
1418
1419 ocelot->targets[i] = target;
1420 }
1421
1422 err = ocelot_regfields_init(ocelot, felix->info->regfields);
1423 if (err) {
1424 dev_err(ocelot->dev, "failed to init reg fields map\n");
1425 kfree(port_phy_modes);
1426 return err;
1427 }
1428
1429 for (port = 0; port < num_phys_ports; port++) {
1430 struct ocelot_port *ocelot_port;
1431
1432 ocelot_port = devm_kzalloc(ocelot->dev,
1433 sizeof(struct ocelot_port),
1434 GFP_KERNEL);
1435 if (!ocelot_port) {
1436 dev_err(ocelot->dev,
1437 "failed to allocate port memory\n");
1438 kfree(port_phy_modes);
1439 return -ENOMEM;
1440 }
1441
1442 target = felix_request_port_regmap(felix, port);
1443 if (IS_ERR(target)) {
1444 dev_err(ocelot->dev,
1445 "Failed to map memory space for port %d: %pe\n",
1446 port, target);
1447 kfree(port_phy_modes);
1448 return PTR_ERR(target);
1449 }
1450
1451 ocelot_port->phy_mode = port_phy_modes[port];
1452 ocelot_port->ocelot = ocelot;
1453 ocelot_port->target = target;
1454 ocelot_port->index = port;
1455 ocelot->ports[port] = ocelot_port;
1456 }
1457
1458 kfree(port_phy_modes);
1459
1460 if (felix->info->mdio_bus_alloc) {
1461 err = felix->info->mdio_bus_alloc(ocelot);
1462 if (err < 0)
1463 return err;
1464 }
1465
1466 return 0;
1467 }
1468
ocelot_port_purge_txtstamp_skb(struct ocelot * ocelot,int port,struct sk_buff * skb)1469 static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
1470 struct sk_buff *skb)
1471 {
1472 struct ocelot_port *ocelot_port = ocelot->ports[port];
1473 struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
1474 struct sk_buff *skb_match = NULL, *skb_tmp;
1475 unsigned long flags;
1476
1477 if (!clone)
1478 return;
1479
1480 spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
1481
1482 skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
1483 if (skb != clone)
1484 continue;
1485 __skb_unlink(skb, &ocelot_port->tx_skbs);
1486 skb_match = skb;
1487 break;
1488 }
1489
1490 spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
1491
1492 WARN_ONCE(!skb_match,
1493 "Could not find skb clone in TX timestamping list\n");
1494 }
1495
1496 #define work_to_xmit_work(w) \
1497 container_of((w), struct felix_deferred_xmit_work, work)
1498
felix_port_deferred_xmit(struct kthread_work * work)1499 static void felix_port_deferred_xmit(struct kthread_work *work)
1500 {
1501 struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
1502 struct dsa_switch *ds = xmit_work->dp->ds;
1503 struct sk_buff *skb = xmit_work->skb;
1504 u32 rew_op = ocelot_ptp_rew_op(skb);
1505 struct ocelot *ocelot = ds->priv;
1506 int port = xmit_work->dp->index;
1507 int retries = 10;
1508
1509 ocelot_lock_inj_grp(ocelot, 0);
1510
1511 do {
1512 if (ocelot_can_inject(ocelot, 0))
1513 break;
1514
1515 cpu_relax();
1516 } while (--retries);
1517
1518 if (!retries) {
1519 ocelot_unlock_inj_grp(ocelot, 0);
1520 dev_err(ocelot->dev, "port %d failed to inject skb\n",
1521 port);
1522 ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
1523 kfree_skb(skb);
1524 return;
1525 }
1526
1527 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1528
1529 ocelot_unlock_inj_grp(ocelot, 0);
1530
1531 consume_skb(skb);
1532 kfree(xmit_work);
1533 }
1534
felix_connect_tag_protocol(struct dsa_switch * ds,enum dsa_tag_protocol proto)1535 static int felix_connect_tag_protocol(struct dsa_switch *ds,
1536 enum dsa_tag_protocol proto)
1537 {
1538 struct ocelot_8021q_tagger_data *tagger_data;
1539
1540 switch (proto) {
1541 case DSA_TAG_PROTO_OCELOT_8021Q:
1542 tagger_data = ocelot_8021q_tagger_data(ds);
1543 tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1544 return 0;
1545 case DSA_TAG_PROTO_OCELOT:
1546 case DSA_TAG_PROTO_SEVILLE:
1547 return 0;
1548 default:
1549 return -EPROTONOSUPPORT;
1550 }
1551 }
1552
felix_setup(struct dsa_switch * ds)1553 static int felix_setup(struct dsa_switch *ds)
1554 {
1555 struct ocelot *ocelot = ds->priv;
1556 struct felix *felix = ocelot_to_felix(ocelot);
1557 struct dsa_port *dp;
1558 int err;
1559
1560 err = felix_init_structs(felix, ds->num_ports);
1561 if (err)
1562 return err;
1563
1564 if (ocelot->targets[HSIO])
1565 ocelot_pll5_init(ocelot);
1566
1567 err = ocelot_init(ocelot);
1568 if (err)
1569 goto out_mdiobus_free;
1570
1571 if (ocelot->ptp) {
1572 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1573 if (err) {
1574 dev_err(ocelot->dev,
1575 "Timestamp initialization failed\n");
1576 ocelot->ptp = 0;
1577 }
1578 }
1579
1580 dsa_switch_for_each_available_port(dp, ds) {
1581 ocelot_init_port(ocelot, dp->index);
1582
1583 if (felix->info->configure_serdes)
1584 felix->info->configure_serdes(ocelot, dp->index,
1585 dp->dn);
1586
1587 /* Set the default QoS Classification based on PCP and DEI
1588 * bits of vlan tag.
1589 */
1590 felix_port_qos_map_init(ocelot, dp->index);
1591 }
1592
1593 err = ocelot_devlink_sb_register(ocelot);
1594 if (err)
1595 goto out_deinit_ports;
1596
1597 /* The initial tag protocol is NPI which won't fail during initial
1598 * setup, there's no real point in checking for errors.
1599 */
1600 felix_change_tag_protocol(ds, felix->tag_proto);
1601
1602 ds->mtu_enforcement_ingress = true;
1603 ds->assisted_learning_on_cpu_port = true;
1604 ds->fdb_isolation = true;
1605 ds->max_num_bridges = ds->num_ports;
1606
1607 return 0;
1608
1609 out_deinit_ports:
1610 dsa_switch_for_each_available_port(dp, ds)
1611 ocelot_deinit_port(ocelot, dp->index);
1612
1613 ocelot_deinit_timestamp(ocelot);
1614 ocelot_deinit(ocelot);
1615
1616 out_mdiobus_free:
1617 if (felix->info->mdio_bus_free)
1618 felix->info->mdio_bus_free(ocelot);
1619
1620 return err;
1621 }
1622
felix_teardown(struct dsa_switch * ds)1623 static void felix_teardown(struct dsa_switch *ds)
1624 {
1625 struct ocelot *ocelot = ds->priv;
1626 struct felix *felix = ocelot_to_felix(ocelot);
1627 struct dsa_port *dp;
1628
1629 rtnl_lock();
1630 if (felix->tag_proto_ops)
1631 felix->tag_proto_ops->teardown(ds);
1632 rtnl_unlock();
1633
1634 dsa_switch_for_each_available_port(dp, ds)
1635 ocelot_deinit_port(ocelot, dp->index);
1636
1637 ocelot_devlink_sb_unregister(ocelot);
1638 ocelot_deinit_timestamp(ocelot);
1639 ocelot_deinit(ocelot);
1640
1641 if (felix->info->mdio_bus_free)
1642 felix->info->mdio_bus_free(ocelot);
1643 }
1644
felix_hwtstamp_get(struct dsa_switch * ds,int port,struct ifreq * ifr)1645 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
1646 struct ifreq *ifr)
1647 {
1648 struct ocelot *ocelot = ds->priv;
1649
1650 return ocelot_hwstamp_get(ocelot, port, ifr);
1651 }
1652
felix_hwtstamp_set(struct dsa_switch * ds,int port,struct ifreq * ifr)1653 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
1654 struct ifreq *ifr)
1655 {
1656 struct ocelot *ocelot = ds->priv;
1657 struct felix *felix = ocelot_to_felix(ocelot);
1658 bool using_tag_8021q;
1659 int err;
1660
1661 err = ocelot_hwstamp_set(ocelot, port, ifr);
1662 if (err)
1663 return err;
1664
1665 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1666
1667 return felix_update_trapping_destinations(ds, using_tag_8021q);
1668 }
1669
felix_check_xtr_pkt(struct ocelot * ocelot)1670 static bool felix_check_xtr_pkt(struct ocelot *ocelot)
1671 {
1672 struct felix *felix = ocelot_to_felix(ocelot);
1673 int err = 0, grp = 0;
1674
1675 if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
1676 return false;
1677
1678 if (!felix->info->quirk_no_xtr_irq)
1679 return false;
1680
1681 ocelot_lock_xtr_grp(ocelot, grp);
1682
1683 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
1684 struct sk_buff *skb;
1685 unsigned int type;
1686
1687 err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
1688 if (err)
1689 goto out;
1690
1691 /* We trap to the CPU port module all PTP frames, but
1692 * felix_rxtstamp() only gets called for event frames.
1693 * So we need to avoid sending duplicate general
1694 * message frames by running a second BPF classifier
1695 * here and dropping those.
1696 */
1697 __skb_push(skb, ETH_HLEN);
1698
1699 type = ptp_classify_raw(skb);
1700
1701 __skb_pull(skb, ETH_HLEN);
1702
1703 if (type == PTP_CLASS_NONE) {
1704 kfree_skb(skb);
1705 continue;
1706 }
1707
1708 netif_rx(skb);
1709 }
1710
1711 out:
1712 if (err < 0) {
1713 dev_err_ratelimited(ocelot->dev,
1714 "Error during packet extraction: %pe\n",
1715 ERR_PTR(err));
1716 ocelot_drain_cpu_queue(ocelot, 0);
1717 }
1718
1719 ocelot_unlock_xtr_grp(ocelot, grp);
1720
1721 return true;
1722 }
1723
felix_rxtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb,unsigned int type)1724 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
1725 struct sk_buff *skb, unsigned int type)
1726 {
1727 u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
1728 struct skb_shared_hwtstamps *shhwtstamps;
1729 struct ocelot *ocelot = ds->priv;
1730 struct timespec64 ts;
1731 u32 tstamp_hi;
1732 u64 tstamp;
1733
1734 switch (type & PTP_CLASS_PMASK) {
1735 case PTP_CLASS_L2:
1736 if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L2))
1737 return false;
1738 break;
1739 case PTP_CLASS_IPV4:
1740 case PTP_CLASS_IPV6:
1741 if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L4))
1742 return false;
1743 break;
1744 }
1745
1746 /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1747 * for RX timestamping. Then free it, and poll for its copy through
1748 * MMIO in the CPU port module, and inject that into the stack from
1749 * ocelot_xtr_poll().
1750 */
1751 if (felix_check_xtr_pkt(ocelot)) {
1752 kfree_skb(skb);
1753 return true;
1754 }
1755
1756 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1757 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1758
1759 tstamp_hi = tstamp >> 32;
1760 if ((tstamp & 0xffffffff) < tstamp_lo)
1761 tstamp_hi--;
1762
1763 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
1764
1765 shhwtstamps = skb_hwtstamps(skb);
1766 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1767 shhwtstamps->hwtstamp = tstamp;
1768 return false;
1769 }
1770
felix_txtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb)1771 static void felix_txtstamp(struct dsa_switch *ds, int port,
1772 struct sk_buff *skb)
1773 {
1774 struct ocelot *ocelot = ds->priv;
1775 struct sk_buff *clone = NULL;
1776
1777 if (!ocelot->ptp)
1778 return;
1779
1780 if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
1781 dev_err_ratelimited(ds->dev,
1782 "port %d delivering skb without TX timestamp\n",
1783 port);
1784 return;
1785 }
1786
1787 if (clone)
1788 OCELOT_SKB_CB(skb)->clone = clone;
1789 }
1790
felix_change_mtu(struct dsa_switch * ds,int port,int new_mtu)1791 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
1792 {
1793 struct ocelot *ocelot = ds->priv;
1794 struct ocelot_port *ocelot_port = ocelot->ports[port];
1795
1796 ocelot_port_set_maxlen(ocelot, port, new_mtu);
1797
1798 mutex_lock(&ocelot->fwd_domain_lock);
1799
1800 if (ocelot_port->taprio && ocelot->ops->tas_guard_bands_update)
1801 ocelot->ops->tas_guard_bands_update(ocelot, port);
1802
1803 mutex_unlock(&ocelot->fwd_domain_lock);
1804
1805 return 0;
1806 }
1807
felix_get_max_mtu(struct dsa_switch * ds,int port)1808 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
1809 {
1810 struct ocelot *ocelot = ds->priv;
1811
1812 return ocelot_get_max_mtu(ocelot, port);
1813 }
1814
felix_cls_flower_add(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1815 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
1816 struct flow_cls_offload *cls, bool ingress)
1817 {
1818 struct ocelot *ocelot = ds->priv;
1819 struct felix *felix = ocelot_to_felix(ocelot);
1820 bool using_tag_8021q;
1821 int err;
1822
1823 err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
1824 if (err)
1825 return err;
1826
1827 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1828
1829 return felix_update_trapping_destinations(ds, using_tag_8021q);
1830 }
1831
felix_cls_flower_del(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1832 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
1833 struct flow_cls_offload *cls, bool ingress)
1834 {
1835 struct ocelot *ocelot = ds->priv;
1836
1837 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
1838 }
1839
felix_cls_flower_stats(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1840 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
1841 struct flow_cls_offload *cls, bool ingress)
1842 {
1843 struct ocelot *ocelot = ds->priv;
1844
1845 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
1846 }
1847
felix_port_policer_add(struct dsa_switch * ds,int port,struct dsa_mall_policer_tc_entry * policer)1848 static int felix_port_policer_add(struct dsa_switch *ds, int port,
1849 struct dsa_mall_policer_tc_entry *policer)
1850 {
1851 struct ocelot *ocelot = ds->priv;
1852 struct ocelot_policer pol = {
1853 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
1854 .burst = policer->burst,
1855 };
1856
1857 return ocelot_port_policer_add(ocelot, port, &pol);
1858 }
1859
felix_port_policer_del(struct dsa_switch * ds,int port)1860 static void felix_port_policer_del(struct dsa_switch *ds, int port)
1861 {
1862 struct ocelot *ocelot = ds->priv;
1863
1864 ocelot_port_policer_del(ocelot, port);
1865 }
1866
felix_port_mirror_add(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror,bool ingress,struct netlink_ext_ack * extack)1867 static int felix_port_mirror_add(struct dsa_switch *ds, int port,
1868 struct dsa_mall_mirror_tc_entry *mirror,
1869 bool ingress, struct netlink_ext_ack *extack)
1870 {
1871 struct ocelot *ocelot = ds->priv;
1872
1873 return ocelot_port_mirror_add(ocelot, port, mirror->to_local_port,
1874 ingress, extack);
1875 }
1876
felix_port_mirror_del(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror)1877 static void felix_port_mirror_del(struct dsa_switch *ds, int port,
1878 struct dsa_mall_mirror_tc_entry *mirror)
1879 {
1880 struct ocelot *ocelot = ds->priv;
1881
1882 ocelot_port_mirror_del(ocelot, port, mirror->ingress);
1883 }
1884
felix_port_setup_tc(struct dsa_switch * ds,int port,enum tc_setup_type type,void * type_data)1885 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
1886 enum tc_setup_type type,
1887 void *type_data)
1888 {
1889 struct ocelot *ocelot = ds->priv;
1890 struct felix *felix = ocelot_to_felix(ocelot);
1891
1892 if (felix->info->port_setup_tc)
1893 return felix->info->port_setup_tc(ds, port, type, type_data);
1894 else
1895 return -EOPNOTSUPP;
1896 }
1897
felix_sb_pool_get(struct dsa_switch * ds,unsigned int sb_index,u16 pool_index,struct devlink_sb_pool_info * pool_info)1898 static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
1899 u16 pool_index,
1900 struct devlink_sb_pool_info *pool_info)
1901 {
1902 struct ocelot *ocelot = ds->priv;
1903
1904 return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
1905 }
1906
felix_sb_pool_set(struct dsa_switch * ds,unsigned int sb_index,u16 pool_index,u32 size,enum devlink_sb_threshold_type threshold_type,struct netlink_ext_ack * extack)1907 static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
1908 u16 pool_index, u32 size,
1909 enum devlink_sb_threshold_type threshold_type,
1910 struct netlink_ext_ack *extack)
1911 {
1912 struct ocelot *ocelot = ds->priv;
1913
1914 return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
1915 threshold_type, extack);
1916 }
1917
felix_sb_port_pool_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 * p_threshold)1918 static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
1919 unsigned int sb_index, u16 pool_index,
1920 u32 *p_threshold)
1921 {
1922 struct ocelot *ocelot = ds->priv;
1923
1924 return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
1925 p_threshold);
1926 }
1927
felix_sb_port_pool_set(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1928 static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
1929 unsigned int sb_index, u16 pool_index,
1930 u32 threshold, struct netlink_ext_ack *extack)
1931 {
1932 struct ocelot *ocelot = ds->priv;
1933
1934 return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
1935 threshold, extack);
1936 }
1937
felix_sb_tc_pool_bind_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 * p_pool_index,u32 * p_threshold)1938 static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
1939 unsigned int sb_index, u16 tc_index,
1940 enum devlink_sb_pool_type pool_type,
1941 u16 *p_pool_index, u32 *p_threshold)
1942 {
1943 struct ocelot *ocelot = ds->priv;
1944
1945 return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
1946 pool_type, p_pool_index,
1947 p_threshold);
1948 }
1949
felix_sb_tc_pool_bind_set(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1950 static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
1951 unsigned int sb_index, u16 tc_index,
1952 enum devlink_sb_pool_type pool_type,
1953 u16 pool_index, u32 threshold,
1954 struct netlink_ext_ack *extack)
1955 {
1956 struct ocelot *ocelot = ds->priv;
1957
1958 return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
1959 pool_type, pool_index, threshold,
1960 extack);
1961 }
1962
felix_sb_occ_snapshot(struct dsa_switch * ds,unsigned int sb_index)1963 static int felix_sb_occ_snapshot(struct dsa_switch *ds,
1964 unsigned int sb_index)
1965 {
1966 struct ocelot *ocelot = ds->priv;
1967
1968 return ocelot_sb_occ_snapshot(ocelot, sb_index);
1969 }
1970
felix_sb_occ_max_clear(struct dsa_switch * ds,unsigned int sb_index)1971 static int felix_sb_occ_max_clear(struct dsa_switch *ds,
1972 unsigned int sb_index)
1973 {
1974 struct ocelot *ocelot = ds->priv;
1975
1976 return ocelot_sb_occ_max_clear(ocelot, sb_index);
1977 }
1978
felix_sb_occ_port_pool_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 * p_cur,u32 * p_max)1979 static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
1980 unsigned int sb_index, u16 pool_index,
1981 u32 *p_cur, u32 *p_max)
1982 {
1983 struct ocelot *ocelot = ds->priv;
1984
1985 return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
1986 p_cur, p_max);
1987 }
1988
felix_sb_occ_tc_port_bind_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u32 * p_cur,u32 * p_max)1989 static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
1990 unsigned int sb_index, u16 tc_index,
1991 enum devlink_sb_pool_type pool_type,
1992 u32 *p_cur, u32 *p_max)
1993 {
1994 struct ocelot *ocelot = ds->priv;
1995
1996 return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
1997 pool_type, p_cur, p_max);
1998 }
1999
felix_mrp_add(struct dsa_switch * ds,int port,const struct switchdev_obj_mrp * mrp)2000 static int felix_mrp_add(struct dsa_switch *ds, int port,
2001 const struct switchdev_obj_mrp *mrp)
2002 {
2003 struct ocelot *ocelot = ds->priv;
2004
2005 return ocelot_mrp_add(ocelot, port, mrp);
2006 }
2007
felix_mrp_del(struct dsa_switch * ds,int port,const struct switchdev_obj_mrp * mrp)2008 static int felix_mrp_del(struct dsa_switch *ds, int port,
2009 const struct switchdev_obj_mrp *mrp)
2010 {
2011 struct ocelot *ocelot = ds->priv;
2012
2013 return ocelot_mrp_add(ocelot, port, mrp);
2014 }
2015
2016 static int
felix_mrp_add_ring_role(struct dsa_switch * ds,int port,const struct switchdev_obj_ring_role_mrp * mrp)2017 felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
2018 const struct switchdev_obj_ring_role_mrp *mrp)
2019 {
2020 struct ocelot *ocelot = ds->priv;
2021
2022 return ocelot_mrp_add_ring_role(ocelot, port, mrp);
2023 }
2024
2025 static int
felix_mrp_del_ring_role(struct dsa_switch * ds,int port,const struct switchdev_obj_ring_role_mrp * mrp)2026 felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
2027 const struct switchdev_obj_ring_role_mrp *mrp)
2028 {
2029 struct ocelot *ocelot = ds->priv;
2030
2031 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
2032 }
2033
felix_port_get_default_prio(struct dsa_switch * ds,int port)2034 static int felix_port_get_default_prio(struct dsa_switch *ds, int port)
2035 {
2036 struct ocelot *ocelot = ds->priv;
2037
2038 return ocelot_port_get_default_prio(ocelot, port);
2039 }
2040
felix_port_set_default_prio(struct dsa_switch * ds,int port,u8 prio)2041 static int felix_port_set_default_prio(struct dsa_switch *ds, int port,
2042 u8 prio)
2043 {
2044 struct ocelot *ocelot = ds->priv;
2045
2046 return ocelot_port_set_default_prio(ocelot, port, prio);
2047 }
2048
felix_port_get_dscp_prio(struct dsa_switch * ds,int port,u8 dscp)2049 static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)
2050 {
2051 struct ocelot *ocelot = ds->priv;
2052
2053 return ocelot_port_get_dscp_prio(ocelot, port, dscp);
2054 }
2055
felix_port_add_dscp_prio(struct dsa_switch * ds,int port,u8 dscp,u8 prio)2056 static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
2057 u8 prio)
2058 {
2059 struct ocelot *ocelot = ds->priv;
2060
2061 return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);
2062 }
2063
felix_port_del_dscp_prio(struct dsa_switch * ds,int port,u8 dscp,u8 prio)2064 static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
2065 u8 prio)
2066 {
2067 struct ocelot *ocelot = ds->priv;
2068
2069 return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);
2070 }
2071
felix_get_mm(struct dsa_switch * ds,int port,struct ethtool_mm_state * state)2072 static int felix_get_mm(struct dsa_switch *ds, int port,
2073 struct ethtool_mm_state *state)
2074 {
2075 struct ocelot *ocelot = ds->priv;
2076
2077 return ocelot_port_get_mm(ocelot, port, state);
2078 }
2079
felix_set_mm(struct dsa_switch * ds,int port,struct ethtool_mm_cfg * cfg,struct netlink_ext_ack * extack)2080 static int felix_set_mm(struct dsa_switch *ds, int port,
2081 struct ethtool_mm_cfg *cfg,
2082 struct netlink_ext_ack *extack)
2083 {
2084 struct ocelot *ocelot = ds->priv;
2085
2086 return ocelot_port_set_mm(ocelot, port, cfg, extack);
2087 }
2088
felix_get_mm_stats(struct dsa_switch * ds,int port,struct ethtool_mm_stats * stats)2089 static void felix_get_mm_stats(struct dsa_switch *ds, int port,
2090 struct ethtool_mm_stats *stats)
2091 {
2092 struct ocelot *ocelot = ds->priv;
2093
2094 ocelot_port_get_mm_stats(ocelot, port, stats);
2095 }
2096
2097 const struct dsa_switch_ops felix_switch_ops = {
2098 .get_tag_protocol = felix_get_tag_protocol,
2099 .change_tag_protocol = felix_change_tag_protocol,
2100 .connect_tag_protocol = felix_connect_tag_protocol,
2101 .setup = felix_setup,
2102 .teardown = felix_teardown,
2103 .set_ageing_time = felix_set_ageing_time,
2104 .get_mm = felix_get_mm,
2105 .set_mm = felix_set_mm,
2106 .get_mm_stats = felix_get_mm_stats,
2107 .get_stats64 = felix_get_stats64,
2108 .get_pause_stats = felix_get_pause_stats,
2109 .get_rmon_stats = felix_get_rmon_stats,
2110 .get_eth_ctrl_stats = felix_get_eth_ctrl_stats,
2111 .get_eth_mac_stats = felix_get_eth_mac_stats,
2112 .get_eth_phy_stats = felix_get_eth_phy_stats,
2113 .get_strings = felix_get_strings,
2114 .get_ethtool_stats = felix_get_ethtool_stats,
2115 .get_sset_count = felix_get_sset_count,
2116 .get_ts_info = felix_get_ts_info,
2117 .phylink_get_caps = felix_phylink_get_caps,
2118 .phylink_mac_config = felix_phylink_mac_config,
2119 .phylink_mac_select_pcs = felix_phylink_mac_select_pcs,
2120 .phylink_mac_link_down = felix_phylink_mac_link_down,
2121 .phylink_mac_link_up = felix_phylink_mac_link_up,
2122 .port_enable = felix_port_enable,
2123 .port_fast_age = felix_port_fast_age,
2124 .port_fdb_dump = felix_fdb_dump,
2125 .port_fdb_add = felix_fdb_add,
2126 .port_fdb_del = felix_fdb_del,
2127 .lag_fdb_add = felix_lag_fdb_add,
2128 .lag_fdb_del = felix_lag_fdb_del,
2129 .port_mdb_add = felix_mdb_add,
2130 .port_mdb_del = felix_mdb_del,
2131 .port_pre_bridge_flags = felix_pre_bridge_flags,
2132 .port_bridge_flags = felix_bridge_flags,
2133 .port_bridge_join = felix_bridge_join,
2134 .port_bridge_leave = felix_bridge_leave,
2135 .port_lag_join = felix_lag_join,
2136 .port_lag_leave = felix_lag_leave,
2137 .port_lag_change = felix_lag_change,
2138 .port_stp_state_set = felix_bridge_stp_state_set,
2139 .port_vlan_filtering = felix_vlan_filtering,
2140 .port_vlan_add = felix_vlan_add,
2141 .port_vlan_del = felix_vlan_del,
2142 .port_hwtstamp_get = felix_hwtstamp_get,
2143 .port_hwtstamp_set = felix_hwtstamp_set,
2144 .port_rxtstamp = felix_rxtstamp,
2145 .port_txtstamp = felix_txtstamp,
2146 .port_change_mtu = felix_change_mtu,
2147 .port_max_mtu = felix_get_max_mtu,
2148 .port_policer_add = felix_port_policer_add,
2149 .port_policer_del = felix_port_policer_del,
2150 .port_mirror_add = felix_port_mirror_add,
2151 .port_mirror_del = felix_port_mirror_del,
2152 .cls_flower_add = felix_cls_flower_add,
2153 .cls_flower_del = felix_cls_flower_del,
2154 .cls_flower_stats = felix_cls_flower_stats,
2155 .port_setup_tc = felix_port_setup_tc,
2156 .devlink_sb_pool_get = felix_sb_pool_get,
2157 .devlink_sb_pool_set = felix_sb_pool_set,
2158 .devlink_sb_port_pool_get = felix_sb_port_pool_get,
2159 .devlink_sb_port_pool_set = felix_sb_port_pool_set,
2160 .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
2161 .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
2162 .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
2163 .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
2164 .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
2165 .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
2166 .port_mrp_add = felix_mrp_add,
2167 .port_mrp_del = felix_mrp_del,
2168 .port_mrp_add_ring_role = felix_mrp_add_ring_role,
2169 .port_mrp_del_ring_role = felix_mrp_del_ring_role,
2170 .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
2171 .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
2172 .port_get_default_prio = felix_port_get_default_prio,
2173 .port_set_default_prio = felix_port_set_default_prio,
2174 .port_get_dscp_prio = felix_port_get_dscp_prio,
2175 .port_add_dscp_prio = felix_port_add_dscp_prio,
2176 .port_del_dscp_prio = felix_port_del_dscp_prio,
2177 .port_set_host_flood = felix_port_set_host_flood,
2178 .port_change_master = felix_port_change_master,
2179 };
2180 EXPORT_SYMBOL_GPL(felix_switch_ops);
2181
felix_port_to_netdev(struct ocelot * ocelot,int port)2182 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
2183 {
2184 struct felix *felix = ocelot_to_felix(ocelot);
2185 struct dsa_switch *ds = felix->ds;
2186
2187 if (!dsa_is_user_port(ds, port))
2188 return NULL;
2189
2190 return dsa_to_port(ds, port)->slave;
2191 }
2192 EXPORT_SYMBOL_GPL(felix_port_to_netdev);
2193
felix_netdev_to_port(struct net_device * dev)2194 int felix_netdev_to_port(struct net_device *dev)
2195 {
2196 struct dsa_port *dp;
2197
2198 dp = dsa_port_from_netdev(dev);
2199 if (IS_ERR(dp))
2200 return -EINVAL;
2201
2202 return dp->index;
2203 }
2204 EXPORT_SYMBOL_GPL(felix_netdev_to_port);
2205
2206 MODULE_DESCRIPTION("Felix DSA library");
2207 MODULE_LICENSE("GPL");
2208