1 /* 2 * Marvell 88E6xxx System Management Interface (SMI) support 3 * 4 * Copyright (c) 2008 Marvell Semiconductor 5 * 6 * Copyright (c) 2019 Vivien Didelot <vivien.didelot@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #include "chip.h" 15 #include "smi.h" 16 17 /* The switch ADDR[4:1] configuration pins define the chip SMI device address 18 * (ADDR[0] is always zero, thus only even SMI addresses can be strapped). 19 * 20 * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it 21 * is the only device connected to the SMI master. In this mode it responds to 22 * all 32 possible SMI addresses, and thus maps directly the internal devices. 23 * 24 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing 25 * multiple devices to share the SMI interface. In this mode it responds to only 26 * 2 registers, used to indirectly access the internal SMI devices. 27 */ 28 29 static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip, 30 int dev, int reg, u16 *data) 31 { 32 int ret; 33 34 ret = mdiobus_read_nested(chip->bus, dev, reg); 35 if (ret < 0) 36 return ret; 37 38 *data = ret & 0xffff; 39 40 return 0; 41 } 42 43 static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip, 44 int dev, int reg, u16 data) 45 { 46 int ret; 47 48 ret = mdiobus_write_nested(chip->bus, dev, reg, data); 49 if (ret < 0) 50 return ret; 51 52 return 0; 53 } 54 55 static int mv88e6xxx_smi_direct_wait(struct mv88e6xxx_chip *chip, 56 int dev, int reg, int bit, int val) 57 { 58 u16 data; 59 int err; 60 int i; 61 62 for (i = 0; i < 16; i++) { 63 err = mv88e6xxx_smi_direct_read(chip, dev, reg, &data); 64 if (err) 65 return err; 66 67 if (!!(data >> bit) == !!val) 68 return 0; 69 } 70 71 return -ETIMEDOUT; 72 } 73 74 static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = { 75 .read = mv88e6xxx_smi_direct_read, 76 .write = mv88e6xxx_smi_direct_write, 77 }; 78 79 /* Offset 0x00: SMI Command Register 80 * Offset 0x01: SMI Data Register 81 */ 82 83 static int mv88e6xxx_smi_indirect_read(struct mv88e6xxx_chip *chip, 84 int dev, int reg, u16 *data) 85 { 86 int err; 87 88 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, 89 MV88E6XXX_SMI_CMD, 15, 0); 90 if (err) 91 return err; 92 93 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, 94 MV88E6XXX_SMI_CMD, 95 MV88E6XXX_SMI_CMD_BUSY | 96 MV88E6XXX_SMI_CMD_MODE_22 | 97 MV88E6XXX_SMI_CMD_OP_22_READ | 98 (dev << 5) | reg); 99 if (err) 100 return err; 101 102 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, 103 MV88E6XXX_SMI_CMD, 15, 0); 104 if (err) 105 return err; 106 107 return mv88e6xxx_smi_direct_read(chip, chip->sw_addr, 108 MV88E6XXX_SMI_DATA, data); 109 } 110 111 static int mv88e6xxx_smi_indirect_write(struct mv88e6xxx_chip *chip, 112 int dev, int reg, u16 data) 113 { 114 int err; 115 116 err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, 117 MV88E6XXX_SMI_CMD, 15, 0); 118 if (err) 119 return err; 120 121 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, 122 MV88E6XXX_SMI_DATA, data); 123 if (err) 124 return err; 125 126 err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr, 127 MV88E6XXX_SMI_CMD, 128 MV88E6XXX_SMI_CMD_BUSY | 129 MV88E6XXX_SMI_CMD_MODE_22 | 130 MV88E6XXX_SMI_CMD_OP_22_WRITE | 131 (dev << 5) | reg); 132 if (err) 133 return err; 134 135 return mv88e6xxx_smi_direct_wait(chip, chip->sw_addr, 136 MV88E6XXX_SMI_CMD, 15, 0); 137 } 138 139 static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = { 140 .read = mv88e6xxx_smi_indirect_read, 141 .write = mv88e6xxx_smi_indirect_write, 142 }; 143 144 int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip, 145 struct mii_bus *bus, int sw_addr) 146 { 147 if (sw_addr == 0) 148 chip->smi_ops = &mv88e6xxx_smi_direct_ops; 149 else if (chip->info->multi_chip) 150 chip->smi_ops = &mv88e6xxx_smi_indirect_ops; 151 else 152 return -EINVAL; 153 154 chip->bus = bus; 155 chip->sw_addr = sw_addr; 156 157 return 0; 158 } 159