1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Marvell 88E6xxx SERDES manipulation, via SMI bus 4 * 5 * Copyright (c) 2008 Marvell Semiconductor 6 * 7 * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch> 8 */ 9 10 #ifndef _MV88E6XXX_SERDES_H 11 #define _MV88E6XXX_SERDES_H 12 13 #include "chip.h" 14 15 #define MV88E6352_ADDR_SERDES 0x0f 16 #define MV88E6352_SERDES_PAGE_FIBER 0x01 17 #define MV88E6352_SERDES_IRQ 0x0b 18 #define MV88E6352_SERDES_INT_ENABLE 0x12 19 #define MV88E6352_SERDES_INT_SPEED_CHANGE BIT(14) 20 #define MV88E6352_SERDES_INT_DUPLEX_CHANGE BIT(13) 21 #define MV88E6352_SERDES_INT_PAGE_RX BIT(12) 22 #define MV88E6352_SERDES_INT_AN_COMPLETE BIT(11) 23 #define MV88E6352_SERDES_INT_LINK_CHANGE BIT(10) 24 #define MV88E6352_SERDES_INT_SYMBOL_ERROR BIT(9) 25 #define MV88E6352_SERDES_INT_FALSE_CARRIER BIT(8) 26 #define MV88E6352_SERDES_INT_FIFO_OVER_UNDER BIT(7) 27 #define MV88E6352_SERDES_INT_FIBRE_ENERGY BIT(4) 28 #define MV88E6352_SERDES_INT_STATUS 0x13 29 30 31 #define MV88E6341_ADDR_SERDES 0x15 32 33 #define MV88E6390_PORT9_LANE0 0x09 34 #define MV88E6390_PORT9_LANE1 0x12 35 #define MV88E6390_PORT9_LANE2 0x13 36 #define MV88E6390_PORT9_LANE3 0x14 37 #define MV88E6390_PORT10_LANE0 0x0a 38 #define MV88E6390_PORT10_LANE1 0x15 39 #define MV88E6390_PORT10_LANE2 0x16 40 #define MV88E6390_PORT10_LANE3 0x17 41 42 /* 10GBASE-R and 10GBASE-X4/X2 */ 43 #define MV88E6390_PCS_CONTROL_1 0x1000 44 #define MV88E6390_PCS_CONTROL_1_RESET BIT(15) 45 #define MV88E6390_PCS_CONTROL_1_LOOPBACK BIT(14) 46 #define MV88E6390_PCS_CONTROL_1_SPEED BIT(13) 47 #define MV88E6390_PCS_CONTROL_1_PDOWN BIT(11) 48 49 /* 1000BASE-X and SGMII */ 50 #define MV88E6390_SGMII_CONTROL 0x2000 51 #define MV88E6390_SGMII_CONTROL_RESET BIT(15) 52 #define MV88E6390_SGMII_CONTROL_LOOPBACK BIT(14) 53 #define MV88E6390_SGMII_CONTROL_PDOWN BIT(11) 54 #define MV88E6390_SGMII_STATUS 0x2001 55 #define MV88E6390_SGMII_STATUS_AN_DONE BIT(5) 56 #define MV88E6390_SGMII_STATUS_REMOTE_FAULT BIT(4) 57 #define MV88E6390_SGMII_STATUS_LINK BIT(2) 58 #define MV88E6390_SGMII_INT_ENABLE 0xa001 59 #define MV88E6390_SGMII_INT_SPEED_CHANGE BIT(14) 60 #define MV88E6390_SGMII_INT_DUPLEX_CHANGE BIT(13) 61 #define MV88E6390_SGMII_INT_PAGE_RX BIT(12) 62 #define MV88E6390_SGMII_INT_AN_COMPLETE BIT(11) 63 #define MV88E6390_SGMII_INT_LINK_DOWN BIT(10) 64 #define MV88E6390_SGMII_INT_LINK_UP BIT(9) 65 #define MV88E6390_SGMII_INT_SYMBOL_ERROR BIT(8) 66 #define MV88E6390_SGMII_INT_FALSE_CARRIER BIT(7) 67 #define MV88E6390_SGMII_INT_STATUS 0xa002 68 #define MV88E6390_SGMII_PHY_STATUS 0xa003 69 #define MV88E6390_SGMII_PHY_STATUS_SPEED_MASK GENMASK(15, 14) 70 #define MV88E6390_SGMII_PHY_STATUS_SPEED_1000 0x8000 71 #define MV88E6390_SGMII_PHY_STATUS_SPEED_100 0x4000 72 #define MV88E6390_SGMII_PHY_STATUS_SPEED_10 0x0000 73 #define MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL BIT(13) 74 #define MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID BIT(11) 75 #define MV88E6390_SGMII_PHY_STATUS_LINK BIT(10) 76 77 int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port); 78 int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); 79 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); 80 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); 81 int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); 82 int mv88e6390_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port); 83 void mv88e6390_serdes_irq_free(struct mv88e6xxx_chip *chip, int port); 84 int mv88e6390x_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port); 85 void mv88e6390x_serdes_irq_free(struct mv88e6xxx_chip *chip, int port); 86 int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port); 87 int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip, 88 int port, uint8_t *data); 89 int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port, 90 uint64_t *data); 91 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, 92 int lane); 93 int mv88e6390_serdes_irq_disable(struct mv88e6xxx_chip *chip, int port, 94 int lane); 95 int mv88e6352_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port); 96 void mv88e6352_serdes_irq_free(struct mv88e6xxx_chip *chip, int port); 97 98 99 #endif 100