xref: /openbmc/linux/drivers/net/dsa/mv88e6xxx/serdes.h (revision 6d99a79c)
1 /*
2  * Marvell 88E6xxx SERDES manipulation, via SMI bus
3  *
4  * Copyright (c) 2008 Marvell Semiconductor
5  *
6  * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13 
14 #ifndef _MV88E6XXX_SERDES_H
15 #define _MV88E6XXX_SERDES_H
16 
17 #include "chip.h"
18 
19 #define MV88E6352_ADDR_SERDES		0x0f
20 #define MV88E6352_SERDES_PAGE_FIBER	0x01
21 #define MV88E6352_SERDES_IRQ		0x0b
22 #define MV88E6352_SERDES_INT_ENABLE	0x12
23 #define MV88E6352_SERDES_INT_SPEED_CHANGE	BIT(14)
24 #define MV88E6352_SERDES_INT_DUPLEX_CHANGE	BIT(13)
25 #define MV88E6352_SERDES_INT_PAGE_RX		BIT(12)
26 #define MV88E6352_SERDES_INT_AN_COMPLETE	BIT(11)
27 #define MV88E6352_SERDES_INT_LINK_CHANGE	BIT(10)
28 #define MV88E6352_SERDES_INT_SYMBOL_ERROR	BIT(9)
29 #define MV88E6352_SERDES_INT_FALSE_CARRIER	BIT(8)
30 #define MV88E6352_SERDES_INT_FIFO_OVER_UNDER	BIT(7)
31 #define MV88E6352_SERDES_INT_FIBRE_ENERGY	BIT(4)
32 #define MV88E6352_SERDES_INT_STATUS	0x13
33 
34 
35 #define MV88E6341_ADDR_SERDES		0x15
36 
37 #define MV88E6390_PORT9_LANE0		0x09
38 #define MV88E6390_PORT9_LANE1		0x12
39 #define MV88E6390_PORT9_LANE2		0x13
40 #define MV88E6390_PORT9_LANE3		0x14
41 #define MV88E6390_PORT10_LANE0		0x0a
42 #define MV88E6390_PORT10_LANE1		0x15
43 #define MV88E6390_PORT10_LANE2		0x16
44 #define MV88E6390_PORT10_LANE3		0x17
45 
46 /* 10GBASE-R and 10GBASE-X4/X2 */
47 #define MV88E6390_PCS_CONTROL_1		0x1000
48 #define MV88E6390_PCS_CONTROL_1_RESET		BIT(15)
49 #define MV88E6390_PCS_CONTROL_1_LOOPBACK	BIT(14)
50 #define MV88E6390_PCS_CONTROL_1_SPEED		BIT(13)
51 #define MV88E6390_PCS_CONTROL_1_PDOWN		BIT(11)
52 
53 /* 1000BASE-X and SGMII */
54 #define MV88E6390_SGMII_CONTROL		0x2000
55 #define MV88E6390_SGMII_CONTROL_RESET		BIT(15)
56 #define MV88E6390_SGMII_CONTROL_LOOPBACK	BIT(14)
57 #define MV88E6390_SGMII_CONTROL_PDOWN		BIT(11)
58 #define MV88E6390_SGMII_STATUS		0x2001
59 #define MV88E6390_SGMII_STATUS_AN_DONE		BIT(5)
60 #define MV88E6390_SGMII_STATUS_REMOTE_FAULT	BIT(4)
61 #define MV88E6390_SGMII_STATUS_LINK		BIT(2)
62 #define MV88E6390_SGMII_INT_ENABLE	0xa001
63 #define MV88E6390_SGMII_INT_SPEED_CHANGE	BIT(14)
64 #define MV88E6390_SGMII_INT_DUPLEX_CHANGE	BIT(13)
65 #define MV88E6390_SGMII_INT_PAGE_RX		BIT(12)
66 #define MV88E6390_SGMII_INT_AN_COMPLETE		BIT(11)
67 #define MV88E6390_SGMII_INT_LINK_DOWN		BIT(10)
68 #define MV88E6390_SGMII_INT_LINK_UP		BIT(9)
69 #define MV88E6390_SGMII_INT_SYMBOL_ERROR	BIT(8)
70 #define MV88E6390_SGMII_INT_FALSE_CARRIER	BIT(7)
71 #define MV88E6390_SGMII_INT_STATUS	0xa002
72 
73 int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
74 int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
75 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
76 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
77 int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
78 int mv88e6390_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port);
79 void mv88e6390_serdes_irq_free(struct mv88e6xxx_chip *chip, int port);
80 int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port);
81 int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
82 				 int port, uint8_t *data);
83 int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
84 			       uint64_t *data);
85 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,
86 				int lane);
87 int mv88e6390_serdes_irq_disable(struct mv88e6xxx_chip *chip, int port,
88 				 int lane);
89 int mv88e6352_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port);
90 void mv88e6352_serdes_irq_free(struct mv88e6xxx_chip *chip, int port);
91 
92 
93 #endif
94