xref: /openbmc/linux/drivers/net/dsa/mv88e6xxx/serdes.h (revision 4d5f2ba7)
16d91782fSAndrew Lunn /*
26d91782fSAndrew Lunn  * Marvell 88E6xxx SERDES manipulation, via SMI bus
36d91782fSAndrew Lunn  *
46d91782fSAndrew Lunn  * Copyright (c) 2008 Marvell Semiconductor
56d91782fSAndrew Lunn  *
66d91782fSAndrew Lunn  * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch>
76d91782fSAndrew Lunn  *
86d91782fSAndrew Lunn  * This program is free software; you can redistribute it and/or modify
96d91782fSAndrew Lunn  * it under the terms of the GNU General Public License as published by
106d91782fSAndrew Lunn  * the Free Software Foundation; either version 2 of the License, or
116d91782fSAndrew Lunn  * (at your option) any later version.
126d91782fSAndrew Lunn  */
136d91782fSAndrew Lunn 
146d91782fSAndrew Lunn #ifndef _MV88E6XXX_SERDES_H
156d91782fSAndrew Lunn #define _MV88E6XXX_SERDES_H
166d91782fSAndrew Lunn 
174d5f2ba7SVivien Didelot #include "chip.h"
186d91782fSAndrew Lunn 
196d91782fSAndrew Lunn #define MV88E6352_ADDR_SERDES		0x0f
206d91782fSAndrew Lunn #define MV88E6352_SERDES_PAGE_FIBER	0x01
216d91782fSAndrew Lunn 
226335e9f2SAndrew Lunn #define MV88E6390_PORT9_LANE0		0x09
236335e9f2SAndrew Lunn #define MV88E6390_PORT9_LANE1		0x12
246335e9f2SAndrew Lunn #define MV88E6390_PORT9_LANE2		0x13
256335e9f2SAndrew Lunn #define MV88E6390_PORT9_LANE3		0x14
266335e9f2SAndrew Lunn #define MV88E6390_PORT10_LANE0		0x0a
276335e9f2SAndrew Lunn #define MV88E6390_PORT10_LANE1		0x15
286335e9f2SAndrew Lunn #define MV88E6390_PORT10_LANE2		0x16
296335e9f2SAndrew Lunn #define MV88E6390_PORT10_LANE3		0x17
306335e9f2SAndrew Lunn #define MV88E6390_SERDES_DEVICE		(4 << 16)
316335e9f2SAndrew Lunn 
326335e9f2SAndrew Lunn /* 10GBASE-R and 10GBASE-X4/X2 */
336335e9f2SAndrew Lunn #define MV88E6390_PCS_CONTROL_1		0x1000
346335e9f2SAndrew Lunn #define MV88E6390_PCS_CONTROL_1_RESET		BIT(15)
356335e9f2SAndrew Lunn #define MV88E6390_PCS_CONTROL_1_LOOPBACK	BIT(14)
366335e9f2SAndrew Lunn #define MV88E6390_PCS_CONTROL_1_SPEED		BIT(13)
376335e9f2SAndrew Lunn #define MV88E6390_PCS_CONTROL_1_PDOWN		BIT(11)
386335e9f2SAndrew Lunn 
396335e9f2SAndrew Lunn /* 1000BASE-X and SGMII */
406335e9f2SAndrew Lunn #define MV88E6390_SGMII_CONTROL		0x2000
416335e9f2SAndrew Lunn #define MV88E6390_SGMII_CONTROL_RESET		BIT(15)
426335e9f2SAndrew Lunn #define MV88E6390_SGMII_CONTROL_LOOPBACK	BIT(14)
436335e9f2SAndrew Lunn #define MV88E6390_SGMII_CONTROL_PDOWN		BIT(11)
446335e9f2SAndrew Lunn 
456d91782fSAndrew Lunn int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
466335e9f2SAndrew Lunn int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
476d91782fSAndrew Lunn 
486d91782fSAndrew Lunn #endif
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