16d91782fSAndrew Lunn /* 26d91782fSAndrew Lunn * Marvell 88E6xxx SERDES manipulation, via SMI bus 36d91782fSAndrew Lunn * 46d91782fSAndrew Lunn * Copyright (c) 2008 Marvell Semiconductor 56d91782fSAndrew Lunn * 66d91782fSAndrew Lunn * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch> 76d91782fSAndrew Lunn * 86d91782fSAndrew Lunn * This program is free software; you can redistribute it and/or modify 96d91782fSAndrew Lunn * it under the terms of the GNU General Public License as published by 106d91782fSAndrew Lunn * the Free Software Foundation; either version 2 of the License, or 116d91782fSAndrew Lunn * (at your option) any later version. 126d91782fSAndrew Lunn */ 136d91782fSAndrew Lunn 146d91782fSAndrew Lunn #include <linux/mii.h> 156d91782fSAndrew Lunn 164d5f2ba7SVivien Didelot #include "chip.h" 176335e9f2SAndrew Lunn #include "global2.h" 186d91782fSAndrew Lunn #include "phy.h" 196d91782fSAndrew Lunn #include "port.h" 206d91782fSAndrew Lunn #include "serdes.h" 216d91782fSAndrew Lunn 226d91782fSAndrew Lunn static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg, 236d91782fSAndrew Lunn u16 *val) 246d91782fSAndrew Lunn { 256d91782fSAndrew Lunn return mv88e6xxx_phy_page_read(chip, MV88E6352_ADDR_SERDES, 266d91782fSAndrew Lunn MV88E6352_SERDES_PAGE_FIBER, 276d91782fSAndrew Lunn reg, val); 286d91782fSAndrew Lunn } 296d91782fSAndrew Lunn 306d91782fSAndrew Lunn static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg, 316d91782fSAndrew Lunn u16 val) 326d91782fSAndrew Lunn { 336d91782fSAndrew Lunn return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES, 346d91782fSAndrew Lunn MV88E6352_SERDES_PAGE_FIBER, 356d91782fSAndrew Lunn reg, val); 366d91782fSAndrew Lunn } 376d91782fSAndrew Lunn 386d91782fSAndrew Lunn static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on) 396d91782fSAndrew Lunn { 406d91782fSAndrew Lunn u16 val, new_val; 416d91782fSAndrew Lunn int err; 426d91782fSAndrew Lunn 436d91782fSAndrew Lunn err = mv88e6352_serdes_read(chip, MII_BMCR, &val); 446d91782fSAndrew Lunn if (err) 456d91782fSAndrew Lunn return err; 466d91782fSAndrew Lunn 476d91782fSAndrew Lunn if (on) 486d91782fSAndrew Lunn new_val = val & ~BMCR_PDOWN; 496d91782fSAndrew Lunn else 506d91782fSAndrew Lunn new_val = val | BMCR_PDOWN; 516d91782fSAndrew Lunn 526d91782fSAndrew Lunn if (val != new_val) 536d91782fSAndrew Lunn err = mv88e6352_serdes_write(chip, MII_BMCR, new_val); 546d91782fSAndrew Lunn 556d91782fSAndrew Lunn return err; 566d91782fSAndrew Lunn } 576d91782fSAndrew Lunn 586d91782fSAndrew Lunn int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on) 596d91782fSAndrew Lunn { 606d91782fSAndrew Lunn int err; 616d91782fSAndrew Lunn u8 cmode; 626d91782fSAndrew Lunn 636d91782fSAndrew Lunn err = mv88e6xxx_port_get_cmode(chip, port, &cmode); 646d91782fSAndrew Lunn if (err) 656d91782fSAndrew Lunn return err; 666d91782fSAndrew Lunn 675f83dc93SVivien Didelot if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASE_X) || 685f83dc93SVivien Didelot (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X) || 695f83dc93SVivien Didelot (cmode == MV88E6XXX_PORT_STS_CMODE_SGMII)) { 706d91782fSAndrew Lunn err = mv88e6352_serdes_power_set(chip, on); 716d91782fSAndrew Lunn if (err < 0) 726d91782fSAndrew Lunn return err; 736d91782fSAndrew Lunn } 746d91782fSAndrew Lunn 756d91782fSAndrew Lunn return 0; 766d91782fSAndrew Lunn } 776335e9f2SAndrew Lunn 786335e9f2SAndrew Lunn /* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */ 796335e9f2SAndrew Lunn static int mv88e6390_serdes_10g(struct mv88e6xxx_chip *chip, int addr, bool on) 806335e9f2SAndrew Lunn { 816335e9f2SAndrew Lunn u16 val, new_val; 826335e9f2SAndrew Lunn int reg_c45; 836335e9f2SAndrew Lunn int err; 846335e9f2SAndrew Lunn 856335e9f2SAndrew Lunn reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE | 866335e9f2SAndrew Lunn MV88E6390_PCS_CONTROL_1; 876335e9f2SAndrew Lunn err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val); 886335e9f2SAndrew Lunn if (err) 896335e9f2SAndrew Lunn return err; 906335e9f2SAndrew Lunn 916335e9f2SAndrew Lunn if (on) 926335e9f2SAndrew Lunn new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET | 936335e9f2SAndrew Lunn MV88E6390_PCS_CONTROL_1_LOOPBACK | 946335e9f2SAndrew Lunn MV88E6390_PCS_CONTROL_1_PDOWN); 956335e9f2SAndrew Lunn else 966335e9f2SAndrew Lunn new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN; 976335e9f2SAndrew Lunn 986335e9f2SAndrew Lunn if (val != new_val) 996335e9f2SAndrew Lunn err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val); 1006335e9f2SAndrew Lunn 1016335e9f2SAndrew Lunn return err; 1026335e9f2SAndrew Lunn } 1036335e9f2SAndrew Lunn 1046335e9f2SAndrew Lunn /* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */ 1056335e9f2SAndrew Lunn static int mv88e6390_serdes_sgmii(struct mv88e6xxx_chip *chip, int addr, 1066335e9f2SAndrew Lunn bool on) 1076335e9f2SAndrew Lunn { 1086335e9f2SAndrew Lunn u16 val, new_val; 1096335e9f2SAndrew Lunn int reg_c45; 1106335e9f2SAndrew Lunn int err; 1116335e9f2SAndrew Lunn 1126335e9f2SAndrew Lunn reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE | 1136335e9f2SAndrew Lunn MV88E6390_SGMII_CONTROL; 1146335e9f2SAndrew Lunn err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val); 1156335e9f2SAndrew Lunn if (err) 1166335e9f2SAndrew Lunn return err; 1176335e9f2SAndrew Lunn 1186335e9f2SAndrew Lunn if (on) 1196335e9f2SAndrew Lunn new_val = val & ~(MV88E6390_SGMII_CONTROL_RESET | 1206335e9f2SAndrew Lunn MV88E6390_SGMII_CONTROL_LOOPBACK | 1216335e9f2SAndrew Lunn MV88E6390_SGMII_CONTROL_PDOWN); 1226335e9f2SAndrew Lunn else 1236335e9f2SAndrew Lunn new_val = val | MV88E6390_SGMII_CONTROL_PDOWN; 1246335e9f2SAndrew Lunn 1256335e9f2SAndrew Lunn if (val != new_val) 1266335e9f2SAndrew Lunn err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val); 1276335e9f2SAndrew Lunn 1286335e9f2SAndrew Lunn return err; 1296335e9f2SAndrew Lunn } 1306335e9f2SAndrew Lunn 1316335e9f2SAndrew Lunn static int mv88e6390_serdes_lower(struct mv88e6xxx_chip *chip, u8 cmode, 1326335e9f2SAndrew Lunn int port_donor, int lane, bool rxaui, bool on) 1336335e9f2SAndrew Lunn { 1346335e9f2SAndrew Lunn int err; 1356335e9f2SAndrew Lunn u8 cmode_donor; 1366335e9f2SAndrew Lunn 1376335e9f2SAndrew Lunn err = mv88e6xxx_port_get_cmode(chip, port_donor, &cmode_donor); 1386335e9f2SAndrew Lunn if (err) 1396335e9f2SAndrew Lunn return err; 1406335e9f2SAndrew Lunn 1416335e9f2SAndrew Lunn switch (cmode_donor) { 1425f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_RXAUI: 1436335e9f2SAndrew Lunn if (!rxaui) 1446335e9f2SAndrew Lunn break; 1456335e9f2SAndrew Lunn /* Fall through */ 1465f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_1000BASE_X: 1475f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_SGMII: 1485f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_2500BASEX: 1495f83dc93SVivien Didelot if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X || 1505f83dc93SVivien Didelot cmode == MV88E6XXX_PORT_STS_CMODE_SGMII) 1516335e9f2SAndrew Lunn return mv88e6390_serdes_sgmii(chip, lane, on); 1526335e9f2SAndrew Lunn } 1536335e9f2SAndrew Lunn return 0; 1546335e9f2SAndrew Lunn } 1556335e9f2SAndrew Lunn 1566335e9f2SAndrew Lunn static int mv88e6390_serdes_port9(struct mv88e6xxx_chip *chip, u8 cmode, 1576335e9f2SAndrew Lunn bool on) 1586335e9f2SAndrew Lunn { 1596335e9f2SAndrew Lunn switch (cmode) { 1605f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_1000BASE_X: 1615f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_SGMII: 1626335e9f2SAndrew Lunn return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on); 1635f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_XAUI: 1645f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_RXAUI: 1655f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_2500BASEX: 1666335e9f2SAndrew Lunn return mv88e6390_serdes_10g(chip, MV88E6390_PORT9_LANE0, on); 1676335e9f2SAndrew Lunn } 1686335e9f2SAndrew Lunn 1696335e9f2SAndrew Lunn return 0; 1706335e9f2SAndrew Lunn } 1716335e9f2SAndrew Lunn 1726335e9f2SAndrew Lunn static int mv88e6390_serdes_port10(struct mv88e6xxx_chip *chip, u8 cmode, 1736335e9f2SAndrew Lunn bool on) 1746335e9f2SAndrew Lunn { 1756335e9f2SAndrew Lunn switch (cmode) { 1765f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_SGMII: 1776335e9f2SAndrew Lunn return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on); 1785f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_XAUI: 1795f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_RXAUI: 1805f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_1000BASE_X: 1815f83dc93SVivien Didelot case MV88E6XXX_PORT_STS_CMODE_2500BASEX: 1826335e9f2SAndrew Lunn return mv88e6390_serdes_10g(chip, MV88E6390_PORT10_LANE0, on); 1836335e9f2SAndrew Lunn } 1846335e9f2SAndrew Lunn 1856335e9f2SAndrew Lunn return 0; 1866335e9f2SAndrew Lunn } 1876335e9f2SAndrew Lunn 1886335e9f2SAndrew Lunn int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on) 1896335e9f2SAndrew Lunn { 1906335e9f2SAndrew Lunn u8 cmode; 1916335e9f2SAndrew Lunn int err; 1926335e9f2SAndrew Lunn 1936335e9f2SAndrew Lunn err = mv88e6xxx_port_get_cmode(chip, port, &cmode); 1946335e9f2SAndrew Lunn if (err) 19564b2f726SDan Carpenter return err; 1966335e9f2SAndrew Lunn 1976335e9f2SAndrew Lunn switch (port) { 1986335e9f2SAndrew Lunn case 2: 1996335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 9, 2006335e9f2SAndrew Lunn MV88E6390_PORT9_LANE1, 2016335e9f2SAndrew Lunn false, on); 2026335e9f2SAndrew Lunn case 3: 2036335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 9, 2046335e9f2SAndrew Lunn MV88E6390_PORT9_LANE2, 2056335e9f2SAndrew Lunn true, on); 2066335e9f2SAndrew Lunn case 4: 2076335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 9, 2086335e9f2SAndrew Lunn MV88E6390_PORT9_LANE3, 2096335e9f2SAndrew Lunn true, on); 2106335e9f2SAndrew Lunn case 5: 2116335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 10, 2126335e9f2SAndrew Lunn MV88E6390_PORT10_LANE1, 2136335e9f2SAndrew Lunn false, on); 2146335e9f2SAndrew Lunn case 6: 2156335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 10, 2166335e9f2SAndrew Lunn MV88E6390_PORT10_LANE2, 2176335e9f2SAndrew Lunn true, on); 2186335e9f2SAndrew Lunn case 7: 2196335e9f2SAndrew Lunn return mv88e6390_serdes_lower(chip, cmode, 10, 2206335e9f2SAndrew Lunn MV88E6390_PORT10_LANE3, 2216335e9f2SAndrew Lunn true, on); 2226335e9f2SAndrew Lunn case 9: 2236335e9f2SAndrew Lunn return mv88e6390_serdes_port9(chip, cmode, on); 2246335e9f2SAndrew Lunn case 10: 2256335e9f2SAndrew Lunn return mv88e6390_serdes_port10(chip, cmode, on); 2266335e9f2SAndrew Lunn } 2276335e9f2SAndrew Lunn 2286335e9f2SAndrew Lunn return 0; 2296335e9f2SAndrew Lunn } 230