118abed21SVivien Didelot /* 218abed21SVivien Didelot * Marvell 88E6xxx Switch Port Registers support 318abed21SVivien Didelot * 418abed21SVivien Didelot * Copyright (c) 2008 Marvell Semiconductor 518abed21SVivien Didelot * 618abed21SVivien Didelot * Copyright (c) 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> 718abed21SVivien Didelot * 818abed21SVivien Didelot * This program is free software; you can redistribute it and/or modify 918abed21SVivien Didelot * it under the terms of the GNU General Public License as published by 1018abed21SVivien Didelot * the Free Software Foundation; either version 2 of the License, or 1118abed21SVivien Didelot * (at your option) any later version. 1218abed21SVivien Didelot */ 1318abed21SVivien Didelot 1418abed21SVivien Didelot #ifndef _MV88E6XXX_PORT_H 1518abed21SVivien Didelot #define _MV88E6XXX_PORT_H 1618abed21SVivien Didelot 1718abed21SVivien Didelot #include "mv88e6xxx.h" 1818abed21SVivien Didelot 1918abed21SVivien Didelot int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg, 2018abed21SVivien Didelot u16 *val); 2118abed21SVivien Didelot int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg, 2218abed21SVivien Didelot u16 val); 2318abed21SVivien Didelot 24a0a0f622SVivien Didelot int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port, 25a0a0f622SVivien Didelot phy_interface_t mode); 26a0a0f622SVivien Didelot int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port, 27a0a0f622SVivien Didelot phy_interface_t mode); 28a0a0f622SVivien Didelot 2908ef7f10SVivien Didelot int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link); 3008ef7f10SVivien Didelot 317f1ae07bSVivien Didelot int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup); 327f1ae07bSVivien Didelot 33e28def33SVivien Didelot int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state); 34e28def33SVivien Didelot 355a7921f4SVivien Didelot int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map); 365a7921f4SVivien Didelot 37b4e48c50SVivien Didelot int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid); 38b4e48c50SVivien Didelot int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid); 39b4e48c50SVivien Didelot 4077064f37SVivien Didelot int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid); 4177064f37SVivien Didelot int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid); 4277064f37SVivien Didelot 43385a0995SVivien Didelot int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port, 44385a0995SVivien Didelot u16 mode); 45385a0995SVivien Didelot 4618abed21SVivien Didelot #endif /* _MV88E6XXX_PORT_H */ 47