1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Marvell 88E6xxx Switch hardware timestamping support 4 * 5 * Copyright (c) 2008 Marvell Semiconductor 6 * 7 * Copyright (c) 2017 National Instruments 8 * Erik Hons <erik.hons@ni.com> 9 * Brandon Streiff <brandon.streiff@ni.com> 10 * Dane Wagner <dane.wagner@ni.com> 11 */ 12 13 #include "chip.h" 14 #include "global2.h" 15 #include "hwtstamp.h" 16 #include "ptp.h" 17 #include <linux/ptp_classify.h> 18 19 #define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb)) 20 21 static int mv88e6xxx_port_ptp_read(struct mv88e6xxx_chip *chip, int port, 22 int addr, u16 *data, int len) 23 { 24 if (!chip->info->ops->avb_ops->port_ptp_read) 25 return -EOPNOTSUPP; 26 27 return chip->info->ops->avb_ops->port_ptp_read(chip, port, addr, 28 data, len); 29 } 30 31 static int mv88e6xxx_port_ptp_write(struct mv88e6xxx_chip *chip, int port, 32 int addr, u16 data) 33 { 34 if (!chip->info->ops->avb_ops->port_ptp_write) 35 return -EOPNOTSUPP; 36 37 return chip->info->ops->avb_ops->port_ptp_write(chip, port, addr, 38 data); 39 } 40 41 static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip *chip, int addr, 42 u16 data) 43 { 44 if (!chip->info->ops->avb_ops->ptp_write) 45 return -EOPNOTSUPP; 46 47 return chip->info->ops->avb_ops->ptp_write(chip, addr, data); 48 } 49 50 static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip *chip, int addr, 51 u16 *data) 52 { 53 if (!chip->info->ops->avb_ops->ptp_read) 54 return -EOPNOTSUPP; 55 56 return chip->info->ops->avb_ops->ptp_read(chip, addr, data, 1); 57 } 58 59 /* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX 60 * timestamp. When working properly, hardware will produce a timestamp 61 * within 1ms. Software may enounter delays due to MDIO contention, so 62 * the timeout is set accordingly. 63 */ 64 #define TX_TSTAMP_TIMEOUT msecs_to_jiffies(40) 65 66 int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port, 67 struct ethtool_ts_info *info) 68 { 69 const struct mv88e6xxx_ptp_ops *ptp_ops; 70 struct mv88e6xxx_chip *chip; 71 72 chip = ds->priv; 73 ptp_ops = chip->info->ops->ptp_ops; 74 75 if (!chip->info->ptp_support) 76 return -EOPNOTSUPP; 77 78 info->so_timestamping = 79 SOF_TIMESTAMPING_TX_HARDWARE | 80 SOF_TIMESTAMPING_RX_HARDWARE | 81 SOF_TIMESTAMPING_RAW_HARDWARE; 82 info->phc_index = ptp_clock_index(chip->ptp_clock); 83 info->tx_types = 84 (1 << HWTSTAMP_TX_OFF) | 85 (1 << HWTSTAMP_TX_ON); 86 info->rx_filters = ptp_ops->rx_filters; 87 88 return 0; 89 } 90 91 static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port, 92 struct hwtstamp_config *config) 93 { 94 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; 95 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 96 bool tstamp_enable = false; 97 98 /* Prevent the TX/RX paths from trying to interact with the 99 * timestamp hardware while we reconfigure it. 100 */ 101 clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state); 102 103 /* reserved for future extensions */ 104 if (config->flags) 105 return -EINVAL; 106 107 switch (config->tx_type) { 108 case HWTSTAMP_TX_OFF: 109 tstamp_enable = false; 110 break; 111 case HWTSTAMP_TX_ON: 112 tstamp_enable = true; 113 break; 114 default: 115 return -ERANGE; 116 } 117 118 /* The switch supports timestamping both L2 and L4; one cannot be 119 * disabled independently of the other. 120 */ 121 122 if (!(BIT(config->rx_filter) & ptp_ops->rx_filters)) { 123 config->rx_filter = HWTSTAMP_FILTER_NONE; 124 dev_dbg(chip->dev, "Unsupported rx_filter %d\n", 125 config->rx_filter); 126 return -ERANGE; 127 } 128 129 switch (config->rx_filter) { 130 case HWTSTAMP_FILTER_NONE: 131 tstamp_enable = false; 132 break; 133 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 134 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 135 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 136 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 137 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 138 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 139 case HWTSTAMP_FILTER_PTP_V2_EVENT: 140 case HWTSTAMP_FILTER_PTP_V2_SYNC: 141 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 142 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 143 break; 144 case HWTSTAMP_FILTER_ALL: 145 default: 146 config->rx_filter = HWTSTAMP_FILTER_NONE; 147 return -ERANGE; 148 } 149 150 mv88e6xxx_reg_lock(chip); 151 if (tstamp_enable) { 152 chip->enable_count += 1; 153 if (chip->enable_count == 1 && ptp_ops->global_enable) 154 ptp_ops->global_enable(chip); 155 if (ptp_ops->port_enable) 156 ptp_ops->port_enable(chip, port); 157 } else { 158 if (ptp_ops->port_disable) 159 ptp_ops->port_disable(chip, port); 160 chip->enable_count -= 1; 161 if (chip->enable_count == 0 && ptp_ops->global_disable) 162 ptp_ops->global_disable(chip); 163 } 164 mv88e6xxx_reg_unlock(chip); 165 166 /* Once hardware has been configured, enable timestamp checks 167 * in the RX/TX paths. 168 */ 169 if (tstamp_enable) 170 set_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state); 171 172 return 0; 173 } 174 175 int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port, 176 struct ifreq *ifr) 177 { 178 struct mv88e6xxx_chip *chip = ds->priv; 179 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 180 struct hwtstamp_config config; 181 int err; 182 183 if (!chip->info->ptp_support) 184 return -EOPNOTSUPP; 185 186 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 187 return -EFAULT; 188 189 err = mv88e6xxx_set_hwtstamp_config(chip, port, &config); 190 if (err) 191 return err; 192 193 /* Save the chosen configuration to be returned later. */ 194 memcpy(&ps->tstamp_config, &config, sizeof(config)); 195 196 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? 197 -EFAULT : 0; 198 } 199 200 int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port, 201 struct ifreq *ifr) 202 { 203 struct mv88e6xxx_chip *chip = ds->priv; 204 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 205 struct hwtstamp_config *config = &ps->tstamp_config; 206 207 if (!chip->info->ptp_support) 208 return -EOPNOTSUPP; 209 210 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ? 211 -EFAULT : 0; 212 } 213 214 /* Returns a pointer to the PTP header if the caller should time stamp, 215 * or NULL if the caller should not. 216 */ 217 static struct ptp_header *mv88e6xxx_should_tstamp(struct mv88e6xxx_chip *chip, 218 int port, struct sk_buff *skb, 219 unsigned int type) 220 { 221 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 222 struct ptp_header *hdr; 223 224 if (!chip->info->ptp_support) 225 return NULL; 226 227 hdr = ptp_parse_header(skb, type); 228 if (!hdr) 229 return NULL; 230 231 if (!test_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state)) 232 return NULL; 233 234 return hdr; 235 } 236 237 static int mv88e6xxx_ts_valid(u16 status) 238 { 239 if (!(status & MV88E6XXX_PTP_TS_VALID)) 240 return 0; 241 if (status & MV88E6XXX_PTP_TS_STATUS_MASK) 242 return 0; 243 return 1; 244 } 245 246 static int seq_match(struct sk_buff *skb, u16 ts_seqid) 247 { 248 unsigned int type = SKB_PTP_TYPE(skb); 249 struct ptp_header *hdr; 250 251 hdr = ptp_parse_header(skb, type); 252 253 return ts_seqid == ntohs(hdr->sequence_id); 254 } 255 256 static void mv88e6xxx_get_rxts(struct mv88e6xxx_chip *chip, 257 struct mv88e6xxx_port_hwtstamp *ps, 258 struct sk_buff *skb, u16 reg, 259 struct sk_buff_head *rxq) 260 { 261 u16 buf[4] = { 0 }, status, seq_id; 262 struct skb_shared_hwtstamps *shwt; 263 struct sk_buff_head received; 264 u64 ns, timelo, timehi; 265 unsigned long flags; 266 int err; 267 268 /* The latched timestamp belongs to one of the received frames. */ 269 __skb_queue_head_init(&received); 270 spin_lock_irqsave(&rxq->lock, flags); 271 skb_queue_splice_tail_init(rxq, &received); 272 spin_unlock_irqrestore(&rxq->lock, flags); 273 274 mv88e6xxx_reg_lock(chip); 275 err = mv88e6xxx_port_ptp_read(chip, ps->port_id, 276 reg, buf, ARRAY_SIZE(buf)); 277 mv88e6xxx_reg_unlock(chip); 278 if (err) 279 pr_err("failed to get the receive time stamp\n"); 280 281 status = buf[0]; 282 timelo = buf[1]; 283 timehi = buf[2]; 284 seq_id = buf[3]; 285 286 if (status & MV88E6XXX_PTP_TS_VALID) { 287 mv88e6xxx_reg_lock(chip); 288 err = mv88e6xxx_port_ptp_write(chip, ps->port_id, reg, 0); 289 mv88e6xxx_reg_unlock(chip); 290 if (err) 291 pr_err("failed to clear the receive status\n"); 292 } 293 /* Since the device can only handle one time stamp at a time, 294 * we purge any extra frames from the queue. 295 */ 296 for ( ; skb; skb = __skb_dequeue(&received)) { 297 if (mv88e6xxx_ts_valid(status) && seq_match(skb, seq_id)) { 298 ns = timehi << 16 | timelo; 299 300 mv88e6xxx_reg_lock(chip); 301 ns = timecounter_cyc2time(&chip->tstamp_tc, ns); 302 mv88e6xxx_reg_unlock(chip); 303 shwt = skb_hwtstamps(skb); 304 memset(shwt, 0, sizeof(*shwt)); 305 shwt->hwtstamp = ns_to_ktime(ns); 306 status &= ~MV88E6XXX_PTP_TS_VALID; 307 } 308 netif_rx_ni(skb); 309 } 310 } 311 312 static void mv88e6xxx_rxtstamp_work(struct mv88e6xxx_chip *chip, 313 struct mv88e6xxx_port_hwtstamp *ps) 314 { 315 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; 316 struct sk_buff *skb; 317 318 skb = skb_dequeue(&ps->rx_queue); 319 320 if (skb) 321 mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr0_sts_reg, 322 &ps->rx_queue); 323 324 skb = skb_dequeue(&ps->rx_queue2); 325 if (skb) 326 mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr1_sts_reg, 327 &ps->rx_queue2); 328 } 329 330 static int is_pdelay_resp(const struct ptp_header *hdr) 331 { 332 return (hdr->tsmt & 0xf) == 3; 333 } 334 335 bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port, 336 struct sk_buff *skb, unsigned int type) 337 { 338 struct mv88e6xxx_port_hwtstamp *ps; 339 struct mv88e6xxx_chip *chip; 340 struct ptp_header *hdr; 341 342 chip = ds->priv; 343 ps = &chip->port_hwtstamp[port]; 344 345 if (ps->tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT) 346 return false; 347 348 hdr = mv88e6xxx_should_tstamp(chip, port, skb, type); 349 if (!hdr) 350 return false; 351 352 SKB_PTP_TYPE(skb) = type; 353 354 if (is_pdelay_resp(hdr)) 355 skb_queue_tail(&ps->rx_queue2, skb); 356 else 357 skb_queue_tail(&ps->rx_queue, skb); 358 359 ptp_schedule_worker(chip->ptp_clock, 0); 360 361 return true; 362 } 363 364 static int mv88e6xxx_txtstamp_work(struct mv88e6xxx_chip *chip, 365 struct mv88e6xxx_port_hwtstamp *ps) 366 { 367 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; 368 struct skb_shared_hwtstamps shhwtstamps; 369 u16 departure_block[4], status; 370 struct sk_buff *tmp_skb; 371 u32 time_raw; 372 int err; 373 u64 ns; 374 375 if (!ps->tx_skb) 376 return 0; 377 378 mv88e6xxx_reg_lock(chip); 379 err = mv88e6xxx_port_ptp_read(chip, ps->port_id, 380 ptp_ops->dep_sts_reg, 381 departure_block, 382 ARRAY_SIZE(departure_block)); 383 mv88e6xxx_reg_unlock(chip); 384 385 if (err) 386 goto free_and_clear_skb; 387 388 if (!(departure_block[0] & MV88E6XXX_PTP_TS_VALID)) { 389 if (time_is_before_jiffies(ps->tx_tstamp_start + 390 TX_TSTAMP_TIMEOUT)) { 391 dev_warn(chip->dev, "p%d: clearing tx timestamp hang\n", 392 ps->port_id); 393 goto free_and_clear_skb; 394 } 395 /* The timestamp should be available quickly, while getting it 396 * is high priority and time bounded to only 10ms. A poll is 397 * warranted so restart the work. 398 */ 399 return 1; 400 } 401 402 /* We have the timestamp; go ahead and clear valid now */ 403 mv88e6xxx_reg_lock(chip); 404 mv88e6xxx_port_ptp_write(chip, ps->port_id, ptp_ops->dep_sts_reg, 0); 405 mv88e6xxx_reg_unlock(chip); 406 407 status = departure_block[0] & MV88E6XXX_PTP_TS_STATUS_MASK; 408 if (status != MV88E6XXX_PTP_TS_STATUS_NORMAL) { 409 dev_warn(chip->dev, "p%d: tx timestamp overrun\n", ps->port_id); 410 goto free_and_clear_skb; 411 } 412 413 if (departure_block[3] != ps->tx_seq_id) { 414 dev_warn(chip->dev, "p%d: unexpected seq. id\n", ps->port_id); 415 goto free_and_clear_skb; 416 } 417 418 memset(&shhwtstamps, 0, sizeof(shhwtstamps)); 419 time_raw = ((u32)departure_block[2] << 16) | departure_block[1]; 420 mv88e6xxx_reg_lock(chip); 421 ns = timecounter_cyc2time(&chip->tstamp_tc, time_raw); 422 mv88e6xxx_reg_unlock(chip); 423 shhwtstamps.hwtstamp = ns_to_ktime(ns); 424 425 dev_dbg(chip->dev, 426 "p%d: txtstamp %llx status 0x%04x skb ID 0x%04x hw ID 0x%04x\n", 427 ps->port_id, ktime_to_ns(shhwtstamps.hwtstamp), 428 departure_block[0], ps->tx_seq_id, departure_block[3]); 429 430 /* skb_complete_tx_timestamp() will free up the client to make 431 * another timestamp-able transmit. We have to be ready for it 432 * -- by clearing the ps->tx_skb "flag" -- beforehand. 433 */ 434 435 tmp_skb = ps->tx_skb; 436 ps->tx_skb = NULL; 437 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state); 438 skb_complete_tx_timestamp(tmp_skb, &shhwtstamps); 439 440 return 0; 441 442 free_and_clear_skb: 443 dev_kfree_skb_any(ps->tx_skb); 444 ps->tx_skb = NULL; 445 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state); 446 447 return 0; 448 } 449 450 long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp) 451 { 452 struct mv88e6xxx_chip *chip = ptp_to_chip(ptp); 453 struct dsa_switch *ds = chip->ds; 454 struct mv88e6xxx_port_hwtstamp *ps; 455 int i, restart = 0; 456 457 for (i = 0; i < ds->num_ports; i++) { 458 if (!dsa_is_user_port(ds, i)) 459 continue; 460 461 ps = &chip->port_hwtstamp[i]; 462 if (test_bit(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state)) 463 restart |= mv88e6xxx_txtstamp_work(chip, ps); 464 465 mv88e6xxx_rxtstamp_work(chip, ps); 466 } 467 468 return restart ? 1 : -1; 469 } 470 471 void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port, 472 struct sk_buff *skb) 473 { 474 struct mv88e6xxx_chip *chip = ds->priv; 475 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 476 struct ptp_header *hdr; 477 struct sk_buff *clone; 478 unsigned int type; 479 480 type = ptp_classify_raw(skb); 481 if (type == PTP_CLASS_NONE) 482 return; 483 484 hdr = mv88e6xxx_should_tstamp(chip, port, skb, type); 485 if (!hdr) 486 return; 487 488 clone = skb_clone_sk(skb); 489 if (!clone) 490 return; 491 492 if (test_and_set_bit_lock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, 493 &ps->state)) { 494 kfree_skb(clone); 495 return; 496 } 497 498 ps->tx_skb = clone; 499 ps->tx_tstamp_start = jiffies; 500 ps->tx_seq_id = be16_to_cpu(hdr->sequence_id); 501 502 ptp_schedule_worker(chip->ptp_clock, 0); 503 } 504 505 int mv88e6165_global_disable(struct mv88e6xxx_chip *chip) 506 { 507 u16 val; 508 int err; 509 510 err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val); 511 if (err) 512 return err; 513 val |= MV88E6165_PTP_CFG_DISABLE_PTP; 514 515 return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val); 516 } 517 518 int mv88e6165_global_enable(struct mv88e6xxx_chip *chip) 519 { 520 u16 val; 521 int err; 522 523 err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val); 524 if (err) 525 return err; 526 527 val &= ~(MV88E6165_PTP_CFG_DISABLE_PTP | MV88E6165_PTP_CFG_TSPEC_MASK); 528 529 return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val); 530 } 531 532 int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port) 533 { 534 return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0, 535 MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP); 536 } 537 538 int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port) 539 { 540 return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0, 541 MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH); 542 } 543 544 static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip *chip, int port) 545 { 546 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; 547 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; 548 549 ps->port_id = port; 550 551 skb_queue_head_init(&ps->rx_queue); 552 skb_queue_head_init(&ps->rx_queue2); 553 554 if (ptp_ops->port_disable) 555 return ptp_ops->port_disable(chip, port); 556 557 return 0; 558 } 559 560 int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip) 561 { 562 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; 563 int err; 564 int i; 565 566 /* Disable timestamping on all ports. */ 567 for (i = 0; i < mv88e6xxx_num_ports(chip); ++i) { 568 err = mv88e6xxx_hwtstamp_port_setup(chip, i); 569 if (err) 570 return err; 571 } 572 573 /* Disable PTP globally */ 574 if (ptp_ops->global_disable) { 575 err = ptp_ops->global_disable(chip); 576 if (err) 577 return err; 578 } 579 580 /* Set the ethertype of L2 PTP messages */ 581 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_GC_ETYPE, ETH_P_1588); 582 if (err) 583 return err; 584 585 /* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to 586 * timestamp. This affects all ports that have timestamping enabled, 587 * but the timestamp config is per-port; thus we configure all events 588 * here and only support the HWTSTAMP_FILTER_*_EVENT filter types. 589 */ 590 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_MSGTYPE, 591 MV88E6XXX_PTP_MSGTYPE_ALL_EVENT); 592 if (err) 593 return err; 594 595 /* Use ARRIVAL1 for peer delay response messages. */ 596 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_TS_ARRIVAL_PTR, 597 MV88E6XXX_PTP_MSGTYPE_PDLAY_RES); 598 if (err) 599 return err; 600 601 /* 88E6341 devices default to timestamping at the PHY, but this has 602 * a hardware issue that results in unreliable timestamps. Force 603 * these devices to timestamp at the MAC. 604 */ 605 if (chip->info->family == MV88E6XXX_FAMILY_6341) { 606 u16 val = MV88E6341_PTP_CFG_UPDATE | 607 MV88E6341_PTP_CFG_MODE_IDX | 608 MV88E6341_PTP_CFG_MODE_TS_AT_MAC; 609 err = mv88e6xxx_ptp_write(chip, MV88E6341_PTP_CFG, val); 610 if (err) 611 return err; 612 } 613 614 return 0; 615 } 616 617 void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip) 618 { 619 } 620