1ec561276SVivien Didelot /*
2ec561276SVivien Didelot  * Marvell 88E6xxx Switch Global 2 Registers support (device address 0x1C)
3ec561276SVivien Didelot  *
4ec561276SVivien Didelot  * Copyright (c) 2008 Marvell Semiconductor
5ec561276SVivien Didelot  *
64333d619SVivien Didelot  * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
74333d619SVivien Didelot  *	Vivien Didelot <vivien.didelot@savoirfairelinux.com>
8ec561276SVivien Didelot  *
9ec561276SVivien Didelot  * This program is free software; you can redistribute it and/or modify
10ec561276SVivien Didelot  * it under the terms of the GNU General Public License as published by
11ec561276SVivien Didelot  * the Free Software Foundation; either version 2 of the License, or
12ec561276SVivien Didelot  * (at your option) any later version.
13ec561276SVivien Didelot  */
14ec561276SVivien Didelot 
15ec561276SVivien Didelot #ifndef _MV88E6XXX_GLOBAL2_H
16ec561276SVivien Didelot #define _MV88E6XXX_GLOBAL2_H
17ec561276SVivien Didelot 
18ec561276SVivien Didelot #include "mv88e6xxx.h"
19ec561276SVivien Didelot 
20ca070c10SVivien Didelot #ifdef CONFIG_NET_DSA_MV88E6XXX_GLOBAL2
21ca070c10SVivien Didelot 
22ca070c10SVivien Didelot static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
23ca070c10SVivien Didelot {
24ca070c10SVivien Didelot 	return 0;
25ca070c10SVivien Didelot }
26ca070c10SVivien Didelot 
27ee26a228SAndrew Lunn int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
28ee26a228SAndrew Lunn 			      struct mii_bus *bus,
29ee26a228SAndrew Lunn 			      int addr, int reg, u16 *val);
30ee26a228SAndrew Lunn int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
31ee26a228SAndrew Lunn 			       struct mii_bus *bus,
32ee26a228SAndrew Lunn 			       int addr, int reg, u16 val);
33ec561276SVivien Didelot int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);
3498fc3c6fSVivien Didelot 
3598fc3c6fSVivien Didelot int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,
3698fc3c6fSVivien Didelot 			     struct ethtool_eeprom *eeprom, u8 *data);
3798fc3c6fSVivien Didelot int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip,
3898fc3c6fSVivien Didelot 			     struct ethtool_eeprom *eeprom, u8 *data);
3998fc3c6fSVivien Didelot 
40ec561276SVivien Didelot int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,
41ec561276SVivien Didelot 			      struct ethtool_eeprom *eeprom, u8 *data);
42ec561276SVivien Didelot int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
43ec561276SVivien Didelot 			      struct ethtool_eeprom *eeprom, u8 *data);
4498fc3c6fSVivien Didelot 
4581228996SVivien Didelot int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip);
4681228996SVivien Didelot 
47ec561276SVivien Didelot int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip);
48dc30c35bSAndrew Lunn int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip);
49dc30c35bSAndrew Lunn void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip);
506e55f698SAndrew Lunn int mv88e6095_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
51ec561276SVivien Didelot 
52fcd25166SAndrew Lunn extern const struct mv88e6xxx_irq_ops mv88e6097_watchdog_ops;
5361303736SAndrew Lunn extern const struct mv88e6xxx_irq_ops mv88e6390_watchdog_ops;
54fcd25166SAndrew Lunn 
55ca070c10SVivien Didelot #else /* !CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 */
56ca070c10SVivien Didelot 
57ca070c10SVivien Didelot static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
58ca070c10SVivien Didelot {
59ca070c10SVivien Didelot 	if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_GLOBAL2)) {
60ca070c10SVivien Didelot 		dev_err(chip->dev, "this chip requires CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 enabled\n");
61ca070c10SVivien Didelot 		return -EOPNOTSUPP;
62ca070c10SVivien Didelot 	}
63ca070c10SVivien Didelot 
64ca070c10SVivien Didelot 	return 0;
65ca070c10SVivien Didelot }
66ca070c10SVivien Didelot 
67ca070c10SVivien Didelot static inline int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
68ee26a228SAndrew Lunn 					    struct mii_bus *bus,
69ca070c10SVivien Didelot 					    int addr, int reg, u16 *val)
70ca070c10SVivien Didelot {
71ca070c10SVivien Didelot 	return -EOPNOTSUPP;
72ca070c10SVivien Didelot }
73ca070c10SVivien Didelot 
74ca070c10SVivien Didelot static inline int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
75ee26a228SAndrew Lunn 					     struct mii_bus *bus,
76ca070c10SVivien Didelot 					     int addr, int reg, u16 val)
77ca070c10SVivien Didelot {
78ca070c10SVivien Didelot 	return -EOPNOTSUPP;
79ca070c10SVivien Didelot }
80ca070c10SVivien Didelot 
81ca070c10SVivien Didelot static inline int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip,
82ca070c10SVivien Didelot 					      u8 *addr)
83ca070c10SVivien Didelot {
84ca070c10SVivien Didelot 	return -EOPNOTSUPP;
85ca070c10SVivien Didelot }
86ca070c10SVivien Didelot 
8798fc3c6fSVivien Didelot static inline int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,
8898fc3c6fSVivien Didelot 					   struct ethtool_eeprom *eeprom,
8998fc3c6fSVivien Didelot 					   u8 *data)
9098fc3c6fSVivien Didelot {
9198fc3c6fSVivien Didelot 	return -EOPNOTSUPP;
9298fc3c6fSVivien Didelot }
9398fc3c6fSVivien Didelot 
9498fc3c6fSVivien Didelot static inline int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip,
9598fc3c6fSVivien Didelot 					   struct ethtool_eeprom *eeprom,
9698fc3c6fSVivien Didelot 					   u8 *data)
9798fc3c6fSVivien Didelot {
9898fc3c6fSVivien Didelot 	return -EOPNOTSUPP;
9998fc3c6fSVivien Didelot }
10098fc3c6fSVivien Didelot 
101ca070c10SVivien Didelot static inline int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,
102ca070c10SVivien Didelot 					    struct ethtool_eeprom *eeprom,
103ca070c10SVivien Didelot 					    u8 *data)
104ca070c10SVivien Didelot {
105ca070c10SVivien Didelot 	return -EOPNOTSUPP;
106ca070c10SVivien Didelot }
107ca070c10SVivien Didelot 
108ca070c10SVivien Didelot static inline int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
109ca070c10SVivien Didelot 					    struct ethtool_eeprom *eeprom,
110ca070c10SVivien Didelot 					    u8 *data)
111ca070c10SVivien Didelot {
112ca070c10SVivien Didelot 	return -EOPNOTSUPP;
113ca070c10SVivien Didelot }
114ca070c10SVivien Didelot 
11581228996SVivien Didelot int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip)
11681228996SVivien Didelot {
11781228996SVivien Didelot 	return -EOPNOTSUPP;
11881228996SVivien Didelot }
11981228996SVivien Didelot 
120ca070c10SVivien Didelot static inline int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
121ca070c10SVivien Didelot {
122ca070c10SVivien Didelot 	return -EOPNOTSUPP;
123ca070c10SVivien Didelot }
124ca070c10SVivien Didelot 
125dc30c35bSAndrew Lunn static inline int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)
126dc30c35bSAndrew Lunn {
127dc30c35bSAndrew Lunn 	return -EOPNOTSUPP;
128dc30c35bSAndrew Lunn }
129dc30c35bSAndrew Lunn 
130dc30c35bSAndrew Lunn static inline void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip)
131dc30c35bSAndrew Lunn {
132dc30c35bSAndrew Lunn }
133dc30c35bSAndrew Lunn 
1346e55f698SAndrew Lunn static inline int mv88e6095_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)
1356e55f698SAndrew Lunn {
1366e55f698SAndrew Lunn 	return -EOPNOTSUPP;
1376e55f698SAndrew Lunn }
1386e55f698SAndrew Lunn 
139fcd25166SAndrew Lunn static const struct mv88e6xxx_irq_ops mv88e6097_watchdog_ops = {};
14061303736SAndrew Lunn static const struct mv88e6xxx_irq_ops mv88e6390_watchdog_ops = {};
141fcd25166SAndrew Lunn 
142ca070c10SVivien Didelot #endif /* CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 */
143ca070c10SVivien Didelot 
144ec561276SVivien Didelot #endif /* _MV88E6XXX_GLOBAL2_H */
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