1a935c052SVivien Didelot /*
2a935c052SVivien Didelot  * Marvell 88E6xxx Switch Global (1) Registers support
3a935c052SVivien Didelot  *
4a935c052SVivien Didelot  * Copyright (c) 2008 Marvell Semiconductor
5a935c052SVivien Didelot  *
64333d619SVivien Didelot  * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
74333d619SVivien Didelot  *	Vivien Didelot <vivien.didelot@savoirfairelinux.com>
8a935c052SVivien Didelot  *
9a935c052SVivien Didelot  * This program is free software; you can redistribute it and/or modify
10a935c052SVivien Didelot  * it under the terms of the GNU General Public License as published by
11a935c052SVivien Didelot  * the Free Software Foundation; either version 2 of the License, or
12a935c052SVivien Didelot  * (at your option) any later version.
13a935c052SVivien Didelot  */
14a935c052SVivien Didelot 
15a935c052SVivien Didelot #ifndef _MV88E6XXX_GLOBAL1_H
16a935c052SVivien Didelot #define _MV88E6XXX_GLOBAL1_H
17a935c052SVivien Didelot 
18a935c052SVivien Didelot #include "mv88e6xxx.h"
19a935c052SVivien Didelot 
20a935c052SVivien Didelot int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);
21a935c052SVivien Didelot int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
22a935c052SVivien Didelot int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask);
2317e708baSVivien Didelot 
2417e708baSVivien Didelot int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip);
2517e708baSVivien Didelot int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip);
2617e708baSVivien Didelot 
27a199d8b6SVivien Didelot int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);
28a199d8b6SVivien Didelot int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
29a199d8b6SVivien Didelot 
307f9ef3afSAndrew Lunn int mv88e6xxx_g1_stats_wait(struct mv88e6xxx_chip *chip);
31a605a0feSAndrew Lunn int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
32a605a0feSAndrew Lunn int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
3379523473SAndrew Lunn int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
34de227387SAndrew Lunn int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
357f9ef3afSAndrew Lunn void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
3633641994SAndrew Lunn int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
3733641994SAndrew Lunn int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
3833641994SAndrew Lunn int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
3933641994SAndrew Lunn int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
406e55f698SAndrew Lunn int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
41a935c052SVivien Didelot 
42c3a7d4adSVivien Didelot int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all);
43720c6343SVivien Didelot int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
44720c6343SVivien Didelot 				  unsigned int msecs);
45dabc1a96SVivien Didelot int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,
46dabc1a96SVivien Didelot 			     struct mv88e6xxx_atu_entry *entry);
479c13c026SVivien Didelot int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,
489c13c026SVivien Didelot 			       struct mv88e6xxx_atu_entry *entry);
49daefc943SVivien Didelot int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all);
50e606ca36SVivien Didelot int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port,
51e606ca36SVivien Didelot 			    bool all);
52720c6343SVivien Didelot 
538ee51f6bSVivien Didelot int mv88e6xxx_g1_vtu_fid_read(struct mv88e6xxx_chip *chip,
548ee51f6bSVivien Didelot 			      struct mv88e6xxx_vtu_entry *entry);
558ee51f6bSVivien Didelot int mv88e6xxx_g1_vtu_fid_write(struct mv88e6xxx_chip *chip,
568ee51f6bSVivien Didelot 			       struct mv88e6xxx_vtu_entry *entry);
57d2ca1ea1SVivien Didelot int mv88e6xxx_g1_vtu_sid_read(struct mv88e6xxx_chip *chip,
58d2ca1ea1SVivien Didelot 			      struct mv88e6xxx_vtu_entry *entry);
59d2ca1ea1SVivien Didelot int mv88e6xxx_g1_vtu_sid_write(struct mv88e6xxx_chip *chip,
60d2ca1ea1SVivien Didelot 			       struct mv88e6xxx_vtu_entry *entry);
613afb4bdeSVivien Didelot int mv88e6xxx_g1_vtu_vid_read(struct mv88e6xxx_chip *chip,
623afb4bdeSVivien Didelot 			      struct mv88e6xxx_vtu_entry *entry);
633afb4bdeSVivien Didelot int mv88e6xxx_g1_vtu_vid_write(struct mv88e6xxx_chip *chip,
643afb4bdeSVivien Didelot 			       struct mv88e6xxx_vtu_entry *entry);
65c499a64fSVivien Didelot int mv88e6185_g1_vtu_data_read(struct mv88e6xxx_chip *chip,
66c499a64fSVivien Didelot 			       struct mv88e6xxx_vtu_entry *entry);
67c499a64fSVivien Didelot int mv88e6185_g1_vtu_data_write(struct mv88e6xxx_chip *chip,
68c499a64fSVivien Didelot 				struct mv88e6xxx_vtu_entry *entry);
69332aa5ccSVivien Didelot int mv88e6xxx_g1_vtu_op_wait(struct mv88e6xxx_chip *chip);
70332aa5ccSVivien Didelot int mv88e6xxx_g1_vtu_op(struct mv88e6xxx_chip *chip, u16 op);
71f169e5eeSVivien Didelot int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
72f169e5eeSVivien Didelot 			     struct mv88e6xxx_vtu_entry *entry);
7366a8e1f9SVivien Didelot int mv88e6xxx_g1_vtu_stu_getnext(struct mv88e6xxx_chip *chip,
7466a8e1f9SVivien Didelot 				 struct mv88e6xxx_vtu_entry *vtu);
75ef6fcea3SVivien Didelot int mv88e6xxx_g1_vtu_stu_get(struct mv88e6xxx_chip *chip,
76ef6fcea3SVivien Didelot 			     struct mv88e6xxx_vtu_entry *vtu);
77b486d7c9SVivien Didelot int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip);
78332aa5ccSVivien Didelot 
79a935c052SVivien Didelot #endif /* _MV88E6XXX_GLOBAL1_H */
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