1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 }; 26 27 struct ksz_port { 28 u16 member; 29 u16 vid_member; 30 int stp_state; 31 struct phy_device phydev; 32 33 u32 on:1; /* port is not disabled by hardware */ 34 u32 phy:1; /* port has a PHY */ 35 u32 fiber:1; /* port is fiber */ 36 u32 sgmii:1; /* port is SGMII */ 37 u32 force:1; 38 u32 read:1; /* read MIB counters in background */ 39 u32 freeze:1; /* MIB counter freeze is enabled */ 40 41 struct ksz_port_mib mib; 42 }; 43 44 struct ksz_device { 45 struct dsa_switch *ds; 46 struct ksz_platform_data *pdata; 47 const char *name; 48 49 struct mutex dev_mutex; /* device access */ 50 struct mutex regmap_mutex; /* regmap access */ 51 struct mutex alu_mutex; /* ALU access */ 52 struct mutex vlan_mutex; /* vlan access */ 53 const struct ksz_dev_ops *dev_ops; 54 55 struct device *dev; 56 struct regmap *regmap[3]; 57 58 void *priv; 59 60 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 61 62 /* chip specific data */ 63 u32 chip_id; 64 int num_vlans; 65 int num_alus; 66 int num_statics; 67 int cpu_port; /* port connected to CPU */ 68 int cpu_ports; /* port bitmap can be cpu port */ 69 int phy_port_cnt; 70 int port_cnt; 71 int reg_mib_cnt; 72 int mib_cnt; 73 int mib_port_cnt; 74 int last_port; /* ports after that not used */ 75 phy_interface_t interface; 76 u32 regs_size; 77 bool phy_errata_9477; 78 bool synclko_125; 79 80 struct vlan_table *vlan_cache; 81 82 struct ksz_port *ports; 83 struct delayed_work mib_read; 84 unsigned long mib_read_interval; 85 u16 br_member; 86 u16 member; 87 u16 mirror_rx; 88 u16 mirror_tx; 89 u32 features; /* chip specific features */ 90 u32 overrides; /* chip functions set by user */ 91 u16 host_mask; 92 u16 port_mask; 93 }; 94 95 struct alu_struct { 96 /* entry 1 */ 97 u8 is_static:1; 98 u8 is_src_filter:1; 99 u8 is_dst_filter:1; 100 u8 prio_age:3; 101 u32 _reserv_0_1:23; 102 u8 mstp:3; 103 /* entry 2 */ 104 u8 is_override:1; 105 u8 is_use_fid:1; 106 u32 _reserv_1_1:23; 107 u8 port_forward:7; 108 /* entry 3 & 4*/ 109 u32 _reserv_2_1:9; 110 u8 fid:7; 111 u8 mac[ETH_ALEN]; 112 }; 113 114 struct ksz_dev_ops { 115 u32 (*get_port_addr)(int port, int offset); 116 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 117 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 118 void (*port_cleanup)(struct ksz_device *dev, int port); 119 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 120 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 121 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 122 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 123 u8 *fid, u8 *src_port, u8 *timestamp, 124 u16 *entries); 125 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 126 struct alu_struct *alu); 127 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 128 struct alu_struct *alu); 129 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 130 u64 *cnt); 131 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 132 u64 *dropped, u64 *cnt); 133 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 134 void (*port_init_cnt)(struct ksz_device *dev, int port); 135 int (*shutdown)(struct ksz_device *dev); 136 int (*detect)(struct ksz_device *dev); 137 int (*init)(struct ksz_device *dev); 138 void (*exit)(struct ksz_device *dev); 139 }; 140 141 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 142 int ksz_switch_register(struct ksz_device *dev, 143 const struct ksz_dev_ops *ops); 144 void ksz_switch_remove(struct ksz_device *dev); 145 146 int ksz8795_switch_register(struct ksz_device *dev); 147 int ksz9477_switch_register(struct ksz_device *dev); 148 149 void ksz_update_port_member(struct ksz_device *dev, int port); 150 void ksz_init_mib_timer(struct ksz_device *dev); 151 152 /* Common DSA access functions */ 153 154 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 155 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 156 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, 157 phy_interface_t interface); 158 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 159 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 160 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 161 struct net_device *br); 162 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 163 struct net_device *br); 164 void ksz_port_fast_age(struct dsa_switch *ds, int port); 165 int ksz_port_vlan_prepare(struct dsa_switch *ds, int port, 166 const struct switchdev_obj_port_vlan *vlan); 167 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 168 void *data); 169 int ksz_port_mdb_prepare(struct dsa_switch *ds, int port, 170 const struct switchdev_obj_port_mdb *mdb); 171 void ksz_port_mdb_add(struct dsa_switch *ds, int port, 172 const struct switchdev_obj_port_mdb *mdb); 173 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 174 const struct switchdev_obj_port_mdb *mdb); 175 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 176 177 /* Common register access functions */ 178 179 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 180 { 181 unsigned int value; 182 int ret = regmap_read(dev->regmap[0], reg, &value); 183 184 *val = value; 185 return ret; 186 } 187 188 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 189 { 190 unsigned int value; 191 int ret = regmap_read(dev->regmap[1], reg, &value); 192 193 *val = value; 194 return ret; 195 } 196 197 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 198 { 199 unsigned int value; 200 int ret = regmap_read(dev->regmap[2], reg, &value); 201 202 *val = value; 203 return ret; 204 } 205 206 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 207 { 208 u32 value[2]; 209 int ret; 210 211 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 212 if (!ret) { 213 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 214 value[0] = swab32(value[0]); 215 value[1] = swab32(value[1]); 216 *val = swab64((u64)*value); 217 } 218 219 return ret; 220 } 221 222 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 223 { 224 return regmap_write(dev->regmap[0], reg, value); 225 } 226 227 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 228 { 229 return regmap_write(dev->regmap[1], reg, value); 230 } 231 232 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 233 { 234 return regmap_write(dev->regmap[2], reg, value); 235 } 236 237 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 238 { 239 u32 val[2]; 240 241 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 242 value = swab64(value); 243 val[0] = swab32(value & 0xffffffffULL); 244 val[1] = swab32(value >> 32ULL); 245 246 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 247 } 248 249 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 250 u8 *data) 251 { 252 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 253 } 254 255 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 256 u16 *data) 257 { 258 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 259 } 260 261 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 262 u32 *data) 263 { 264 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 265 } 266 267 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 268 u8 data) 269 { 270 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 271 } 272 273 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 274 u16 data) 275 { 276 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 277 } 278 279 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 280 u32 data) 281 { 282 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 283 } 284 285 static inline void ksz_regmap_lock(void *__mtx) 286 { 287 struct mutex *mtx = __mtx; 288 mutex_lock(mtx); 289 } 290 291 static inline void ksz_regmap_unlock(void *__mtx) 292 { 293 struct mutex *mtx = __mtx; 294 mutex_unlock(mtx); 295 } 296 297 /* Regmap tables generation */ 298 #define KSZ_SPI_OP_RD 3 299 #define KSZ_SPI_OP_WR 2 300 301 #define swabnot_used(x) 0 302 303 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 304 swab##swp((opcode) << ((regbits) + (regpad))) 305 306 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 307 { \ 308 .name = #width, \ 309 .val_bits = (width), \ 310 .reg_stride = 1, \ 311 .reg_bits = (regbits) + (regalign), \ 312 .pad_bits = (regpad), \ 313 .max_register = BIT(regbits) - 1, \ 314 .cache_type = REGCACHE_NONE, \ 315 .read_flag_mask = \ 316 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 317 regbits, regpad), \ 318 .write_flag_mask = \ 319 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 320 regbits, regpad), \ 321 .lock = ksz_regmap_lock, \ 322 .unlock = ksz_regmap_unlock, \ 323 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 324 .val_format_endian = REGMAP_ENDIAN_BIG \ 325 } 326 327 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 328 static const struct regmap_config ksz##_regmap_config[] = { \ 329 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 330 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 331 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 332 } 333 334 #endif 335