1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 }; 26 27 struct ksz_port { 28 u16 member; 29 u16 vid_member; 30 int stp_state; 31 struct phy_device phydev; 32 33 u32 on:1; /* port is not disabled by hardware */ 34 u32 phy:1; /* port has a PHY */ 35 u32 fiber:1; /* port is fiber */ 36 u32 sgmii:1; /* port is SGMII */ 37 u32 force:1; 38 u32 read:1; /* read MIB counters in background */ 39 u32 freeze:1; /* MIB counter freeze is enabled */ 40 41 struct ksz_port_mib mib; 42 }; 43 44 struct ksz_device { 45 struct dsa_switch *ds; 46 struct ksz_platform_data *pdata; 47 const char *name; 48 49 struct mutex dev_mutex; /* device access */ 50 struct mutex regmap_mutex; /* regmap access */ 51 struct mutex alu_mutex; /* ALU access */ 52 struct mutex vlan_mutex; /* vlan access */ 53 const struct ksz_dev_ops *dev_ops; 54 55 struct device *dev; 56 struct regmap *regmap[3]; 57 58 void *priv; 59 60 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 61 62 /* chip specific data */ 63 u32 chip_id; 64 int num_vlans; 65 int num_alus; 66 int num_statics; 67 int cpu_port; /* port connected to CPU */ 68 int cpu_ports; /* port bitmap can be cpu port */ 69 int phy_port_cnt; 70 int port_cnt; 71 int reg_mib_cnt; 72 int mib_cnt; 73 int mib_port_cnt; 74 int last_port; /* ports after that not used */ 75 phy_interface_t interface; 76 u32 regs_size; 77 bool phy_errata_9477; 78 bool synclko_125; 79 80 struct vlan_table *vlan_cache; 81 82 struct ksz_port *ports; 83 struct delayed_work mib_read; 84 unsigned long mib_read_interval; 85 u16 br_member; 86 u16 member; 87 u16 mirror_rx; 88 u16 mirror_tx; 89 u32 features; /* chip specific features */ 90 u32 overrides; /* chip functions set by user */ 91 u16 host_mask; 92 u16 port_mask; 93 }; 94 95 struct alu_struct { 96 /* entry 1 */ 97 u8 is_static:1; 98 u8 is_src_filter:1; 99 u8 is_dst_filter:1; 100 u8 prio_age:3; 101 u32 _reserv_0_1:23; 102 u8 mstp:3; 103 /* entry 2 */ 104 u8 is_override:1; 105 u8 is_use_fid:1; 106 u32 _reserv_1_1:23; 107 u8 port_forward:7; 108 /* entry 3 & 4*/ 109 u32 _reserv_2_1:9; 110 u8 fid:7; 111 u8 mac[ETH_ALEN]; 112 }; 113 114 struct ksz_dev_ops { 115 u32 (*get_port_addr)(int port, int offset); 116 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 117 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 118 void (*phy_setup)(struct ksz_device *dev, int port, 119 struct phy_device *phy); 120 void (*port_cleanup)(struct ksz_device *dev, int port); 121 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 122 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 123 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 124 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 125 u8 *fid, u8 *src_port, u8 *timestamp, 126 u16 *entries); 127 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 128 struct alu_struct *alu); 129 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 130 struct alu_struct *alu); 131 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 132 u64 *cnt); 133 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 134 u64 *dropped, u64 *cnt); 135 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 136 void (*port_init_cnt)(struct ksz_device *dev, int port); 137 int (*shutdown)(struct ksz_device *dev); 138 int (*detect)(struct ksz_device *dev); 139 int (*init)(struct ksz_device *dev); 140 void (*exit)(struct ksz_device *dev); 141 }; 142 143 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 144 int ksz_switch_register(struct ksz_device *dev, 145 const struct ksz_dev_ops *ops); 146 void ksz_switch_remove(struct ksz_device *dev); 147 148 int ksz8795_switch_register(struct ksz_device *dev); 149 int ksz9477_switch_register(struct ksz_device *dev); 150 151 void ksz_update_port_member(struct ksz_device *dev, int port); 152 void ksz_init_mib_timer(struct ksz_device *dev); 153 154 /* Common DSA access functions */ 155 156 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 157 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 158 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, 159 phy_interface_t interface); 160 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 161 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 162 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 163 struct net_device *br); 164 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 165 struct net_device *br); 166 void ksz_port_fast_age(struct dsa_switch *ds, int port); 167 int ksz_port_vlan_prepare(struct dsa_switch *ds, int port, 168 const struct switchdev_obj_port_vlan *vlan); 169 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 170 void *data); 171 int ksz_port_mdb_prepare(struct dsa_switch *ds, int port, 172 const struct switchdev_obj_port_mdb *mdb); 173 void ksz_port_mdb_add(struct dsa_switch *ds, int port, 174 const struct switchdev_obj_port_mdb *mdb); 175 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 176 const struct switchdev_obj_port_mdb *mdb); 177 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 178 179 /* Common register access functions */ 180 181 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 182 { 183 unsigned int value; 184 int ret = regmap_read(dev->regmap[0], reg, &value); 185 186 *val = value; 187 return ret; 188 } 189 190 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 191 { 192 unsigned int value; 193 int ret = regmap_read(dev->regmap[1], reg, &value); 194 195 *val = value; 196 return ret; 197 } 198 199 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 200 { 201 unsigned int value; 202 int ret = regmap_read(dev->regmap[2], reg, &value); 203 204 *val = value; 205 return ret; 206 } 207 208 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 209 { 210 u32 value[2]; 211 int ret; 212 213 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 214 if (!ret) { 215 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 216 value[0] = swab32(value[0]); 217 value[1] = swab32(value[1]); 218 *val = swab64((u64)*value); 219 } 220 221 return ret; 222 } 223 224 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 225 { 226 return regmap_write(dev->regmap[0], reg, value); 227 } 228 229 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 230 { 231 return regmap_write(dev->regmap[1], reg, value); 232 } 233 234 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 235 { 236 return regmap_write(dev->regmap[2], reg, value); 237 } 238 239 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 240 { 241 u32 val[2]; 242 243 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 244 value = swab64(value); 245 val[0] = swab32(value & 0xffffffffULL); 246 val[1] = swab32(value >> 32ULL); 247 248 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 249 } 250 251 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 252 u8 *data) 253 { 254 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 255 } 256 257 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 258 u16 *data) 259 { 260 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 261 } 262 263 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 264 u32 *data) 265 { 266 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 267 } 268 269 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 270 u8 data) 271 { 272 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 273 } 274 275 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 276 u16 data) 277 { 278 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 279 } 280 281 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 282 u32 data) 283 { 284 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 285 } 286 287 static inline void ksz_regmap_lock(void *__mtx) 288 { 289 struct mutex *mtx = __mtx; 290 mutex_lock(mtx); 291 } 292 293 static inline void ksz_regmap_unlock(void *__mtx) 294 { 295 struct mutex *mtx = __mtx; 296 mutex_unlock(mtx); 297 } 298 299 /* Regmap tables generation */ 300 #define KSZ_SPI_OP_RD 3 301 #define KSZ_SPI_OP_WR 2 302 303 #define swabnot_used(x) 0 304 305 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 306 swab##swp((opcode) << ((regbits) + (regpad))) 307 308 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 309 { \ 310 .name = #width, \ 311 .val_bits = (width), \ 312 .reg_stride = 1, \ 313 .reg_bits = (regbits) + (regalign), \ 314 .pad_bits = (regpad), \ 315 .max_register = BIT(regbits) - 1, \ 316 .cache_type = REGCACHE_NONE, \ 317 .read_flag_mask = \ 318 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 319 regbits, regpad), \ 320 .write_flag_mask = \ 321 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 322 regbits, regpad), \ 323 .lock = ksz_regmap_lock, \ 324 .unlock = ksz_regmap_unlock, \ 325 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 326 .val_format_endian = REGMAP_ENDIAN_BIG \ 327 } 328 329 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 330 static const struct regmap_config ksz##_regmap_config[] = { \ 331 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 332 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 333 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 334 } 335 336 #endif 337