1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 }; 26 27 struct ksz_port { 28 u16 member; 29 u16 vid_member; 30 bool remove_tag; /* Remove Tag flag set, for ksz8795 only */ 31 int stp_state; 32 struct phy_device phydev; 33 34 u32 on:1; /* port is not disabled by hardware */ 35 u32 phy:1; /* port has a PHY */ 36 u32 fiber:1; /* port is fiber */ 37 u32 sgmii:1; /* port is SGMII */ 38 u32 force:1; 39 u32 read:1; /* read MIB counters in background */ 40 u32 freeze:1; /* MIB counter freeze is enabled */ 41 42 struct ksz_port_mib mib; 43 phy_interface_t interface; 44 }; 45 46 struct ksz_device { 47 struct dsa_switch *ds; 48 struct ksz_platform_data *pdata; 49 const char *name; 50 51 struct mutex dev_mutex; /* device access */ 52 struct mutex regmap_mutex; /* regmap access */ 53 struct mutex alu_mutex; /* ALU access */ 54 struct mutex vlan_mutex; /* vlan access */ 55 const struct ksz_dev_ops *dev_ops; 56 57 struct device *dev; 58 struct regmap *regmap[3]; 59 60 void *priv; 61 62 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 63 64 /* chip specific data */ 65 u32 chip_id; 66 int num_vlans; 67 int num_alus; 68 int num_statics; 69 int cpu_port; /* port connected to CPU */ 70 int cpu_ports; /* port bitmap can be cpu port */ 71 int phy_port_cnt; 72 int port_cnt; 73 u8 reg_mib_cnt; 74 int mib_cnt; 75 const struct mib_names *mib_names; 76 phy_interface_t compat_interface; 77 u32 regs_size; 78 bool phy_errata_9477; 79 bool synclko_125; 80 81 struct vlan_table *vlan_cache; 82 83 struct ksz_port *ports; 84 struct delayed_work mib_read; 85 unsigned long mib_read_interval; 86 u16 br_member; 87 u16 member; 88 u16 mirror_rx; 89 u16 mirror_tx; 90 u32 features; /* chip specific features */ 91 u32 overrides; /* chip functions set by user */ 92 u16 host_mask; 93 u16 port_mask; 94 }; 95 96 struct alu_struct { 97 /* entry 1 */ 98 u8 is_static:1; 99 u8 is_src_filter:1; 100 u8 is_dst_filter:1; 101 u8 prio_age:3; 102 u32 _reserv_0_1:23; 103 u8 mstp:3; 104 /* entry 2 */ 105 u8 is_override:1; 106 u8 is_use_fid:1; 107 u32 _reserv_1_1:23; 108 u8 port_forward:7; 109 /* entry 3 & 4*/ 110 u32 _reserv_2_1:9; 111 u8 fid:7; 112 u8 mac[ETH_ALEN]; 113 }; 114 115 struct ksz_dev_ops { 116 u32 (*get_port_addr)(int port, int offset); 117 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 118 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 119 void (*port_cleanup)(struct ksz_device *dev, int port); 120 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 121 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 122 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 123 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 124 u8 *fid, u8 *src_port, u8 *timestamp, 125 u16 *entries); 126 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 127 struct alu_struct *alu); 128 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 129 struct alu_struct *alu); 130 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 131 u64 *cnt); 132 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 133 u64 *dropped, u64 *cnt); 134 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 135 void (*port_init_cnt)(struct ksz_device *dev, int port); 136 int (*shutdown)(struct ksz_device *dev); 137 int (*detect)(struct ksz_device *dev); 138 int (*init)(struct ksz_device *dev); 139 void (*exit)(struct ksz_device *dev); 140 }; 141 142 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 143 int ksz_switch_register(struct ksz_device *dev, 144 const struct ksz_dev_ops *ops); 145 void ksz_switch_remove(struct ksz_device *dev); 146 147 int ksz8_switch_register(struct ksz_device *dev); 148 int ksz9477_switch_register(struct ksz_device *dev); 149 150 void ksz_update_port_member(struct ksz_device *dev, int port); 151 void ksz_init_mib_timer(struct ksz_device *dev); 152 153 /* Common DSA access functions */ 154 155 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 156 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 157 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, 158 phy_interface_t interface); 159 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 160 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 161 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 162 struct net_device *br); 163 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 164 struct net_device *br); 165 void ksz_port_fast_age(struct dsa_switch *ds, int port); 166 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 167 void *data); 168 int ksz_port_mdb_add(struct dsa_switch *ds, int port, 169 const struct switchdev_obj_port_mdb *mdb); 170 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 171 const struct switchdev_obj_port_mdb *mdb); 172 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 173 174 /* Common register access functions */ 175 176 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 177 { 178 unsigned int value; 179 int ret = regmap_read(dev->regmap[0], reg, &value); 180 181 *val = value; 182 return ret; 183 } 184 185 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 186 { 187 unsigned int value; 188 int ret = regmap_read(dev->regmap[1], reg, &value); 189 190 *val = value; 191 return ret; 192 } 193 194 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 195 { 196 unsigned int value; 197 int ret = regmap_read(dev->regmap[2], reg, &value); 198 199 *val = value; 200 return ret; 201 } 202 203 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 204 { 205 u32 value[2]; 206 int ret; 207 208 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 209 if (!ret) 210 *val = (u64)value[0] << 32 | value[1]; 211 212 return ret; 213 } 214 215 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 216 { 217 return regmap_write(dev->regmap[0], reg, value); 218 } 219 220 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 221 { 222 return regmap_write(dev->regmap[1], reg, value); 223 } 224 225 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 226 { 227 return regmap_write(dev->regmap[2], reg, value); 228 } 229 230 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 231 { 232 u32 val[2]; 233 234 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 235 value = swab64(value); 236 val[0] = swab32(value & 0xffffffffULL); 237 val[1] = swab32(value >> 32ULL); 238 239 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 240 } 241 242 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 243 u8 *data) 244 { 245 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 246 } 247 248 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 249 u16 *data) 250 { 251 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 252 } 253 254 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 255 u32 *data) 256 { 257 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 258 } 259 260 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 261 u8 data) 262 { 263 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 264 } 265 266 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 267 u16 data) 268 { 269 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 270 } 271 272 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 273 u32 data) 274 { 275 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 276 } 277 278 static inline void ksz_regmap_lock(void *__mtx) 279 { 280 struct mutex *mtx = __mtx; 281 mutex_lock(mtx); 282 } 283 284 static inline void ksz_regmap_unlock(void *__mtx) 285 { 286 struct mutex *mtx = __mtx; 287 mutex_unlock(mtx); 288 } 289 290 /* Regmap tables generation */ 291 #define KSZ_SPI_OP_RD 3 292 #define KSZ_SPI_OP_WR 2 293 294 #define swabnot_used(x) 0 295 296 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 297 swab##swp((opcode) << ((regbits) + (regpad))) 298 299 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 300 { \ 301 .name = #width, \ 302 .val_bits = (width), \ 303 .reg_stride = 1, \ 304 .reg_bits = (regbits) + (regalign), \ 305 .pad_bits = (regpad), \ 306 .max_register = BIT(regbits) - 1, \ 307 .cache_type = REGCACHE_NONE, \ 308 .read_flag_mask = \ 309 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 310 regbits, regpad), \ 311 .write_flag_mask = \ 312 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 313 regbits, regpad), \ 314 .lock = ksz_regmap_lock, \ 315 .unlock = ksz_regmap_unlock, \ 316 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 317 .val_format_endian = REGMAP_ENDIAN_BIG \ 318 } 319 320 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 321 static const struct regmap_config ksz##_regmap_config[] = { \ 322 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 323 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 324 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 325 } 326 327 #endif 328