1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 }; 26 27 struct ksz_port { 28 u16 member; 29 u16 vid_member; 30 int stp_state; 31 struct phy_device phydev; 32 33 u32 on:1; /* port is not disabled by hardware */ 34 u32 phy:1; /* port has a PHY */ 35 u32 fiber:1; /* port is fiber */ 36 u32 sgmii:1; /* port is SGMII */ 37 u32 force:1; 38 u32 read:1; /* read MIB counters in background */ 39 u32 freeze:1; /* MIB counter freeze is enabled */ 40 41 struct ksz_port_mib mib; 42 }; 43 44 struct ksz_device { 45 struct dsa_switch *ds; 46 struct ksz_platform_data *pdata; 47 const char *name; 48 49 struct mutex dev_mutex; /* device access */ 50 struct mutex regmap_mutex; /* regmap access */ 51 struct mutex alu_mutex; /* ALU access */ 52 struct mutex vlan_mutex; /* vlan access */ 53 const struct ksz_dev_ops *dev_ops; 54 55 struct device *dev; 56 struct regmap *regmap[3]; 57 58 void *priv; 59 60 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 61 62 /* chip specific data */ 63 u32 chip_id; 64 int num_vlans; 65 int num_alus; 66 int num_statics; 67 int cpu_port; /* port connected to CPU */ 68 int cpu_ports; /* port bitmap can be cpu port */ 69 int phy_port_cnt; 70 int port_cnt; 71 int reg_mib_cnt; 72 int mib_cnt; 73 int mib_port_cnt; 74 int last_port; /* ports after that not used */ 75 phy_interface_t interface; 76 u32 regs_size; 77 bool phy_errata_9477; 78 bool synclko_125; 79 80 struct vlan_table *vlan_cache; 81 82 struct ksz_port *ports; 83 struct delayed_work mib_read; 84 unsigned long mib_read_interval; 85 u16 br_member; 86 u16 member; 87 u16 live_ports; 88 u16 on_ports; /* ports enabled by DSA */ 89 u16 rx_ports; 90 u16 tx_ports; 91 u16 mirror_rx; 92 u16 mirror_tx; 93 u32 features; /* chip specific features */ 94 u32 overrides; /* chip functions set by user */ 95 u16 host_mask; 96 u16 port_mask; 97 }; 98 99 struct alu_struct { 100 /* entry 1 */ 101 u8 is_static:1; 102 u8 is_src_filter:1; 103 u8 is_dst_filter:1; 104 u8 prio_age:3; 105 u32 _reserv_0_1:23; 106 u8 mstp:3; 107 /* entry 2 */ 108 u8 is_override:1; 109 u8 is_use_fid:1; 110 u32 _reserv_1_1:23; 111 u8 port_forward:7; 112 /* entry 3 & 4*/ 113 u32 _reserv_2_1:9; 114 u8 fid:7; 115 u8 mac[ETH_ALEN]; 116 }; 117 118 struct ksz_dev_ops { 119 u32 (*get_port_addr)(int port, int offset); 120 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 121 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 122 void (*port_cleanup)(struct ksz_device *dev, int port); 123 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 124 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 125 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 126 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 127 u8 *fid, u8 *src_port, u8 *timestamp, 128 u16 *entries); 129 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 130 struct alu_struct *alu); 131 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 132 struct alu_struct *alu); 133 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 134 u64 *cnt); 135 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 136 u64 *dropped, u64 *cnt); 137 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 138 void (*port_init_cnt)(struct ksz_device *dev, int port); 139 int (*shutdown)(struct ksz_device *dev); 140 int (*detect)(struct ksz_device *dev); 141 int (*init)(struct ksz_device *dev); 142 void (*exit)(struct ksz_device *dev); 143 }; 144 145 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 146 int ksz_switch_register(struct ksz_device *dev, 147 const struct ksz_dev_ops *ops); 148 void ksz_switch_remove(struct ksz_device *dev); 149 150 int ksz8795_switch_register(struct ksz_device *dev); 151 int ksz9477_switch_register(struct ksz_device *dev); 152 153 void ksz_update_port_member(struct ksz_device *dev, int port); 154 void ksz_init_mib_timer(struct ksz_device *dev); 155 156 /* Common DSA access functions */ 157 158 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 159 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 160 void ksz_adjust_link(struct dsa_switch *ds, int port, 161 struct phy_device *phydev); 162 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 163 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 164 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 165 struct net_device *br); 166 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 167 struct net_device *br); 168 void ksz_port_fast_age(struct dsa_switch *ds, int port); 169 int ksz_port_vlan_prepare(struct dsa_switch *ds, int port, 170 const struct switchdev_obj_port_vlan *vlan); 171 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 172 void *data); 173 int ksz_port_mdb_prepare(struct dsa_switch *ds, int port, 174 const struct switchdev_obj_port_mdb *mdb); 175 void ksz_port_mdb_add(struct dsa_switch *ds, int port, 176 const struct switchdev_obj_port_mdb *mdb); 177 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 178 const struct switchdev_obj_port_mdb *mdb); 179 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 180 void ksz_disable_port(struct dsa_switch *ds, int port); 181 182 /* Common register access functions */ 183 184 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 185 { 186 unsigned int value; 187 int ret = regmap_read(dev->regmap[0], reg, &value); 188 189 *val = value; 190 return ret; 191 } 192 193 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 194 { 195 unsigned int value; 196 int ret = regmap_read(dev->regmap[1], reg, &value); 197 198 *val = value; 199 return ret; 200 } 201 202 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 203 { 204 unsigned int value; 205 int ret = regmap_read(dev->regmap[2], reg, &value); 206 207 *val = value; 208 return ret; 209 } 210 211 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 212 { 213 u32 value[2]; 214 int ret; 215 216 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 217 if (!ret) { 218 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 219 value[0] = swab32(value[0]); 220 value[1] = swab32(value[1]); 221 *val = swab64((u64)*value); 222 } 223 224 return ret; 225 } 226 227 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 228 { 229 return regmap_write(dev->regmap[0], reg, value); 230 } 231 232 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 233 { 234 return regmap_write(dev->regmap[1], reg, value); 235 } 236 237 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 238 { 239 return regmap_write(dev->regmap[2], reg, value); 240 } 241 242 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 243 { 244 u32 val[2]; 245 246 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 247 value = swab64(value); 248 val[0] = swab32(value & 0xffffffffULL); 249 val[1] = swab32(value >> 32ULL); 250 251 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 252 } 253 254 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 255 u8 *data) 256 { 257 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 258 } 259 260 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 261 u16 *data) 262 { 263 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 264 } 265 266 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 267 u32 *data) 268 { 269 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 270 } 271 272 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 273 u8 data) 274 { 275 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 276 } 277 278 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 279 u16 data) 280 { 281 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 282 } 283 284 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 285 u32 data) 286 { 287 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 288 } 289 290 static inline void ksz_regmap_lock(void *__mtx) 291 { 292 struct mutex *mtx = __mtx; 293 mutex_lock(mtx); 294 } 295 296 static inline void ksz_regmap_unlock(void *__mtx) 297 { 298 struct mutex *mtx = __mtx; 299 mutex_unlock(mtx); 300 } 301 302 /* Regmap tables generation */ 303 #define KSZ_SPI_OP_RD 3 304 #define KSZ_SPI_OP_WR 2 305 306 #define swabnot_used(x) 0 307 308 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 309 swab##swp((opcode) << ((regbits) + (regpad))) 310 311 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 312 { \ 313 .name = #width, \ 314 .val_bits = (width), \ 315 .reg_stride = 1, \ 316 .reg_bits = (regbits) + (regalign), \ 317 .pad_bits = (regpad), \ 318 .max_register = BIT(regbits) - 1, \ 319 .cache_type = REGCACHE_NONE, \ 320 .read_flag_mask = \ 321 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 322 regbits, regpad), \ 323 .write_flag_mask = \ 324 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 325 regbits, regpad), \ 326 .lock = ksz_regmap_lock, \ 327 .unlock = ksz_regmap_unlock, \ 328 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 329 .val_format_endian = REGMAP_ENDIAN_BIG \ 330 } 331 332 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 333 static const struct regmap_config ksz##_regmap_config[] = { \ 334 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 335 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 336 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 337 } 338 339 #endif 340