1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 #define KSZ_MAX_NUM_PORTS 8 18 19 struct vlan_table { 20 u32 table[3]; 21 }; 22 23 struct ksz_port_mib { 24 struct mutex cnt_mutex; /* structure access */ 25 u8 cnt_ptr; 26 u64 *counters; 27 struct rtnl_link_stats64 stats64; 28 struct ethtool_pause_stats pause_stats; 29 struct spinlock stats64_lock; 30 }; 31 32 struct ksz_mib_names { 33 int index; 34 char string[ETH_GSTRING_LEN]; 35 }; 36 37 struct ksz_chip_data { 38 u32 chip_id; 39 const char *dev_name; 40 int num_vlans; 41 int num_alus; 42 int num_statics; 43 int cpu_ports; 44 int port_cnt; 45 const struct ksz_dev_ops *ops; 46 bool phy_errata_9477; 47 bool ksz87xx_eee_link_erratum; 48 const struct ksz_mib_names *mib_names; 49 int mib_cnt; 50 u8 reg_mib_cnt; 51 const u16 *regs; 52 const u32 *masks; 53 const u8 *shifts; 54 const u8 *xmii_ctrl1; 55 int stp_ctrl_reg; 56 int broadcast_ctrl_reg; 57 int multicast_ctrl_reg; 58 int start_ctrl_reg; 59 bool supports_mii[KSZ_MAX_NUM_PORTS]; 60 bool supports_rmii[KSZ_MAX_NUM_PORTS]; 61 bool supports_rgmii[KSZ_MAX_NUM_PORTS]; 62 bool internal_phy[KSZ_MAX_NUM_PORTS]; 63 }; 64 65 struct ksz_port { 66 bool remove_tag; /* Remove Tag flag set, for ksz8795 only */ 67 int stp_state; 68 struct phy_device phydev; 69 70 u32 on:1; /* port is not disabled by hardware */ 71 u32 phy:1; /* port has a PHY */ 72 u32 fiber:1; /* port is fiber */ 73 u32 sgmii:1; /* port is SGMII */ 74 u32 force:1; 75 u32 read:1; /* read MIB counters in background */ 76 u32 freeze:1; /* MIB counter freeze is enabled */ 77 78 struct ksz_port_mib mib; 79 phy_interface_t interface; 80 u16 max_frame; 81 }; 82 83 struct ksz_device { 84 struct dsa_switch *ds; 85 struct ksz_platform_data *pdata; 86 const struct ksz_chip_data *info; 87 88 struct mutex dev_mutex; /* device access */ 89 struct mutex regmap_mutex; /* regmap access */ 90 struct mutex alu_mutex; /* ALU access */ 91 struct mutex vlan_mutex; /* vlan access */ 92 const struct ksz_dev_ops *dev_ops; 93 94 struct device *dev; 95 struct regmap *regmap[3]; 96 97 void *priv; 98 99 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 100 101 /* chip specific data */ 102 u32 chip_id; 103 u8 chip_rev; 104 int cpu_port; /* port connected to CPU */ 105 int phy_port_cnt; 106 phy_interface_t compat_interface; 107 bool synclko_125; 108 bool synclko_disable; 109 110 struct vlan_table *vlan_cache; 111 112 struct ksz_port *ports; 113 struct delayed_work mib_read; 114 unsigned long mib_read_interval; 115 u16 mirror_rx; 116 u16 mirror_tx; 117 u32 features; /* chip specific features */ 118 u16 port_mask; 119 }; 120 121 /* List of supported models */ 122 enum ksz_model { 123 KSZ8795, 124 KSZ8794, 125 KSZ8765, 126 KSZ8830, 127 KSZ9477, 128 KSZ9897, 129 KSZ9893, 130 KSZ9567, 131 LAN9370, 132 LAN9371, 133 LAN9372, 134 LAN9373, 135 LAN9374, 136 }; 137 138 enum ksz_chip_id { 139 KSZ8795_CHIP_ID = 0x8795, 140 KSZ8794_CHIP_ID = 0x8794, 141 KSZ8765_CHIP_ID = 0x8765, 142 KSZ8830_CHIP_ID = 0x8830, 143 KSZ9477_CHIP_ID = 0x00947700, 144 KSZ9897_CHIP_ID = 0x00989700, 145 KSZ9893_CHIP_ID = 0x00989300, 146 KSZ9567_CHIP_ID = 0x00956700, 147 LAN9370_CHIP_ID = 0x00937000, 148 LAN9371_CHIP_ID = 0x00937100, 149 LAN9372_CHIP_ID = 0x00937200, 150 LAN9373_CHIP_ID = 0x00937300, 151 LAN9374_CHIP_ID = 0x00937400, 152 }; 153 154 enum ksz_regs { 155 REG_IND_CTRL_0, 156 REG_IND_DATA_8, 157 REG_IND_DATA_CHECK, 158 REG_IND_DATA_HI, 159 REG_IND_DATA_LO, 160 REG_IND_MIB_CHECK, 161 REG_IND_BYTE, 162 P_FORCE_CTRL, 163 P_LINK_STATUS, 164 P_LOCAL_CTRL, 165 P_NEG_RESTART_CTRL, 166 P_REMOTE_STATUS, 167 P_SPEED_STATUS, 168 S_TAIL_TAG_CTRL, 169 P_STP_CTRL, 170 S_START_CTRL, 171 S_BROADCAST_CTRL, 172 S_MULTICAST_CTRL, 173 P_XMII_CTRL_1, 174 }; 175 176 enum ksz_masks { 177 PORT_802_1P_REMAPPING, 178 SW_TAIL_TAG_ENABLE, 179 MIB_COUNTER_OVERFLOW, 180 MIB_COUNTER_VALID, 181 VLAN_TABLE_FID, 182 VLAN_TABLE_MEMBERSHIP, 183 VLAN_TABLE_VALID, 184 STATIC_MAC_TABLE_VALID, 185 STATIC_MAC_TABLE_USE_FID, 186 STATIC_MAC_TABLE_FID, 187 STATIC_MAC_TABLE_OVERRIDE, 188 STATIC_MAC_TABLE_FWD_PORTS, 189 DYNAMIC_MAC_TABLE_ENTRIES_H, 190 DYNAMIC_MAC_TABLE_MAC_EMPTY, 191 DYNAMIC_MAC_TABLE_NOT_READY, 192 DYNAMIC_MAC_TABLE_ENTRIES, 193 DYNAMIC_MAC_TABLE_FID, 194 DYNAMIC_MAC_TABLE_SRC_PORT, 195 DYNAMIC_MAC_TABLE_TIMESTAMP, 196 ALU_STAT_WRITE, 197 ALU_STAT_READ, 198 }; 199 200 enum ksz_shifts { 201 VLAN_TABLE_MEMBERSHIP_S, 202 VLAN_TABLE, 203 STATIC_MAC_FWD_PORTS, 204 STATIC_MAC_FID, 205 DYNAMIC_MAC_ENTRIES_H, 206 DYNAMIC_MAC_ENTRIES, 207 DYNAMIC_MAC_FID, 208 DYNAMIC_MAC_TIMESTAMP, 209 DYNAMIC_MAC_SRC_PORT, 210 ALU_STAT_INDEX, 211 }; 212 213 enum ksz_xmii_ctrl1 { 214 P_GMII_1GBIT, 215 P_GMII_NOT_1GBIT, 216 }; 217 218 struct alu_struct { 219 /* entry 1 */ 220 u8 is_static:1; 221 u8 is_src_filter:1; 222 u8 is_dst_filter:1; 223 u8 prio_age:3; 224 u32 _reserv_0_1:23; 225 u8 mstp:3; 226 /* entry 2 */ 227 u8 is_override:1; 228 u8 is_use_fid:1; 229 u32 _reserv_1_1:23; 230 u8 port_forward:7; 231 /* entry 3 & 4*/ 232 u32 _reserv_2_1:9; 233 u8 fid:7; 234 u8 mac[ETH_ALEN]; 235 }; 236 237 struct ksz_dev_ops { 238 int (*setup)(struct dsa_switch *ds); 239 u32 (*get_port_addr)(int port, int offset); 240 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 241 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 242 void (*port_cleanup)(struct ksz_device *dev, int port); 243 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 244 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 245 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 246 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 247 u64 *cnt); 248 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 249 u64 *dropped, u64 *cnt); 250 void (*r_mib_stat64)(struct ksz_device *dev, int port); 251 int (*vlan_filtering)(struct ksz_device *dev, int port, 252 bool flag, struct netlink_ext_ack *extack); 253 int (*vlan_add)(struct ksz_device *dev, int port, 254 const struct switchdev_obj_port_vlan *vlan, 255 struct netlink_ext_ack *extack); 256 int (*vlan_del)(struct ksz_device *dev, int port, 257 const struct switchdev_obj_port_vlan *vlan); 258 int (*mirror_add)(struct ksz_device *dev, int port, 259 struct dsa_mall_mirror_tc_entry *mirror, 260 bool ingress, struct netlink_ext_ack *extack); 261 void (*mirror_del)(struct ksz_device *dev, int port, 262 struct dsa_mall_mirror_tc_entry *mirror); 263 int (*fdb_add)(struct ksz_device *dev, int port, 264 const unsigned char *addr, u16 vid, struct dsa_db db); 265 int (*fdb_del)(struct ksz_device *dev, int port, 266 const unsigned char *addr, u16 vid, struct dsa_db db); 267 int (*fdb_dump)(struct ksz_device *dev, int port, 268 dsa_fdb_dump_cb_t *cb, void *data); 269 int (*mdb_add)(struct ksz_device *dev, int port, 270 const struct switchdev_obj_port_mdb *mdb, 271 struct dsa_db db); 272 int (*mdb_del)(struct ksz_device *dev, int port, 273 const struct switchdev_obj_port_mdb *mdb, 274 struct dsa_db db); 275 void (*get_caps)(struct ksz_device *dev, int port, 276 struct phylink_config *config); 277 int (*change_mtu)(struct ksz_device *dev, int port, int mtu); 278 int (*max_mtu)(struct ksz_device *dev, int port); 279 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 280 void (*port_init_cnt)(struct ksz_device *dev, int port); 281 void (*phylink_mac_config)(struct ksz_device *dev, int port, 282 unsigned int mode, 283 const struct phylink_link_state *state); 284 void (*phylink_mac_link_up)(struct ksz_device *dev, int port, 285 unsigned int mode, 286 phy_interface_t interface, 287 struct phy_device *phydev, int speed, 288 int duplex, bool tx_pause, bool rx_pause); 289 void (*config_cpu_port)(struct dsa_switch *ds); 290 int (*enable_stp_addr)(struct ksz_device *dev); 291 int (*reset)(struct ksz_device *dev); 292 int (*init)(struct ksz_device *dev); 293 void (*exit)(struct ksz_device *dev); 294 }; 295 296 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 297 int ksz_switch_register(struct ksz_device *dev); 298 void ksz_switch_remove(struct ksz_device *dev); 299 300 void ksz_init_mib_timer(struct ksz_device *dev); 301 void ksz_r_mib_stats64(struct ksz_device *dev, int port); 302 void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state); 303 bool ksz_get_gbit(struct ksz_device *dev, int port); 304 void ksz_set_gbit(struct ksz_device *dev, int port, bool gbit); 305 extern const struct ksz_chip_data ksz_switch_chips[]; 306 307 /* Common register access functions */ 308 309 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 310 { 311 unsigned int value; 312 int ret = regmap_read(dev->regmap[0], reg, &value); 313 314 *val = value; 315 return ret; 316 } 317 318 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 319 { 320 unsigned int value; 321 int ret = regmap_read(dev->regmap[1], reg, &value); 322 323 *val = value; 324 return ret; 325 } 326 327 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 328 { 329 unsigned int value; 330 int ret = regmap_read(dev->regmap[2], reg, &value); 331 332 *val = value; 333 return ret; 334 } 335 336 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 337 { 338 u32 value[2]; 339 int ret; 340 341 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 342 if (!ret) 343 *val = (u64)value[0] << 32 | value[1]; 344 345 return ret; 346 } 347 348 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 349 { 350 return regmap_write(dev->regmap[0], reg, value); 351 } 352 353 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 354 { 355 return regmap_write(dev->regmap[1], reg, value); 356 } 357 358 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 359 { 360 return regmap_write(dev->regmap[2], reg, value); 361 } 362 363 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 364 { 365 u32 val[2]; 366 367 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 368 value = swab64(value); 369 val[0] = swab32(value & 0xffffffffULL); 370 val[1] = swab32(value >> 32ULL); 371 372 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 373 } 374 375 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 376 u8 *data) 377 { 378 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 379 } 380 381 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 382 u16 *data) 383 { 384 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 385 } 386 387 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 388 u32 *data) 389 { 390 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 391 } 392 393 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 394 u8 data) 395 { 396 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 397 } 398 399 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 400 u16 data) 401 { 402 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 403 } 404 405 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 406 u32 data) 407 { 408 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 409 } 410 411 static inline void ksz_regmap_lock(void *__mtx) 412 { 413 struct mutex *mtx = __mtx; 414 mutex_lock(mtx); 415 } 416 417 static inline void ksz_regmap_unlock(void *__mtx) 418 { 419 struct mutex *mtx = __mtx; 420 mutex_unlock(mtx); 421 } 422 423 static inline int is_lan937x(struct ksz_device *dev) 424 { 425 return dev->chip_id == LAN9370_CHIP_ID || 426 dev->chip_id == LAN9371_CHIP_ID || 427 dev->chip_id == LAN9372_CHIP_ID || 428 dev->chip_id == LAN9373_CHIP_ID || 429 dev->chip_id == LAN9374_CHIP_ID; 430 } 431 432 /* STP State Defines */ 433 #define PORT_TX_ENABLE BIT(2) 434 #define PORT_RX_ENABLE BIT(1) 435 #define PORT_LEARN_DISABLE BIT(0) 436 437 /* Switch ID Defines */ 438 #define REG_CHIP_ID0 0x00 439 440 #define SW_FAMILY_ID_M GENMASK(15, 8) 441 #define KSZ87_FAMILY_ID 0x87 442 #define KSZ88_FAMILY_ID 0x88 443 444 #define KSZ8_PORT_STATUS_0 0x08 445 #define KSZ8_PORT_FIBER_MODE BIT(7) 446 447 #define SW_CHIP_ID_M GENMASK(7, 4) 448 #define KSZ87_CHIP_ID_94 0x6 449 #define KSZ87_CHIP_ID_95 0x9 450 #define KSZ88_CHIP_ID_63 0x3 451 452 #define SW_REV_ID_M GENMASK(7, 4) 453 454 /* Driver set switch broadcast storm protection at 10% rate. */ 455 #define BROADCAST_STORM_PROT_RATE 10 456 457 /* 148,800 frames * 67 ms / 100 */ 458 #define BROADCAST_STORM_VALUE 9969 459 460 #define BROADCAST_STORM_RATE_HI 0x07 461 #define BROADCAST_STORM_RATE_LO 0xFF 462 #define BROADCAST_STORM_RATE 0x07FF 463 464 #define MULTICAST_STORM_DISABLE BIT(6) 465 466 #define SW_START 0x01 467 468 /* xMII configuration */ 469 #define P_GMII_1GBIT_M BIT(6) 470 471 /* Regmap tables generation */ 472 #define KSZ_SPI_OP_RD 3 473 #define KSZ_SPI_OP_WR 2 474 475 #define swabnot_used(x) 0 476 477 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 478 swab##swp((opcode) << ((regbits) + (regpad))) 479 480 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 481 { \ 482 .name = #width, \ 483 .val_bits = (width), \ 484 .reg_stride = 1, \ 485 .reg_bits = (regbits) + (regalign), \ 486 .pad_bits = (regpad), \ 487 .max_register = BIT(regbits) - 1, \ 488 .cache_type = REGCACHE_NONE, \ 489 .read_flag_mask = \ 490 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 491 regbits, regpad), \ 492 .write_flag_mask = \ 493 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 494 regbits, regpad), \ 495 .lock = ksz_regmap_lock, \ 496 .unlock = ksz_regmap_unlock, \ 497 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 498 .val_format_endian = REGMAP_ENDIAN_BIG \ 499 } 500 501 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 502 static const struct regmap_config ksz##_regmap_config[] = { \ 503 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 504 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 505 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 506 } 507 508 #endif 509