1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 }; 26 27 struct ksz_port { 28 u16 member; 29 u16 vid_member; 30 int stp_state; 31 struct phy_device phydev; 32 33 u32 on:1; /* port is not disabled by hardware */ 34 u32 phy:1; /* port has a PHY */ 35 u32 fiber:1; /* port is fiber */ 36 u32 sgmii:1; /* port is SGMII */ 37 u32 force:1; 38 u32 read:1; /* read MIB counters in background */ 39 u32 freeze:1; /* MIB counter freeze is enabled */ 40 41 struct ksz_port_mib mib; 42 phy_interface_t interface; 43 }; 44 45 struct ksz_device { 46 struct dsa_switch *ds; 47 struct ksz_platform_data *pdata; 48 const char *name; 49 50 struct mutex dev_mutex; /* device access */ 51 struct mutex regmap_mutex; /* regmap access */ 52 struct mutex alu_mutex; /* ALU access */ 53 struct mutex vlan_mutex; /* vlan access */ 54 const struct ksz_dev_ops *dev_ops; 55 56 struct device *dev; 57 struct regmap *regmap[3]; 58 59 void *priv; 60 61 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 62 63 /* chip specific data */ 64 u32 chip_id; 65 int num_vlans; 66 int num_alus; 67 int num_statics; 68 int cpu_port; /* port connected to CPU */ 69 int cpu_ports; /* port bitmap can be cpu port */ 70 int phy_port_cnt; 71 int port_cnt; 72 int reg_mib_cnt; 73 int mib_cnt; 74 phy_interface_t compat_interface; 75 u32 regs_size; 76 bool phy_errata_9477; 77 bool synclko_125; 78 79 struct vlan_table *vlan_cache; 80 81 struct ksz_port *ports; 82 struct delayed_work mib_read; 83 unsigned long mib_read_interval; 84 u16 br_member; 85 u16 member; 86 u16 mirror_rx; 87 u16 mirror_tx; 88 u32 features; /* chip specific features */ 89 u32 overrides; /* chip functions set by user */ 90 u16 host_mask; 91 u16 port_mask; 92 }; 93 94 struct alu_struct { 95 /* entry 1 */ 96 u8 is_static:1; 97 u8 is_src_filter:1; 98 u8 is_dst_filter:1; 99 u8 prio_age:3; 100 u32 _reserv_0_1:23; 101 u8 mstp:3; 102 /* entry 2 */ 103 u8 is_override:1; 104 u8 is_use_fid:1; 105 u32 _reserv_1_1:23; 106 u8 port_forward:7; 107 /* entry 3 & 4*/ 108 u32 _reserv_2_1:9; 109 u8 fid:7; 110 u8 mac[ETH_ALEN]; 111 }; 112 113 struct ksz_dev_ops { 114 u32 (*get_port_addr)(int port, int offset); 115 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 116 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 117 void (*port_cleanup)(struct ksz_device *dev, int port); 118 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 119 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 120 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 121 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 122 u8 *fid, u8 *src_port, u8 *timestamp, 123 u16 *entries); 124 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 125 struct alu_struct *alu); 126 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 127 struct alu_struct *alu); 128 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 129 u64 *cnt); 130 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 131 u64 *dropped, u64 *cnt); 132 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 133 void (*port_init_cnt)(struct ksz_device *dev, int port); 134 int (*shutdown)(struct ksz_device *dev); 135 int (*detect)(struct ksz_device *dev); 136 int (*init)(struct ksz_device *dev); 137 void (*exit)(struct ksz_device *dev); 138 }; 139 140 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 141 int ksz_switch_register(struct ksz_device *dev, 142 const struct ksz_dev_ops *ops); 143 void ksz_switch_remove(struct ksz_device *dev); 144 145 int ksz8795_switch_register(struct ksz_device *dev); 146 int ksz9477_switch_register(struct ksz_device *dev); 147 148 void ksz_update_port_member(struct ksz_device *dev, int port); 149 void ksz_init_mib_timer(struct ksz_device *dev); 150 151 /* Common DSA access functions */ 152 153 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 154 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 155 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, 156 phy_interface_t interface); 157 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 158 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 159 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 160 struct net_device *br); 161 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 162 struct net_device *br); 163 void ksz_port_fast_age(struct dsa_switch *ds, int port); 164 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 165 void *data); 166 int ksz_port_mdb_add(struct dsa_switch *ds, int port, 167 const struct switchdev_obj_port_mdb *mdb); 168 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 169 const struct switchdev_obj_port_mdb *mdb); 170 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 171 172 /* Common register access functions */ 173 174 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 175 { 176 unsigned int value; 177 int ret = regmap_read(dev->regmap[0], reg, &value); 178 179 *val = value; 180 return ret; 181 } 182 183 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 184 { 185 unsigned int value; 186 int ret = regmap_read(dev->regmap[1], reg, &value); 187 188 *val = value; 189 return ret; 190 } 191 192 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 193 { 194 unsigned int value; 195 int ret = regmap_read(dev->regmap[2], reg, &value); 196 197 *val = value; 198 return ret; 199 } 200 201 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 202 { 203 u32 value[2]; 204 int ret; 205 206 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 207 if (!ret) { 208 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 209 value[0] = swab32(value[0]); 210 value[1] = swab32(value[1]); 211 *val = swab64((u64)*value); 212 } 213 214 return ret; 215 } 216 217 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 218 { 219 return regmap_write(dev->regmap[0], reg, value); 220 } 221 222 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 223 { 224 return regmap_write(dev->regmap[1], reg, value); 225 } 226 227 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 228 { 229 return regmap_write(dev->regmap[2], reg, value); 230 } 231 232 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 233 { 234 u32 val[2]; 235 236 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 237 value = swab64(value); 238 val[0] = swab32(value & 0xffffffffULL); 239 val[1] = swab32(value >> 32ULL); 240 241 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 242 } 243 244 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 245 u8 *data) 246 { 247 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 248 } 249 250 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 251 u16 *data) 252 { 253 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 254 } 255 256 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 257 u32 *data) 258 { 259 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 260 } 261 262 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 263 u8 data) 264 { 265 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 266 } 267 268 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 269 u16 data) 270 { 271 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 272 } 273 274 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 275 u32 data) 276 { 277 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 278 } 279 280 static inline void ksz_regmap_lock(void *__mtx) 281 { 282 struct mutex *mtx = __mtx; 283 mutex_lock(mtx); 284 } 285 286 static inline void ksz_regmap_unlock(void *__mtx) 287 { 288 struct mutex *mtx = __mtx; 289 mutex_unlock(mtx); 290 } 291 292 /* Regmap tables generation */ 293 #define KSZ_SPI_OP_RD 3 294 #define KSZ_SPI_OP_WR 2 295 296 #define swabnot_used(x) 0 297 298 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 299 swab##swp((opcode) << ((regbits) + (regpad))) 300 301 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 302 { \ 303 .name = #width, \ 304 .val_bits = (width), \ 305 .reg_stride = 1, \ 306 .reg_bits = (regbits) + (regalign), \ 307 .pad_bits = (regpad), \ 308 .max_register = BIT(regbits) - 1, \ 309 .cache_type = REGCACHE_NONE, \ 310 .read_flag_mask = \ 311 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 312 regbits, regpad), \ 313 .write_flag_mask = \ 314 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 315 regbits, regpad), \ 316 .lock = ksz_regmap_lock, \ 317 .unlock = ksz_regmap_unlock, \ 318 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 319 .val_format_endian = REGMAP_ENDIAN_BIG \ 320 } 321 322 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 323 static const struct regmap_config ksz##_regmap_config[] = { \ 324 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 325 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 326 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 327 } 328 329 #endif 330