1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Microchip switch driver common header
3  *
4  * Copyright (C) 2017-2019 Microchip Technology Inc.
5  */
6 
7 #ifndef __KSZ_COMMON_H
8 #define __KSZ_COMMON_H
9 
10 #include <linux/etherdevice.h>
11 #include <linux/kernel.h>
12 #include <linux/mutex.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
15 #include <net/dsa.h>
16 
17 struct vlan_table {
18 	u32 table[3];
19 };
20 
21 struct ksz_port_mib {
22 	struct mutex cnt_mutex;		/* structure access */
23 	u8 cnt_ptr;
24 	u64 *counters;
25 };
26 
27 struct ksz_port {
28 	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */
29 	int stp_state;
30 	struct phy_device phydev;
31 
32 	u32 on:1;			/* port is not disabled by hardware */
33 	u32 phy:1;			/* port has a PHY */
34 	u32 fiber:1;			/* port is fiber */
35 	u32 sgmii:1;			/* port is SGMII */
36 	u32 force:1;
37 	u32 read:1;			/* read MIB counters in background */
38 	u32 freeze:1;			/* MIB counter freeze is enabled */
39 
40 	struct ksz_port_mib mib;
41 	phy_interface_t interface;
42 };
43 
44 struct ksz_device {
45 	struct dsa_switch *ds;
46 	struct ksz_platform_data *pdata;
47 	const char *name;
48 
49 	struct mutex dev_mutex;		/* device access */
50 	struct mutex regmap_mutex;	/* regmap access */
51 	struct mutex alu_mutex;		/* ALU access */
52 	struct mutex vlan_mutex;	/* vlan access */
53 	const struct ksz_dev_ops *dev_ops;
54 
55 	struct device *dev;
56 	struct regmap *regmap[3];
57 
58 	void *priv;
59 
60 	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */
61 
62 	/* chip specific data */
63 	u32 chip_id;
64 	int num_vlans;
65 	int num_alus;
66 	int num_statics;
67 	int cpu_port;			/* port connected to CPU */
68 	int cpu_ports;			/* port bitmap can be cpu port */
69 	int phy_port_cnt;
70 	int port_cnt;
71 	u8 reg_mib_cnt;
72 	int mib_cnt;
73 	const struct mib_names *mib_names;
74 	phy_interface_t compat_interface;
75 	u32 regs_size;
76 	bool phy_errata_9477;
77 	bool synclko_125;
78 
79 	struct vlan_table *vlan_cache;
80 
81 	struct ksz_port *ports;
82 	struct delayed_work mib_read;
83 	unsigned long mib_read_interval;
84 	u16 mirror_rx;
85 	u16 mirror_tx;
86 	u32 features;			/* chip specific features */
87 	u32 overrides;			/* chip functions set by user */
88 	u16 host_mask;
89 	u16 port_mask;
90 };
91 
92 struct alu_struct {
93 	/* entry 1 */
94 	u8	is_static:1;
95 	u8	is_src_filter:1;
96 	u8	is_dst_filter:1;
97 	u8	prio_age:3;
98 	u32	_reserv_0_1:23;
99 	u8	mstp:3;
100 	/* entry 2 */
101 	u8	is_override:1;
102 	u8	is_use_fid:1;
103 	u32	_reserv_1_1:23;
104 	u8	port_forward:7;
105 	/* entry 3 & 4*/
106 	u32	_reserv_2_1:9;
107 	u8	fid:7;
108 	u8	mac[ETH_ALEN];
109 };
110 
111 struct ksz_dev_ops {
112 	u32 (*get_port_addr)(int port, int offset);
113 	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
114 	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
115 	void (*port_cleanup)(struct ksz_device *dev, int port);
116 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
117 	void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
118 	void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
119 	int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
120 			       u8 *fid, u8 *src_port, u8 *timestamp,
121 			       u16 *entries);
122 	int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
123 			       struct alu_struct *alu);
124 	void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
125 				struct alu_struct *alu);
126 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
127 			  u64 *cnt);
128 	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
129 			  u64 *dropped, u64 *cnt);
130 	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
131 	void (*port_init_cnt)(struct ksz_device *dev, int port);
132 	int (*shutdown)(struct ksz_device *dev);
133 	int (*detect)(struct ksz_device *dev);
134 	int (*init)(struct ksz_device *dev);
135 	void (*exit)(struct ksz_device *dev);
136 };
137 
138 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
139 int ksz_switch_register(struct ksz_device *dev,
140 			const struct ksz_dev_ops *ops);
141 void ksz_switch_remove(struct ksz_device *dev);
142 
143 int ksz8_switch_register(struct ksz_device *dev);
144 int ksz9477_switch_register(struct ksz_device *dev);
145 
146 void ksz_update_port_member(struct ksz_device *dev, int port);
147 void ksz_init_mib_timer(struct ksz_device *dev);
148 
149 /* Common DSA access functions */
150 
151 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
152 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
153 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
154 		       phy_interface_t interface);
155 int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
156 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
157 int ksz_port_bridge_join(struct dsa_switch *ds, int port,
158 			 struct dsa_bridge bridge, bool *tx_fwd_offload);
159 void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
160 			   struct dsa_bridge bridge);
161 void ksz_port_fast_age(struct dsa_switch *ds, int port);
162 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
163 		      void *data);
164 int ksz_port_mdb_add(struct dsa_switch *ds, int port,
165 		     const struct switchdev_obj_port_mdb *mdb);
166 int ksz_port_mdb_del(struct dsa_switch *ds, int port,
167 		     const struct switchdev_obj_port_mdb *mdb);
168 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
169 
170 /* Common register access functions */
171 
172 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
173 {
174 	unsigned int value;
175 	int ret = regmap_read(dev->regmap[0], reg, &value);
176 
177 	*val = value;
178 	return ret;
179 }
180 
181 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
182 {
183 	unsigned int value;
184 	int ret = regmap_read(dev->regmap[1], reg, &value);
185 
186 	*val = value;
187 	return ret;
188 }
189 
190 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
191 {
192 	unsigned int value;
193 	int ret = regmap_read(dev->regmap[2], reg, &value);
194 
195 	*val = value;
196 	return ret;
197 }
198 
199 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
200 {
201 	u32 value[2];
202 	int ret;
203 
204 	ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
205 	if (!ret)
206 		*val = (u64)value[0] << 32 | value[1];
207 
208 	return ret;
209 }
210 
211 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
212 {
213 	return regmap_write(dev->regmap[0], reg, value);
214 }
215 
216 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
217 {
218 	return regmap_write(dev->regmap[1], reg, value);
219 }
220 
221 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
222 {
223 	return regmap_write(dev->regmap[2], reg, value);
224 }
225 
226 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
227 {
228 	u32 val[2];
229 
230 	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
231 	value = swab64(value);
232 	val[0] = swab32(value & 0xffffffffULL);
233 	val[1] = swab32(value >> 32ULL);
234 
235 	return regmap_bulk_write(dev->regmap[2], reg, val, 2);
236 }
237 
238 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
239 			      u8 *data)
240 {
241 	ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
242 }
243 
244 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
245 			       u16 *data)
246 {
247 	ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
248 }
249 
250 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
251 			       u32 *data)
252 {
253 	ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
254 }
255 
256 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
257 			       u8 data)
258 {
259 	ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
260 }
261 
262 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
263 				u16 data)
264 {
265 	ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
266 }
267 
268 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
269 				u32 data)
270 {
271 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
272 }
273 
274 static inline void ksz_regmap_lock(void *__mtx)
275 {
276 	struct mutex *mtx = __mtx;
277 	mutex_lock(mtx);
278 }
279 
280 static inline void ksz_regmap_unlock(void *__mtx)
281 {
282 	struct mutex *mtx = __mtx;
283 	mutex_unlock(mtx);
284 }
285 
286 /* Regmap tables generation */
287 #define KSZ_SPI_OP_RD		3
288 #define KSZ_SPI_OP_WR		2
289 
290 #define swabnot_used(x)		0
291 
292 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\
293 	swab##swp((opcode) << ((regbits) + (regpad)))
294 
295 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\
296 	{								\
297 		.name = #width,						\
298 		.val_bits = (width),					\
299 		.reg_stride = 1,					\
300 		.reg_bits = (regbits) + (regalign),			\
301 		.pad_bits = (regpad),					\
302 		.max_register = BIT(regbits) - 1,			\
303 		.cache_type = REGCACHE_NONE,				\
304 		.read_flag_mask =					\
305 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\
306 					     regbits, regpad),		\
307 		.write_flag_mask =					\
308 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
309 					     regbits, regpad),		\
310 		.lock = ksz_regmap_lock,				\
311 		.unlock = ksz_regmap_unlock,				\
312 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
313 		.val_format_endian = REGMAP_ENDIAN_BIG			\
314 	}
315 
316 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\
317 	static const struct regmap_config ksz##_regmap_config[] = {	\
318 		KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
319 		KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
320 		KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
321 	}
322 
323 #endif
324