1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Microchip switch driver common header 3 * 4 * Copyright (C) 2017-2019 Microchip Technology Inc. 5 */ 6 7 #ifndef __KSZ_COMMON_H 8 #define __KSZ_COMMON_H 9 10 #include <linux/etherdevice.h> 11 #include <linux/kernel.h> 12 #include <linux/mutex.h> 13 #include <linux/phy.h> 14 #include <linux/regmap.h> 15 #include <net/dsa.h> 16 17 struct vlan_table { 18 u32 table[3]; 19 }; 20 21 struct ksz_port_mib { 22 struct mutex cnt_mutex; /* structure access */ 23 u8 cnt_ptr; 24 u64 *counters; 25 struct rtnl_link_stats64 stats64; 26 struct spinlock stats64_lock; 27 }; 28 29 struct ksz_port { 30 bool remove_tag; /* Remove Tag flag set, for ksz8795 only */ 31 int stp_state; 32 struct phy_device phydev; 33 34 u32 on:1; /* port is not disabled by hardware */ 35 u32 phy:1; /* port has a PHY */ 36 u32 fiber:1; /* port is fiber */ 37 u32 sgmii:1; /* port is SGMII */ 38 u32 force:1; 39 u32 read:1; /* read MIB counters in background */ 40 u32 freeze:1; /* MIB counter freeze is enabled */ 41 42 struct ksz_port_mib mib; 43 phy_interface_t interface; 44 u16 max_frame; 45 }; 46 47 struct ksz_device { 48 struct dsa_switch *ds; 49 struct ksz_platform_data *pdata; 50 const char *name; 51 52 struct mutex dev_mutex; /* device access */ 53 struct mutex regmap_mutex; /* regmap access */ 54 struct mutex alu_mutex; /* ALU access */ 55 struct mutex vlan_mutex; /* vlan access */ 56 const struct ksz_dev_ops *dev_ops; 57 58 struct device *dev; 59 struct regmap *regmap[3]; 60 61 void *priv; 62 63 struct gpio_desc *reset_gpio; /* Optional reset GPIO */ 64 65 /* chip specific data */ 66 u32 chip_id; 67 int num_vlans; 68 int num_alus; 69 int num_statics; 70 int cpu_port; /* port connected to CPU */ 71 int cpu_ports; /* port bitmap can be cpu port */ 72 int phy_port_cnt; 73 int port_cnt; 74 u8 reg_mib_cnt; 75 int mib_cnt; 76 const struct mib_names *mib_names; 77 phy_interface_t compat_interface; 78 u32 regs_size; 79 bool phy_errata_9477; 80 bool synclko_125; 81 bool synclko_disable; 82 83 struct vlan_table *vlan_cache; 84 85 struct ksz_port *ports; 86 struct delayed_work mib_read; 87 unsigned long mib_read_interval; 88 u16 mirror_rx; 89 u16 mirror_tx; 90 u32 features; /* chip specific features */ 91 u32 overrides; /* chip functions set by user */ 92 u16 host_mask; 93 u16 port_mask; 94 }; 95 96 struct alu_struct { 97 /* entry 1 */ 98 u8 is_static:1; 99 u8 is_src_filter:1; 100 u8 is_dst_filter:1; 101 u8 prio_age:3; 102 u32 _reserv_0_1:23; 103 u8 mstp:3; 104 /* entry 2 */ 105 u8 is_override:1; 106 u8 is_use_fid:1; 107 u32 _reserv_1_1:23; 108 u8 port_forward:7; 109 /* entry 3 & 4*/ 110 u32 _reserv_2_1:9; 111 u8 fid:7; 112 u8 mac[ETH_ALEN]; 113 }; 114 115 struct ksz_dev_ops { 116 u32 (*get_port_addr)(int port, int offset); 117 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member); 118 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port); 119 void (*port_cleanup)(struct ksz_device *dev, int port); 120 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port); 121 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val); 122 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val); 123 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr, 124 u8 *fid, u8 *src_port, u8 *timestamp, 125 u16 *entries); 126 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr, 127 struct alu_struct *alu); 128 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr, 129 struct alu_struct *alu); 130 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr, 131 u64 *cnt); 132 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr, 133 u64 *dropped, u64 *cnt); 134 void (*r_mib_stat64)(struct ksz_device *dev, int port); 135 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze); 136 void (*port_init_cnt)(struct ksz_device *dev, int port); 137 int (*shutdown)(struct ksz_device *dev); 138 int (*detect)(struct ksz_device *dev); 139 int (*init)(struct ksz_device *dev); 140 void (*exit)(struct ksz_device *dev); 141 }; 142 143 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); 144 int ksz_switch_register(struct ksz_device *dev, 145 const struct ksz_dev_ops *ops); 146 void ksz_switch_remove(struct ksz_device *dev); 147 148 int ksz8_switch_register(struct ksz_device *dev); 149 int ksz9477_switch_register(struct ksz_device *dev); 150 151 void ksz_update_port_member(struct ksz_device *dev, int port); 152 void ksz_init_mib_timer(struct ksz_device *dev); 153 154 /* Common DSA access functions */ 155 156 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg); 157 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val); 158 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, 159 phy_interface_t interface); 160 int ksz_sset_count(struct dsa_switch *ds, int port, int sset); 161 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf); 162 int ksz_port_bridge_join(struct dsa_switch *ds, int port, 163 struct dsa_bridge bridge, bool *tx_fwd_offload, 164 struct netlink_ext_ack *extack); 165 void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 166 struct dsa_bridge bridge); 167 void ksz_port_fast_age(struct dsa_switch *ds, int port); 168 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, 169 void *data); 170 int ksz_port_mdb_add(struct dsa_switch *ds, int port, 171 const struct switchdev_obj_port_mdb *mdb, 172 struct dsa_db db); 173 int ksz_port_mdb_del(struct dsa_switch *ds, int port, 174 const struct switchdev_obj_port_mdb *mdb, 175 struct dsa_db db); 176 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy); 177 178 /* Common register access functions */ 179 180 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) 181 { 182 unsigned int value; 183 int ret = regmap_read(dev->regmap[0], reg, &value); 184 185 *val = value; 186 return ret; 187 } 188 189 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) 190 { 191 unsigned int value; 192 int ret = regmap_read(dev->regmap[1], reg, &value); 193 194 *val = value; 195 return ret; 196 } 197 198 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) 199 { 200 unsigned int value; 201 int ret = regmap_read(dev->regmap[2], reg, &value); 202 203 *val = value; 204 return ret; 205 } 206 207 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) 208 { 209 u32 value[2]; 210 int ret; 211 212 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2); 213 if (!ret) 214 *val = (u64)value[0] << 32 | value[1]; 215 216 return ret; 217 } 218 219 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) 220 { 221 return regmap_write(dev->regmap[0], reg, value); 222 } 223 224 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) 225 { 226 return regmap_write(dev->regmap[1], reg, value); 227 } 228 229 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) 230 { 231 return regmap_write(dev->regmap[2], reg, value); 232 } 233 234 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) 235 { 236 u32 val[2]; 237 238 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */ 239 value = swab64(value); 240 val[0] = swab32(value & 0xffffffffULL); 241 val[1] = swab32(value >> 32ULL); 242 243 return regmap_bulk_write(dev->regmap[2], reg, val, 2); 244 } 245 246 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset, 247 u8 *data) 248 { 249 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data); 250 } 251 252 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset, 253 u16 *data) 254 { 255 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data); 256 } 257 258 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset, 259 u32 *data) 260 { 261 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data); 262 } 263 264 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset, 265 u8 data) 266 { 267 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data); 268 } 269 270 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset, 271 u16 data) 272 { 273 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data); 274 } 275 276 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, 277 u32 data) 278 { 279 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); 280 } 281 282 static inline void ksz_regmap_lock(void *__mtx) 283 { 284 struct mutex *mtx = __mtx; 285 mutex_lock(mtx); 286 } 287 288 static inline void ksz_regmap_unlock(void *__mtx) 289 { 290 struct mutex *mtx = __mtx; 291 mutex_unlock(mtx); 292 } 293 294 /* Regmap tables generation */ 295 #define KSZ_SPI_OP_RD 3 296 #define KSZ_SPI_OP_WR 2 297 298 #define swabnot_used(x) 0 299 300 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ 301 swab##swp((opcode) << ((regbits) + (regpad))) 302 303 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ 304 { \ 305 .name = #width, \ 306 .val_bits = (width), \ 307 .reg_stride = 1, \ 308 .reg_bits = (regbits) + (regalign), \ 309 .pad_bits = (regpad), \ 310 .max_register = BIT(regbits) - 1, \ 311 .cache_type = REGCACHE_NONE, \ 312 .read_flag_mask = \ 313 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ 314 regbits, regpad), \ 315 .write_flag_mask = \ 316 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ 317 regbits, regpad), \ 318 .lock = ksz_regmap_lock, \ 319 .unlock = ksz_regmap_unlock, \ 320 .reg_format_endian = REGMAP_ENDIAN_BIG, \ 321 .val_format_endian = REGMAP_ENDIAN_BIG \ 322 } 323 324 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ 325 static const struct regmap_config ksz##_regmap_config[] = { \ 326 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ 327 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ 328 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ 329 } 330 331 #endif 332