1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Microchip switch driver main logic 4 * 5 * Copyright (C) 2017-2019 Microchip Technology Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/export.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/platform_data/microchip-ksz.h> 14 #include <linux/phy.h> 15 #include <linux/etherdevice.h> 16 #include <linux/if_bridge.h> 17 #include <linux/of_device.h> 18 #include <linux/of_net.h> 19 #include <linux/micrel_phy.h> 20 #include <net/dsa.h> 21 #include <net/switchdev.h> 22 23 #include "ksz_common.h" 24 #include "ksz8.h" 25 #include "ksz9477.h" 26 27 #define MIB_COUNTER_NUM 0x20 28 29 struct ksz_stats_raw { 30 u64 rx_hi; 31 u64 rx_undersize; 32 u64 rx_fragments; 33 u64 rx_oversize; 34 u64 rx_jabbers; 35 u64 rx_symbol_err; 36 u64 rx_crc_err; 37 u64 rx_align_err; 38 u64 rx_mac_ctrl; 39 u64 rx_pause; 40 u64 rx_bcast; 41 u64 rx_mcast; 42 u64 rx_ucast; 43 u64 rx_64_or_less; 44 u64 rx_65_127; 45 u64 rx_128_255; 46 u64 rx_256_511; 47 u64 rx_512_1023; 48 u64 rx_1024_1522; 49 u64 rx_1523_2000; 50 u64 rx_2001; 51 u64 tx_hi; 52 u64 tx_late_col; 53 u64 tx_pause; 54 u64 tx_bcast; 55 u64 tx_mcast; 56 u64 tx_ucast; 57 u64 tx_deferred; 58 u64 tx_total_col; 59 u64 tx_exc_col; 60 u64 tx_single_col; 61 u64 tx_mult_col; 62 u64 rx_total; 63 u64 tx_total; 64 u64 rx_discards; 65 u64 tx_discards; 66 }; 67 68 static const struct ksz_mib_names ksz88xx_mib_names[] = { 69 { 0x00, "rx" }, 70 { 0x01, "rx_hi" }, 71 { 0x02, "rx_undersize" }, 72 { 0x03, "rx_fragments" }, 73 { 0x04, "rx_oversize" }, 74 { 0x05, "rx_jabbers" }, 75 { 0x06, "rx_symbol_err" }, 76 { 0x07, "rx_crc_err" }, 77 { 0x08, "rx_align_err" }, 78 { 0x09, "rx_mac_ctrl" }, 79 { 0x0a, "rx_pause" }, 80 { 0x0b, "rx_bcast" }, 81 { 0x0c, "rx_mcast" }, 82 { 0x0d, "rx_ucast" }, 83 { 0x0e, "rx_64_or_less" }, 84 { 0x0f, "rx_65_127" }, 85 { 0x10, "rx_128_255" }, 86 { 0x11, "rx_256_511" }, 87 { 0x12, "rx_512_1023" }, 88 { 0x13, "rx_1024_1522" }, 89 { 0x14, "tx" }, 90 { 0x15, "tx_hi" }, 91 { 0x16, "tx_late_col" }, 92 { 0x17, "tx_pause" }, 93 { 0x18, "tx_bcast" }, 94 { 0x19, "tx_mcast" }, 95 { 0x1a, "tx_ucast" }, 96 { 0x1b, "tx_deferred" }, 97 { 0x1c, "tx_total_col" }, 98 { 0x1d, "tx_exc_col" }, 99 { 0x1e, "tx_single_col" }, 100 { 0x1f, "tx_mult_col" }, 101 { 0x100, "rx_discards" }, 102 { 0x101, "tx_discards" }, 103 }; 104 105 static const struct ksz_mib_names ksz9477_mib_names[] = { 106 { 0x00, "rx_hi" }, 107 { 0x01, "rx_undersize" }, 108 { 0x02, "rx_fragments" }, 109 { 0x03, "rx_oversize" }, 110 { 0x04, "rx_jabbers" }, 111 { 0x05, "rx_symbol_err" }, 112 { 0x06, "rx_crc_err" }, 113 { 0x07, "rx_align_err" }, 114 { 0x08, "rx_mac_ctrl" }, 115 { 0x09, "rx_pause" }, 116 { 0x0A, "rx_bcast" }, 117 { 0x0B, "rx_mcast" }, 118 { 0x0C, "rx_ucast" }, 119 { 0x0D, "rx_64_or_less" }, 120 { 0x0E, "rx_65_127" }, 121 { 0x0F, "rx_128_255" }, 122 { 0x10, "rx_256_511" }, 123 { 0x11, "rx_512_1023" }, 124 { 0x12, "rx_1024_1522" }, 125 { 0x13, "rx_1523_2000" }, 126 { 0x14, "rx_2001" }, 127 { 0x15, "tx_hi" }, 128 { 0x16, "tx_late_col" }, 129 { 0x17, "tx_pause" }, 130 { 0x18, "tx_bcast" }, 131 { 0x19, "tx_mcast" }, 132 { 0x1A, "tx_ucast" }, 133 { 0x1B, "tx_deferred" }, 134 { 0x1C, "tx_total_col" }, 135 { 0x1D, "tx_exc_col" }, 136 { 0x1E, "tx_single_col" }, 137 { 0x1F, "tx_mult_col" }, 138 { 0x80, "rx_total" }, 139 { 0x81, "tx_total" }, 140 { 0x82, "rx_discards" }, 141 { 0x83, "tx_discards" }, 142 }; 143 144 static const struct ksz_dev_ops ksz8_dev_ops = { 145 .setup = ksz8_setup, 146 .get_port_addr = ksz8_get_port_addr, 147 .cfg_port_member = ksz8_cfg_port_member, 148 .flush_dyn_mac_table = ksz8_flush_dyn_mac_table, 149 .port_setup = ksz8_port_setup, 150 .r_phy = ksz8_r_phy, 151 .w_phy = ksz8_w_phy, 152 .r_mib_pkt = ksz8_r_mib_pkt, 153 .freeze_mib = ksz8_freeze_mib, 154 .port_init_cnt = ksz8_port_init_cnt, 155 .fdb_dump = ksz8_fdb_dump, 156 .mdb_add = ksz8_mdb_add, 157 .mdb_del = ksz8_mdb_del, 158 .vlan_filtering = ksz8_port_vlan_filtering, 159 .vlan_add = ksz8_port_vlan_add, 160 .vlan_del = ksz8_port_vlan_del, 161 .mirror_add = ksz8_port_mirror_add, 162 .mirror_del = ksz8_port_mirror_del, 163 .get_caps = ksz8_get_caps, 164 .config_cpu_port = ksz8_config_cpu_port, 165 .enable_stp_addr = ksz8_enable_stp_addr, 166 .reset = ksz8_reset_switch, 167 .init = ksz8_switch_init, 168 .exit = ksz8_switch_exit, 169 }; 170 171 static const struct ksz_dev_ops ksz9477_dev_ops = { 172 .setup = ksz9477_setup, 173 .get_port_addr = ksz9477_get_port_addr, 174 .cfg_port_member = ksz9477_cfg_port_member, 175 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table, 176 .port_setup = ksz9477_port_setup, 177 .r_phy = ksz9477_r_phy, 178 .w_phy = ksz9477_w_phy, 179 .r_mib_cnt = ksz9477_r_mib_cnt, 180 .r_mib_pkt = ksz9477_r_mib_pkt, 181 .r_mib_stat64 = ksz_r_mib_stats64, 182 .freeze_mib = ksz9477_freeze_mib, 183 .port_init_cnt = ksz9477_port_init_cnt, 184 .vlan_filtering = ksz9477_port_vlan_filtering, 185 .vlan_add = ksz9477_port_vlan_add, 186 .vlan_del = ksz9477_port_vlan_del, 187 .mirror_add = ksz9477_port_mirror_add, 188 .mirror_del = ksz9477_port_mirror_del, 189 .get_caps = ksz9477_get_caps, 190 .fdb_dump = ksz9477_fdb_dump, 191 .fdb_add = ksz9477_fdb_add, 192 .fdb_del = ksz9477_fdb_del, 193 .mdb_add = ksz9477_mdb_add, 194 .mdb_del = ksz9477_mdb_del, 195 .change_mtu = ksz9477_change_mtu, 196 .max_mtu = ksz9477_max_mtu, 197 .config_cpu_port = ksz9477_config_cpu_port, 198 .enable_stp_addr = ksz9477_enable_stp_addr, 199 .reset = ksz9477_reset_switch, 200 .init = ksz9477_switch_init, 201 .exit = ksz9477_switch_exit, 202 }; 203 204 static const u16 ksz8795_regs[] = { 205 [REG_IND_CTRL_0] = 0x6E, 206 [REG_IND_DATA_8] = 0x70, 207 [REG_IND_DATA_CHECK] = 0x72, 208 [REG_IND_DATA_HI] = 0x71, 209 [REG_IND_DATA_LO] = 0x75, 210 [REG_IND_MIB_CHECK] = 0x74, 211 [REG_IND_BYTE] = 0xA0, 212 [P_FORCE_CTRL] = 0x0C, 213 [P_LINK_STATUS] = 0x0E, 214 [P_LOCAL_CTRL] = 0x07, 215 [P_NEG_RESTART_CTRL] = 0x0D, 216 [P_REMOTE_STATUS] = 0x08, 217 [P_SPEED_STATUS] = 0x09, 218 [S_TAIL_TAG_CTRL] = 0x0C, 219 [P_STP_CTRL] = 0x02, 220 [S_START_CTRL] = 0x01, 221 [S_BROADCAST_CTRL] = 0x06, 222 [S_MULTICAST_CTRL] = 0x04, 223 }; 224 225 static const u32 ksz8795_masks[] = { 226 [PORT_802_1P_REMAPPING] = BIT(7), 227 [SW_TAIL_TAG_ENABLE] = BIT(1), 228 [MIB_COUNTER_OVERFLOW] = BIT(6), 229 [MIB_COUNTER_VALID] = BIT(5), 230 [VLAN_TABLE_FID] = GENMASK(6, 0), 231 [VLAN_TABLE_MEMBERSHIP] = GENMASK(11, 7), 232 [VLAN_TABLE_VALID] = BIT(12), 233 [STATIC_MAC_TABLE_VALID] = BIT(21), 234 [STATIC_MAC_TABLE_USE_FID] = BIT(23), 235 [STATIC_MAC_TABLE_FID] = GENMASK(30, 24), 236 [STATIC_MAC_TABLE_OVERRIDE] = BIT(26), 237 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(24, 20), 238 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(6, 0), 239 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(8), 240 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 241 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 29), 242 [DYNAMIC_MAC_TABLE_FID] = GENMASK(26, 20), 243 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(26, 24), 244 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(28, 27), 245 }; 246 247 static const u8 ksz8795_shifts[] = { 248 [VLAN_TABLE_MEMBERSHIP_S] = 7, 249 [VLAN_TABLE] = 16, 250 [STATIC_MAC_FWD_PORTS] = 16, 251 [STATIC_MAC_FID] = 24, 252 [DYNAMIC_MAC_ENTRIES_H] = 3, 253 [DYNAMIC_MAC_ENTRIES] = 29, 254 [DYNAMIC_MAC_FID] = 16, 255 [DYNAMIC_MAC_TIMESTAMP] = 27, 256 [DYNAMIC_MAC_SRC_PORT] = 24, 257 }; 258 259 static const u16 ksz8863_regs[] = { 260 [REG_IND_CTRL_0] = 0x79, 261 [REG_IND_DATA_8] = 0x7B, 262 [REG_IND_DATA_CHECK] = 0x7B, 263 [REG_IND_DATA_HI] = 0x7C, 264 [REG_IND_DATA_LO] = 0x80, 265 [REG_IND_MIB_CHECK] = 0x80, 266 [P_FORCE_CTRL] = 0x0C, 267 [P_LINK_STATUS] = 0x0E, 268 [P_LOCAL_CTRL] = 0x0C, 269 [P_NEG_RESTART_CTRL] = 0x0D, 270 [P_REMOTE_STATUS] = 0x0E, 271 [P_SPEED_STATUS] = 0x0F, 272 [S_TAIL_TAG_CTRL] = 0x03, 273 [P_STP_CTRL] = 0x02, 274 [S_START_CTRL] = 0x01, 275 [S_BROADCAST_CTRL] = 0x06, 276 [S_MULTICAST_CTRL] = 0x04, 277 }; 278 279 static const u32 ksz8863_masks[] = { 280 [PORT_802_1P_REMAPPING] = BIT(3), 281 [SW_TAIL_TAG_ENABLE] = BIT(6), 282 [MIB_COUNTER_OVERFLOW] = BIT(7), 283 [MIB_COUNTER_VALID] = BIT(6), 284 [VLAN_TABLE_FID] = GENMASK(15, 12), 285 [VLAN_TABLE_MEMBERSHIP] = GENMASK(18, 16), 286 [VLAN_TABLE_VALID] = BIT(19), 287 [STATIC_MAC_TABLE_VALID] = BIT(19), 288 [STATIC_MAC_TABLE_USE_FID] = BIT(21), 289 [STATIC_MAC_TABLE_FID] = GENMASK(29, 26), 290 [STATIC_MAC_TABLE_OVERRIDE] = BIT(20), 291 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(18, 16), 292 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(5, 0), 293 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(7), 294 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 295 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 28), 296 [DYNAMIC_MAC_TABLE_FID] = GENMASK(19, 16), 297 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(21, 20), 298 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(23, 22), 299 }; 300 301 static u8 ksz8863_shifts[] = { 302 [VLAN_TABLE_MEMBERSHIP_S] = 16, 303 [STATIC_MAC_FWD_PORTS] = 16, 304 [STATIC_MAC_FID] = 22, 305 [DYNAMIC_MAC_ENTRIES_H] = 3, 306 [DYNAMIC_MAC_ENTRIES] = 24, 307 [DYNAMIC_MAC_FID] = 16, 308 [DYNAMIC_MAC_TIMESTAMP] = 24, 309 [DYNAMIC_MAC_SRC_PORT] = 20, 310 }; 311 312 static const u16 ksz9477_regs[] = { 313 [P_STP_CTRL] = 0x0B04, 314 [S_START_CTRL] = 0x0300, 315 [S_BROADCAST_CTRL] = 0x0332, 316 [S_MULTICAST_CTRL] = 0x0331, 317 318 }; 319 320 const struct ksz_chip_data ksz_switch_chips[] = { 321 [KSZ8795] = { 322 .chip_id = KSZ8795_CHIP_ID, 323 .dev_name = "KSZ8795", 324 .num_vlans = 4096, 325 .num_alus = 0, 326 .num_statics = 8, 327 .cpu_ports = 0x10, /* can be configured as cpu port */ 328 .port_cnt = 5, /* total cpu and user ports */ 329 .ops = &ksz8_dev_ops, 330 .ksz87xx_eee_link_erratum = true, 331 .mib_names = ksz9477_mib_names, 332 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 333 .reg_mib_cnt = MIB_COUNTER_NUM, 334 .regs = ksz8795_regs, 335 .masks = ksz8795_masks, 336 .shifts = ksz8795_shifts, 337 .supports_mii = {false, false, false, false, true}, 338 .supports_rmii = {false, false, false, false, true}, 339 .supports_rgmii = {false, false, false, false, true}, 340 .internal_phy = {true, true, true, true, false}, 341 }, 342 343 [KSZ8794] = { 344 /* WARNING 345 * ======= 346 * KSZ8794 is similar to KSZ8795, except the port map 347 * contains a gap between external and CPU ports, the 348 * port map is NOT continuous. The per-port register 349 * map is shifted accordingly too, i.e. registers at 350 * offset 0x40 are NOT used on KSZ8794 and they ARE 351 * used on KSZ8795 for external port 3. 352 * external cpu 353 * KSZ8794 0,1,2 4 354 * KSZ8795 0,1,2,3 4 355 * KSZ8765 0,1,2,3 4 356 * port_cnt is configured as 5, even though it is 4 357 */ 358 .chip_id = KSZ8794_CHIP_ID, 359 .dev_name = "KSZ8794", 360 .num_vlans = 4096, 361 .num_alus = 0, 362 .num_statics = 8, 363 .cpu_ports = 0x10, /* can be configured as cpu port */ 364 .port_cnt = 5, /* total cpu and user ports */ 365 .ops = &ksz8_dev_ops, 366 .ksz87xx_eee_link_erratum = true, 367 .mib_names = ksz9477_mib_names, 368 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 369 .reg_mib_cnt = MIB_COUNTER_NUM, 370 .regs = ksz8795_regs, 371 .masks = ksz8795_masks, 372 .shifts = ksz8795_shifts, 373 .supports_mii = {false, false, false, false, true}, 374 .supports_rmii = {false, false, false, false, true}, 375 .supports_rgmii = {false, false, false, false, true}, 376 .internal_phy = {true, true, true, false, false}, 377 }, 378 379 [KSZ8765] = { 380 .chip_id = KSZ8765_CHIP_ID, 381 .dev_name = "KSZ8765", 382 .num_vlans = 4096, 383 .num_alus = 0, 384 .num_statics = 8, 385 .cpu_ports = 0x10, /* can be configured as cpu port */ 386 .port_cnt = 5, /* total cpu and user ports */ 387 .ops = &ksz8_dev_ops, 388 .ksz87xx_eee_link_erratum = true, 389 .mib_names = ksz9477_mib_names, 390 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 391 .reg_mib_cnt = MIB_COUNTER_NUM, 392 .regs = ksz8795_regs, 393 .masks = ksz8795_masks, 394 .shifts = ksz8795_shifts, 395 .supports_mii = {false, false, false, false, true}, 396 .supports_rmii = {false, false, false, false, true}, 397 .supports_rgmii = {false, false, false, false, true}, 398 .internal_phy = {true, true, true, true, false}, 399 }, 400 401 [KSZ8830] = { 402 .chip_id = KSZ8830_CHIP_ID, 403 .dev_name = "KSZ8863/KSZ8873", 404 .num_vlans = 16, 405 .num_alus = 0, 406 .num_statics = 8, 407 .cpu_ports = 0x4, /* can be configured as cpu port */ 408 .port_cnt = 3, 409 .ops = &ksz8_dev_ops, 410 .mib_names = ksz88xx_mib_names, 411 .mib_cnt = ARRAY_SIZE(ksz88xx_mib_names), 412 .reg_mib_cnt = MIB_COUNTER_NUM, 413 .regs = ksz8863_regs, 414 .masks = ksz8863_masks, 415 .shifts = ksz8863_shifts, 416 .supports_mii = {false, false, true}, 417 .supports_rmii = {false, false, true}, 418 .internal_phy = {true, true, false}, 419 }, 420 421 [KSZ9477] = { 422 .chip_id = KSZ9477_CHIP_ID, 423 .dev_name = "KSZ9477", 424 .num_vlans = 4096, 425 .num_alus = 4096, 426 .num_statics = 16, 427 .cpu_ports = 0x7F, /* can be configured as cpu port */ 428 .port_cnt = 7, /* total physical port count */ 429 .ops = &ksz9477_dev_ops, 430 .phy_errata_9477 = true, 431 .mib_names = ksz9477_mib_names, 432 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 433 .reg_mib_cnt = MIB_COUNTER_NUM, 434 .regs = ksz9477_regs, 435 .supports_mii = {false, false, false, false, 436 false, true, false}, 437 .supports_rmii = {false, false, false, false, 438 false, true, false}, 439 .supports_rgmii = {false, false, false, false, 440 false, true, false}, 441 .internal_phy = {true, true, true, true, 442 true, false, false}, 443 }, 444 445 [KSZ9897] = { 446 .chip_id = KSZ9897_CHIP_ID, 447 .dev_name = "KSZ9897", 448 .num_vlans = 4096, 449 .num_alus = 4096, 450 .num_statics = 16, 451 .cpu_ports = 0x7F, /* can be configured as cpu port */ 452 .port_cnt = 7, /* total physical port count */ 453 .ops = &ksz9477_dev_ops, 454 .phy_errata_9477 = true, 455 .mib_names = ksz9477_mib_names, 456 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 457 .reg_mib_cnt = MIB_COUNTER_NUM, 458 .regs = ksz9477_regs, 459 .supports_mii = {false, false, false, false, 460 false, true, true}, 461 .supports_rmii = {false, false, false, false, 462 false, true, true}, 463 .supports_rgmii = {false, false, false, false, 464 false, true, true}, 465 .internal_phy = {true, true, true, true, 466 true, false, false}, 467 }, 468 469 [KSZ9893] = { 470 .chip_id = KSZ9893_CHIP_ID, 471 .dev_name = "KSZ9893", 472 .num_vlans = 4096, 473 .num_alus = 4096, 474 .num_statics = 16, 475 .cpu_ports = 0x07, /* can be configured as cpu port */ 476 .port_cnt = 3, /* total port count */ 477 .ops = &ksz9477_dev_ops, 478 .mib_names = ksz9477_mib_names, 479 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 480 .reg_mib_cnt = MIB_COUNTER_NUM, 481 .regs = ksz9477_regs, 482 .supports_mii = {false, false, true}, 483 .supports_rmii = {false, false, true}, 484 .supports_rgmii = {false, false, true}, 485 .internal_phy = {true, true, false}, 486 }, 487 488 [KSZ9567] = { 489 .chip_id = KSZ9567_CHIP_ID, 490 .dev_name = "KSZ9567", 491 .num_vlans = 4096, 492 .num_alus = 4096, 493 .num_statics = 16, 494 .cpu_ports = 0x7F, /* can be configured as cpu port */ 495 .port_cnt = 7, /* total physical port count */ 496 .ops = &ksz9477_dev_ops, 497 .phy_errata_9477 = true, 498 .mib_names = ksz9477_mib_names, 499 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 500 .reg_mib_cnt = MIB_COUNTER_NUM, 501 .regs = ksz9477_regs, 502 .supports_mii = {false, false, false, false, 503 false, true, true}, 504 .supports_rmii = {false, false, false, false, 505 false, true, true}, 506 .supports_rgmii = {false, false, false, false, 507 false, true, true}, 508 .internal_phy = {true, true, true, true, 509 true, false, false}, 510 }, 511 512 [LAN9370] = { 513 .chip_id = LAN9370_CHIP_ID, 514 .dev_name = "LAN9370", 515 .num_vlans = 4096, 516 .num_alus = 1024, 517 .num_statics = 256, 518 .cpu_ports = 0x10, /* can be configured as cpu port */ 519 .port_cnt = 5, /* total physical port count */ 520 .mib_names = ksz9477_mib_names, 521 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 522 .reg_mib_cnt = MIB_COUNTER_NUM, 523 .regs = ksz9477_regs, 524 .supports_mii = {false, false, false, false, true}, 525 .supports_rmii = {false, false, false, false, true}, 526 .supports_rgmii = {false, false, false, false, true}, 527 .internal_phy = {true, true, true, true, false}, 528 }, 529 530 [LAN9371] = { 531 .chip_id = LAN9371_CHIP_ID, 532 .dev_name = "LAN9371", 533 .num_vlans = 4096, 534 .num_alus = 1024, 535 .num_statics = 256, 536 .cpu_ports = 0x30, /* can be configured as cpu port */ 537 .port_cnt = 6, /* total physical port count */ 538 .mib_names = ksz9477_mib_names, 539 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 540 .reg_mib_cnt = MIB_COUNTER_NUM, 541 .regs = ksz9477_regs, 542 .supports_mii = {false, false, false, false, true, true}, 543 .supports_rmii = {false, false, false, false, true, true}, 544 .supports_rgmii = {false, false, false, false, true, true}, 545 .internal_phy = {true, true, true, true, false, false}, 546 }, 547 548 [LAN9372] = { 549 .chip_id = LAN9372_CHIP_ID, 550 .dev_name = "LAN9372", 551 .num_vlans = 4096, 552 .num_alus = 1024, 553 .num_statics = 256, 554 .cpu_ports = 0x30, /* can be configured as cpu port */ 555 .port_cnt = 8, /* total physical port count */ 556 .mib_names = ksz9477_mib_names, 557 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 558 .reg_mib_cnt = MIB_COUNTER_NUM, 559 .regs = ksz9477_regs, 560 .supports_mii = {false, false, false, false, 561 true, true, false, false}, 562 .supports_rmii = {false, false, false, false, 563 true, true, false, false}, 564 .supports_rgmii = {false, false, false, false, 565 true, true, false, false}, 566 .internal_phy = {true, true, true, true, 567 false, false, true, true}, 568 }, 569 570 [LAN9373] = { 571 .chip_id = LAN9373_CHIP_ID, 572 .dev_name = "LAN9373", 573 .num_vlans = 4096, 574 .num_alus = 1024, 575 .num_statics = 256, 576 .cpu_ports = 0x38, /* can be configured as cpu port */ 577 .port_cnt = 5, /* total physical port count */ 578 .mib_names = ksz9477_mib_names, 579 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 580 .reg_mib_cnt = MIB_COUNTER_NUM, 581 .regs = ksz9477_regs, 582 .supports_mii = {false, false, false, false, 583 true, true, false, false}, 584 .supports_rmii = {false, false, false, false, 585 true, true, false, false}, 586 .supports_rgmii = {false, false, false, false, 587 true, true, false, false}, 588 .internal_phy = {true, true, true, false, 589 false, false, true, true}, 590 }, 591 592 [LAN9374] = { 593 .chip_id = LAN9374_CHIP_ID, 594 .dev_name = "LAN9374", 595 .num_vlans = 4096, 596 .num_alus = 1024, 597 .num_statics = 256, 598 .cpu_ports = 0x30, /* can be configured as cpu port */ 599 .port_cnt = 8, /* total physical port count */ 600 .mib_names = ksz9477_mib_names, 601 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 602 .reg_mib_cnt = MIB_COUNTER_NUM, 603 .regs = ksz9477_regs, 604 .supports_mii = {false, false, false, false, 605 true, true, false, false}, 606 .supports_rmii = {false, false, false, false, 607 true, true, false, false}, 608 .supports_rgmii = {false, false, false, false, 609 true, true, false, false}, 610 .internal_phy = {true, true, true, true, 611 false, false, true, true}, 612 }, 613 }; 614 EXPORT_SYMBOL_GPL(ksz_switch_chips); 615 616 static const struct ksz_chip_data *ksz_lookup_info(unsigned int prod_num) 617 { 618 int i; 619 620 for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) { 621 const struct ksz_chip_data *chip = &ksz_switch_chips[i]; 622 623 if (chip->chip_id == prod_num) 624 return chip; 625 } 626 627 return NULL; 628 } 629 630 static int ksz_check_device_id(struct ksz_device *dev) 631 { 632 const struct ksz_chip_data *dt_chip_data; 633 634 dt_chip_data = of_device_get_match_data(dev->dev); 635 636 /* Check for Device Tree and Chip ID */ 637 if (dt_chip_data->chip_id != dev->chip_id) { 638 dev_err(dev->dev, 639 "Device tree specifies chip %s but found %s, please fix it!\n", 640 dt_chip_data->dev_name, dev->info->dev_name); 641 return -ENODEV; 642 } 643 644 return 0; 645 } 646 647 static void ksz_phylink_get_caps(struct dsa_switch *ds, int port, 648 struct phylink_config *config) 649 { 650 struct ksz_device *dev = ds->priv; 651 652 config->legacy_pre_march2020 = false; 653 654 if (dev->info->supports_mii[port]) 655 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); 656 657 if (dev->info->supports_rmii[port]) 658 __set_bit(PHY_INTERFACE_MODE_RMII, 659 config->supported_interfaces); 660 661 if (dev->info->supports_rgmii[port]) 662 phy_interface_set_rgmii(config->supported_interfaces); 663 664 if (dev->info->internal_phy[port]) 665 __set_bit(PHY_INTERFACE_MODE_INTERNAL, 666 config->supported_interfaces); 667 668 if (dev->dev_ops->get_caps) 669 dev->dev_ops->get_caps(dev, port, config); 670 } 671 672 void ksz_r_mib_stats64(struct ksz_device *dev, int port) 673 { 674 struct rtnl_link_stats64 *stats; 675 struct ksz_stats_raw *raw; 676 struct ksz_port_mib *mib; 677 678 mib = &dev->ports[port].mib; 679 stats = &mib->stats64; 680 raw = (struct ksz_stats_raw *)mib->counters; 681 682 spin_lock(&mib->stats64_lock); 683 684 stats->rx_packets = raw->rx_bcast + raw->rx_mcast + raw->rx_ucast; 685 stats->tx_packets = raw->tx_bcast + raw->tx_mcast + raw->tx_ucast; 686 687 /* HW counters are counting bytes + FCS which is not acceptable 688 * for rtnl_link_stats64 interface 689 */ 690 stats->rx_bytes = raw->rx_total - stats->rx_packets * ETH_FCS_LEN; 691 stats->tx_bytes = raw->tx_total - stats->tx_packets * ETH_FCS_LEN; 692 693 stats->rx_length_errors = raw->rx_undersize + raw->rx_fragments + 694 raw->rx_oversize; 695 696 stats->rx_crc_errors = raw->rx_crc_err; 697 stats->rx_frame_errors = raw->rx_align_err; 698 stats->rx_dropped = raw->rx_discards; 699 stats->rx_errors = stats->rx_length_errors + stats->rx_crc_errors + 700 stats->rx_frame_errors + stats->rx_dropped; 701 702 stats->tx_window_errors = raw->tx_late_col; 703 stats->tx_fifo_errors = raw->tx_discards; 704 stats->tx_aborted_errors = raw->tx_exc_col; 705 stats->tx_errors = stats->tx_window_errors + stats->tx_fifo_errors + 706 stats->tx_aborted_errors; 707 708 stats->multicast = raw->rx_mcast; 709 stats->collisions = raw->tx_total_col; 710 711 spin_unlock(&mib->stats64_lock); 712 } 713 714 static void ksz_get_stats64(struct dsa_switch *ds, int port, 715 struct rtnl_link_stats64 *s) 716 { 717 struct ksz_device *dev = ds->priv; 718 struct ksz_port_mib *mib; 719 720 mib = &dev->ports[port].mib; 721 722 spin_lock(&mib->stats64_lock); 723 memcpy(s, &mib->stats64, sizeof(*s)); 724 spin_unlock(&mib->stats64_lock); 725 } 726 727 static void ksz_get_strings(struct dsa_switch *ds, int port, 728 u32 stringset, uint8_t *buf) 729 { 730 struct ksz_device *dev = ds->priv; 731 int i; 732 733 if (stringset != ETH_SS_STATS) 734 return; 735 736 for (i = 0; i < dev->info->mib_cnt; i++) { 737 memcpy(buf + i * ETH_GSTRING_LEN, 738 dev->info->mib_names[i].string, ETH_GSTRING_LEN); 739 } 740 } 741 742 static void ksz_update_port_member(struct ksz_device *dev, int port) 743 { 744 struct ksz_port *p = &dev->ports[port]; 745 struct dsa_switch *ds = dev->ds; 746 u8 port_member = 0, cpu_port; 747 const struct dsa_port *dp; 748 int i, j; 749 750 if (!dsa_is_user_port(ds, port)) 751 return; 752 753 dp = dsa_to_port(ds, port); 754 cpu_port = BIT(dsa_upstream_port(ds, port)); 755 756 for (i = 0; i < ds->num_ports; i++) { 757 const struct dsa_port *other_dp = dsa_to_port(ds, i); 758 struct ksz_port *other_p = &dev->ports[i]; 759 u8 val = 0; 760 761 if (!dsa_is_user_port(ds, i)) 762 continue; 763 if (port == i) 764 continue; 765 if (!dsa_port_bridge_same(dp, other_dp)) 766 continue; 767 if (other_p->stp_state != BR_STATE_FORWARDING) 768 continue; 769 770 if (p->stp_state == BR_STATE_FORWARDING) { 771 val |= BIT(port); 772 port_member |= BIT(i); 773 } 774 775 /* Retain port [i]'s relationship to other ports than [port] */ 776 for (j = 0; j < ds->num_ports; j++) { 777 const struct dsa_port *third_dp; 778 struct ksz_port *third_p; 779 780 if (j == i) 781 continue; 782 if (j == port) 783 continue; 784 if (!dsa_is_user_port(ds, j)) 785 continue; 786 third_p = &dev->ports[j]; 787 if (third_p->stp_state != BR_STATE_FORWARDING) 788 continue; 789 third_dp = dsa_to_port(ds, j); 790 if (dsa_port_bridge_same(other_dp, third_dp)) 791 val |= BIT(j); 792 } 793 794 dev->dev_ops->cfg_port_member(dev, i, val | cpu_port); 795 } 796 797 dev->dev_ops->cfg_port_member(dev, port, port_member | cpu_port); 798 } 799 800 static int ksz_setup(struct dsa_switch *ds) 801 { 802 struct ksz_device *dev = ds->priv; 803 const u16 *regs; 804 int ret; 805 806 regs = dev->info->regs; 807 808 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table), 809 dev->info->num_vlans, GFP_KERNEL); 810 if (!dev->vlan_cache) 811 return -ENOMEM; 812 813 ret = dev->dev_ops->reset(dev); 814 if (ret) { 815 dev_err(ds->dev, "failed to reset switch\n"); 816 return ret; 817 } 818 819 /* set broadcast storm protection 10% rate */ 820 regmap_update_bits(dev->regmap[1], regs[S_BROADCAST_CTRL], 821 BROADCAST_STORM_RATE, 822 (BROADCAST_STORM_VALUE * 823 BROADCAST_STORM_PROT_RATE) / 100); 824 825 dev->dev_ops->config_cpu_port(ds); 826 827 dev->dev_ops->enable_stp_addr(dev); 828 829 regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL], 830 MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE); 831 832 ksz_init_mib_timer(dev); 833 834 ds->configure_vlan_while_not_filtering = false; 835 836 if (dev->dev_ops->setup) { 837 ret = dev->dev_ops->setup(ds); 838 if (ret) 839 return ret; 840 } 841 842 /* start switch */ 843 regmap_update_bits(dev->regmap[0], regs[S_START_CTRL], 844 SW_START, SW_START); 845 846 return 0; 847 } 848 849 static void port_r_cnt(struct ksz_device *dev, int port) 850 { 851 struct ksz_port_mib *mib = &dev->ports[port].mib; 852 u64 *dropped; 853 854 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */ 855 while (mib->cnt_ptr < dev->info->reg_mib_cnt) { 856 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr, 857 &mib->counters[mib->cnt_ptr]); 858 ++mib->cnt_ptr; 859 } 860 861 /* last one in storage */ 862 dropped = &mib->counters[dev->info->mib_cnt]; 863 864 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */ 865 while (mib->cnt_ptr < dev->info->mib_cnt) { 866 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr, 867 dropped, &mib->counters[mib->cnt_ptr]); 868 ++mib->cnt_ptr; 869 } 870 mib->cnt_ptr = 0; 871 } 872 873 static void ksz_mib_read_work(struct work_struct *work) 874 { 875 struct ksz_device *dev = container_of(work, struct ksz_device, 876 mib_read.work); 877 struct ksz_port_mib *mib; 878 struct ksz_port *p; 879 int i; 880 881 for (i = 0; i < dev->info->port_cnt; i++) { 882 if (dsa_is_unused_port(dev->ds, i)) 883 continue; 884 885 p = &dev->ports[i]; 886 mib = &p->mib; 887 mutex_lock(&mib->cnt_mutex); 888 889 /* Only read MIB counters when the port is told to do. 890 * If not, read only dropped counters when link is not up. 891 */ 892 if (!p->read) { 893 const struct dsa_port *dp = dsa_to_port(dev->ds, i); 894 895 if (!netif_carrier_ok(dp->slave)) 896 mib->cnt_ptr = dev->info->reg_mib_cnt; 897 } 898 port_r_cnt(dev, i); 899 p->read = false; 900 901 if (dev->dev_ops->r_mib_stat64) 902 dev->dev_ops->r_mib_stat64(dev, i); 903 904 mutex_unlock(&mib->cnt_mutex); 905 } 906 907 schedule_delayed_work(&dev->mib_read, dev->mib_read_interval); 908 } 909 910 void ksz_init_mib_timer(struct ksz_device *dev) 911 { 912 int i; 913 914 INIT_DELAYED_WORK(&dev->mib_read, ksz_mib_read_work); 915 916 for (i = 0; i < dev->info->port_cnt; i++) { 917 struct ksz_port_mib *mib = &dev->ports[i].mib; 918 919 dev->dev_ops->port_init_cnt(dev, i); 920 921 mib->cnt_ptr = 0; 922 memset(mib->counters, 0, dev->info->mib_cnt * sizeof(u64)); 923 } 924 } 925 926 static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg) 927 { 928 struct ksz_device *dev = ds->priv; 929 u16 val = 0xffff; 930 931 dev->dev_ops->r_phy(dev, addr, reg, &val); 932 933 return val; 934 } 935 936 static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val) 937 { 938 struct ksz_device *dev = ds->priv; 939 940 dev->dev_ops->w_phy(dev, addr, reg, val); 941 942 return 0; 943 } 944 945 static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port) 946 { 947 struct ksz_device *dev = ds->priv; 948 949 if (dev->chip_id == KSZ8830_CHIP_ID) { 950 /* Silicon Errata Sheet (DS80000830A): 951 * Port 1 does not work with LinkMD Cable-Testing. 952 * Port 1 does not respond to received PAUSE control frames. 953 */ 954 if (!port) 955 return MICREL_KSZ8_P1_ERRATA; 956 } 957 958 return 0; 959 } 960 961 static void ksz_mac_link_down(struct dsa_switch *ds, int port, 962 unsigned int mode, phy_interface_t interface) 963 { 964 struct ksz_device *dev = ds->priv; 965 struct ksz_port *p = &dev->ports[port]; 966 967 /* Read all MIB counters when the link is going down. */ 968 p->read = true; 969 /* timer started */ 970 if (dev->mib_read_interval) 971 schedule_delayed_work(&dev->mib_read, 0); 972 } 973 974 static int ksz_sset_count(struct dsa_switch *ds, int port, int sset) 975 { 976 struct ksz_device *dev = ds->priv; 977 978 if (sset != ETH_SS_STATS) 979 return 0; 980 981 return dev->info->mib_cnt; 982 } 983 984 static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, 985 uint64_t *buf) 986 { 987 const struct dsa_port *dp = dsa_to_port(ds, port); 988 struct ksz_device *dev = ds->priv; 989 struct ksz_port_mib *mib; 990 991 mib = &dev->ports[port].mib; 992 mutex_lock(&mib->cnt_mutex); 993 994 /* Only read dropped counters if no link. */ 995 if (!netif_carrier_ok(dp->slave)) 996 mib->cnt_ptr = dev->info->reg_mib_cnt; 997 port_r_cnt(dev, port); 998 memcpy(buf, mib->counters, dev->info->mib_cnt * sizeof(u64)); 999 mutex_unlock(&mib->cnt_mutex); 1000 } 1001 1002 static int ksz_port_bridge_join(struct dsa_switch *ds, int port, 1003 struct dsa_bridge bridge, 1004 bool *tx_fwd_offload, 1005 struct netlink_ext_ack *extack) 1006 { 1007 /* port_stp_state_set() will be called after to put the port in 1008 * appropriate state so there is no need to do anything. 1009 */ 1010 1011 return 0; 1012 } 1013 1014 static void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 1015 struct dsa_bridge bridge) 1016 { 1017 /* port_stp_state_set() will be called after to put the port in 1018 * forwarding state so there is no need to do anything. 1019 */ 1020 } 1021 1022 static void ksz_port_fast_age(struct dsa_switch *ds, int port) 1023 { 1024 struct ksz_device *dev = ds->priv; 1025 1026 dev->dev_ops->flush_dyn_mac_table(dev, port); 1027 } 1028 1029 static int ksz_port_fdb_add(struct dsa_switch *ds, int port, 1030 const unsigned char *addr, u16 vid, 1031 struct dsa_db db) 1032 { 1033 struct ksz_device *dev = ds->priv; 1034 1035 if (!dev->dev_ops->fdb_add) 1036 return -EOPNOTSUPP; 1037 1038 return dev->dev_ops->fdb_add(dev, port, addr, vid, db); 1039 } 1040 1041 static int ksz_port_fdb_del(struct dsa_switch *ds, int port, 1042 const unsigned char *addr, 1043 u16 vid, struct dsa_db db) 1044 { 1045 struct ksz_device *dev = ds->priv; 1046 1047 if (!dev->dev_ops->fdb_del) 1048 return -EOPNOTSUPP; 1049 1050 return dev->dev_ops->fdb_del(dev, port, addr, vid, db); 1051 } 1052 1053 static int ksz_port_fdb_dump(struct dsa_switch *ds, int port, 1054 dsa_fdb_dump_cb_t *cb, void *data) 1055 { 1056 struct ksz_device *dev = ds->priv; 1057 1058 if (!dev->dev_ops->fdb_dump) 1059 return -EOPNOTSUPP; 1060 1061 return dev->dev_ops->fdb_dump(dev, port, cb, data); 1062 } 1063 1064 static int ksz_port_mdb_add(struct dsa_switch *ds, int port, 1065 const struct switchdev_obj_port_mdb *mdb, 1066 struct dsa_db db) 1067 { 1068 struct ksz_device *dev = ds->priv; 1069 1070 if (!dev->dev_ops->mdb_add) 1071 return -EOPNOTSUPP; 1072 1073 return dev->dev_ops->mdb_add(dev, port, mdb, db); 1074 } 1075 1076 static int ksz_port_mdb_del(struct dsa_switch *ds, int port, 1077 const struct switchdev_obj_port_mdb *mdb, 1078 struct dsa_db db) 1079 { 1080 struct ksz_device *dev = ds->priv; 1081 1082 if (!dev->dev_ops->mdb_del) 1083 return -EOPNOTSUPP; 1084 1085 return dev->dev_ops->mdb_del(dev, port, mdb, db); 1086 } 1087 1088 static int ksz_enable_port(struct dsa_switch *ds, int port, 1089 struct phy_device *phy) 1090 { 1091 struct ksz_device *dev = ds->priv; 1092 1093 if (!dsa_is_user_port(ds, port)) 1094 return 0; 1095 1096 /* setup slave port */ 1097 dev->dev_ops->port_setup(dev, port, false); 1098 1099 /* port_stp_state_set() will be called after to enable the port so 1100 * there is no need to do anything. 1101 */ 1102 1103 return 0; 1104 } 1105 1106 void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) 1107 { 1108 struct ksz_device *dev = ds->priv; 1109 struct ksz_port *p; 1110 const u16 *regs; 1111 u8 data; 1112 1113 regs = dev->info->regs; 1114 1115 ksz_pread8(dev, port, regs[P_STP_CTRL], &data); 1116 data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1117 1118 switch (state) { 1119 case BR_STATE_DISABLED: 1120 data |= PORT_LEARN_DISABLE; 1121 break; 1122 case BR_STATE_LISTENING: 1123 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1124 break; 1125 case BR_STATE_LEARNING: 1126 data |= PORT_RX_ENABLE; 1127 break; 1128 case BR_STATE_FORWARDING: 1129 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE); 1130 break; 1131 case BR_STATE_BLOCKING: 1132 data |= PORT_LEARN_DISABLE; 1133 break; 1134 default: 1135 dev_err(ds->dev, "invalid STP state: %d\n", state); 1136 return; 1137 } 1138 1139 ksz_pwrite8(dev, port, regs[P_STP_CTRL], data); 1140 1141 p = &dev->ports[port]; 1142 p->stp_state = state; 1143 1144 ksz_update_port_member(dev, port); 1145 } 1146 1147 static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds, 1148 int port, 1149 enum dsa_tag_protocol mp) 1150 { 1151 struct ksz_device *dev = ds->priv; 1152 enum dsa_tag_protocol proto = DSA_TAG_PROTO_NONE; 1153 1154 if (dev->chip_id == KSZ8795_CHIP_ID || 1155 dev->chip_id == KSZ8794_CHIP_ID || 1156 dev->chip_id == KSZ8765_CHIP_ID) 1157 proto = DSA_TAG_PROTO_KSZ8795; 1158 1159 if (dev->chip_id == KSZ8830_CHIP_ID || 1160 dev->chip_id == KSZ9893_CHIP_ID) 1161 proto = DSA_TAG_PROTO_KSZ9893; 1162 1163 if (dev->chip_id == KSZ9477_CHIP_ID || 1164 dev->chip_id == KSZ9897_CHIP_ID || 1165 dev->chip_id == KSZ9567_CHIP_ID) 1166 proto = DSA_TAG_PROTO_KSZ9477; 1167 1168 return proto; 1169 } 1170 1171 static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port, 1172 bool flag, struct netlink_ext_ack *extack) 1173 { 1174 struct ksz_device *dev = ds->priv; 1175 1176 if (!dev->dev_ops->vlan_filtering) 1177 return -EOPNOTSUPP; 1178 1179 return dev->dev_ops->vlan_filtering(dev, port, flag, extack); 1180 } 1181 1182 static int ksz_port_vlan_add(struct dsa_switch *ds, int port, 1183 const struct switchdev_obj_port_vlan *vlan, 1184 struct netlink_ext_ack *extack) 1185 { 1186 struct ksz_device *dev = ds->priv; 1187 1188 if (!dev->dev_ops->vlan_add) 1189 return -EOPNOTSUPP; 1190 1191 return dev->dev_ops->vlan_add(dev, port, vlan, extack); 1192 } 1193 1194 static int ksz_port_vlan_del(struct dsa_switch *ds, int port, 1195 const struct switchdev_obj_port_vlan *vlan) 1196 { 1197 struct ksz_device *dev = ds->priv; 1198 1199 if (!dev->dev_ops->vlan_del) 1200 return -EOPNOTSUPP; 1201 1202 return dev->dev_ops->vlan_del(dev, port, vlan); 1203 } 1204 1205 static int ksz_port_mirror_add(struct dsa_switch *ds, int port, 1206 struct dsa_mall_mirror_tc_entry *mirror, 1207 bool ingress, struct netlink_ext_ack *extack) 1208 { 1209 struct ksz_device *dev = ds->priv; 1210 1211 if (!dev->dev_ops->mirror_add) 1212 return -EOPNOTSUPP; 1213 1214 return dev->dev_ops->mirror_add(dev, port, mirror, ingress, extack); 1215 } 1216 1217 static void ksz_port_mirror_del(struct dsa_switch *ds, int port, 1218 struct dsa_mall_mirror_tc_entry *mirror) 1219 { 1220 struct ksz_device *dev = ds->priv; 1221 1222 if (dev->dev_ops->mirror_del) 1223 dev->dev_ops->mirror_del(dev, port, mirror); 1224 } 1225 1226 static int ksz_change_mtu(struct dsa_switch *ds, int port, int mtu) 1227 { 1228 struct ksz_device *dev = ds->priv; 1229 1230 if (!dev->dev_ops->change_mtu) 1231 return -EOPNOTSUPP; 1232 1233 return dev->dev_ops->change_mtu(dev, port, mtu); 1234 } 1235 1236 static int ksz_max_mtu(struct dsa_switch *ds, int port) 1237 { 1238 struct ksz_device *dev = ds->priv; 1239 1240 if (!dev->dev_ops->max_mtu) 1241 return -EOPNOTSUPP; 1242 1243 return dev->dev_ops->max_mtu(dev, port); 1244 } 1245 1246 static int ksz_switch_detect(struct ksz_device *dev) 1247 { 1248 u8 id1, id2; 1249 u16 id16; 1250 u32 id32; 1251 int ret; 1252 1253 /* read chip id */ 1254 ret = ksz_read16(dev, REG_CHIP_ID0, &id16); 1255 if (ret) 1256 return ret; 1257 1258 id1 = FIELD_GET(SW_FAMILY_ID_M, id16); 1259 id2 = FIELD_GET(SW_CHIP_ID_M, id16); 1260 1261 switch (id1) { 1262 case KSZ87_FAMILY_ID: 1263 if (id2 == KSZ87_CHIP_ID_95) { 1264 u8 val; 1265 1266 dev->chip_id = KSZ8795_CHIP_ID; 1267 1268 ksz_read8(dev, KSZ8_PORT_STATUS_0, &val); 1269 if (val & KSZ8_PORT_FIBER_MODE) 1270 dev->chip_id = KSZ8765_CHIP_ID; 1271 } else if (id2 == KSZ87_CHIP_ID_94) { 1272 dev->chip_id = KSZ8794_CHIP_ID; 1273 } else { 1274 return -ENODEV; 1275 } 1276 break; 1277 case KSZ88_FAMILY_ID: 1278 if (id2 == KSZ88_CHIP_ID_63) 1279 dev->chip_id = KSZ8830_CHIP_ID; 1280 else 1281 return -ENODEV; 1282 break; 1283 default: 1284 ret = ksz_read32(dev, REG_CHIP_ID0, &id32); 1285 if (ret) 1286 return ret; 1287 1288 dev->chip_rev = FIELD_GET(SW_REV_ID_M, id32); 1289 id32 &= ~0xFF; 1290 1291 switch (id32) { 1292 case KSZ9477_CHIP_ID: 1293 case KSZ9897_CHIP_ID: 1294 case KSZ9893_CHIP_ID: 1295 case KSZ9567_CHIP_ID: 1296 case LAN9370_CHIP_ID: 1297 case LAN9371_CHIP_ID: 1298 case LAN9372_CHIP_ID: 1299 case LAN9373_CHIP_ID: 1300 case LAN9374_CHIP_ID: 1301 dev->chip_id = id32; 1302 break; 1303 default: 1304 dev_err(dev->dev, 1305 "unsupported switch detected %x)\n", id32); 1306 return -ENODEV; 1307 } 1308 } 1309 return 0; 1310 } 1311 1312 static const struct dsa_switch_ops ksz_switch_ops = { 1313 .get_tag_protocol = ksz_get_tag_protocol, 1314 .get_phy_flags = ksz_get_phy_flags, 1315 .setup = ksz_setup, 1316 .phy_read = ksz_phy_read16, 1317 .phy_write = ksz_phy_write16, 1318 .phylink_get_caps = ksz_phylink_get_caps, 1319 .phylink_mac_link_down = ksz_mac_link_down, 1320 .port_enable = ksz_enable_port, 1321 .get_strings = ksz_get_strings, 1322 .get_ethtool_stats = ksz_get_ethtool_stats, 1323 .get_sset_count = ksz_sset_count, 1324 .port_bridge_join = ksz_port_bridge_join, 1325 .port_bridge_leave = ksz_port_bridge_leave, 1326 .port_stp_state_set = ksz_port_stp_state_set, 1327 .port_fast_age = ksz_port_fast_age, 1328 .port_vlan_filtering = ksz_port_vlan_filtering, 1329 .port_vlan_add = ksz_port_vlan_add, 1330 .port_vlan_del = ksz_port_vlan_del, 1331 .port_fdb_dump = ksz_port_fdb_dump, 1332 .port_fdb_add = ksz_port_fdb_add, 1333 .port_fdb_del = ksz_port_fdb_del, 1334 .port_mdb_add = ksz_port_mdb_add, 1335 .port_mdb_del = ksz_port_mdb_del, 1336 .port_mirror_add = ksz_port_mirror_add, 1337 .port_mirror_del = ksz_port_mirror_del, 1338 .get_stats64 = ksz_get_stats64, 1339 .port_change_mtu = ksz_change_mtu, 1340 .port_max_mtu = ksz_max_mtu, 1341 }; 1342 1343 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv) 1344 { 1345 struct dsa_switch *ds; 1346 struct ksz_device *swdev; 1347 1348 ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL); 1349 if (!ds) 1350 return NULL; 1351 1352 ds->dev = base; 1353 ds->num_ports = DSA_MAX_PORTS; 1354 ds->ops = &ksz_switch_ops; 1355 1356 swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL); 1357 if (!swdev) 1358 return NULL; 1359 1360 ds->priv = swdev; 1361 swdev->dev = base; 1362 1363 swdev->ds = ds; 1364 swdev->priv = priv; 1365 1366 return swdev; 1367 } 1368 EXPORT_SYMBOL(ksz_switch_alloc); 1369 1370 int ksz_switch_register(struct ksz_device *dev) 1371 { 1372 const struct ksz_chip_data *info; 1373 struct device_node *port, *ports; 1374 phy_interface_t interface; 1375 unsigned int port_num; 1376 int ret; 1377 int i; 1378 1379 if (dev->pdata) 1380 dev->chip_id = dev->pdata->chip_id; 1381 1382 dev->reset_gpio = devm_gpiod_get_optional(dev->dev, "reset", 1383 GPIOD_OUT_LOW); 1384 if (IS_ERR(dev->reset_gpio)) 1385 return PTR_ERR(dev->reset_gpio); 1386 1387 if (dev->reset_gpio) { 1388 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1389 usleep_range(10000, 12000); 1390 gpiod_set_value_cansleep(dev->reset_gpio, 0); 1391 msleep(100); 1392 } 1393 1394 mutex_init(&dev->dev_mutex); 1395 mutex_init(&dev->regmap_mutex); 1396 mutex_init(&dev->alu_mutex); 1397 mutex_init(&dev->vlan_mutex); 1398 1399 ret = ksz_switch_detect(dev); 1400 if (ret) 1401 return ret; 1402 1403 info = ksz_lookup_info(dev->chip_id); 1404 if (!info) 1405 return -ENODEV; 1406 1407 /* Update the compatible info with the probed one */ 1408 dev->info = info; 1409 1410 dev_info(dev->dev, "found switch: %s, rev %i\n", 1411 dev->info->dev_name, dev->chip_rev); 1412 1413 ret = ksz_check_device_id(dev); 1414 if (ret) 1415 return ret; 1416 1417 dev->dev_ops = dev->info->ops; 1418 1419 ret = dev->dev_ops->init(dev); 1420 if (ret) 1421 return ret; 1422 1423 dev->ports = devm_kzalloc(dev->dev, 1424 dev->info->port_cnt * sizeof(struct ksz_port), 1425 GFP_KERNEL); 1426 if (!dev->ports) 1427 return -ENOMEM; 1428 1429 for (i = 0; i < dev->info->port_cnt; i++) { 1430 spin_lock_init(&dev->ports[i].mib.stats64_lock); 1431 mutex_init(&dev->ports[i].mib.cnt_mutex); 1432 dev->ports[i].mib.counters = 1433 devm_kzalloc(dev->dev, 1434 sizeof(u64) * (dev->info->mib_cnt + 1), 1435 GFP_KERNEL); 1436 if (!dev->ports[i].mib.counters) 1437 return -ENOMEM; 1438 } 1439 1440 /* set the real number of ports */ 1441 dev->ds->num_ports = dev->info->port_cnt; 1442 1443 /* Host port interface will be self detected, or specifically set in 1444 * device tree. 1445 */ 1446 for (port_num = 0; port_num < dev->info->port_cnt; ++port_num) 1447 dev->ports[port_num].interface = PHY_INTERFACE_MODE_NA; 1448 if (dev->dev->of_node) { 1449 ret = of_get_phy_mode(dev->dev->of_node, &interface); 1450 if (ret == 0) 1451 dev->compat_interface = interface; 1452 ports = of_get_child_by_name(dev->dev->of_node, "ethernet-ports"); 1453 if (!ports) 1454 ports = of_get_child_by_name(dev->dev->of_node, "ports"); 1455 if (ports) 1456 for_each_available_child_of_node(ports, port) { 1457 if (of_property_read_u32(port, "reg", 1458 &port_num)) 1459 continue; 1460 if (!(dev->port_mask & BIT(port_num))) { 1461 of_node_put(port); 1462 return -EINVAL; 1463 } 1464 of_get_phy_mode(port, 1465 &dev->ports[port_num].interface); 1466 } 1467 dev->synclko_125 = of_property_read_bool(dev->dev->of_node, 1468 "microchip,synclko-125"); 1469 dev->synclko_disable = of_property_read_bool(dev->dev->of_node, 1470 "microchip,synclko-disable"); 1471 if (dev->synclko_125 && dev->synclko_disable) { 1472 dev_err(dev->dev, "inconsistent synclko settings\n"); 1473 return -EINVAL; 1474 } 1475 } 1476 1477 ret = dsa_register_switch(dev->ds); 1478 if (ret) { 1479 dev->dev_ops->exit(dev); 1480 return ret; 1481 } 1482 1483 /* Read MIB counters every 30 seconds to avoid overflow. */ 1484 dev->mib_read_interval = msecs_to_jiffies(5000); 1485 1486 /* Start the MIB timer. */ 1487 schedule_delayed_work(&dev->mib_read, 0); 1488 1489 return ret; 1490 } 1491 EXPORT_SYMBOL(ksz_switch_register); 1492 1493 void ksz_switch_remove(struct ksz_device *dev) 1494 { 1495 /* timer started */ 1496 if (dev->mib_read_interval) { 1497 dev->mib_read_interval = 0; 1498 cancel_delayed_work_sync(&dev->mib_read); 1499 } 1500 1501 dev->dev_ops->exit(dev); 1502 dsa_unregister_switch(dev->ds); 1503 1504 if (dev->reset_gpio) 1505 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1506 1507 } 1508 EXPORT_SYMBOL(ksz_switch_remove); 1509 1510 MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>"); 1511 MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver"); 1512 MODULE_LICENSE("GPL"); 1513