1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Microchip switch driver main logic 4 * 5 * Copyright (C) 2017-2019 Microchip Technology Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/export.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/platform_data/microchip-ksz.h> 14 #include <linux/phy.h> 15 #include <linux/etherdevice.h> 16 #include <linux/if_bridge.h> 17 #include <linux/of_device.h> 18 #include <linux/of_net.h> 19 #include <linux/micrel_phy.h> 20 #include <net/dsa.h> 21 #include <net/switchdev.h> 22 23 #include "ksz_common.h" 24 #include "ksz8.h" 25 #include "ksz9477.h" 26 #include "lan937x.h" 27 28 #define MIB_COUNTER_NUM 0x20 29 30 struct ksz_stats_raw { 31 u64 rx_hi; 32 u64 rx_undersize; 33 u64 rx_fragments; 34 u64 rx_oversize; 35 u64 rx_jabbers; 36 u64 rx_symbol_err; 37 u64 rx_crc_err; 38 u64 rx_align_err; 39 u64 rx_mac_ctrl; 40 u64 rx_pause; 41 u64 rx_bcast; 42 u64 rx_mcast; 43 u64 rx_ucast; 44 u64 rx_64_or_less; 45 u64 rx_65_127; 46 u64 rx_128_255; 47 u64 rx_256_511; 48 u64 rx_512_1023; 49 u64 rx_1024_1522; 50 u64 rx_1523_2000; 51 u64 rx_2001; 52 u64 tx_hi; 53 u64 tx_late_col; 54 u64 tx_pause; 55 u64 tx_bcast; 56 u64 tx_mcast; 57 u64 tx_ucast; 58 u64 tx_deferred; 59 u64 tx_total_col; 60 u64 tx_exc_col; 61 u64 tx_single_col; 62 u64 tx_mult_col; 63 u64 rx_total; 64 u64 tx_total; 65 u64 rx_discards; 66 u64 tx_discards; 67 }; 68 69 static const struct ksz_mib_names ksz88xx_mib_names[] = { 70 { 0x00, "rx" }, 71 { 0x01, "rx_hi" }, 72 { 0x02, "rx_undersize" }, 73 { 0x03, "rx_fragments" }, 74 { 0x04, "rx_oversize" }, 75 { 0x05, "rx_jabbers" }, 76 { 0x06, "rx_symbol_err" }, 77 { 0x07, "rx_crc_err" }, 78 { 0x08, "rx_align_err" }, 79 { 0x09, "rx_mac_ctrl" }, 80 { 0x0a, "rx_pause" }, 81 { 0x0b, "rx_bcast" }, 82 { 0x0c, "rx_mcast" }, 83 { 0x0d, "rx_ucast" }, 84 { 0x0e, "rx_64_or_less" }, 85 { 0x0f, "rx_65_127" }, 86 { 0x10, "rx_128_255" }, 87 { 0x11, "rx_256_511" }, 88 { 0x12, "rx_512_1023" }, 89 { 0x13, "rx_1024_1522" }, 90 { 0x14, "tx" }, 91 { 0x15, "tx_hi" }, 92 { 0x16, "tx_late_col" }, 93 { 0x17, "tx_pause" }, 94 { 0x18, "tx_bcast" }, 95 { 0x19, "tx_mcast" }, 96 { 0x1a, "tx_ucast" }, 97 { 0x1b, "tx_deferred" }, 98 { 0x1c, "tx_total_col" }, 99 { 0x1d, "tx_exc_col" }, 100 { 0x1e, "tx_single_col" }, 101 { 0x1f, "tx_mult_col" }, 102 { 0x100, "rx_discards" }, 103 { 0x101, "tx_discards" }, 104 }; 105 106 static const struct ksz_mib_names ksz9477_mib_names[] = { 107 { 0x00, "rx_hi" }, 108 { 0x01, "rx_undersize" }, 109 { 0x02, "rx_fragments" }, 110 { 0x03, "rx_oversize" }, 111 { 0x04, "rx_jabbers" }, 112 { 0x05, "rx_symbol_err" }, 113 { 0x06, "rx_crc_err" }, 114 { 0x07, "rx_align_err" }, 115 { 0x08, "rx_mac_ctrl" }, 116 { 0x09, "rx_pause" }, 117 { 0x0A, "rx_bcast" }, 118 { 0x0B, "rx_mcast" }, 119 { 0x0C, "rx_ucast" }, 120 { 0x0D, "rx_64_or_less" }, 121 { 0x0E, "rx_65_127" }, 122 { 0x0F, "rx_128_255" }, 123 { 0x10, "rx_256_511" }, 124 { 0x11, "rx_512_1023" }, 125 { 0x12, "rx_1024_1522" }, 126 { 0x13, "rx_1523_2000" }, 127 { 0x14, "rx_2001" }, 128 { 0x15, "tx_hi" }, 129 { 0x16, "tx_late_col" }, 130 { 0x17, "tx_pause" }, 131 { 0x18, "tx_bcast" }, 132 { 0x19, "tx_mcast" }, 133 { 0x1A, "tx_ucast" }, 134 { 0x1B, "tx_deferred" }, 135 { 0x1C, "tx_total_col" }, 136 { 0x1D, "tx_exc_col" }, 137 { 0x1E, "tx_single_col" }, 138 { 0x1F, "tx_mult_col" }, 139 { 0x80, "rx_total" }, 140 { 0x81, "tx_total" }, 141 { 0x82, "rx_discards" }, 142 { 0x83, "tx_discards" }, 143 }; 144 145 static const struct ksz_dev_ops ksz8_dev_ops = { 146 .setup = ksz8_setup, 147 .get_port_addr = ksz8_get_port_addr, 148 .cfg_port_member = ksz8_cfg_port_member, 149 .flush_dyn_mac_table = ksz8_flush_dyn_mac_table, 150 .port_setup = ksz8_port_setup, 151 .r_phy = ksz8_r_phy, 152 .w_phy = ksz8_w_phy, 153 .r_mib_pkt = ksz8_r_mib_pkt, 154 .freeze_mib = ksz8_freeze_mib, 155 .port_init_cnt = ksz8_port_init_cnt, 156 .fdb_dump = ksz8_fdb_dump, 157 .mdb_add = ksz8_mdb_add, 158 .mdb_del = ksz8_mdb_del, 159 .vlan_filtering = ksz8_port_vlan_filtering, 160 .vlan_add = ksz8_port_vlan_add, 161 .vlan_del = ksz8_port_vlan_del, 162 .mirror_add = ksz8_port_mirror_add, 163 .mirror_del = ksz8_port_mirror_del, 164 .get_caps = ksz8_get_caps, 165 .config_cpu_port = ksz8_config_cpu_port, 166 .enable_stp_addr = ksz8_enable_stp_addr, 167 .reset = ksz8_reset_switch, 168 .init = ksz8_switch_init, 169 .exit = ksz8_switch_exit, 170 }; 171 172 static const struct ksz_dev_ops ksz9477_dev_ops = { 173 .setup = ksz9477_setup, 174 .get_port_addr = ksz9477_get_port_addr, 175 .cfg_port_member = ksz9477_cfg_port_member, 176 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table, 177 .port_setup = ksz9477_port_setup, 178 .r_phy = ksz9477_r_phy, 179 .w_phy = ksz9477_w_phy, 180 .r_mib_cnt = ksz9477_r_mib_cnt, 181 .r_mib_pkt = ksz9477_r_mib_pkt, 182 .r_mib_stat64 = ksz_r_mib_stats64, 183 .freeze_mib = ksz9477_freeze_mib, 184 .port_init_cnt = ksz9477_port_init_cnt, 185 .vlan_filtering = ksz9477_port_vlan_filtering, 186 .vlan_add = ksz9477_port_vlan_add, 187 .vlan_del = ksz9477_port_vlan_del, 188 .mirror_add = ksz9477_port_mirror_add, 189 .mirror_del = ksz9477_port_mirror_del, 190 .get_caps = ksz9477_get_caps, 191 .fdb_dump = ksz9477_fdb_dump, 192 .fdb_add = ksz9477_fdb_add, 193 .fdb_del = ksz9477_fdb_del, 194 .mdb_add = ksz9477_mdb_add, 195 .mdb_del = ksz9477_mdb_del, 196 .change_mtu = ksz9477_change_mtu, 197 .max_mtu = ksz9477_max_mtu, 198 .config_cpu_port = ksz9477_config_cpu_port, 199 .enable_stp_addr = ksz9477_enable_stp_addr, 200 .reset = ksz9477_reset_switch, 201 .init = ksz9477_switch_init, 202 .exit = ksz9477_switch_exit, 203 }; 204 205 static const struct ksz_dev_ops lan937x_dev_ops = { 206 .setup = lan937x_setup, 207 .get_port_addr = ksz9477_get_port_addr, 208 .cfg_port_member = ksz9477_cfg_port_member, 209 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table, 210 .port_setup = lan937x_port_setup, 211 .r_phy = lan937x_r_phy, 212 .w_phy = lan937x_w_phy, 213 .r_mib_cnt = ksz9477_r_mib_cnt, 214 .r_mib_pkt = ksz9477_r_mib_pkt, 215 .r_mib_stat64 = ksz_r_mib_stats64, 216 .freeze_mib = ksz9477_freeze_mib, 217 .port_init_cnt = ksz9477_port_init_cnt, 218 .vlan_filtering = ksz9477_port_vlan_filtering, 219 .vlan_add = ksz9477_port_vlan_add, 220 .vlan_del = ksz9477_port_vlan_del, 221 .mirror_add = ksz9477_port_mirror_add, 222 .mirror_del = ksz9477_port_mirror_del, 223 .get_caps = lan937x_phylink_get_caps, 224 .phylink_mac_config = lan937x_phylink_mac_config, 225 .phylink_mac_link_up = lan937x_phylink_mac_link_up, 226 .fdb_dump = ksz9477_fdb_dump, 227 .fdb_add = ksz9477_fdb_add, 228 .fdb_del = ksz9477_fdb_del, 229 .mdb_add = ksz9477_mdb_add, 230 .mdb_del = ksz9477_mdb_del, 231 .change_mtu = lan937x_change_mtu, 232 .max_mtu = ksz9477_max_mtu, 233 .config_cpu_port = lan937x_config_cpu_port, 234 .enable_stp_addr = ksz9477_enable_stp_addr, 235 .reset = lan937x_reset_switch, 236 .init = lan937x_switch_init, 237 .exit = lan937x_switch_exit, 238 }; 239 240 static const u16 ksz8795_regs[] = { 241 [REG_IND_CTRL_0] = 0x6E, 242 [REG_IND_DATA_8] = 0x70, 243 [REG_IND_DATA_CHECK] = 0x72, 244 [REG_IND_DATA_HI] = 0x71, 245 [REG_IND_DATA_LO] = 0x75, 246 [REG_IND_MIB_CHECK] = 0x74, 247 [REG_IND_BYTE] = 0xA0, 248 [P_FORCE_CTRL] = 0x0C, 249 [P_LINK_STATUS] = 0x0E, 250 [P_LOCAL_CTRL] = 0x07, 251 [P_NEG_RESTART_CTRL] = 0x0D, 252 [P_REMOTE_STATUS] = 0x08, 253 [P_SPEED_STATUS] = 0x09, 254 [S_TAIL_TAG_CTRL] = 0x0C, 255 [P_STP_CTRL] = 0x02, 256 [S_START_CTRL] = 0x01, 257 [S_BROADCAST_CTRL] = 0x06, 258 [S_MULTICAST_CTRL] = 0x04, 259 }; 260 261 static const u32 ksz8795_masks[] = { 262 [PORT_802_1P_REMAPPING] = BIT(7), 263 [SW_TAIL_TAG_ENABLE] = BIT(1), 264 [MIB_COUNTER_OVERFLOW] = BIT(6), 265 [MIB_COUNTER_VALID] = BIT(5), 266 [VLAN_TABLE_FID] = GENMASK(6, 0), 267 [VLAN_TABLE_MEMBERSHIP] = GENMASK(11, 7), 268 [VLAN_TABLE_VALID] = BIT(12), 269 [STATIC_MAC_TABLE_VALID] = BIT(21), 270 [STATIC_MAC_TABLE_USE_FID] = BIT(23), 271 [STATIC_MAC_TABLE_FID] = GENMASK(30, 24), 272 [STATIC_MAC_TABLE_OVERRIDE] = BIT(26), 273 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(24, 20), 274 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(6, 0), 275 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(8), 276 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 277 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 29), 278 [DYNAMIC_MAC_TABLE_FID] = GENMASK(26, 20), 279 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(26, 24), 280 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(28, 27), 281 }; 282 283 static const u8 ksz8795_shifts[] = { 284 [VLAN_TABLE_MEMBERSHIP_S] = 7, 285 [VLAN_TABLE] = 16, 286 [STATIC_MAC_FWD_PORTS] = 16, 287 [STATIC_MAC_FID] = 24, 288 [DYNAMIC_MAC_ENTRIES_H] = 3, 289 [DYNAMIC_MAC_ENTRIES] = 29, 290 [DYNAMIC_MAC_FID] = 16, 291 [DYNAMIC_MAC_TIMESTAMP] = 27, 292 [DYNAMIC_MAC_SRC_PORT] = 24, 293 }; 294 295 static const u16 ksz8863_regs[] = { 296 [REG_IND_CTRL_0] = 0x79, 297 [REG_IND_DATA_8] = 0x7B, 298 [REG_IND_DATA_CHECK] = 0x7B, 299 [REG_IND_DATA_HI] = 0x7C, 300 [REG_IND_DATA_LO] = 0x80, 301 [REG_IND_MIB_CHECK] = 0x80, 302 [P_FORCE_CTRL] = 0x0C, 303 [P_LINK_STATUS] = 0x0E, 304 [P_LOCAL_CTRL] = 0x0C, 305 [P_NEG_RESTART_CTRL] = 0x0D, 306 [P_REMOTE_STATUS] = 0x0E, 307 [P_SPEED_STATUS] = 0x0F, 308 [S_TAIL_TAG_CTRL] = 0x03, 309 [P_STP_CTRL] = 0x02, 310 [S_START_CTRL] = 0x01, 311 [S_BROADCAST_CTRL] = 0x06, 312 [S_MULTICAST_CTRL] = 0x04, 313 }; 314 315 static const u32 ksz8863_masks[] = { 316 [PORT_802_1P_REMAPPING] = BIT(3), 317 [SW_TAIL_TAG_ENABLE] = BIT(6), 318 [MIB_COUNTER_OVERFLOW] = BIT(7), 319 [MIB_COUNTER_VALID] = BIT(6), 320 [VLAN_TABLE_FID] = GENMASK(15, 12), 321 [VLAN_TABLE_MEMBERSHIP] = GENMASK(18, 16), 322 [VLAN_TABLE_VALID] = BIT(19), 323 [STATIC_MAC_TABLE_VALID] = BIT(19), 324 [STATIC_MAC_TABLE_USE_FID] = BIT(21), 325 [STATIC_MAC_TABLE_FID] = GENMASK(29, 26), 326 [STATIC_MAC_TABLE_OVERRIDE] = BIT(20), 327 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(18, 16), 328 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(5, 0), 329 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(7), 330 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 331 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 28), 332 [DYNAMIC_MAC_TABLE_FID] = GENMASK(19, 16), 333 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(21, 20), 334 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(23, 22), 335 }; 336 337 static u8 ksz8863_shifts[] = { 338 [VLAN_TABLE_MEMBERSHIP_S] = 16, 339 [STATIC_MAC_FWD_PORTS] = 16, 340 [STATIC_MAC_FID] = 22, 341 [DYNAMIC_MAC_ENTRIES_H] = 3, 342 [DYNAMIC_MAC_ENTRIES] = 24, 343 [DYNAMIC_MAC_FID] = 16, 344 [DYNAMIC_MAC_TIMESTAMP] = 24, 345 [DYNAMIC_MAC_SRC_PORT] = 20, 346 }; 347 348 static const u16 ksz9477_regs[] = { 349 [P_STP_CTRL] = 0x0B04, 350 [S_START_CTRL] = 0x0300, 351 [S_BROADCAST_CTRL] = 0x0332, 352 [S_MULTICAST_CTRL] = 0x0331, 353 }; 354 355 static const u32 ksz9477_masks[] = { 356 [ALU_STAT_WRITE] = 0, 357 [ALU_STAT_READ] = 1, 358 }; 359 360 static const u8 ksz9477_shifts[] = { 361 [ALU_STAT_INDEX] = 16, 362 }; 363 364 static const u32 lan937x_masks[] = { 365 [ALU_STAT_WRITE] = 1, 366 [ALU_STAT_READ] = 2, 367 }; 368 369 static const u8 lan937x_shifts[] = { 370 [ALU_STAT_INDEX] = 8, 371 }; 372 373 const struct ksz_chip_data ksz_switch_chips[] = { 374 [KSZ8795] = { 375 .chip_id = KSZ8795_CHIP_ID, 376 .dev_name = "KSZ8795", 377 .num_vlans = 4096, 378 .num_alus = 0, 379 .num_statics = 8, 380 .cpu_ports = 0x10, /* can be configured as cpu port */ 381 .port_cnt = 5, /* total cpu and user ports */ 382 .ops = &ksz8_dev_ops, 383 .ksz87xx_eee_link_erratum = true, 384 .mib_names = ksz9477_mib_names, 385 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 386 .reg_mib_cnt = MIB_COUNTER_NUM, 387 .regs = ksz8795_regs, 388 .masks = ksz8795_masks, 389 .shifts = ksz8795_shifts, 390 .supports_mii = {false, false, false, false, true}, 391 .supports_rmii = {false, false, false, false, true}, 392 .supports_rgmii = {false, false, false, false, true}, 393 .internal_phy = {true, true, true, true, false}, 394 }, 395 396 [KSZ8794] = { 397 /* WARNING 398 * ======= 399 * KSZ8794 is similar to KSZ8795, except the port map 400 * contains a gap between external and CPU ports, the 401 * port map is NOT continuous. The per-port register 402 * map is shifted accordingly too, i.e. registers at 403 * offset 0x40 are NOT used on KSZ8794 and they ARE 404 * used on KSZ8795 for external port 3. 405 * external cpu 406 * KSZ8794 0,1,2 4 407 * KSZ8795 0,1,2,3 4 408 * KSZ8765 0,1,2,3 4 409 * port_cnt is configured as 5, even though it is 4 410 */ 411 .chip_id = KSZ8794_CHIP_ID, 412 .dev_name = "KSZ8794", 413 .num_vlans = 4096, 414 .num_alus = 0, 415 .num_statics = 8, 416 .cpu_ports = 0x10, /* can be configured as cpu port */ 417 .port_cnt = 5, /* total cpu and user ports */ 418 .ops = &ksz8_dev_ops, 419 .ksz87xx_eee_link_erratum = true, 420 .mib_names = ksz9477_mib_names, 421 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 422 .reg_mib_cnt = MIB_COUNTER_NUM, 423 .regs = ksz8795_regs, 424 .masks = ksz8795_masks, 425 .shifts = ksz8795_shifts, 426 .supports_mii = {false, false, false, false, true}, 427 .supports_rmii = {false, false, false, false, true}, 428 .supports_rgmii = {false, false, false, false, true}, 429 .internal_phy = {true, true, true, false, false}, 430 }, 431 432 [KSZ8765] = { 433 .chip_id = KSZ8765_CHIP_ID, 434 .dev_name = "KSZ8765", 435 .num_vlans = 4096, 436 .num_alus = 0, 437 .num_statics = 8, 438 .cpu_ports = 0x10, /* can be configured as cpu port */ 439 .port_cnt = 5, /* total cpu and user ports */ 440 .ops = &ksz8_dev_ops, 441 .ksz87xx_eee_link_erratum = true, 442 .mib_names = ksz9477_mib_names, 443 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 444 .reg_mib_cnt = MIB_COUNTER_NUM, 445 .regs = ksz8795_regs, 446 .masks = ksz8795_masks, 447 .shifts = ksz8795_shifts, 448 .supports_mii = {false, false, false, false, true}, 449 .supports_rmii = {false, false, false, false, true}, 450 .supports_rgmii = {false, false, false, false, true}, 451 .internal_phy = {true, true, true, true, false}, 452 }, 453 454 [KSZ8830] = { 455 .chip_id = KSZ8830_CHIP_ID, 456 .dev_name = "KSZ8863/KSZ8873", 457 .num_vlans = 16, 458 .num_alus = 0, 459 .num_statics = 8, 460 .cpu_ports = 0x4, /* can be configured as cpu port */ 461 .port_cnt = 3, 462 .ops = &ksz8_dev_ops, 463 .mib_names = ksz88xx_mib_names, 464 .mib_cnt = ARRAY_SIZE(ksz88xx_mib_names), 465 .reg_mib_cnt = MIB_COUNTER_NUM, 466 .regs = ksz8863_regs, 467 .masks = ksz8863_masks, 468 .shifts = ksz8863_shifts, 469 .supports_mii = {false, false, true}, 470 .supports_rmii = {false, false, true}, 471 .internal_phy = {true, true, false}, 472 }, 473 474 [KSZ9477] = { 475 .chip_id = KSZ9477_CHIP_ID, 476 .dev_name = "KSZ9477", 477 .num_vlans = 4096, 478 .num_alus = 4096, 479 .num_statics = 16, 480 .cpu_ports = 0x7F, /* can be configured as cpu port */ 481 .port_cnt = 7, /* total physical port count */ 482 .ops = &ksz9477_dev_ops, 483 .phy_errata_9477 = true, 484 .mib_names = ksz9477_mib_names, 485 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 486 .reg_mib_cnt = MIB_COUNTER_NUM, 487 .regs = ksz9477_regs, 488 .masks = ksz9477_masks, 489 .shifts = ksz9477_shifts, 490 .supports_mii = {false, false, false, false, 491 false, true, false}, 492 .supports_rmii = {false, false, false, false, 493 false, true, false}, 494 .supports_rgmii = {false, false, false, false, 495 false, true, false}, 496 .internal_phy = {true, true, true, true, 497 true, false, false}, 498 }, 499 500 [KSZ9897] = { 501 .chip_id = KSZ9897_CHIP_ID, 502 .dev_name = "KSZ9897", 503 .num_vlans = 4096, 504 .num_alus = 4096, 505 .num_statics = 16, 506 .cpu_ports = 0x7F, /* can be configured as cpu port */ 507 .port_cnt = 7, /* total physical port count */ 508 .ops = &ksz9477_dev_ops, 509 .phy_errata_9477 = true, 510 .mib_names = ksz9477_mib_names, 511 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 512 .reg_mib_cnt = MIB_COUNTER_NUM, 513 .regs = ksz9477_regs, 514 .masks = ksz9477_masks, 515 .shifts = ksz9477_shifts, 516 .supports_mii = {false, false, false, false, 517 false, true, true}, 518 .supports_rmii = {false, false, false, false, 519 false, true, true}, 520 .supports_rgmii = {false, false, false, false, 521 false, true, true}, 522 .internal_phy = {true, true, true, true, 523 true, false, false}, 524 }, 525 526 [KSZ9893] = { 527 .chip_id = KSZ9893_CHIP_ID, 528 .dev_name = "KSZ9893", 529 .num_vlans = 4096, 530 .num_alus = 4096, 531 .num_statics = 16, 532 .cpu_ports = 0x07, /* can be configured as cpu port */ 533 .port_cnt = 3, /* total port count */ 534 .ops = &ksz9477_dev_ops, 535 .mib_names = ksz9477_mib_names, 536 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 537 .reg_mib_cnt = MIB_COUNTER_NUM, 538 .regs = ksz9477_regs, 539 .masks = ksz9477_masks, 540 .shifts = ksz9477_shifts, 541 .supports_mii = {false, false, true}, 542 .supports_rmii = {false, false, true}, 543 .supports_rgmii = {false, false, true}, 544 .internal_phy = {true, true, false}, 545 }, 546 547 [KSZ9567] = { 548 .chip_id = KSZ9567_CHIP_ID, 549 .dev_name = "KSZ9567", 550 .num_vlans = 4096, 551 .num_alus = 4096, 552 .num_statics = 16, 553 .cpu_ports = 0x7F, /* can be configured as cpu port */ 554 .port_cnt = 7, /* total physical port count */ 555 .ops = &ksz9477_dev_ops, 556 .phy_errata_9477 = true, 557 .mib_names = ksz9477_mib_names, 558 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 559 .reg_mib_cnt = MIB_COUNTER_NUM, 560 .regs = ksz9477_regs, 561 .masks = ksz9477_masks, 562 .shifts = ksz9477_shifts, 563 .supports_mii = {false, false, false, false, 564 false, true, true}, 565 .supports_rmii = {false, false, false, false, 566 false, true, true}, 567 .supports_rgmii = {false, false, false, false, 568 false, true, true}, 569 .internal_phy = {true, true, true, true, 570 true, false, false}, 571 }, 572 573 [LAN9370] = { 574 .chip_id = LAN9370_CHIP_ID, 575 .dev_name = "LAN9370", 576 .num_vlans = 4096, 577 .num_alus = 1024, 578 .num_statics = 256, 579 .cpu_ports = 0x10, /* can be configured as cpu port */ 580 .port_cnt = 5, /* total physical port count */ 581 .ops = &lan937x_dev_ops, 582 .mib_names = ksz9477_mib_names, 583 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 584 .reg_mib_cnt = MIB_COUNTER_NUM, 585 .regs = ksz9477_regs, 586 .masks = lan937x_masks, 587 .shifts = lan937x_shifts, 588 .supports_mii = {false, false, false, false, true}, 589 .supports_rmii = {false, false, false, false, true}, 590 .supports_rgmii = {false, false, false, false, true}, 591 .internal_phy = {true, true, true, true, false}, 592 }, 593 594 [LAN9371] = { 595 .chip_id = LAN9371_CHIP_ID, 596 .dev_name = "LAN9371", 597 .num_vlans = 4096, 598 .num_alus = 1024, 599 .num_statics = 256, 600 .cpu_ports = 0x30, /* can be configured as cpu port */ 601 .port_cnt = 6, /* total physical port count */ 602 .ops = &lan937x_dev_ops, 603 .mib_names = ksz9477_mib_names, 604 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 605 .reg_mib_cnt = MIB_COUNTER_NUM, 606 .regs = ksz9477_regs, 607 .masks = lan937x_masks, 608 .shifts = lan937x_shifts, 609 .supports_mii = {false, false, false, false, true, true}, 610 .supports_rmii = {false, false, false, false, true, true}, 611 .supports_rgmii = {false, false, false, false, true, true}, 612 .internal_phy = {true, true, true, true, false, false}, 613 }, 614 615 [LAN9372] = { 616 .chip_id = LAN9372_CHIP_ID, 617 .dev_name = "LAN9372", 618 .num_vlans = 4096, 619 .num_alus = 1024, 620 .num_statics = 256, 621 .cpu_ports = 0x30, /* can be configured as cpu port */ 622 .port_cnt = 8, /* total physical port count */ 623 .ops = &lan937x_dev_ops, 624 .mib_names = ksz9477_mib_names, 625 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 626 .reg_mib_cnt = MIB_COUNTER_NUM, 627 .regs = ksz9477_regs, 628 .masks = lan937x_masks, 629 .shifts = lan937x_shifts, 630 .supports_mii = {false, false, false, false, 631 true, true, false, false}, 632 .supports_rmii = {false, false, false, false, 633 true, true, false, false}, 634 .supports_rgmii = {false, false, false, false, 635 true, true, false, false}, 636 .internal_phy = {true, true, true, true, 637 false, false, true, true}, 638 }, 639 640 [LAN9373] = { 641 .chip_id = LAN9373_CHIP_ID, 642 .dev_name = "LAN9373", 643 .num_vlans = 4096, 644 .num_alus = 1024, 645 .num_statics = 256, 646 .cpu_ports = 0x38, /* can be configured as cpu port */ 647 .port_cnt = 5, /* total physical port count */ 648 .ops = &lan937x_dev_ops, 649 .mib_names = ksz9477_mib_names, 650 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 651 .reg_mib_cnt = MIB_COUNTER_NUM, 652 .regs = ksz9477_regs, 653 .masks = lan937x_masks, 654 .shifts = lan937x_shifts, 655 .supports_mii = {false, false, false, false, 656 true, true, false, false}, 657 .supports_rmii = {false, false, false, false, 658 true, true, false, false}, 659 .supports_rgmii = {false, false, false, false, 660 true, true, false, false}, 661 .internal_phy = {true, true, true, false, 662 false, false, true, true}, 663 }, 664 665 [LAN9374] = { 666 .chip_id = LAN9374_CHIP_ID, 667 .dev_name = "LAN9374", 668 .num_vlans = 4096, 669 .num_alus = 1024, 670 .num_statics = 256, 671 .cpu_ports = 0x30, /* can be configured as cpu port */ 672 .port_cnt = 8, /* total physical port count */ 673 .ops = &lan937x_dev_ops, 674 .mib_names = ksz9477_mib_names, 675 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 676 .reg_mib_cnt = MIB_COUNTER_NUM, 677 .regs = ksz9477_regs, 678 .masks = lan937x_masks, 679 .shifts = lan937x_shifts, 680 .supports_mii = {false, false, false, false, 681 true, true, false, false}, 682 .supports_rmii = {false, false, false, false, 683 true, true, false, false}, 684 .supports_rgmii = {false, false, false, false, 685 true, true, false, false}, 686 .internal_phy = {true, true, true, true, 687 false, false, true, true}, 688 }, 689 }; 690 EXPORT_SYMBOL_GPL(ksz_switch_chips); 691 692 static const struct ksz_chip_data *ksz_lookup_info(unsigned int prod_num) 693 { 694 int i; 695 696 for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) { 697 const struct ksz_chip_data *chip = &ksz_switch_chips[i]; 698 699 if (chip->chip_id == prod_num) 700 return chip; 701 } 702 703 return NULL; 704 } 705 706 static int ksz_check_device_id(struct ksz_device *dev) 707 { 708 const struct ksz_chip_data *dt_chip_data; 709 710 dt_chip_data = of_device_get_match_data(dev->dev); 711 712 /* Check for Device Tree and Chip ID */ 713 if (dt_chip_data->chip_id != dev->chip_id) { 714 dev_err(dev->dev, 715 "Device tree specifies chip %s but found %s, please fix it!\n", 716 dt_chip_data->dev_name, dev->info->dev_name); 717 return -ENODEV; 718 } 719 720 return 0; 721 } 722 723 static void ksz_phylink_get_caps(struct dsa_switch *ds, int port, 724 struct phylink_config *config) 725 { 726 struct ksz_device *dev = ds->priv; 727 728 config->legacy_pre_march2020 = false; 729 730 if (dev->info->supports_mii[port]) 731 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); 732 733 if (dev->info->supports_rmii[port]) 734 __set_bit(PHY_INTERFACE_MODE_RMII, 735 config->supported_interfaces); 736 737 if (dev->info->supports_rgmii[port]) 738 phy_interface_set_rgmii(config->supported_interfaces); 739 740 if (dev->info->internal_phy[port]) 741 __set_bit(PHY_INTERFACE_MODE_INTERNAL, 742 config->supported_interfaces); 743 744 if (dev->dev_ops->get_caps) 745 dev->dev_ops->get_caps(dev, port, config); 746 } 747 748 void ksz_r_mib_stats64(struct ksz_device *dev, int port) 749 { 750 struct ethtool_pause_stats *pstats; 751 struct rtnl_link_stats64 *stats; 752 struct ksz_stats_raw *raw; 753 struct ksz_port_mib *mib; 754 755 mib = &dev->ports[port].mib; 756 stats = &mib->stats64; 757 pstats = &mib->pause_stats; 758 raw = (struct ksz_stats_raw *)mib->counters; 759 760 spin_lock(&mib->stats64_lock); 761 762 stats->rx_packets = raw->rx_bcast + raw->rx_mcast + raw->rx_ucast + 763 raw->rx_pause; 764 stats->tx_packets = raw->tx_bcast + raw->tx_mcast + raw->tx_ucast + 765 raw->tx_pause; 766 767 /* HW counters are counting bytes + FCS which is not acceptable 768 * for rtnl_link_stats64 interface 769 */ 770 stats->rx_bytes = raw->rx_total - stats->rx_packets * ETH_FCS_LEN; 771 stats->tx_bytes = raw->tx_total - stats->tx_packets * ETH_FCS_LEN; 772 773 stats->rx_length_errors = raw->rx_undersize + raw->rx_fragments + 774 raw->rx_oversize; 775 776 stats->rx_crc_errors = raw->rx_crc_err; 777 stats->rx_frame_errors = raw->rx_align_err; 778 stats->rx_dropped = raw->rx_discards; 779 stats->rx_errors = stats->rx_length_errors + stats->rx_crc_errors + 780 stats->rx_frame_errors + stats->rx_dropped; 781 782 stats->tx_window_errors = raw->tx_late_col; 783 stats->tx_fifo_errors = raw->tx_discards; 784 stats->tx_aborted_errors = raw->tx_exc_col; 785 stats->tx_errors = stats->tx_window_errors + stats->tx_fifo_errors + 786 stats->tx_aborted_errors; 787 788 stats->multicast = raw->rx_mcast; 789 stats->collisions = raw->tx_total_col; 790 791 pstats->tx_pause_frames = raw->tx_pause; 792 pstats->rx_pause_frames = raw->rx_pause; 793 794 spin_unlock(&mib->stats64_lock); 795 } 796 797 static void ksz_get_stats64(struct dsa_switch *ds, int port, 798 struct rtnl_link_stats64 *s) 799 { 800 struct ksz_device *dev = ds->priv; 801 struct ksz_port_mib *mib; 802 803 mib = &dev->ports[port].mib; 804 805 spin_lock(&mib->stats64_lock); 806 memcpy(s, &mib->stats64, sizeof(*s)); 807 spin_unlock(&mib->stats64_lock); 808 } 809 810 static void ksz_get_pause_stats(struct dsa_switch *ds, int port, 811 struct ethtool_pause_stats *pause_stats) 812 { 813 struct ksz_device *dev = ds->priv; 814 struct ksz_port_mib *mib; 815 816 mib = &dev->ports[port].mib; 817 818 spin_lock(&mib->stats64_lock); 819 memcpy(pause_stats, &mib->pause_stats, sizeof(*pause_stats)); 820 spin_unlock(&mib->stats64_lock); 821 } 822 823 static void ksz_get_strings(struct dsa_switch *ds, int port, 824 u32 stringset, uint8_t *buf) 825 { 826 struct ksz_device *dev = ds->priv; 827 int i; 828 829 if (stringset != ETH_SS_STATS) 830 return; 831 832 for (i = 0; i < dev->info->mib_cnt; i++) { 833 memcpy(buf + i * ETH_GSTRING_LEN, 834 dev->info->mib_names[i].string, ETH_GSTRING_LEN); 835 } 836 } 837 838 static void ksz_update_port_member(struct ksz_device *dev, int port) 839 { 840 struct ksz_port *p = &dev->ports[port]; 841 struct dsa_switch *ds = dev->ds; 842 u8 port_member = 0, cpu_port; 843 const struct dsa_port *dp; 844 int i, j; 845 846 if (!dsa_is_user_port(ds, port)) 847 return; 848 849 dp = dsa_to_port(ds, port); 850 cpu_port = BIT(dsa_upstream_port(ds, port)); 851 852 for (i = 0; i < ds->num_ports; i++) { 853 const struct dsa_port *other_dp = dsa_to_port(ds, i); 854 struct ksz_port *other_p = &dev->ports[i]; 855 u8 val = 0; 856 857 if (!dsa_is_user_port(ds, i)) 858 continue; 859 if (port == i) 860 continue; 861 if (!dsa_port_bridge_same(dp, other_dp)) 862 continue; 863 if (other_p->stp_state != BR_STATE_FORWARDING) 864 continue; 865 866 if (p->stp_state == BR_STATE_FORWARDING) { 867 val |= BIT(port); 868 port_member |= BIT(i); 869 } 870 871 /* Retain port [i]'s relationship to other ports than [port] */ 872 for (j = 0; j < ds->num_ports; j++) { 873 const struct dsa_port *third_dp; 874 struct ksz_port *third_p; 875 876 if (j == i) 877 continue; 878 if (j == port) 879 continue; 880 if (!dsa_is_user_port(ds, j)) 881 continue; 882 third_p = &dev->ports[j]; 883 if (third_p->stp_state != BR_STATE_FORWARDING) 884 continue; 885 third_dp = dsa_to_port(ds, j); 886 if (dsa_port_bridge_same(other_dp, third_dp)) 887 val |= BIT(j); 888 } 889 890 dev->dev_ops->cfg_port_member(dev, i, val | cpu_port); 891 } 892 893 dev->dev_ops->cfg_port_member(dev, port, port_member | cpu_port); 894 } 895 896 static int ksz_setup(struct dsa_switch *ds) 897 { 898 struct ksz_device *dev = ds->priv; 899 const u16 *regs; 900 int ret; 901 902 regs = dev->info->regs; 903 904 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table), 905 dev->info->num_vlans, GFP_KERNEL); 906 if (!dev->vlan_cache) 907 return -ENOMEM; 908 909 ret = dev->dev_ops->reset(dev); 910 if (ret) { 911 dev_err(ds->dev, "failed to reset switch\n"); 912 return ret; 913 } 914 915 /* set broadcast storm protection 10% rate */ 916 regmap_update_bits(dev->regmap[1], regs[S_BROADCAST_CTRL], 917 BROADCAST_STORM_RATE, 918 (BROADCAST_STORM_VALUE * 919 BROADCAST_STORM_PROT_RATE) / 100); 920 921 dev->dev_ops->config_cpu_port(ds); 922 923 dev->dev_ops->enable_stp_addr(dev); 924 925 regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL], 926 MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE); 927 928 ksz_init_mib_timer(dev); 929 930 ds->configure_vlan_while_not_filtering = false; 931 932 if (dev->dev_ops->setup) { 933 ret = dev->dev_ops->setup(ds); 934 if (ret) 935 return ret; 936 } 937 938 /* start switch */ 939 regmap_update_bits(dev->regmap[0], regs[S_START_CTRL], 940 SW_START, SW_START); 941 942 return 0; 943 } 944 945 static void port_r_cnt(struct ksz_device *dev, int port) 946 { 947 struct ksz_port_mib *mib = &dev->ports[port].mib; 948 u64 *dropped; 949 950 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */ 951 while (mib->cnt_ptr < dev->info->reg_mib_cnt) { 952 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr, 953 &mib->counters[mib->cnt_ptr]); 954 ++mib->cnt_ptr; 955 } 956 957 /* last one in storage */ 958 dropped = &mib->counters[dev->info->mib_cnt]; 959 960 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */ 961 while (mib->cnt_ptr < dev->info->mib_cnt) { 962 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr, 963 dropped, &mib->counters[mib->cnt_ptr]); 964 ++mib->cnt_ptr; 965 } 966 mib->cnt_ptr = 0; 967 } 968 969 static void ksz_mib_read_work(struct work_struct *work) 970 { 971 struct ksz_device *dev = container_of(work, struct ksz_device, 972 mib_read.work); 973 struct ksz_port_mib *mib; 974 struct ksz_port *p; 975 int i; 976 977 for (i = 0; i < dev->info->port_cnt; i++) { 978 if (dsa_is_unused_port(dev->ds, i)) 979 continue; 980 981 p = &dev->ports[i]; 982 mib = &p->mib; 983 mutex_lock(&mib->cnt_mutex); 984 985 /* Only read MIB counters when the port is told to do. 986 * If not, read only dropped counters when link is not up. 987 */ 988 if (!p->read) { 989 const struct dsa_port *dp = dsa_to_port(dev->ds, i); 990 991 if (!netif_carrier_ok(dp->slave)) 992 mib->cnt_ptr = dev->info->reg_mib_cnt; 993 } 994 port_r_cnt(dev, i); 995 p->read = false; 996 997 if (dev->dev_ops->r_mib_stat64) 998 dev->dev_ops->r_mib_stat64(dev, i); 999 1000 mutex_unlock(&mib->cnt_mutex); 1001 } 1002 1003 schedule_delayed_work(&dev->mib_read, dev->mib_read_interval); 1004 } 1005 1006 void ksz_init_mib_timer(struct ksz_device *dev) 1007 { 1008 int i; 1009 1010 INIT_DELAYED_WORK(&dev->mib_read, ksz_mib_read_work); 1011 1012 for (i = 0; i < dev->info->port_cnt; i++) { 1013 struct ksz_port_mib *mib = &dev->ports[i].mib; 1014 1015 dev->dev_ops->port_init_cnt(dev, i); 1016 1017 mib->cnt_ptr = 0; 1018 memset(mib->counters, 0, dev->info->mib_cnt * sizeof(u64)); 1019 } 1020 } 1021 1022 static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg) 1023 { 1024 struct ksz_device *dev = ds->priv; 1025 u16 val = 0xffff; 1026 1027 dev->dev_ops->r_phy(dev, addr, reg, &val); 1028 1029 return val; 1030 } 1031 1032 static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val) 1033 { 1034 struct ksz_device *dev = ds->priv; 1035 1036 dev->dev_ops->w_phy(dev, addr, reg, val); 1037 1038 return 0; 1039 } 1040 1041 static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port) 1042 { 1043 struct ksz_device *dev = ds->priv; 1044 1045 if (dev->chip_id == KSZ8830_CHIP_ID) { 1046 /* Silicon Errata Sheet (DS80000830A): 1047 * Port 1 does not work with LinkMD Cable-Testing. 1048 * Port 1 does not respond to received PAUSE control frames. 1049 */ 1050 if (!port) 1051 return MICREL_KSZ8_P1_ERRATA; 1052 } 1053 1054 return 0; 1055 } 1056 1057 static void ksz_mac_link_down(struct dsa_switch *ds, int port, 1058 unsigned int mode, phy_interface_t interface) 1059 { 1060 struct ksz_device *dev = ds->priv; 1061 struct ksz_port *p = &dev->ports[port]; 1062 1063 /* Read all MIB counters when the link is going down. */ 1064 p->read = true; 1065 /* timer started */ 1066 if (dev->mib_read_interval) 1067 schedule_delayed_work(&dev->mib_read, 0); 1068 } 1069 1070 static int ksz_sset_count(struct dsa_switch *ds, int port, int sset) 1071 { 1072 struct ksz_device *dev = ds->priv; 1073 1074 if (sset != ETH_SS_STATS) 1075 return 0; 1076 1077 return dev->info->mib_cnt; 1078 } 1079 1080 static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, 1081 uint64_t *buf) 1082 { 1083 const struct dsa_port *dp = dsa_to_port(ds, port); 1084 struct ksz_device *dev = ds->priv; 1085 struct ksz_port_mib *mib; 1086 1087 mib = &dev->ports[port].mib; 1088 mutex_lock(&mib->cnt_mutex); 1089 1090 /* Only read dropped counters if no link. */ 1091 if (!netif_carrier_ok(dp->slave)) 1092 mib->cnt_ptr = dev->info->reg_mib_cnt; 1093 port_r_cnt(dev, port); 1094 memcpy(buf, mib->counters, dev->info->mib_cnt * sizeof(u64)); 1095 mutex_unlock(&mib->cnt_mutex); 1096 } 1097 1098 static int ksz_port_bridge_join(struct dsa_switch *ds, int port, 1099 struct dsa_bridge bridge, 1100 bool *tx_fwd_offload, 1101 struct netlink_ext_ack *extack) 1102 { 1103 /* port_stp_state_set() will be called after to put the port in 1104 * appropriate state so there is no need to do anything. 1105 */ 1106 1107 return 0; 1108 } 1109 1110 static void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 1111 struct dsa_bridge bridge) 1112 { 1113 /* port_stp_state_set() will be called after to put the port in 1114 * forwarding state so there is no need to do anything. 1115 */ 1116 } 1117 1118 static void ksz_port_fast_age(struct dsa_switch *ds, int port) 1119 { 1120 struct ksz_device *dev = ds->priv; 1121 1122 dev->dev_ops->flush_dyn_mac_table(dev, port); 1123 } 1124 1125 static int ksz_port_fdb_add(struct dsa_switch *ds, int port, 1126 const unsigned char *addr, u16 vid, 1127 struct dsa_db db) 1128 { 1129 struct ksz_device *dev = ds->priv; 1130 1131 if (!dev->dev_ops->fdb_add) 1132 return -EOPNOTSUPP; 1133 1134 return dev->dev_ops->fdb_add(dev, port, addr, vid, db); 1135 } 1136 1137 static int ksz_port_fdb_del(struct dsa_switch *ds, int port, 1138 const unsigned char *addr, 1139 u16 vid, struct dsa_db db) 1140 { 1141 struct ksz_device *dev = ds->priv; 1142 1143 if (!dev->dev_ops->fdb_del) 1144 return -EOPNOTSUPP; 1145 1146 return dev->dev_ops->fdb_del(dev, port, addr, vid, db); 1147 } 1148 1149 static int ksz_port_fdb_dump(struct dsa_switch *ds, int port, 1150 dsa_fdb_dump_cb_t *cb, void *data) 1151 { 1152 struct ksz_device *dev = ds->priv; 1153 1154 if (!dev->dev_ops->fdb_dump) 1155 return -EOPNOTSUPP; 1156 1157 return dev->dev_ops->fdb_dump(dev, port, cb, data); 1158 } 1159 1160 static int ksz_port_mdb_add(struct dsa_switch *ds, int port, 1161 const struct switchdev_obj_port_mdb *mdb, 1162 struct dsa_db db) 1163 { 1164 struct ksz_device *dev = ds->priv; 1165 1166 if (!dev->dev_ops->mdb_add) 1167 return -EOPNOTSUPP; 1168 1169 return dev->dev_ops->mdb_add(dev, port, mdb, db); 1170 } 1171 1172 static int ksz_port_mdb_del(struct dsa_switch *ds, int port, 1173 const struct switchdev_obj_port_mdb *mdb, 1174 struct dsa_db db) 1175 { 1176 struct ksz_device *dev = ds->priv; 1177 1178 if (!dev->dev_ops->mdb_del) 1179 return -EOPNOTSUPP; 1180 1181 return dev->dev_ops->mdb_del(dev, port, mdb, db); 1182 } 1183 1184 static int ksz_enable_port(struct dsa_switch *ds, int port, 1185 struct phy_device *phy) 1186 { 1187 struct ksz_device *dev = ds->priv; 1188 1189 if (!dsa_is_user_port(ds, port)) 1190 return 0; 1191 1192 /* setup slave port */ 1193 dev->dev_ops->port_setup(dev, port, false); 1194 1195 /* port_stp_state_set() will be called after to enable the port so 1196 * there is no need to do anything. 1197 */ 1198 1199 return 0; 1200 } 1201 1202 void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) 1203 { 1204 struct ksz_device *dev = ds->priv; 1205 struct ksz_port *p; 1206 const u16 *regs; 1207 u8 data; 1208 1209 regs = dev->info->regs; 1210 1211 ksz_pread8(dev, port, regs[P_STP_CTRL], &data); 1212 data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1213 1214 switch (state) { 1215 case BR_STATE_DISABLED: 1216 data |= PORT_LEARN_DISABLE; 1217 break; 1218 case BR_STATE_LISTENING: 1219 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1220 break; 1221 case BR_STATE_LEARNING: 1222 data |= PORT_RX_ENABLE; 1223 break; 1224 case BR_STATE_FORWARDING: 1225 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE); 1226 break; 1227 case BR_STATE_BLOCKING: 1228 data |= PORT_LEARN_DISABLE; 1229 break; 1230 default: 1231 dev_err(ds->dev, "invalid STP state: %d\n", state); 1232 return; 1233 } 1234 1235 ksz_pwrite8(dev, port, regs[P_STP_CTRL], data); 1236 1237 p = &dev->ports[port]; 1238 p->stp_state = state; 1239 1240 ksz_update_port_member(dev, port); 1241 } 1242 1243 static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds, 1244 int port, 1245 enum dsa_tag_protocol mp) 1246 { 1247 struct ksz_device *dev = ds->priv; 1248 enum dsa_tag_protocol proto = DSA_TAG_PROTO_NONE; 1249 1250 if (dev->chip_id == KSZ8795_CHIP_ID || 1251 dev->chip_id == KSZ8794_CHIP_ID || 1252 dev->chip_id == KSZ8765_CHIP_ID) 1253 proto = DSA_TAG_PROTO_KSZ8795; 1254 1255 if (dev->chip_id == KSZ8830_CHIP_ID || 1256 dev->chip_id == KSZ9893_CHIP_ID) 1257 proto = DSA_TAG_PROTO_KSZ9893; 1258 1259 if (dev->chip_id == KSZ9477_CHIP_ID || 1260 dev->chip_id == KSZ9897_CHIP_ID || 1261 dev->chip_id == KSZ9567_CHIP_ID) 1262 proto = DSA_TAG_PROTO_KSZ9477; 1263 1264 if (is_lan937x(dev)) 1265 proto = DSA_TAG_PROTO_LAN937X_VALUE; 1266 1267 return proto; 1268 } 1269 1270 static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port, 1271 bool flag, struct netlink_ext_ack *extack) 1272 { 1273 struct ksz_device *dev = ds->priv; 1274 1275 if (!dev->dev_ops->vlan_filtering) 1276 return -EOPNOTSUPP; 1277 1278 return dev->dev_ops->vlan_filtering(dev, port, flag, extack); 1279 } 1280 1281 static int ksz_port_vlan_add(struct dsa_switch *ds, int port, 1282 const struct switchdev_obj_port_vlan *vlan, 1283 struct netlink_ext_ack *extack) 1284 { 1285 struct ksz_device *dev = ds->priv; 1286 1287 if (!dev->dev_ops->vlan_add) 1288 return -EOPNOTSUPP; 1289 1290 return dev->dev_ops->vlan_add(dev, port, vlan, extack); 1291 } 1292 1293 static int ksz_port_vlan_del(struct dsa_switch *ds, int port, 1294 const struct switchdev_obj_port_vlan *vlan) 1295 { 1296 struct ksz_device *dev = ds->priv; 1297 1298 if (!dev->dev_ops->vlan_del) 1299 return -EOPNOTSUPP; 1300 1301 return dev->dev_ops->vlan_del(dev, port, vlan); 1302 } 1303 1304 static int ksz_port_mirror_add(struct dsa_switch *ds, int port, 1305 struct dsa_mall_mirror_tc_entry *mirror, 1306 bool ingress, struct netlink_ext_ack *extack) 1307 { 1308 struct ksz_device *dev = ds->priv; 1309 1310 if (!dev->dev_ops->mirror_add) 1311 return -EOPNOTSUPP; 1312 1313 return dev->dev_ops->mirror_add(dev, port, mirror, ingress, extack); 1314 } 1315 1316 static void ksz_port_mirror_del(struct dsa_switch *ds, int port, 1317 struct dsa_mall_mirror_tc_entry *mirror) 1318 { 1319 struct ksz_device *dev = ds->priv; 1320 1321 if (dev->dev_ops->mirror_del) 1322 dev->dev_ops->mirror_del(dev, port, mirror); 1323 } 1324 1325 static int ksz_change_mtu(struct dsa_switch *ds, int port, int mtu) 1326 { 1327 struct ksz_device *dev = ds->priv; 1328 1329 if (!dev->dev_ops->change_mtu) 1330 return -EOPNOTSUPP; 1331 1332 return dev->dev_ops->change_mtu(dev, port, mtu); 1333 } 1334 1335 static int ksz_max_mtu(struct dsa_switch *ds, int port) 1336 { 1337 struct ksz_device *dev = ds->priv; 1338 1339 if (!dev->dev_ops->max_mtu) 1340 return -EOPNOTSUPP; 1341 1342 return dev->dev_ops->max_mtu(dev, port); 1343 } 1344 1345 static void ksz_phylink_mac_config(struct dsa_switch *ds, int port, 1346 unsigned int mode, 1347 const struct phylink_link_state *state) 1348 { 1349 struct ksz_device *dev = ds->priv; 1350 1351 if (dev->dev_ops->phylink_mac_config) 1352 dev->dev_ops->phylink_mac_config(dev, port, mode, state); 1353 } 1354 1355 static void ksz_phylink_mac_link_up(struct dsa_switch *ds, int port, 1356 unsigned int mode, 1357 phy_interface_t interface, 1358 struct phy_device *phydev, int speed, 1359 int duplex, bool tx_pause, bool rx_pause) 1360 { 1361 struct ksz_device *dev = ds->priv; 1362 1363 if (dev->dev_ops->phylink_mac_link_up) 1364 dev->dev_ops->phylink_mac_link_up(dev, port, mode, interface, 1365 phydev, speed, duplex, 1366 tx_pause, rx_pause); 1367 } 1368 1369 static int ksz_switch_detect(struct ksz_device *dev) 1370 { 1371 u8 id1, id2; 1372 u16 id16; 1373 u32 id32; 1374 int ret; 1375 1376 /* read chip id */ 1377 ret = ksz_read16(dev, REG_CHIP_ID0, &id16); 1378 if (ret) 1379 return ret; 1380 1381 id1 = FIELD_GET(SW_FAMILY_ID_M, id16); 1382 id2 = FIELD_GET(SW_CHIP_ID_M, id16); 1383 1384 switch (id1) { 1385 case KSZ87_FAMILY_ID: 1386 if (id2 == KSZ87_CHIP_ID_95) { 1387 u8 val; 1388 1389 dev->chip_id = KSZ8795_CHIP_ID; 1390 1391 ksz_read8(dev, KSZ8_PORT_STATUS_0, &val); 1392 if (val & KSZ8_PORT_FIBER_MODE) 1393 dev->chip_id = KSZ8765_CHIP_ID; 1394 } else if (id2 == KSZ87_CHIP_ID_94) { 1395 dev->chip_id = KSZ8794_CHIP_ID; 1396 } else { 1397 return -ENODEV; 1398 } 1399 break; 1400 case KSZ88_FAMILY_ID: 1401 if (id2 == KSZ88_CHIP_ID_63) 1402 dev->chip_id = KSZ8830_CHIP_ID; 1403 else 1404 return -ENODEV; 1405 break; 1406 default: 1407 ret = ksz_read32(dev, REG_CHIP_ID0, &id32); 1408 if (ret) 1409 return ret; 1410 1411 dev->chip_rev = FIELD_GET(SW_REV_ID_M, id32); 1412 id32 &= ~0xFF; 1413 1414 switch (id32) { 1415 case KSZ9477_CHIP_ID: 1416 case KSZ9897_CHIP_ID: 1417 case KSZ9893_CHIP_ID: 1418 case KSZ9567_CHIP_ID: 1419 case LAN9370_CHIP_ID: 1420 case LAN9371_CHIP_ID: 1421 case LAN9372_CHIP_ID: 1422 case LAN9373_CHIP_ID: 1423 case LAN9374_CHIP_ID: 1424 dev->chip_id = id32; 1425 break; 1426 default: 1427 dev_err(dev->dev, 1428 "unsupported switch detected %x)\n", id32); 1429 return -ENODEV; 1430 } 1431 } 1432 return 0; 1433 } 1434 1435 static const struct dsa_switch_ops ksz_switch_ops = { 1436 .get_tag_protocol = ksz_get_tag_protocol, 1437 .get_phy_flags = ksz_get_phy_flags, 1438 .setup = ksz_setup, 1439 .phy_read = ksz_phy_read16, 1440 .phy_write = ksz_phy_write16, 1441 .phylink_get_caps = ksz_phylink_get_caps, 1442 .phylink_mac_config = ksz_phylink_mac_config, 1443 .phylink_mac_link_up = ksz_phylink_mac_link_up, 1444 .phylink_mac_link_down = ksz_mac_link_down, 1445 .port_enable = ksz_enable_port, 1446 .get_strings = ksz_get_strings, 1447 .get_ethtool_stats = ksz_get_ethtool_stats, 1448 .get_sset_count = ksz_sset_count, 1449 .port_bridge_join = ksz_port_bridge_join, 1450 .port_bridge_leave = ksz_port_bridge_leave, 1451 .port_stp_state_set = ksz_port_stp_state_set, 1452 .port_fast_age = ksz_port_fast_age, 1453 .port_vlan_filtering = ksz_port_vlan_filtering, 1454 .port_vlan_add = ksz_port_vlan_add, 1455 .port_vlan_del = ksz_port_vlan_del, 1456 .port_fdb_dump = ksz_port_fdb_dump, 1457 .port_fdb_add = ksz_port_fdb_add, 1458 .port_fdb_del = ksz_port_fdb_del, 1459 .port_mdb_add = ksz_port_mdb_add, 1460 .port_mdb_del = ksz_port_mdb_del, 1461 .port_mirror_add = ksz_port_mirror_add, 1462 .port_mirror_del = ksz_port_mirror_del, 1463 .get_stats64 = ksz_get_stats64, 1464 .get_pause_stats = ksz_get_pause_stats, 1465 .port_change_mtu = ksz_change_mtu, 1466 .port_max_mtu = ksz_max_mtu, 1467 }; 1468 1469 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv) 1470 { 1471 struct dsa_switch *ds; 1472 struct ksz_device *swdev; 1473 1474 ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL); 1475 if (!ds) 1476 return NULL; 1477 1478 ds->dev = base; 1479 ds->num_ports = DSA_MAX_PORTS; 1480 ds->ops = &ksz_switch_ops; 1481 1482 swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL); 1483 if (!swdev) 1484 return NULL; 1485 1486 ds->priv = swdev; 1487 swdev->dev = base; 1488 1489 swdev->ds = ds; 1490 swdev->priv = priv; 1491 1492 return swdev; 1493 } 1494 EXPORT_SYMBOL(ksz_switch_alloc); 1495 1496 int ksz_switch_register(struct ksz_device *dev) 1497 { 1498 const struct ksz_chip_data *info; 1499 struct device_node *port, *ports; 1500 phy_interface_t interface; 1501 unsigned int port_num; 1502 int ret; 1503 int i; 1504 1505 if (dev->pdata) 1506 dev->chip_id = dev->pdata->chip_id; 1507 1508 dev->reset_gpio = devm_gpiod_get_optional(dev->dev, "reset", 1509 GPIOD_OUT_LOW); 1510 if (IS_ERR(dev->reset_gpio)) 1511 return PTR_ERR(dev->reset_gpio); 1512 1513 if (dev->reset_gpio) { 1514 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1515 usleep_range(10000, 12000); 1516 gpiod_set_value_cansleep(dev->reset_gpio, 0); 1517 msleep(100); 1518 } 1519 1520 mutex_init(&dev->dev_mutex); 1521 mutex_init(&dev->regmap_mutex); 1522 mutex_init(&dev->alu_mutex); 1523 mutex_init(&dev->vlan_mutex); 1524 1525 ret = ksz_switch_detect(dev); 1526 if (ret) 1527 return ret; 1528 1529 info = ksz_lookup_info(dev->chip_id); 1530 if (!info) 1531 return -ENODEV; 1532 1533 /* Update the compatible info with the probed one */ 1534 dev->info = info; 1535 1536 dev_info(dev->dev, "found switch: %s, rev %i\n", 1537 dev->info->dev_name, dev->chip_rev); 1538 1539 ret = ksz_check_device_id(dev); 1540 if (ret) 1541 return ret; 1542 1543 dev->dev_ops = dev->info->ops; 1544 1545 ret = dev->dev_ops->init(dev); 1546 if (ret) 1547 return ret; 1548 1549 dev->ports = devm_kzalloc(dev->dev, 1550 dev->info->port_cnt * sizeof(struct ksz_port), 1551 GFP_KERNEL); 1552 if (!dev->ports) 1553 return -ENOMEM; 1554 1555 for (i = 0; i < dev->info->port_cnt; i++) { 1556 spin_lock_init(&dev->ports[i].mib.stats64_lock); 1557 mutex_init(&dev->ports[i].mib.cnt_mutex); 1558 dev->ports[i].mib.counters = 1559 devm_kzalloc(dev->dev, 1560 sizeof(u64) * (dev->info->mib_cnt + 1), 1561 GFP_KERNEL); 1562 if (!dev->ports[i].mib.counters) 1563 return -ENOMEM; 1564 } 1565 1566 /* set the real number of ports */ 1567 dev->ds->num_ports = dev->info->port_cnt; 1568 1569 /* Host port interface will be self detected, or specifically set in 1570 * device tree. 1571 */ 1572 for (port_num = 0; port_num < dev->info->port_cnt; ++port_num) 1573 dev->ports[port_num].interface = PHY_INTERFACE_MODE_NA; 1574 if (dev->dev->of_node) { 1575 ret = of_get_phy_mode(dev->dev->of_node, &interface); 1576 if (ret == 0) 1577 dev->compat_interface = interface; 1578 ports = of_get_child_by_name(dev->dev->of_node, "ethernet-ports"); 1579 if (!ports) 1580 ports = of_get_child_by_name(dev->dev->of_node, "ports"); 1581 if (ports) 1582 for_each_available_child_of_node(ports, port) { 1583 if (of_property_read_u32(port, "reg", 1584 &port_num)) 1585 continue; 1586 if (!(dev->port_mask & BIT(port_num))) { 1587 of_node_put(port); 1588 return -EINVAL; 1589 } 1590 of_get_phy_mode(port, 1591 &dev->ports[port_num].interface); 1592 } 1593 dev->synclko_125 = of_property_read_bool(dev->dev->of_node, 1594 "microchip,synclko-125"); 1595 dev->synclko_disable = of_property_read_bool(dev->dev->of_node, 1596 "microchip,synclko-disable"); 1597 if (dev->synclko_125 && dev->synclko_disable) { 1598 dev_err(dev->dev, "inconsistent synclko settings\n"); 1599 return -EINVAL; 1600 } 1601 } 1602 1603 ret = dsa_register_switch(dev->ds); 1604 if (ret) { 1605 dev->dev_ops->exit(dev); 1606 return ret; 1607 } 1608 1609 /* Read MIB counters every 30 seconds to avoid overflow. */ 1610 dev->mib_read_interval = msecs_to_jiffies(5000); 1611 1612 /* Start the MIB timer. */ 1613 schedule_delayed_work(&dev->mib_read, 0); 1614 1615 return ret; 1616 } 1617 EXPORT_SYMBOL(ksz_switch_register); 1618 1619 void ksz_switch_remove(struct ksz_device *dev) 1620 { 1621 /* timer started */ 1622 if (dev->mib_read_interval) { 1623 dev->mib_read_interval = 0; 1624 cancel_delayed_work_sync(&dev->mib_read); 1625 } 1626 1627 dev->dev_ops->exit(dev); 1628 dsa_unregister_switch(dev->ds); 1629 1630 if (dev->reset_gpio) 1631 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1632 1633 } 1634 EXPORT_SYMBOL(ksz_switch_remove); 1635 1636 MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>"); 1637 MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver"); 1638 MODULE_LICENSE("GPL"); 1639