1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Microchip switch driver main logic 4 * 5 * Copyright (C) 2017-2019 Microchip Technology Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/export.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/platform_data/microchip-ksz.h> 14 #include <linux/phy.h> 15 #include <linux/etherdevice.h> 16 #include <linux/if_bridge.h> 17 #include <linux/of_device.h> 18 #include <linux/of_net.h> 19 #include <linux/micrel_phy.h> 20 #include <net/dsa.h> 21 #include <net/switchdev.h> 22 23 #include "ksz_common.h" 24 #include "ksz8.h" 25 #include "ksz9477.h" 26 #include "lan937x.h" 27 28 #define MIB_COUNTER_NUM 0x20 29 30 struct ksz_stats_raw { 31 u64 rx_hi; 32 u64 rx_undersize; 33 u64 rx_fragments; 34 u64 rx_oversize; 35 u64 rx_jabbers; 36 u64 rx_symbol_err; 37 u64 rx_crc_err; 38 u64 rx_align_err; 39 u64 rx_mac_ctrl; 40 u64 rx_pause; 41 u64 rx_bcast; 42 u64 rx_mcast; 43 u64 rx_ucast; 44 u64 rx_64_or_less; 45 u64 rx_65_127; 46 u64 rx_128_255; 47 u64 rx_256_511; 48 u64 rx_512_1023; 49 u64 rx_1024_1522; 50 u64 rx_1523_2000; 51 u64 rx_2001; 52 u64 tx_hi; 53 u64 tx_late_col; 54 u64 tx_pause; 55 u64 tx_bcast; 56 u64 tx_mcast; 57 u64 tx_ucast; 58 u64 tx_deferred; 59 u64 tx_total_col; 60 u64 tx_exc_col; 61 u64 tx_single_col; 62 u64 tx_mult_col; 63 u64 rx_total; 64 u64 tx_total; 65 u64 rx_discards; 66 u64 tx_discards; 67 }; 68 69 static const struct ksz_mib_names ksz88xx_mib_names[] = { 70 { 0x00, "rx" }, 71 { 0x01, "rx_hi" }, 72 { 0x02, "rx_undersize" }, 73 { 0x03, "rx_fragments" }, 74 { 0x04, "rx_oversize" }, 75 { 0x05, "rx_jabbers" }, 76 { 0x06, "rx_symbol_err" }, 77 { 0x07, "rx_crc_err" }, 78 { 0x08, "rx_align_err" }, 79 { 0x09, "rx_mac_ctrl" }, 80 { 0x0a, "rx_pause" }, 81 { 0x0b, "rx_bcast" }, 82 { 0x0c, "rx_mcast" }, 83 { 0x0d, "rx_ucast" }, 84 { 0x0e, "rx_64_or_less" }, 85 { 0x0f, "rx_65_127" }, 86 { 0x10, "rx_128_255" }, 87 { 0x11, "rx_256_511" }, 88 { 0x12, "rx_512_1023" }, 89 { 0x13, "rx_1024_1522" }, 90 { 0x14, "tx" }, 91 { 0x15, "tx_hi" }, 92 { 0x16, "tx_late_col" }, 93 { 0x17, "tx_pause" }, 94 { 0x18, "tx_bcast" }, 95 { 0x19, "tx_mcast" }, 96 { 0x1a, "tx_ucast" }, 97 { 0x1b, "tx_deferred" }, 98 { 0x1c, "tx_total_col" }, 99 { 0x1d, "tx_exc_col" }, 100 { 0x1e, "tx_single_col" }, 101 { 0x1f, "tx_mult_col" }, 102 { 0x100, "rx_discards" }, 103 { 0x101, "tx_discards" }, 104 }; 105 106 static const struct ksz_mib_names ksz9477_mib_names[] = { 107 { 0x00, "rx_hi" }, 108 { 0x01, "rx_undersize" }, 109 { 0x02, "rx_fragments" }, 110 { 0x03, "rx_oversize" }, 111 { 0x04, "rx_jabbers" }, 112 { 0x05, "rx_symbol_err" }, 113 { 0x06, "rx_crc_err" }, 114 { 0x07, "rx_align_err" }, 115 { 0x08, "rx_mac_ctrl" }, 116 { 0x09, "rx_pause" }, 117 { 0x0A, "rx_bcast" }, 118 { 0x0B, "rx_mcast" }, 119 { 0x0C, "rx_ucast" }, 120 { 0x0D, "rx_64_or_less" }, 121 { 0x0E, "rx_65_127" }, 122 { 0x0F, "rx_128_255" }, 123 { 0x10, "rx_256_511" }, 124 { 0x11, "rx_512_1023" }, 125 { 0x12, "rx_1024_1522" }, 126 { 0x13, "rx_1523_2000" }, 127 { 0x14, "rx_2001" }, 128 { 0x15, "tx_hi" }, 129 { 0x16, "tx_late_col" }, 130 { 0x17, "tx_pause" }, 131 { 0x18, "tx_bcast" }, 132 { 0x19, "tx_mcast" }, 133 { 0x1A, "tx_ucast" }, 134 { 0x1B, "tx_deferred" }, 135 { 0x1C, "tx_total_col" }, 136 { 0x1D, "tx_exc_col" }, 137 { 0x1E, "tx_single_col" }, 138 { 0x1F, "tx_mult_col" }, 139 { 0x80, "rx_total" }, 140 { 0x81, "tx_total" }, 141 { 0x82, "rx_discards" }, 142 { 0x83, "tx_discards" }, 143 }; 144 145 static const struct ksz_dev_ops ksz8_dev_ops = { 146 .setup = ksz8_setup, 147 .get_port_addr = ksz8_get_port_addr, 148 .cfg_port_member = ksz8_cfg_port_member, 149 .flush_dyn_mac_table = ksz8_flush_dyn_mac_table, 150 .port_setup = ksz8_port_setup, 151 .r_phy = ksz8_r_phy, 152 .w_phy = ksz8_w_phy, 153 .r_mib_cnt = ksz8_r_mib_cnt, 154 .r_mib_pkt = ksz8_r_mib_pkt, 155 .freeze_mib = ksz8_freeze_mib, 156 .port_init_cnt = ksz8_port_init_cnt, 157 .fdb_dump = ksz8_fdb_dump, 158 .mdb_add = ksz8_mdb_add, 159 .mdb_del = ksz8_mdb_del, 160 .vlan_filtering = ksz8_port_vlan_filtering, 161 .vlan_add = ksz8_port_vlan_add, 162 .vlan_del = ksz8_port_vlan_del, 163 .mirror_add = ksz8_port_mirror_add, 164 .mirror_del = ksz8_port_mirror_del, 165 .get_caps = ksz8_get_caps, 166 .config_cpu_port = ksz8_config_cpu_port, 167 .enable_stp_addr = ksz8_enable_stp_addr, 168 .reset = ksz8_reset_switch, 169 .init = ksz8_switch_init, 170 .exit = ksz8_switch_exit, 171 }; 172 173 static const struct ksz_dev_ops ksz9477_dev_ops = { 174 .setup = ksz9477_setup, 175 .get_port_addr = ksz9477_get_port_addr, 176 .cfg_port_member = ksz9477_cfg_port_member, 177 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table, 178 .port_setup = ksz9477_port_setup, 179 .r_phy = ksz9477_r_phy, 180 .w_phy = ksz9477_w_phy, 181 .r_mib_cnt = ksz9477_r_mib_cnt, 182 .r_mib_pkt = ksz9477_r_mib_pkt, 183 .r_mib_stat64 = ksz_r_mib_stats64, 184 .freeze_mib = ksz9477_freeze_mib, 185 .port_init_cnt = ksz9477_port_init_cnt, 186 .vlan_filtering = ksz9477_port_vlan_filtering, 187 .vlan_add = ksz9477_port_vlan_add, 188 .vlan_del = ksz9477_port_vlan_del, 189 .mirror_add = ksz9477_port_mirror_add, 190 .mirror_del = ksz9477_port_mirror_del, 191 .get_caps = ksz9477_get_caps, 192 .fdb_dump = ksz9477_fdb_dump, 193 .fdb_add = ksz9477_fdb_add, 194 .fdb_del = ksz9477_fdb_del, 195 .mdb_add = ksz9477_mdb_add, 196 .mdb_del = ksz9477_mdb_del, 197 .change_mtu = ksz9477_change_mtu, 198 .max_mtu = ksz9477_max_mtu, 199 .config_cpu_port = ksz9477_config_cpu_port, 200 .enable_stp_addr = ksz9477_enable_stp_addr, 201 .reset = ksz9477_reset_switch, 202 .init = ksz9477_switch_init, 203 .exit = ksz9477_switch_exit, 204 }; 205 206 static const struct ksz_dev_ops lan937x_dev_ops = { 207 .setup = lan937x_setup, 208 .get_port_addr = ksz9477_get_port_addr, 209 .cfg_port_member = ksz9477_cfg_port_member, 210 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table, 211 .port_setup = lan937x_port_setup, 212 .r_phy = lan937x_r_phy, 213 .w_phy = lan937x_w_phy, 214 .r_mib_cnt = ksz9477_r_mib_cnt, 215 .r_mib_pkt = ksz9477_r_mib_pkt, 216 .r_mib_stat64 = ksz_r_mib_stats64, 217 .freeze_mib = ksz9477_freeze_mib, 218 .port_init_cnt = ksz9477_port_init_cnt, 219 .vlan_filtering = ksz9477_port_vlan_filtering, 220 .vlan_add = ksz9477_port_vlan_add, 221 .vlan_del = ksz9477_port_vlan_del, 222 .mirror_add = ksz9477_port_mirror_add, 223 .mirror_del = ksz9477_port_mirror_del, 224 .get_caps = lan937x_phylink_get_caps, 225 .phylink_mac_config = lan937x_phylink_mac_config, 226 .phylink_mac_link_up = lan937x_phylink_mac_link_up, 227 .fdb_dump = ksz9477_fdb_dump, 228 .fdb_add = ksz9477_fdb_add, 229 .fdb_del = ksz9477_fdb_del, 230 .mdb_add = ksz9477_mdb_add, 231 .mdb_del = ksz9477_mdb_del, 232 .change_mtu = lan937x_change_mtu, 233 .max_mtu = ksz9477_max_mtu, 234 .config_cpu_port = lan937x_config_cpu_port, 235 .enable_stp_addr = ksz9477_enable_stp_addr, 236 .reset = lan937x_reset_switch, 237 .init = lan937x_switch_init, 238 .exit = lan937x_switch_exit, 239 }; 240 241 static const u16 ksz8795_regs[] = { 242 [REG_IND_CTRL_0] = 0x6E, 243 [REG_IND_DATA_8] = 0x70, 244 [REG_IND_DATA_CHECK] = 0x72, 245 [REG_IND_DATA_HI] = 0x71, 246 [REG_IND_DATA_LO] = 0x75, 247 [REG_IND_MIB_CHECK] = 0x74, 248 [REG_IND_BYTE] = 0xA0, 249 [P_FORCE_CTRL] = 0x0C, 250 [P_LINK_STATUS] = 0x0E, 251 [P_LOCAL_CTRL] = 0x07, 252 [P_NEG_RESTART_CTRL] = 0x0D, 253 [P_REMOTE_STATUS] = 0x08, 254 [P_SPEED_STATUS] = 0x09, 255 [S_TAIL_TAG_CTRL] = 0x0C, 256 [P_STP_CTRL] = 0x02, 257 [S_START_CTRL] = 0x01, 258 [S_BROADCAST_CTRL] = 0x06, 259 [S_MULTICAST_CTRL] = 0x04, 260 }; 261 262 static const u32 ksz8795_masks[] = { 263 [PORT_802_1P_REMAPPING] = BIT(7), 264 [SW_TAIL_TAG_ENABLE] = BIT(1), 265 [MIB_COUNTER_OVERFLOW] = BIT(6), 266 [MIB_COUNTER_VALID] = BIT(5), 267 [VLAN_TABLE_FID] = GENMASK(6, 0), 268 [VLAN_TABLE_MEMBERSHIP] = GENMASK(11, 7), 269 [VLAN_TABLE_VALID] = BIT(12), 270 [STATIC_MAC_TABLE_VALID] = BIT(21), 271 [STATIC_MAC_TABLE_USE_FID] = BIT(23), 272 [STATIC_MAC_TABLE_FID] = GENMASK(30, 24), 273 [STATIC_MAC_TABLE_OVERRIDE] = BIT(26), 274 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(24, 20), 275 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(6, 0), 276 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(8), 277 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 278 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 29), 279 [DYNAMIC_MAC_TABLE_FID] = GENMASK(26, 20), 280 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(26, 24), 281 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(28, 27), 282 }; 283 284 static const u8 ksz8795_shifts[] = { 285 [VLAN_TABLE_MEMBERSHIP_S] = 7, 286 [VLAN_TABLE] = 16, 287 [STATIC_MAC_FWD_PORTS] = 16, 288 [STATIC_MAC_FID] = 24, 289 [DYNAMIC_MAC_ENTRIES_H] = 3, 290 [DYNAMIC_MAC_ENTRIES] = 29, 291 [DYNAMIC_MAC_FID] = 16, 292 [DYNAMIC_MAC_TIMESTAMP] = 27, 293 [DYNAMIC_MAC_SRC_PORT] = 24, 294 }; 295 296 static const u16 ksz8863_regs[] = { 297 [REG_IND_CTRL_0] = 0x79, 298 [REG_IND_DATA_8] = 0x7B, 299 [REG_IND_DATA_CHECK] = 0x7B, 300 [REG_IND_DATA_HI] = 0x7C, 301 [REG_IND_DATA_LO] = 0x80, 302 [REG_IND_MIB_CHECK] = 0x80, 303 [P_FORCE_CTRL] = 0x0C, 304 [P_LINK_STATUS] = 0x0E, 305 [P_LOCAL_CTRL] = 0x0C, 306 [P_NEG_RESTART_CTRL] = 0x0D, 307 [P_REMOTE_STATUS] = 0x0E, 308 [P_SPEED_STATUS] = 0x0F, 309 [S_TAIL_TAG_CTRL] = 0x03, 310 [P_STP_CTRL] = 0x02, 311 [S_START_CTRL] = 0x01, 312 [S_BROADCAST_CTRL] = 0x06, 313 [S_MULTICAST_CTRL] = 0x04, 314 }; 315 316 static const u32 ksz8863_masks[] = { 317 [PORT_802_1P_REMAPPING] = BIT(3), 318 [SW_TAIL_TAG_ENABLE] = BIT(6), 319 [MIB_COUNTER_OVERFLOW] = BIT(7), 320 [MIB_COUNTER_VALID] = BIT(6), 321 [VLAN_TABLE_FID] = GENMASK(15, 12), 322 [VLAN_TABLE_MEMBERSHIP] = GENMASK(18, 16), 323 [VLAN_TABLE_VALID] = BIT(19), 324 [STATIC_MAC_TABLE_VALID] = BIT(19), 325 [STATIC_MAC_TABLE_USE_FID] = BIT(21), 326 [STATIC_MAC_TABLE_FID] = GENMASK(29, 26), 327 [STATIC_MAC_TABLE_OVERRIDE] = BIT(20), 328 [STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(18, 16), 329 [DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(5, 0), 330 [DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(7), 331 [DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7), 332 [DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 28), 333 [DYNAMIC_MAC_TABLE_FID] = GENMASK(19, 16), 334 [DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(21, 20), 335 [DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(23, 22), 336 }; 337 338 static u8 ksz8863_shifts[] = { 339 [VLAN_TABLE_MEMBERSHIP_S] = 16, 340 [STATIC_MAC_FWD_PORTS] = 16, 341 [STATIC_MAC_FID] = 22, 342 [DYNAMIC_MAC_ENTRIES_H] = 3, 343 [DYNAMIC_MAC_ENTRIES] = 24, 344 [DYNAMIC_MAC_FID] = 16, 345 [DYNAMIC_MAC_TIMESTAMP] = 24, 346 [DYNAMIC_MAC_SRC_PORT] = 20, 347 }; 348 349 static const u16 ksz9477_regs[] = { 350 [P_STP_CTRL] = 0x0B04, 351 [S_START_CTRL] = 0x0300, 352 [S_BROADCAST_CTRL] = 0x0332, 353 [S_MULTICAST_CTRL] = 0x0331, 354 }; 355 356 static const u32 ksz9477_masks[] = { 357 [ALU_STAT_WRITE] = 0, 358 [ALU_STAT_READ] = 1, 359 }; 360 361 static const u8 ksz9477_shifts[] = { 362 [ALU_STAT_INDEX] = 16, 363 }; 364 365 static const u32 lan937x_masks[] = { 366 [ALU_STAT_WRITE] = 1, 367 [ALU_STAT_READ] = 2, 368 }; 369 370 static const u8 lan937x_shifts[] = { 371 [ALU_STAT_INDEX] = 8, 372 }; 373 374 const struct ksz_chip_data ksz_switch_chips[] = { 375 [KSZ8795] = { 376 .chip_id = KSZ8795_CHIP_ID, 377 .dev_name = "KSZ8795", 378 .num_vlans = 4096, 379 .num_alus = 0, 380 .num_statics = 8, 381 .cpu_ports = 0x10, /* can be configured as cpu port */ 382 .port_cnt = 5, /* total cpu and user ports */ 383 .ops = &ksz8_dev_ops, 384 .ksz87xx_eee_link_erratum = true, 385 .mib_names = ksz9477_mib_names, 386 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 387 .reg_mib_cnt = MIB_COUNTER_NUM, 388 .regs = ksz8795_regs, 389 .masks = ksz8795_masks, 390 .shifts = ksz8795_shifts, 391 .supports_mii = {false, false, false, false, true}, 392 .supports_rmii = {false, false, false, false, true}, 393 .supports_rgmii = {false, false, false, false, true}, 394 .internal_phy = {true, true, true, true, false}, 395 }, 396 397 [KSZ8794] = { 398 /* WARNING 399 * ======= 400 * KSZ8794 is similar to KSZ8795, except the port map 401 * contains a gap between external and CPU ports, the 402 * port map is NOT continuous. The per-port register 403 * map is shifted accordingly too, i.e. registers at 404 * offset 0x40 are NOT used on KSZ8794 and they ARE 405 * used on KSZ8795 for external port 3. 406 * external cpu 407 * KSZ8794 0,1,2 4 408 * KSZ8795 0,1,2,3 4 409 * KSZ8765 0,1,2,3 4 410 * port_cnt is configured as 5, even though it is 4 411 */ 412 .chip_id = KSZ8794_CHIP_ID, 413 .dev_name = "KSZ8794", 414 .num_vlans = 4096, 415 .num_alus = 0, 416 .num_statics = 8, 417 .cpu_ports = 0x10, /* can be configured as cpu port */ 418 .port_cnt = 5, /* total cpu and user ports */ 419 .ops = &ksz8_dev_ops, 420 .ksz87xx_eee_link_erratum = true, 421 .mib_names = ksz9477_mib_names, 422 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 423 .reg_mib_cnt = MIB_COUNTER_NUM, 424 .regs = ksz8795_regs, 425 .masks = ksz8795_masks, 426 .shifts = ksz8795_shifts, 427 .supports_mii = {false, false, false, false, true}, 428 .supports_rmii = {false, false, false, false, true}, 429 .supports_rgmii = {false, false, false, false, true}, 430 .internal_phy = {true, true, true, false, false}, 431 }, 432 433 [KSZ8765] = { 434 .chip_id = KSZ8765_CHIP_ID, 435 .dev_name = "KSZ8765", 436 .num_vlans = 4096, 437 .num_alus = 0, 438 .num_statics = 8, 439 .cpu_ports = 0x10, /* can be configured as cpu port */ 440 .port_cnt = 5, /* total cpu and user ports */ 441 .ops = &ksz8_dev_ops, 442 .ksz87xx_eee_link_erratum = true, 443 .mib_names = ksz9477_mib_names, 444 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 445 .reg_mib_cnt = MIB_COUNTER_NUM, 446 .regs = ksz8795_regs, 447 .masks = ksz8795_masks, 448 .shifts = ksz8795_shifts, 449 .supports_mii = {false, false, false, false, true}, 450 .supports_rmii = {false, false, false, false, true}, 451 .supports_rgmii = {false, false, false, false, true}, 452 .internal_phy = {true, true, true, true, false}, 453 }, 454 455 [KSZ8830] = { 456 .chip_id = KSZ8830_CHIP_ID, 457 .dev_name = "KSZ8863/KSZ8873", 458 .num_vlans = 16, 459 .num_alus = 0, 460 .num_statics = 8, 461 .cpu_ports = 0x4, /* can be configured as cpu port */ 462 .port_cnt = 3, 463 .ops = &ksz8_dev_ops, 464 .mib_names = ksz88xx_mib_names, 465 .mib_cnt = ARRAY_SIZE(ksz88xx_mib_names), 466 .reg_mib_cnt = MIB_COUNTER_NUM, 467 .regs = ksz8863_regs, 468 .masks = ksz8863_masks, 469 .shifts = ksz8863_shifts, 470 .supports_mii = {false, false, true}, 471 .supports_rmii = {false, false, true}, 472 .internal_phy = {true, true, false}, 473 }, 474 475 [KSZ9477] = { 476 .chip_id = KSZ9477_CHIP_ID, 477 .dev_name = "KSZ9477", 478 .num_vlans = 4096, 479 .num_alus = 4096, 480 .num_statics = 16, 481 .cpu_ports = 0x7F, /* can be configured as cpu port */ 482 .port_cnt = 7, /* total physical port count */ 483 .ops = &ksz9477_dev_ops, 484 .phy_errata_9477 = true, 485 .mib_names = ksz9477_mib_names, 486 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 487 .reg_mib_cnt = MIB_COUNTER_NUM, 488 .regs = ksz9477_regs, 489 .masks = ksz9477_masks, 490 .shifts = ksz9477_shifts, 491 .supports_mii = {false, false, false, false, 492 false, true, false}, 493 .supports_rmii = {false, false, false, false, 494 false, true, false}, 495 .supports_rgmii = {false, false, false, false, 496 false, true, false}, 497 .internal_phy = {true, true, true, true, 498 true, false, false}, 499 }, 500 501 [KSZ9897] = { 502 .chip_id = KSZ9897_CHIP_ID, 503 .dev_name = "KSZ9897", 504 .num_vlans = 4096, 505 .num_alus = 4096, 506 .num_statics = 16, 507 .cpu_ports = 0x7F, /* can be configured as cpu port */ 508 .port_cnt = 7, /* total physical port count */ 509 .ops = &ksz9477_dev_ops, 510 .phy_errata_9477 = true, 511 .mib_names = ksz9477_mib_names, 512 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 513 .reg_mib_cnt = MIB_COUNTER_NUM, 514 .regs = ksz9477_regs, 515 .masks = ksz9477_masks, 516 .shifts = ksz9477_shifts, 517 .supports_mii = {false, false, false, false, 518 false, true, true}, 519 .supports_rmii = {false, false, false, false, 520 false, true, true}, 521 .supports_rgmii = {false, false, false, false, 522 false, true, true}, 523 .internal_phy = {true, true, true, true, 524 true, false, false}, 525 }, 526 527 [KSZ9893] = { 528 .chip_id = KSZ9893_CHIP_ID, 529 .dev_name = "KSZ9893", 530 .num_vlans = 4096, 531 .num_alus = 4096, 532 .num_statics = 16, 533 .cpu_ports = 0x07, /* can be configured as cpu port */ 534 .port_cnt = 3, /* total port count */ 535 .ops = &ksz9477_dev_ops, 536 .mib_names = ksz9477_mib_names, 537 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 538 .reg_mib_cnt = MIB_COUNTER_NUM, 539 .regs = ksz9477_regs, 540 .masks = ksz9477_masks, 541 .shifts = ksz9477_shifts, 542 .supports_mii = {false, false, true}, 543 .supports_rmii = {false, false, true}, 544 .supports_rgmii = {false, false, true}, 545 .internal_phy = {true, true, false}, 546 }, 547 548 [KSZ9567] = { 549 .chip_id = KSZ9567_CHIP_ID, 550 .dev_name = "KSZ9567", 551 .num_vlans = 4096, 552 .num_alus = 4096, 553 .num_statics = 16, 554 .cpu_ports = 0x7F, /* can be configured as cpu port */ 555 .port_cnt = 7, /* total physical port count */ 556 .ops = &ksz9477_dev_ops, 557 .phy_errata_9477 = true, 558 .mib_names = ksz9477_mib_names, 559 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 560 .reg_mib_cnt = MIB_COUNTER_NUM, 561 .regs = ksz9477_regs, 562 .masks = ksz9477_masks, 563 .shifts = ksz9477_shifts, 564 .supports_mii = {false, false, false, false, 565 false, true, true}, 566 .supports_rmii = {false, false, false, false, 567 false, true, true}, 568 .supports_rgmii = {false, false, false, false, 569 false, true, true}, 570 .internal_phy = {true, true, true, true, 571 true, false, false}, 572 }, 573 574 [LAN9370] = { 575 .chip_id = LAN9370_CHIP_ID, 576 .dev_name = "LAN9370", 577 .num_vlans = 4096, 578 .num_alus = 1024, 579 .num_statics = 256, 580 .cpu_ports = 0x10, /* can be configured as cpu port */ 581 .port_cnt = 5, /* total physical port count */ 582 .ops = &lan937x_dev_ops, 583 .mib_names = ksz9477_mib_names, 584 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 585 .reg_mib_cnt = MIB_COUNTER_NUM, 586 .regs = ksz9477_regs, 587 .masks = lan937x_masks, 588 .shifts = lan937x_shifts, 589 .supports_mii = {false, false, false, false, true}, 590 .supports_rmii = {false, false, false, false, true}, 591 .supports_rgmii = {false, false, false, false, true}, 592 .internal_phy = {true, true, true, true, false}, 593 }, 594 595 [LAN9371] = { 596 .chip_id = LAN9371_CHIP_ID, 597 .dev_name = "LAN9371", 598 .num_vlans = 4096, 599 .num_alus = 1024, 600 .num_statics = 256, 601 .cpu_ports = 0x30, /* can be configured as cpu port */ 602 .port_cnt = 6, /* total physical port count */ 603 .ops = &lan937x_dev_ops, 604 .mib_names = ksz9477_mib_names, 605 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 606 .reg_mib_cnt = MIB_COUNTER_NUM, 607 .regs = ksz9477_regs, 608 .masks = lan937x_masks, 609 .shifts = lan937x_shifts, 610 .supports_mii = {false, false, false, false, true, true}, 611 .supports_rmii = {false, false, false, false, true, true}, 612 .supports_rgmii = {false, false, false, false, true, true}, 613 .internal_phy = {true, true, true, true, false, false}, 614 }, 615 616 [LAN9372] = { 617 .chip_id = LAN9372_CHIP_ID, 618 .dev_name = "LAN9372", 619 .num_vlans = 4096, 620 .num_alus = 1024, 621 .num_statics = 256, 622 .cpu_ports = 0x30, /* can be configured as cpu port */ 623 .port_cnt = 8, /* total physical port count */ 624 .ops = &lan937x_dev_ops, 625 .mib_names = ksz9477_mib_names, 626 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 627 .reg_mib_cnt = MIB_COUNTER_NUM, 628 .regs = ksz9477_regs, 629 .masks = lan937x_masks, 630 .shifts = lan937x_shifts, 631 .supports_mii = {false, false, false, false, 632 true, true, false, false}, 633 .supports_rmii = {false, false, false, false, 634 true, true, false, false}, 635 .supports_rgmii = {false, false, false, false, 636 true, true, false, false}, 637 .internal_phy = {true, true, true, true, 638 false, false, true, true}, 639 }, 640 641 [LAN9373] = { 642 .chip_id = LAN9373_CHIP_ID, 643 .dev_name = "LAN9373", 644 .num_vlans = 4096, 645 .num_alus = 1024, 646 .num_statics = 256, 647 .cpu_ports = 0x38, /* can be configured as cpu port */ 648 .port_cnt = 5, /* total physical port count */ 649 .ops = &lan937x_dev_ops, 650 .mib_names = ksz9477_mib_names, 651 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 652 .reg_mib_cnt = MIB_COUNTER_NUM, 653 .regs = ksz9477_regs, 654 .masks = lan937x_masks, 655 .shifts = lan937x_shifts, 656 .supports_mii = {false, false, false, false, 657 true, true, false, false}, 658 .supports_rmii = {false, false, false, false, 659 true, true, false, false}, 660 .supports_rgmii = {false, false, false, false, 661 true, true, false, false}, 662 .internal_phy = {true, true, true, false, 663 false, false, true, true}, 664 }, 665 666 [LAN9374] = { 667 .chip_id = LAN9374_CHIP_ID, 668 .dev_name = "LAN9374", 669 .num_vlans = 4096, 670 .num_alus = 1024, 671 .num_statics = 256, 672 .cpu_ports = 0x30, /* can be configured as cpu port */ 673 .port_cnt = 8, /* total physical port count */ 674 .ops = &lan937x_dev_ops, 675 .mib_names = ksz9477_mib_names, 676 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 677 .reg_mib_cnt = MIB_COUNTER_NUM, 678 .regs = ksz9477_regs, 679 .masks = lan937x_masks, 680 .shifts = lan937x_shifts, 681 .supports_mii = {false, false, false, false, 682 true, true, false, false}, 683 .supports_rmii = {false, false, false, false, 684 true, true, false, false}, 685 .supports_rgmii = {false, false, false, false, 686 true, true, false, false}, 687 .internal_phy = {true, true, true, true, 688 false, false, true, true}, 689 }, 690 }; 691 EXPORT_SYMBOL_GPL(ksz_switch_chips); 692 693 static const struct ksz_chip_data *ksz_lookup_info(unsigned int prod_num) 694 { 695 int i; 696 697 for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) { 698 const struct ksz_chip_data *chip = &ksz_switch_chips[i]; 699 700 if (chip->chip_id == prod_num) 701 return chip; 702 } 703 704 return NULL; 705 } 706 707 static int ksz_check_device_id(struct ksz_device *dev) 708 { 709 const struct ksz_chip_data *dt_chip_data; 710 711 dt_chip_data = of_device_get_match_data(dev->dev); 712 713 /* Check for Device Tree and Chip ID */ 714 if (dt_chip_data->chip_id != dev->chip_id) { 715 dev_err(dev->dev, 716 "Device tree specifies chip %s but found %s, please fix it!\n", 717 dt_chip_data->dev_name, dev->info->dev_name); 718 return -ENODEV; 719 } 720 721 return 0; 722 } 723 724 static void ksz_phylink_get_caps(struct dsa_switch *ds, int port, 725 struct phylink_config *config) 726 { 727 struct ksz_device *dev = ds->priv; 728 729 config->legacy_pre_march2020 = false; 730 731 if (dev->info->supports_mii[port]) 732 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); 733 734 if (dev->info->supports_rmii[port]) 735 __set_bit(PHY_INTERFACE_MODE_RMII, 736 config->supported_interfaces); 737 738 if (dev->info->supports_rgmii[port]) 739 phy_interface_set_rgmii(config->supported_interfaces); 740 741 if (dev->info->internal_phy[port]) 742 __set_bit(PHY_INTERFACE_MODE_INTERNAL, 743 config->supported_interfaces); 744 745 if (dev->dev_ops->get_caps) 746 dev->dev_ops->get_caps(dev, port, config); 747 } 748 749 void ksz_r_mib_stats64(struct ksz_device *dev, int port) 750 { 751 struct ethtool_pause_stats *pstats; 752 struct rtnl_link_stats64 *stats; 753 struct ksz_stats_raw *raw; 754 struct ksz_port_mib *mib; 755 756 mib = &dev->ports[port].mib; 757 stats = &mib->stats64; 758 pstats = &mib->pause_stats; 759 raw = (struct ksz_stats_raw *)mib->counters; 760 761 spin_lock(&mib->stats64_lock); 762 763 stats->rx_packets = raw->rx_bcast + raw->rx_mcast + raw->rx_ucast + 764 raw->rx_pause; 765 stats->tx_packets = raw->tx_bcast + raw->tx_mcast + raw->tx_ucast + 766 raw->tx_pause; 767 768 /* HW counters are counting bytes + FCS which is not acceptable 769 * for rtnl_link_stats64 interface 770 */ 771 stats->rx_bytes = raw->rx_total - stats->rx_packets * ETH_FCS_LEN; 772 stats->tx_bytes = raw->tx_total - stats->tx_packets * ETH_FCS_LEN; 773 774 stats->rx_length_errors = raw->rx_undersize + raw->rx_fragments + 775 raw->rx_oversize; 776 777 stats->rx_crc_errors = raw->rx_crc_err; 778 stats->rx_frame_errors = raw->rx_align_err; 779 stats->rx_dropped = raw->rx_discards; 780 stats->rx_errors = stats->rx_length_errors + stats->rx_crc_errors + 781 stats->rx_frame_errors + stats->rx_dropped; 782 783 stats->tx_window_errors = raw->tx_late_col; 784 stats->tx_fifo_errors = raw->tx_discards; 785 stats->tx_aborted_errors = raw->tx_exc_col; 786 stats->tx_errors = stats->tx_window_errors + stats->tx_fifo_errors + 787 stats->tx_aborted_errors; 788 789 stats->multicast = raw->rx_mcast; 790 stats->collisions = raw->tx_total_col; 791 792 pstats->tx_pause_frames = raw->tx_pause; 793 pstats->rx_pause_frames = raw->rx_pause; 794 795 spin_unlock(&mib->stats64_lock); 796 } 797 798 static void ksz_get_stats64(struct dsa_switch *ds, int port, 799 struct rtnl_link_stats64 *s) 800 { 801 struct ksz_device *dev = ds->priv; 802 struct ksz_port_mib *mib; 803 804 mib = &dev->ports[port].mib; 805 806 spin_lock(&mib->stats64_lock); 807 memcpy(s, &mib->stats64, sizeof(*s)); 808 spin_unlock(&mib->stats64_lock); 809 } 810 811 static void ksz_get_pause_stats(struct dsa_switch *ds, int port, 812 struct ethtool_pause_stats *pause_stats) 813 { 814 struct ksz_device *dev = ds->priv; 815 struct ksz_port_mib *mib; 816 817 mib = &dev->ports[port].mib; 818 819 spin_lock(&mib->stats64_lock); 820 memcpy(pause_stats, &mib->pause_stats, sizeof(*pause_stats)); 821 spin_unlock(&mib->stats64_lock); 822 } 823 824 static void ksz_get_strings(struct dsa_switch *ds, int port, 825 u32 stringset, uint8_t *buf) 826 { 827 struct ksz_device *dev = ds->priv; 828 int i; 829 830 if (stringset != ETH_SS_STATS) 831 return; 832 833 for (i = 0; i < dev->info->mib_cnt; i++) { 834 memcpy(buf + i * ETH_GSTRING_LEN, 835 dev->info->mib_names[i].string, ETH_GSTRING_LEN); 836 } 837 } 838 839 static void ksz_update_port_member(struct ksz_device *dev, int port) 840 { 841 struct ksz_port *p = &dev->ports[port]; 842 struct dsa_switch *ds = dev->ds; 843 u8 port_member = 0, cpu_port; 844 const struct dsa_port *dp; 845 int i, j; 846 847 if (!dsa_is_user_port(ds, port)) 848 return; 849 850 dp = dsa_to_port(ds, port); 851 cpu_port = BIT(dsa_upstream_port(ds, port)); 852 853 for (i = 0; i < ds->num_ports; i++) { 854 const struct dsa_port *other_dp = dsa_to_port(ds, i); 855 struct ksz_port *other_p = &dev->ports[i]; 856 u8 val = 0; 857 858 if (!dsa_is_user_port(ds, i)) 859 continue; 860 if (port == i) 861 continue; 862 if (!dsa_port_bridge_same(dp, other_dp)) 863 continue; 864 if (other_p->stp_state != BR_STATE_FORWARDING) 865 continue; 866 867 if (p->stp_state == BR_STATE_FORWARDING) { 868 val |= BIT(port); 869 port_member |= BIT(i); 870 } 871 872 /* Retain port [i]'s relationship to other ports than [port] */ 873 for (j = 0; j < ds->num_ports; j++) { 874 const struct dsa_port *third_dp; 875 struct ksz_port *third_p; 876 877 if (j == i) 878 continue; 879 if (j == port) 880 continue; 881 if (!dsa_is_user_port(ds, j)) 882 continue; 883 third_p = &dev->ports[j]; 884 if (third_p->stp_state != BR_STATE_FORWARDING) 885 continue; 886 third_dp = dsa_to_port(ds, j); 887 if (dsa_port_bridge_same(other_dp, third_dp)) 888 val |= BIT(j); 889 } 890 891 dev->dev_ops->cfg_port_member(dev, i, val | cpu_port); 892 } 893 894 dev->dev_ops->cfg_port_member(dev, port, port_member | cpu_port); 895 } 896 897 static int ksz_setup(struct dsa_switch *ds) 898 { 899 struct ksz_device *dev = ds->priv; 900 const u16 *regs; 901 int ret; 902 903 regs = dev->info->regs; 904 905 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table), 906 dev->info->num_vlans, GFP_KERNEL); 907 if (!dev->vlan_cache) 908 return -ENOMEM; 909 910 ret = dev->dev_ops->reset(dev); 911 if (ret) { 912 dev_err(ds->dev, "failed to reset switch\n"); 913 return ret; 914 } 915 916 /* set broadcast storm protection 10% rate */ 917 regmap_update_bits(dev->regmap[1], regs[S_BROADCAST_CTRL], 918 BROADCAST_STORM_RATE, 919 (BROADCAST_STORM_VALUE * 920 BROADCAST_STORM_PROT_RATE) / 100); 921 922 dev->dev_ops->config_cpu_port(ds); 923 924 dev->dev_ops->enable_stp_addr(dev); 925 926 regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL], 927 MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE); 928 929 ksz_init_mib_timer(dev); 930 931 ds->configure_vlan_while_not_filtering = false; 932 933 if (dev->dev_ops->setup) { 934 ret = dev->dev_ops->setup(ds); 935 if (ret) 936 return ret; 937 } 938 939 /* start switch */ 940 regmap_update_bits(dev->regmap[0], regs[S_START_CTRL], 941 SW_START, SW_START); 942 943 return 0; 944 } 945 946 static void port_r_cnt(struct ksz_device *dev, int port) 947 { 948 struct ksz_port_mib *mib = &dev->ports[port].mib; 949 u64 *dropped; 950 951 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */ 952 while (mib->cnt_ptr < dev->info->reg_mib_cnt) { 953 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr, 954 &mib->counters[mib->cnt_ptr]); 955 ++mib->cnt_ptr; 956 } 957 958 /* last one in storage */ 959 dropped = &mib->counters[dev->info->mib_cnt]; 960 961 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */ 962 while (mib->cnt_ptr < dev->info->mib_cnt) { 963 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr, 964 dropped, &mib->counters[mib->cnt_ptr]); 965 ++mib->cnt_ptr; 966 } 967 mib->cnt_ptr = 0; 968 } 969 970 static void ksz_mib_read_work(struct work_struct *work) 971 { 972 struct ksz_device *dev = container_of(work, struct ksz_device, 973 mib_read.work); 974 struct ksz_port_mib *mib; 975 struct ksz_port *p; 976 int i; 977 978 for (i = 0; i < dev->info->port_cnt; i++) { 979 if (dsa_is_unused_port(dev->ds, i)) 980 continue; 981 982 p = &dev->ports[i]; 983 mib = &p->mib; 984 mutex_lock(&mib->cnt_mutex); 985 986 /* Only read MIB counters when the port is told to do. 987 * If not, read only dropped counters when link is not up. 988 */ 989 if (!p->read) { 990 const struct dsa_port *dp = dsa_to_port(dev->ds, i); 991 992 if (!netif_carrier_ok(dp->slave)) 993 mib->cnt_ptr = dev->info->reg_mib_cnt; 994 } 995 port_r_cnt(dev, i); 996 p->read = false; 997 998 if (dev->dev_ops->r_mib_stat64) 999 dev->dev_ops->r_mib_stat64(dev, i); 1000 1001 mutex_unlock(&mib->cnt_mutex); 1002 } 1003 1004 schedule_delayed_work(&dev->mib_read, dev->mib_read_interval); 1005 } 1006 1007 void ksz_init_mib_timer(struct ksz_device *dev) 1008 { 1009 int i; 1010 1011 INIT_DELAYED_WORK(&dev->mib_read, ksz_mib_read_work); 1012 1013 for (i = 0; i < dev->info->port_cnt; i++) { 1014 struct ksz_port_mib *mib = &dev->ports[i].mib; 1015 1016 dev->dev_ops->port_init_cnt(dev, i); 1017 1018 mib->cnt_ptr = 0; 1019 memset(mib->counters, 0, dev->info->mib_cnt * sizeof(u64)); 1020 } 1021 } 1022 1023 static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg) 1024 { 1025 struct ksz_device *dev = ds->priv; 1026 u16 val = 0xffff; 1027 1028 dev->dev_ops->r_phy(dev, addr, reg, &val); 1029 1030 return val; 1031 } 1032 1033 static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val) 1034 { 1035 struct ksz_device *dev = ds->priv; 1036 1037 dev->dev_ops->w_phy(dev, addr, reg, val); 1038 1039 return 0; 1040 } 1041 1042 static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port) 1043 { 1044 struct ksz_device *dev = ds->priv; 1045 1046 if (dev->chip_id == KSZ8830_CHIP_ID) { 1047 /* Silicon Errata Sheet (DS80000830A): 1048 * Port 1 does not work with LinkMD Cable-Testing. 1049 * Port 1 does not respond to received PAUSE control frames. 1050 */ 1051 if (!port) 1052 return MICREL_KSZ8_P1_ERRATA; 1053 } 1054 1055 return 0; 1056 } 1057 1058 static void ksz_mac_link_down(struct dsa_switch *ds, int port, 1059 unsigned int mode, phy_interface_t interface) 1060 { 1061 struct ksz_device *dev = ds->priv; 1062 struct ksz_port *p = &dev->ports[port]; 1063 1064 /* Read all MIB counters when the link is going down. */ 1065 p->read = true; 1066 /* timer started */ 1067 if (dev->mib_read_interval) 1068 schedule_delayed_work(&dev->mib_read, 0); 1069 } 1070 1071 static int ksz_sset_count(struct dsa_switch *ds, int port, int sset) 1072 { 1073 struct ksz_device *dev = ds->priv; 1074 1075 if (sset != ETH_SS_STATS) 1076 return 0; 1077 1078 return dev->info->mib_cnt; 1079 } 1080 1081 static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, 1082 uint64_t *buf) 1083 { 1084 const struct dsa_port *dp = dsa_to_port(ds, port); 1085 struct ksz_device *dev = ds->priv; 1086 struct ksz_port_mib *mib; 1087 1088 mib = &dev->ports[port].mib; 1089 mutex_lock(&mib->cnt_mutex); 1090 1091 /* Only read dropped counters if no link. */ 1092 if (!netif_carrier_ok(dp->slave)) 1093 mib->cnt_ptr = dev->info->reg_mib_cnt; 1094 port_r_cnt(dev, port); 1095 memcpy(buf, mib->counters, dev->info->mib_cnt * sizeof(u64)); 1096 mutex_unlock(&mib->cnt_mutex); 1097 } 1098 1099 static int ksz_port_bridge_join(struct dsa_switch *ds, int port, 1100 struct dsa_bridge bridge, 1101 bool *tx_fwd_offload, 1102 struct netlink_ext_ack *extack) 1103 { 1104 /* port_stp_state_set() will be called after to put the port in 1105 * appropriate state so there is no need to do anything. 1106 */ 1107 1108 return 0; 1109 } 1110 1111 static void ksz_port_bridge_leave(struct dsa_switch *ds, int port, 1112 struct dsa_bridge bridge) 1113 { 1114 /* port_stp_state_set() will be called after to put the port in 1115 * forwarding state so there is no need to do anything. 1116 */ 1117 } 1118 1119 static void ksz_port_fast_age(struct dsa_switch *ds, int port) 1120 { 1121 struct ksz_device *dev = ds->priv; 1122 1123 dev->dev_ops->flush_dyn_mac_table(dev, port); 1124 } 1125 1126 static int ksz_port_fdb_add(struct dsa_switch *ds, int port, 1127 const unsigned char *addr, u16 vid, 1128 struct dsa_db db) 1129 { 1130 struct ksz_device *dev = ds->priv; 1131 1132 if (!dev->dev_ops->fdb_add) 1133 return -EOPNOTSUPP; 1134 1135 return dev->dev_ops->fdb_add(dev, port, addr, vid, db); 1136 } 1137 1138 static int ksz_port_fdb_del(struct dsa_switch *ds, int port, 1139 const unsigned char *addr, 1140 u16 vid, struct dsa_db db) 1141 { 1142 struct ksz_device *dev = ds->priv; 1143 1144 if (!dev->dev_ops->fdb_del) 1145 return -EOPNOTSUPP; 1146 1147 return dev->dev_ops->fdb_del(dev, port, addr, vid, db); 1148 } 1149 1150 static int ksz_port_fdb_dump(struct dsa_switch *ds, int port, 1151 dsa_fdb_dump_cb_t *cb, void *data) 1152 { 1153 struct ksz_device *dev = ds->priv; 1154 1155 if (!dev->dev_ops->fdb_dump) 1156 return -EOPNOTSUPP; 1157 1158 return dev->dev_ops->fdb_dump(dev, port, cb, data); 1159 } 1160 1161 static int ksz_port_mdb_add(struct dsa_switch *ds, int port, 1162 const struct switchdev_obj_port_mdb *mdb, 1163 struct dsa_db db) 1164 { 1165 struct ksz_device *dev = ds->priv; 1166 1167 if (!dev->dev_ops->mdb_add) 1168 return -EOPNOTSUPP; 1169 1170 return dev->dev_ops->mdb_add(dev, port, mdb, db); 1171 } 1172 1173 static int ksz_port_mdb_del(struct dsa_switch *ds, int port, 1174 const struct switchdev_obj_port_mdb *mdb, 1175 struct dsa_db db) 1176 { 1177 struct ksz_device *dev = ds->priv; 1178 1179 if (!dev->dev_ops->mdb_del) 1180 return -EOPNOTSUPP; 1181 1182 return dev->dev_ops->mdb_del(dev, port, mdb, db); 1183 } 1184 1185 static int ksz_enable_port(struct dsa_switch *ds, int port, 1186 struct phy_device *phy) 1187 { 1188 struct ksz_device *dev = ds->priv; 1189 1190 if (!dsa_is_user_port(ds, port)) 1191 return 0; 1192 1193 /* setup slave port */ 1194 dev->dev_ops->port_setup(dev, port, false); 1195 1196 /* port_stp_state_set() will be called after to enable the port so 1197 * there is no need to do anything. 1198 */ 1199 1200 return 0; 1201 } 1202 1203 void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) 1204 { 1205 struct ksz_device *dev = ds->priv; 1206 struct ksz_port *p; 1207 const u16 *regs; 1208 u8 data; 1209 1210 regs = dev->info->regs; 1211 1212 ksz_pread8(dev, port, regs[P_STP_CTRL], &data); 1213 data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1214 1215 switch (state) { 1216 case BR_STATE_DISABLED: 1217 data |= PORT_LEARN_DISABLE; 1218 break; 1219 case BR_STATE_LISTENING: 1220 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE); 1221 break; 1222 case BR_STATE_LEARNING: 1223 data |= PORT_RX_ENABLE; 1224 break; 1225 case BR_STATE_FORWARDING: 1226 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE); 1227 break; 1228 case BR_STATE_BLOCKING: 1229 data |= PORT_LEARN_DISABLE; 1230 break; 1231 default: 1232 dev_err(ds->dev, "invalid STP state: %d\n", state); 1233 return; 1234 } 1235 1236 ksz_pwrite8(dev, port, regs[P_STP_CTRL], data); 1237 1238 p = &dev->ports[port]; 1239 p->stp_state = state; 1240 1241 ksz_update_port_member(dev, port); 1242 } 1243 1244 static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds, 1245 int port, 1246 enum dsa_tag_protocol mp) 1247 { 1248 struct ksz_device *dev = ds->priv; 1249 enum dsa_tag_protocol proto = DSA_TAG_PROTO_NONE; 1250 1251 if (dev->chip_id == KSZ8795_CHIP_ID || 1252 dev->chip_id == KSZ8794_CHIP_ID || 1253 dev->chip_id == KSZ8765_CHIP_ID) 1254 proto = DSA_TAG_PROTO_KSZ8795; 1255 1256 if (dev->chip_id == KSZ8830_CHIP_ID || 1257 dev->chip_id == KSZ9893_CHIP_ID) 1258 proto = DSA_TAG_PROTO_KSZ9893; 1259 1260 if (dev->chip_id == KSZ9477_CHIP_ID || 1261 dev->chip_id == KSZ9897_CHIP_ID || 1262 dev->chip_id == KSZ9567_CHIP_ID) 1263 proto = DSA_TAG_PROTO_KSZ9477; 1264 1265 if (is_lan937x(dev)) 1266 proto = DSA_TAG_PROTO_LAN937X_VALUE; 1267 1268 return proto; 1269 } 1270 1271 static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port, 1272 bool flag, struct netlink_ext_ack *extack) 1273 { 1274 struct ksz_device *dev = ds->priv; 1275 1276 if (!dev->dev_ops->vlan_filtering) 1277 return -EOPNOTSUPP; 1278 1279 return dev->dev_ops->vlan_filtering(dev, port, flag, extack); 1280 } 1281 1282 static int ksz_port_vlan_add(struct dsa_switch *ds, int port, 1283 const struct switchdev_obj_port_vlan *vlan, 1284 struct netlink_ext_ack *extack) 1285 { 1286 struct ksz_device *dev = ds->priv; 1287 1288 if (!dev->dev_ops->vlan_add) 1289 return -EOPNOTSUPP; 1290 1291 return dev->dev_ops->vlan_add(dev, port, vlan, extack); 1292 } 1293 1294 static int ksz_port_vlan_del(struct dsa_switch *ds, int port, 1295 const struct switchdev_obj_port_vlan *vlan) 1296 { 1297 struct ksz_device *dev = ds->priv; 1298 1299 if (!dev->dev_ops->vlan_del) 1300 return -EOPNOTSUPP; 1301 1302 return dev->dev_ops->vlan_del(dev, port, vlan); 1303 } 1304 1305 static int ksz_port_mirror_add(struct dsa_switch *ds, int port, 1306 struct dsa_mall_mirror_tc_entry *mirror, 1307 bool ingress, struct netlink_ext_ack *extack) 1308 { 1309 struct ksz_device *dev = ds->priv; 1310 1311 if (!dev->dev_ops->mirror_add) 1312 return -EOPNOTSUPP; 1313 1314 return dev->dev_ops->mirror_add(dev, port, mirror, ingress, extack); 1315 } 1316 1317 static void ksz_port_mirror_del(struct dsa_switch *ds, int port, 1318 struct dsa_mall_mirror_tc_entry *mirror) 1319 { 1320 struct ksz_device *dev = ds->priv; 1321 1322 if (dev->dev_ops->mirror_del) 1323 dev->dev_ops->mirror_del(dev, port, mirror); 1324 } 1325 1326 static int ksz_change_mtu(struct dsa_switch *ds, int port, int mtu) 1327 { 1328 struct ksz_device *dev = ds->priv; 1329 1330 if (!dev->dev_ops->change_mtu) 1331 return -EOPNOTSUPP; 1332 1333 return dev->dev_ops->change_mtu(dev, port, mtu); 1334 } 1335 1336 static int ksz_max_mtu(struct dsa_switch *ds, int port) 1337 { 1338 struct ksz_device *dev = ds->priv; 1339 1340 if (!dev->dev_ops->max_mtu) 1341 return -EOPNOTSUPP; 1342 1343 return dev->dev_ops->max_mtu(dev, port); 1344 } 1345 1346 static void ksz_phylink_mac_config(struct dsa_switch *ds, int port, 1347 unsigned int mode, 1348 const struct phylink_link_state *state) 1349 { 1350 struct ksz_device *dev = ds->priv; 1351 1352 if (dev->dev_ops->phylink_mac_config) 1353 dev->dev_ops->phylink_mac_config(dev, port, mode, state); 1354 } 1355 1356 static void ksz_phylink_mac_link_up(struct dsa_switch *ds, int port, 1357 unsigned int mode, 1358 phy_interface_t interface, 1359 struct phy_device *phydev, int speed, 1360 int duplex, bool tx_pause, bool rx_pause) 1361 { 1362 struct ksz_device *dev = ds->priv; 1363 1364 if (dev->dev_ops->phylink_mac_link_up) 1365 dev->dev_ops->phylink_mac_link_up(dev, port, mode, interface, 1366 phydev, speed, duplex, 1367 tx_pause, rx_pause); 1368 } 1369 1370 static int ksz_switch_detect(struct ksz_device *dev) 1371 { 1372 u8 id1, id2; 1373 u16 id16; 1374 u32 id32; 1375 int ret; 1376 1377 /* read chip id */ 1378 ret = ksz_read16(dev, REG_CHIP_ID0, &id16); 1379 if (ret) 1380 return ret; 1381 1382 id1 = FIELD_GET(SW_FAMILY_ID_M, id16); 1383 id2 = FIELD_GET(SW_CHIP_ID_M, id16); 1384 1385 switch (id1) { 1386 case KSZ87_FAMILY_ID: 1387 if (id2 == KSZ87_CHIP_ID_95) { 1388 u8 val; 1389 1390 dev->chip_id = KSZ8795_CHIP_ID; 1391 1392 ksz_read8(dev, KSZ8_PORT_STATUS_0, &val); 1393 if (val & KSZ8_PORT_FIBER_MODE) 1394 dev->chip_id = KSZ8765_CHIP_ID; 1395 } else if (id2 == KSZ87_CHIP_ID_94) { 1396 dev->chip_id = KSZ8794_CHIP_ID; 1397 } else { 1398 return -ENODEV; 1399 } 1400 break; 1401 case KSZ88_FAMILY_ID: 1402 if (id2 == KSZ88_CHIP_ID_63) 1403 dev->chip_id = KSZ8830_CHIP_ID; 1404 else 1405 return -ENODEV; 1406 break; 1407 default: 1408 ret = ksz_read32(dev, REG_CHIP_ID0, &id32); 1409 if (ret) 1410 return ret; 1411 1412 dev->chip_rev = FIELD_GET(SW_REV_ID_M, id32); 1413 id32 &= ~0xFF; 1414 1415 switch (id32) { 1416 case KSZ9477_CHIP_ID: 1417 case KSZ9897_CHIP_ID: 1418 case KSZ9893_CHIP_ID: 1419 case KSZ9567_CHIP_ID: 1420 case LAN9370_CHIP_ID: 1421 case LAN9371_CHIP_ID: 1422 case LAN9372_CHIP_ID: 1423 case LAN9373_CHIP_ID: 1424 case LAN9374_CHIP_ID: 1425 dev->chip_id = id32; 1426 break; 1427 default: 1428 dev_err(dev->dev, 1429 "unsupported switch detected %x)\n", id32); 1430 return -ENODEV; 1431 } 1432 } 1433 return 0; 1434 } 1435 1436 static const struct dsa_switch_ops ksz_switch_ops = { 1437 .get_tag_protocol = ksz_get_tag_protocol, 1438 .get_phy_flags = ksz_get_phy_flags, 1439 .setup = ksz_setup, 1440 .phy_read = ksz_phy_read16, 1441 .phy_write = ksz_phy_write16, 1442 .phylink_get_caps = ksz_phylink_get_caps, 1443 .phylink_mac_config = ksz_phylink_mac_config, 1444 .phylink_mac_link_up = ksz_phylink_mac_link_up, 1445 .phylink_mac_link_down = ksz_mac_link_down, 1446 .port_enable = ksz_enable_port, 1447 .get_strings = ksz_get_strings, 1448 .get_ethtool_stats = ksz_get_ethtool_stats, 1449 .get_sset_count = ksz_sset_count, 1450 .port_bridge_join = ksz_port_bridge_join, 1451 .port_bridge_leave = ksz_port_bridge_leave, 1452 .port_stp_state_set = ksz_port_stp_state_set, 1453 .port_fast_age = ksz_port_fast_age, 1454 .port_vlan_filtering = ksz_port_vlan_filtering, 1455 .port_vlan_add = ksz_port_vlan_add, 1456 .port_vlan_del = ksz_port_vlan_del, 1457 .port_fdb_dump = ksz_port_fdb_dump, 1458 .port_fdb_add = ksz_port_fdb_add, 1459 .port_fdb_del = ksz_port_fdb_del, 1460 .port_mdb_add = ksz_port_mdb_add, 1461 .port_mdb_del = ksz_port_mdb_del, 1462 .port_mirror_add = ksz_port_mirror_add, 1463 .port_mirror_del = ksz_port_mirror_del, 1464 .get_stats64 = ksz_get_stats64, 1465 .get_pause_stats = ksz_get_pause_stats, 1466 .port_change_mtu = ksz_change_mtu, 1467 .port_max_mtu = ksz_max_mtu, 1468 }; 1469 1470 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv) 1471 { 1472 struct dsa_switch *ds; 1473 struct ksz_device *swdev; 1474 1475 ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL); 1476 if (!ds) 1477 return NULL; 1478 1479 ds->dev = base; 1480 ds->num_ports = DSA_MAX_PORTS; 1481 ds->ops = &ksz_switch_ops; 1482 1483 swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL); 1484 if (!swdev) 1485 return NULL; 1486 1487 ds->priv = swdev; 1488 swdev->dev = base; 1489 1490 swdev->ds = ds; 1491 swdev->priv = priv; 1492 1493 return swdev; 1494 } 1495 EXPORT_SYMBOL(ksz_switch_alloc); 1496 1497 int ksz_switch_register(struct ksz_device *dev) 1498 { 1499 const struct ksz_chip_data *info; 1500 struct device_node *port, *ports; 1501 phy_interface_t interface; 1502 unsigned int port_num; 1503 int ret; 1504 int i; 1505 1506 if (dev->pdata) 1507 dev->chip_id = dev->pdata->chip_id; 1508 1509 dev->reset_gpio = devm_gpiod_get_optional(dev->dev, "reset", 1510 GPIOD_OUT_LOW); 1511 if (IS_ERR(dev->reset_gpio)) 1512 return PTR_ERR(dev->reset_gpio); 1513 1514 if (dev->reset_gpio) { 1515 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1516 usleep_range(10000, 12000); 1517 gpiod_set_value_cansleep(dev->reset_gpio, 0); 1518 msleep(100); 1519 } 1520 1521 mutex_init(&dev->dev_mutex); 1522 mutex_init(&dev->regmap_mutex); 1523 mutex_init(&dev->alu_mutex); 1524 mutex_init(&dev->vlan_mutex); 1525 1526 ret = ksz_switch_detect(dev); 1527 if (ret) 1528 return ret; 1529 1530 info = ksz_lookup_info(dev->chip_id); 1531 if (!info) 1532 return -ENODEV; 1533 1534 /* Update the compatible info with the probed one */ 1535 dev->info = info; 1536 1537 dev_info(dev->dev, "found switch: %s, rev %i\n", 1538 dev->info->dev_name, dev->chip_rev); 1539 1540 ret = ksz_check_device_id(dev); 1541 if (ret) 1542 return ret; 1543 1544 dev->dev_ops = dev->info->ops; 1545 1546 ret = dev->dev_ops->init(dev); 1547 if (ret) 1548 return ret; 1549 1550 dev->ports = devm_kzalloc(dev->dev, 1551 dev->info->port_cnt * sizeof(struct ksz_port), 1552 GFP_KERNEL); 1553 if (!dev->ports) 1554 return -ENOMEM; 1555 1556 for (i = 0; i < dev->info->port_cnt; i++) { 1557 spin_lock_init(&dev->ports[i].mib.stats64_lock); 1558 mutex_init(&dev->ports[i].mib.cnt_mutex); 1559 dev->ports[i].mib.counters = 1560 devm_kzalloc(dev->dev, 1561 sizeof(u64) * (dev->info->mib_cnt + 1), 1562 GFP_KERNEL); 1563 if (!dev->ports[i].mib.counters) 1564 return -ENOMEM; 1565 } 1566 1567 /* set the real number of ports */ 1568 dev->ds->num_ports = dev->info->port_cnt; 1569 1570 /* Host port interface will be self detected, or specifically set in 1571 * device tree. 1572 */ 1573 for (port_num = 0; port_num < dev->info->port_cnt; ++port_num) 1574 dev->ports[port_num].interface = PHY_INTERFACE_MODE_NA; 1575 if (dev->dev->of_node) { 1576 ret = of_get_phy_mode(dev->dev->of_node, &interface); 1577 if (ret == 0) 1578 dev->compat_interface = interface; 1579 ports = of_get_child_by_name(dev->dev->of_node, "ethernet-ports"); 1580 if (!ports) 1581 ports = of_get_child_by_name(dev->dev->of_node, "ports"); 1582 if (ports) 1583 for_each_available_child_of_node(ports, port) { 1584 if (of_property_read_u32(port, "reg", 1585 &port_num)) 1586 continue; 1587 if (!(dev->port_mask & BIT(port_num))) { 1588 of_node_put(port); 1589 return -EINVAL; 1590 } 1591 of_get_phy_mode(port, 1592 &dev->ports[port_num].interface); 1593 } 1594 dev->synclko_125 = of_property_read_bool(dev->dev->of_node, 1595 "microchip,synclko-125"); 1596 dev->synclko_disable = of_property_read_bool(dev->dev->of_node, 1597 "microchip,synclko-disable"); 1598 if (dev->synclko_125 && dev->synclko_disable) { 1599 dev_err(dev->dev, "inconsistent synclko settings\n"); 1600 return -EINVAL; 1601 } 1602 } 1603 1604 ret = dsa_register_switch(dev->ds); 1605 if (ret) { 1606 dev->dev_ops->exit(dev); 1607 return ret; 1608 } 1609 1610 /* Read MIB counters every 30 seconds to avoid overflow. */ 1611 dev->mib_read_interval = msecs_to_jiffies(5000); 1612 1613 /* Start the MIB timer. */ 1614 schedule_delayed_work(&dev->mib_read, 0); 1615 1616 return ret; 1617 } 1618 EXPORT_SYMBOL(ksz_switch_register); 1619 1620 void ksz_switch_remove(struct ksz_device *dev) 1621 { 1622 /* timer started */ 1623 if (dev->mib_read_interval) { 1624 dev->mib_read_interval = 0; 1625 cancel_delayed_work_sync(&dev->mib_read); 1626 } 1627 1628 dev->dev_ops->exit(dev); 1629 dsa_unregister_switch(dev->ds); 1630 1631 if (dev->reset_gpio) 1632 gpiod_set_value_cansleep(dev->reset_gpio, 1); 1633 1634 } 1635 EXPORT_SYMBOL(ksz_switch_remove); 1636 1637 MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>"); 1638 MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver"); 1639 MODULE_LICENSE("GPL"); 1640