1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Microchip KSZ8795 switch driver 4 * 5 * Copyright (C) 2017 Microchip Technology Inc. 6 * Tristram Ha <Tristram.Ha@microchip.com> 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/delay.h> 11 #include <linux/export.h> 12 #include <linux/gpio.h> 13 #include <linux/if_vlan.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/platform_data/microchip-ksz.h> 17 #include <linux/phy.h> 18 #include <linux/etherdevice.h> 19 #include <linux/if_bridge.h> 20 #include <linux/micrel_phy.h> 21 #include <net/dsa.h> 22 #include <net/switchdev.h> 23 #include <linux/phylink.h> 24 25 #include "ksz_common.h" 26 #include "ksz8795_reg.h" 27 #include "ksz8.h" 28 29 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) 30 { 31 regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); 32 } 33 34 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits, 35 bool set) 36 { 37 regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), 38 bits, set ? bits : 0); 39 } 40 41 static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data) 42 { 43 const u16 *regs; 44 u16 ctrl_addr; 45 int ret = 0; 46 47 regs = dev->info->regs; 48 49 mutex_lock(&dev->alu_mutex); 50 51 ctrl_addr = IND_ACC_TABLE(table) | addr; 52 ret = ksz_write8(dev, regs[REG_IND_BYTE], data); 53 if (!ret) 54 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 55 56 mutex_unlock(&dev->alu_mutex); 57 58 return ret; 59 } 60 61 int ksz8_reset_switch(struct ksz_device *dev) 62 { 63 if (ksz_is_ksz88x3(dev)) { 64 /* reset switch */ 65 ksz_cfg(dev, KSZ8863_REG_SW_RESET, 66 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true); 67 ksz_cfg(dev, KSZ8863_REG_SW_RESET, 68 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false); 69 } else { 70 /* reset switch */ 71 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 72 SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S); 73 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0); 74 } 75 76 return 0; 77 } 78 79 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue) 80 { 81 u8 hi, lo; 82 83 /* Number of queues can only be 1, 2, or 4. */ 84 switch (queue) { 85 case 4: 86 case 3: 87 queue = PORT_QUEUE_SPLIT_4; 88 break; 89 case 2: 90 queue = PORT_QUEUE_SPLIT_2; 91 break; 92 default: 93 queue = PORT_QUEUE_SPLIT_1; 94 } 95 ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo); 96 ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi); 97 lo &= ~PORT_QUEUE_SPLIT_L; 98 if (queue & PORT_QUEUE_SPLIT_2) 99 lo |= PORT_QUEUE_SPLIT_L; 100 hi &= ~PORT_QUEUE_SPLIT_H; 101 if (queue & PORT_QUEUE_SPLIT_4) 102 hi |= PORT_QUEUE_SPLIT_H; 103 ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo); 104 ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi); 105 106 /* Default is port based for egress rate limit. */ 107 if (queue != PORT_QUEUE_SPLIT_1) 108 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED, 109 true); 110 } 111 112 void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt) 113 { 114 const u32 *masks; 115 const u16 *regs; 116 u16 ctrl_addr; 117 u32 data; 118 u8 check; 119 int loop; 120 121 masks = dev->info->masks; 122 regs = dev->info->regs; 123 124 ctrl_addr = addr + dev->info->reg_mib_cnt * port; 125 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ); 126 127 mutex_lock(&dev->alu_mutex); 128 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 129 130 /* It is almost guaranteed to always read the valid bit because of 131 * slow SPI speed. 132 */ 133 for (loop = 2; loop > 0; loop--) { 134 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check); 135 136 if (check & masks[MIB_COUNTER_VALID]) { 137 ksz_read32(dev, regs[REG_IND_DATA_LO], &data); 138 if (check & masks[MIB_COUNTER_OVERFLOW]) 139 *cnt += MIB_COUNTER_VALUE + 1; 140 *cnt += data & MIB_COUNTER_VALUE; 141 break; 142 } 143 } 144 mutex_unlock(&dev->alu_mutex); 145 } 146 147 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr, 148 u64 *dropped, u64 *cnt) 149 { 150 const u32 *masks; 151 const u16 *regs; 152 u16 ctrl_addr; 153 u32 data; 154 u8 check; 155 int loop; 156 157 masks = dev->info->masks; 158 regs = dev->info->regs; 159 160 addr -= dev->info->reg_mib_cnt; 161 ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port; 162 ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0; 163 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ); 164 165 mutex_lock(&dev->alu_mutex); 166 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 167 168 /* It is almost guaranteed to always read the valid bit because of 169 * slow SPI speed. 170 */ 171 for (loop = 2; loop > 0; loop--) { 172 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check); 173 174 if (check & masks[MIB_COUNTER_VALID]) { 175 ksz_read32(dev, regs[REG_IND_DATA_LO], &data); 176 if (addr < 2) { 177 u64 total; 178 179 total = check & MIB_TOTAL_BYTES_H; 180 total <<= 32; 181 *cnt += total; 182 *cnt += data; 183 if (check & masks[MIB_COUNTER_OVERFLOW]) { 184 total = MIB_TOTAL_BYTES_H + 1; 185 total <<= 32; 186 *cnt += total; 187 } 188 } else { 189 if (check & masks[MIB_COUNTER_OVERFLOW]) 190 *cnt += MIB_PACKET_DROPPED + 1; 191 *cnt += data & MIB_PACKET_DROPPED; 192 } 193 break; 194 } 195 } 196 mutex_unlock(&dev->alu_mutex); 197 } 198 199 static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr, 200 u64 *dropped, u64 *cnt) 201 { 202 u32 *last = (u32 *)dropped; 203 const u16 *regs; 204 u16 ctrl_addr; 205 u32 data; 206 u32 cur; 207 208 regs = dev->info->regs; 209 210 addr -= dev->info->reg_mib_cnt; 211 ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 : 212 KSZ8863_MIB_PACKET_DROPPED_RX_0; 213 ctrl_addr += port; 214 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ); 215 216 mutex_lock(&dev->alu_mutex); 217 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 218 ksz_read32(dev, regs[REG_IND_DATA_LO], &data); 219 mutex_unlock(&dev->alu_mutex); 220 221 data &= MIB_PACKET_DROPPED; 222 cur = last[addr]; 223 if (data != cur) { 224 last[addr] = data; 225 if (data < cur) 226 data += MIB_PACKET_DROPPED + 1; 227 data -= cur; 228 *cnt += data; 229 } 230 } 231 232 void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr, 233 u64 *dropped, u64 *cnt) 234 { 235 if (ksz_is_ksz88x3(dev)) 236 ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt); 237 else 238 ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt); 239 } 240 241 void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze) 242 { 243 if (ksz_is_ksz88x3(dev)) 244 return; 245 246 /* enable the port for flush/freeze function */ 247 if (freeze) 248 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true); 249 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze); 250 251 /* disable the port after freeze is done */ 252 if (!freeze) 253 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false); 254 } 255 256 void ksz8_port_init_cnt(struct ksz_device *dev, int port) 257 { 258 struct ksz_port_mib *mib = &dev->ports[port].mib; 259 u64 *dropped; 260 261 if (!ksz_is_ksz88x3(dev)) { 262 /* flush all enabled port MIB counters */ 263 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true); 264 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true); 265 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false); 266 } 267 268 mib->cnt_ptr = 0; 269 270 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */ 271 while (mib->cnt_ptr < dev->info->reg_mib_cnt) { 272 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr, 273 &mib->counters[mib->cnt_ptr]); 274 ++mib->cnt_ptr; 275 } 276 277 /* last one in storage */ 278 dropped = &mib->counters[dev->info->mib_cnt]; 279 280 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */ 281 while (mib->cnt_ptr < dev->info->mib_cnt) { 282 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr, 283 dropped, &mib->counters[mib->cnt_ptr]); 284 ++mib->cnt_ptr; 285 } 286 } 287 288 static void ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data) 289 { 290 const u16 *regs; 291 u16 ctrl_addr; 292 293 regs = dev->info->regs; 294 295 ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr; 296 297 mutex_lock(&dev->alu_mutex); 298 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 299 ksz_read64(dev, regs[REG_IND_DATA_HI], data); 300 mutex_unlock(&dev->alu_mutex); 301 } 302 303 static void ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data) 304 { 305 const u16 *regs; 306 u16 ctrl_addr; 307 308 regs = dev->info->regs; 309 310 ctrl_addr = IND_ACC_TABLE(table) | addr; 311 312 mutex_lock(&dev->alu_mutex); 313 ksz_write64(dev, regs[REG_IND_DATA_HI], data); 314 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 315 mutex_unlock(&dev->alu_mutex); 316 } 317 318 static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data) 319 { 320 int timeout = 100; 321 const u32 *masks; 322 const u16 *regs; 323 324 masks = dev->info->masks; 325 regs = dev->info->regs; 326 327 do { 328 ksz_read8(dev, regs[REG_IND_DATA_CHECK], data); 329 timeout--; 330 } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout); 331 332 /* Entry is not ready for accessing. */ 333 if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) { 334 return -EAGAIN; 335 /* Entry is ready for accessing. */ 336 } else { 337 ksz_read8(dev, regs[REG_IND_DATA_8], data); 338 339 /* There is no valid entry in the table. */ 340 if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY]) 341 return -ENXIO; 342 } 343 return 0; 344 } 345 346 int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr, u8 *mac_addr, 347 u8 *fid, u8 *src_port, u8 *timestamp, u16 *entries) 348 { 349 u32 data_hi, data_lo; 350 const u8 *shifts; 351 const u32 *masks; 352 const u16 *regs; 353 u16 ctrl_addr; 354 u8 data; 355 int rc; 356 357 shifts = dev->info->shifts; 358 masks = dev->info->masks; 359 regs = dev->info->regs; 360 361 ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr; 362 363 mutex_lock(&dev->alu_mutex); 364 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr); 365 366 rc = ksz8_valid_dyn_entry(dev, &data); 367 if (rc == -EAGAIN) { 368 if (addr == 0) 369 *entries = 0; 370 } else if (rc == -ENXIO) { 371 *entries = 0; 372 /* At least one valid entry in the table. */ 373 } else { 374 u64 buf = 0; 375 int cnt; 376 377 ksz_read64(dev, regs[REG_IND_DATA_HI], &buf); 378 data_hi = (u32)(buf >> 32); 379 data_lo = (u32)buf; 380 381 /* Check out how many valid entry in the table. */ 382 cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H]; 383 cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H]; 384 cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >> 385 shifts[DYNAMIC_MAC_ENTRIES]; 386 *entries = cnt + 1; 387 388 *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >> 389 shifts[DYNAMIC_MAC_FID]; 390 *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >> 391 shifts[DYNAMIC_MAC_SRC_PORT]; 392 *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >> 393 shifts[DYNAMIC_MAC_TIMESTAMP]; 394 395 mac_addr[5] = (u8)data_lo; 396 mac_addr[4] = (u8)(data_lo >> 8); 397 mac_addr[3] = (u8)(data_lo >> 16); 398 mac_addr[2] = (u8)(data_lo >> 24); 399 400 mac_addr[1] = (u8)data_hi; 401 mac_addr[0] = (u8)(data_hi >> 8); 402 rc = 0; 403 } 404 mutex_unlock(&dev->alu_mutex); 405 406 return rc; 407 } 408 409 int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr, 410 struct alu_struct *alu) 411 { 412 u32 data_hi, data_lo; 413 const u8 *shifts; 414 const u32 *masks; 415 u64 data; 416 417 shifts = dev->info->shifts; 418 masks = dev->info->masks; 419 420 ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data); 421 data_hi = data >> 32; 422 data_lo = (u32)data; 423 if (data_hi & (masks[STATIC_MAC_TABLE_VALID] | 424 masks[STATIC_MAC_TABLE_OVERRIDE])) { 425 alu->mac[5] = (u8)data_lo; 426 alu->mac[4] = (u8)(data_lo >> 8); 427 alu->mac[3] = (u8)(data_lo >> 16); 428 alu->mac[2] = (u8)(data_lo >> 24); 429 alu->mac[1] = (u8)data_hi; 430 alu->mac[0] = (u8)(data_hi >> 8); 431 alu->port_forward = 432 (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >> 433 shifts[STATIC_MAC_FWD_PORTS]; 434 alu->is_override = 435 (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0; 436 data_hi >>= 1; 437 alu->is_static = true; 438 alu->is_use_fid = 439 (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0; 440 alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >> 441 shifts[STATIC_MAC_FID]; 442 return 0; 443 } 444 return -ENXIO; 445 } 446 447 void ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr, 448 struct alu_struct *alu) 449 { 450 u32 data_hi, data_lo; 451 const u8 *shifts; 452 const u32 *masks; 453 u64 data; 454 455 shifts = dev->info->shifts; 456 masks = dev->info->masks; 457 458 data_lo = ((u32)alu->mac[2] << 24) | 459 ((u32)alu->mac[3] << 16) | 460 ((u32)alu->mac[4] << 8) | alu->mac[5]; 461 data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1]; 462 data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS]; 463 464 if (alu->is_override) 465 data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE]; 466 if (alu->is_use_fid) { 467 data_hi |= masks[STATIC_MAC_TABLE_USE_FID]; 468 data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID]; 469 } 470 if (alu->is_static) 471 data_hi |= masks[STATIC_MAC_TABLE_VALID]; 472 else 473 data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE]; 474 475 data = (u64)data_hi << 32 | data_lo; 476 ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data); 477 } 478 479 static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid, 480 u8 *member, u8 *valid) 481 { 482 const u8 *shifts; 483 const u32 *masks; 484 485 shifts = dev->info->shifts; 486 masks = dev->info->masks; 487 488 *fid = vlan & masks[VLAN_TABLE_FID]; 489 *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >> 490 shifts[VLAN_TABLE_MEMBERSHIP_S]; 491 *valid = !!(vlan & masks[VLAN_TABLE_VALID]); 492 } 493 494 static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid, 495 u16 *vlan) 496 { 497 const u8 *shifts; 498 const u32 *masks; 499 500 shifts = dev->info->shifts; 501 masks = dev->info->masks; 502 503 *vlan = fid; 504 *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S]; 505 if (valid) 506 *vlan |= masks[VLAN_TABLE_VALID]; 507 } 508 509 static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr) 510 { 511 const u8 *shifts; 512 u64 data; 513 int i; 514 515 shifts = dev->info->shifts; 516 517 ksz8_r_table(dev, TABLE_VLAN, addr, &data); 518 addr *= 4; 519 for (i = 0; i < 4; i++) { 520 dev->vlan_cache[addr + i].table[0] = (u16)data; 521 data >>= shifts[VLAN_TABLE]; 522 } 523 } 524 525 static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan) 526 { 527 int index; 528 u16 *data; 529 u16 addr; 530 u64 buf; 531 532 data = (u16 *)&buf; 533 addr = vid / 4; 534 index = vid & 3; 535 ksz8_r_table(dev, TABLE_VLAN, addr, &buf); 536 *vlan = data[index]; 537 } 538 539 static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan) 540 { 541 int index; 542 u16 *data; 543 u16 addr; 544 u64 buf; 545 546 data = (u16 *)&buf; 547 addr = vid / 4; 548 index = vid & 3; 549 ksz8_r_table(dev, TABLE_VLAN, addr, &buf); 550 data[index] = vlan; 551 dev->vlan_cache[vid].table[0] = vlan; 552 ksz8_w_table(dev, TABLE_VLAN, addr, buf); 553 } 554 555 void ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val) 556 { 557 u8 restart, speed, ctrl, link; 558 int processed = true; 559 const u16 *regs; 560 u8 val1, val2; 561 u16 data = 0; 562 u8 p = phy; 563 564 regs = dev->info->regs; 565 566 switch (reg) { 567 case MII_BMCR: 568 ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart); 569 ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed); 570 ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl); 571 if (restart & PORT_PHY_LOOPBACK) 572 data |= BMCR_LOOPBACK; 573 if (ctrl & PORT_FORCE_100_MBIT) 574 data |= BMCR_SPEED100; 575 if (ksz_is_ksz88x3(dev)) { 576 if ((ctrl & PORT_AUTO_NEG_ENABLE)) 577 data |= BMCR_ANENABLE; 578 } else { 579 if (!(ctrl & PORT_AUTO_NEG_DISABLE)) 580 data |= BMCR_ANENABLE; 581 } 582 if (restart & PORT_POWER_DOWN) 583 data |= BMCR_PDOWN; 584 if (restart & PORT_AUTO_NEG_RESTART) 585 data |= BMCR_ANRESTART; 586 if (ctrl & PORT_FORCE_FULL_DUPLEX) 587 data |= BMCR_FULLDPLX; 588 if (speed & PORT_HP_MDIX) 589 data |= KSZ886X_BMCR_HP_MDIX; 590 if (restart & PORT_FORCE_MDIX) 591 data |= KSZ886X_BMCR_FORCE_MDI; 592 if (restart & PORT_AUTO_MDIX_DISABLE) 593 data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX; 594 if (restart & PORT_TX_DISABLE) 595 data |= KSZ886X_BMCR_DISABLE_TRANSMIT; 596 if (restart & PORT_LED_OFF) 597 data |= KSZ886X_BMCR_DISABLE_LED; 598 break; 599 case MII_BMSR: 600 ksz_pread8(dev, p, regs[P_LINK_STATUS], &link); 601 data = BMSR_100FULL | 602 BMSR_100HALF | 603 BMSR_10FULL | 604 BMSR_10HALF | 605 BMSR_ANEGCAPABLE; 606 if (link & PORT_AUTO_NEG_COMPLETE) 607 data |= BMSR_ANEGCOMPLETE; 608 if (link & PORT_STAT_LINK_GOOD) 609 data |= BMSR_LSTATUS; 610 break; 611 case MII_PHYSID1: 612 data = KSZ8795_ID_HI; 613 break; 614 case MII_PHYSID2: 615 if (ksz_is_ksz88x3(dev)) 616 data = KSZ8863_ID_LO; 617 else 618 data = KSZ8795_ID_LO; 619 break; 620 case MII_ADVERTISE: 621 ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl); 622 data = ADVERTISE_CSMA; 623 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE) 624 data |= ADVERTISE_PAUSE_CAP; 625 if (ctrl & PORT_AUTO_NEG_100BTX_FD) 626 data |= ADVERTISE_100FULL; 627 if (ctrl & PORT_AUTO_NEG_100BTX) 628 data |= ADVERTISE_100HALF; 629 if (ctrl & PORT_AUTO_NEG_10BT_FD) 630 data |= ADVERTISE_10FULL; 631 if (ctrl & PORT_AUTO_NEG_10BT) 632 data |= ADVERTISE_10HALF; 633 break; 634 case MII_LPA: 635 ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link); 636 data = LPA_SLCT; 637 if (link & PORT_REMOTE_SYM_PAUSE) 638 data |= LPA_PAUSE_CAP; 639 if (link & PORT_REMOTE_100BTX_FD) 640 data |= LPA_100FULL; 641 if (link & PORT_REMOTE_100BTX) 642 data |= LPA_100HALF; 643 if (link & PORT_REMOTE_10BT_FD) 644 data |= LPA_10FULL; 645 if (link & PORT_REMOTE_10BT) 646 data |= LPA_10HALF; 647 if (data & ~LPA_SLCT) 648 data |= LPA_LPACK; 649 break; 650 case PHY_REG_LINK_MD: 651 ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1); 652 ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2); 653 if (val1 & PORT_START_CABLE_DIAG) 654 data |= PHY_START_CABLE_DIAG; 655 656 if (val1 & PORT_CABLE_10M_SHORT) 657 data |= PHY_CABLE_10M_SHORT; 658 659 data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M, 660 FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1)); 661 662 data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M, 663 (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) | 664 FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2)); 665 break; 666 case PHY_REG_PHY_CTRL: 667 ksz_pread8(dev, p, regs[P_LINK_STATUS], &link); 668 if (link & PORT_MDIX_STATUS) 669 data |= KSZ886X_CTRL_MDIX_STAT; 670 break; 671 default: 672 processed = false; 673 break; 674 } 675 if (processed) 676 *val = data; 677 } 678 679 void ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val) 680 { 681 u8 restart, speed, ctrl, data; 682 const u16 *regs; 683 u8 p = phy; 684 685 regs = dev->info->regs; 686 687 switch (reg) { 688 case MII_BMCR: 689 690 /* Do not support PHY reset function. */ 691 if (val & BMCR_RESET) 692 break; 693 ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed); 694 data = speed; 695 if (val & KSZ886X_BMCR_HP_MDIX) 696 data |= PORT_HP_MDIX; 697 else 698 data &= ~PORT_HP_MDIX; 699 if (data != speed) 700 ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data); 701 ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl); 702 data = ctrl; 703 if (ksz_is_ksz88x3(dev)) { 704 if ((val & BMCR_ANENABLE)) 705 data |= PORT_AUTO_NEG_ENABLE; 706 else 707 data &= ~PORT_AUTO_NEG_ENABLE; 708 } else { 709 if (!(val & BMCR_ANENABLE)) 710 data |= PORT_AUTO_NEG_DISABLE; 711 else 712 data &= ~PORT_AUTO_NEG_DISABLE; 713 714 /* Fiber port does not support auto-negotiation. */ 715 if (dev->ports[p].fiber) 716 data |= PORT_AUTO_NEG_DISABLE; 717 } 718 719 if (val & BMCR_SPEED100) 720 data |= PORT_FORCE_100_MBIT; 721 else 722 data &= ~PORT_FORCE_100_MBIT; 723 if (val & BMCR_FULLDPLX) 724 data |= PORT_FORCE_FULL_DUPLEX; 725 else 726 data &= ~PORT_FORCE_FULL_DUPLEX; 727 if (data != ctrl) 728 ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data); 729 ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart); 730 data = restart; 731 if (val & KSZ886X_BMCR_DISABLE_LED) 732 data |= PORT_LED_OFF; 733 else 734 data &= ~PORT_LED_OFF; 735 if (val & KSZ886X_BMCR_DISABLE_TRANSMIT) 736 data |= PORT_TX_DISABLE; 737 else 738 data &= ~PORT_TX_DISABLE; 739 if (val & BMCR_ANRESTART) 740 data |= PORT_AUTO_NEG_RESTART; 741 else 742 data &= ~(PORT_AUTO_NEG_RESTART); 743 if (val & BMCR_PDOWN) 744 data |= PORT_POWER_DOWN; 745 else 746 data &= ~PORT_POWER_DOWN; 747 if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX) 748 data |= PORT_AUTO_MDIX_DISABLE; 749 else 750 data &= ~PORT_AUTO_MDIX_DISABLE; 751 if (val & KSZ886X_BMCR_FORCE_MDI) 752 data |= PORT_FORCE_MDIX; 753 else 754 data &= ~PORT_FORCE_MDIX; 755 if (val & BMCR_LOOPBACK) 756 data |= PORT_PHY_LOOPBACK; 757 else 758 data &= ~PORT_PHY_LOOPBACK; 759 if (data != restart) 760 ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL], data); 761 break; 762 case MII_ADVERTISE: 763 ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl); 764 data = ctrl; 765 data &= ~(PORT_AUTO_NEG_SYM_PAUSE | 766 PORT_AUTO_NEG_100BTX_FD | 767 PORT_AUTO_NEG_100BTX | 768 PORT_AUTO_NEG_10BT_FD | 769 PORT_AUTO_NEG_10BT); 770 if (val & ADVERTISE_PAUSE_CAP) 771 data |= PORT_AUTO_NEG_SYM_PAUSE; 772 if (val & ADVERTISE_100FULL) 773 data |= PORT_AUTO_NEG_100BTX_FD; 774 if (val & ADVERTISE_100HALF) 775 data |= PORT_AUTO_NEG_100BTX; 776 if (val & ADVERTISE_10FULL) 777 data |= PORT_AUTO_NEG_10BT_FD; 778 if (val & ADVERTISE_10HALF) 779 data |= PORT_AUTO_NEG_10BT; 780 if (data != ctrl) 781 ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data); 782 break; 783 case PHY_REG_LINK_MD: 784 if (val & PHY_START_CABLE_DIAG) 785 ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true); 786 break; 787 default: 788 break; 789 } 790 } 791 792 void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member) 793 { 794 u8 data; 795 796 ksz_pread8(dev, port, P_MIRROR_CTRL, &data); 797 data &= ~PORT_VLAN_MEMBERSHIP; 798 data |= (member & dev->port_mask); 799 ksz_pwrite8(dev, port, P_MIRROR_CTRL, data); 800 } 801 802 void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port) 803 { 804 u8 learn[DSA_MAX_PORTS]; 805 int first, index, cnt; 806 struct ksz_port *p; 807 const u16 *regs; 808 809 regs = dev->info->regs; 810 811 if ((uint)port < dev->info->port_cnt) { 812 first = port; 813 cnt = port + 1; 814 } else { 815 /* Flush all ports. */ 816 first = 0; 817 cnt = dev->info->port_cnt; 818 } 819 for (index = first; index < cnt; index++) { 820 p = &dev->ports[index]; 821 if (!p->on) 822 continue; 823 ksz_pread8(dev, index, regs[P_STP_CTRL], &learn[index]); 824 if (!(learn[index] & PORT_LEARN_DISABLE)) 825 ksz_pwrite8(dev, index, regs[P_STP_CTRL], 826 learn[index] | PORT_LEARN_DISABLE); 827 } 828 ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true); 829 for (index = first; index < cnt; index++) { 830 p = &dev->ports[index]; 831 if (!p->on) 832 continue; 833 if (!(learn[index] & PORT_LEARN_DISABLE)) 834 ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]); 835 } 836 } 837 838 int ksz8_fdb_dump(struct ksz_device *dev, int port, 839 dsa_fdb_dump_cb_t *cb, void *data) 840 { 841 int ret = 0; 842 u16 i = 0; 843 u16 entries = 0; 844 u8 timestamp = 0; 845 u8 fid; 846 u8 member; 847 struct alu_struct alu; 848 849 do { 850 alu.is_static = false; 851 ret = ksz8_r_dyn_mac_table(dev, i, alu.mac, &fid, &member, 852 ×tamp, &entries); 853 if (!ret && (member & BIT(port))) { 854 ret = cb(alu.mac, alu.fid, alu.is_static, data); 855 if (ret) 856 break; 857 } 858 i++; 859 } while (i < entries); 860 if (i >= entries) 861 ret = 0; 862 863 return ret; 864 } 865 866 int ksz8_mdb_add(struct ksz_device *dev, int port, 867 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db) 868 { 869 struct alu_struct alu; 870 int index; 871 int empty = 0; 872 873 alu.port_forward = 0; 874 for (index = 0; index < dev->info->num_statics; index++) { 875 if (!ksz8_r_sta_mac_table(dev, index, &alu)) { 876 /* Found one already in static MAC table. */ 877 if (!memcmp(alu.mac, mdb->addr, ETH_ALEN) && 878 alu.fid == mdb->vid) 879 break; 880 /* Remember the first empty entry. */ 881 } else if (!empty) { 882 empty = index + 1; 883 } 884 } 885 886 /* no available entry */ 887 if (index == dev->info->num_statics && !empty) 888 return -ENOSPC; 889 890 /* add entry */ 891 if (index == dev->info->num_statics) { 892 index = empty - 1; 893 memset(&alu, 0, sizeof(alu)); 894 memcpy(alu.mac, mdb->addr, ETH_ALEN); 895 alu.is_static = true; 896 } 897 alu.port_forward |= BIT(port); 898 if (mdb->vid) { 899 alu.is_use_fid = true; 900 901 /* Need a way to map VID to FID. */ 902 alu.fid = mdb->vid; 903 } 904 ksz8_w_sta_mac_table(dev, index, &alu); 905 906 return 0; 907 } 908 909 int ksz8_mdb_del(struct ksz_device *dev, int port, 910 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db) 911 { 912 struct alu_struct alu; 913 int index; 914 915 for (index = 0; index < dev->info->num_statics; index++) { 916 if (!ksz8_r_sta_mac_table(dev, index, &alu)) { 917 /* Found one already in static MAC table. */ 918 if (!memcmp(alu.mac, mdb->addr, ETH_ALEN) && 919 alu.fid == mdb->vid) 920 break; 921 } 922 } 923 924 /* no available entry */ 925 if (index == dev->info->num_statics) 926 goto exit; 927 928 /* clear port */ 929 alu.port_forward &= ~BIT(port); 930 if (!alu.port_forward) 931 alu.is_static = false; 932 ksz8_w_sta_mac_table(dev, index, &alu); 933 934 exit: 935 return 0; 936 } 937 938 int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag, 939 struct netlink_ext_ack *extack) 940 { 941 if (ksz_is_ksz88x3(dev)) 942 return -ENOTSUPP; 943 944 /* Discard packets with VID not enabled on the switch */ 945 ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag); 946 947 /* Discard packets with VID not enabled on the ingress port */ 948 for (port = 0; port < dev->phy_port_cnt; ++port) 949 ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER, 950 flag); 951 952 return 0; 953 } 954 955 static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state) 956 { 957 if (ksz_is_ksz88x3(dev)) { 958 ksz_cfg(dev, REG_SW_INSERT_SRC_PVID, 959 0x03 << (4 - 2 * port), state); 960 } else { 961 ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00); 962 } 963 } 964 965 int ksz8_port_vlan_add(struct ksz_device *dev, int port, 966 const struct switchdev_obj_port_vlan *vlan, 967 struct netlink_ext_ack *extack) 968 { 969 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 970 struct ksz_port *p = &dev->ports[port]; 971 u16 data, new_pvid = 0; 972 u8 fid, member, valid; 973 974 if (ksz_is_ksz88x3(dev)) 975 return -ENOTSUPP; 976 977 /* If a VLAN is added with untagged flag different from the 978 * port's Remove Tag flag, we need to change the latter. 979 * Ignore VID 0, which is always untagged. 980 * Ignore CPU port, which will always be tagged. 981 */ 982 if (untagged != p->remove_tag && vlan->vid != 0 && 983 port != dev->cpu_port) { 984 unsigned int vid; 985 986 /* Reject attempts to add a VLAN that requires the 987 * Remove Tag flag to be changed, unless there are no 988 * other VLANs currently configured. 989 */ 990 for (vid = 1; vid < dev->info->num_vlans; ++vid) { 991 /* Skip the VID we are going to add or reconfigure */ 992 if (vid == vlan->vid) 993 continue; 994 995 ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0], 996 &fid, &member, &valid); 997 if (valid && (member & BIT(port))) 998 return -EINVAL; 999 } 1000 1001 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged); 1002 p->remove_tag = untagged; 1003 } 1004 1005 ksz8_r_vlan_table(dev, vlan->vid, &data); 1006 ksz8_from_vlan(dev, data, &fid, &member, &valid); 1007 1008 /* First time to setup the VLAN entry. */ 1009 if (!valid) { 1010 /* Need to find a way to map VID to FID. */ 1011 fid = 1; 1012 valid = 1; 1013 } 1014 member |= BIT(port); 1015 1016 ksz8_to_vlan(dev, fid, member, valid, &data); 1017 ksz8_w_vlan_table(dev, vlan->vid, data); 1018 1019 /* change PVID */ 1020 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) 1021 new_pvid = vlan->vid; 1022 1023 if (new_pvid) { 1024 u16 vid; 1025 1026 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid); 1027 vid &= ~VLAN_VID_MASK; 1028 vid |= new_pvid; 1029 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid); 1030 1031 ksz8_port_enable_pvid(dev, port, true); 1032 } 1033 1034 return 0; 1035 } 1036 1037 int ksz8_port_vlan_del(struct ksz_device *dev, int port, 1038 const struct switchdev_obj_port_vlan *vlan) 1039 { 1040 u16 data, pvid; 1041 u8 fid, member, valid; 1042 1043 if (ksz_is_ksz88x3(dev)) 1044 return -ENOTSUPP; 1045 1046 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid); 1047 pvid = pvid & 0xFFF; 1048 1049 ksz8_r_vlan_table(dev, vlan->vid, &data); 1050 ksz8_from_vlan(dev, data, &fid, &member, &valid); 1051 1052 member &= ~BIT(port); 1053 1054 /* Invalidate the entry if no more member. */ 1055 if (!member) { 1056 fid = 0; 1057 valid = 0; 1058 } 1059 1060 ksz8_to_vlan(dev, fid, member, valid, &data); 1061 ksz8_w_vlan_table(dev, vlan->vid, data); 1062 1063 if (pvid == vlan->vid) 1064 ksz8_port_enable_pvid(dev, port, false); 1065 1066 return 0; 1067 } 1068 1069 int ksz8_port_mirror_add(struct ksz_device *dev, int port, 1070 struct dsa_mall_mirror_tc_entry *mirror, 1071 bool ingress, struct netlink_ext_ack *extack) 1072 { 1073 if (ingress) { 1074 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true); 1075 dev->mirror_rx |= BIT(port); 1076 } else { 1077 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true); 1078 dev->mirror_tx |= BIT(port); 1079 } 1080 1081 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false); 1082 1083 /* configure mirror port */ 1084 if (dev->mirror_rx || dev->mirror_tx) 1085 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL, 1086 PORT_MIRROR_SNIFFER, true); 1087 1088 return 0; 1089 } 1090 1091 void ksz8_port_mirror_del(struct ksz_device *dev, int port, 1092 struct dsa_mall_mirror_tc_entry *mirror) 1093 { 1094 u8 data; 1095 1096 if (mirror->ingress) { 1097 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false); 1098 dev->mirror_rx &= ~BIT(port); 1099 } else { 1100 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false); 1101 dev->mirror_tx &= ~BIT(port); 1102 } 1103 1104 ksz_pread8(dev, port, P_MIRROR_CTRL, &data); 1105 1106 if (!dev->mirror_rx && !dev->mirror_tx) 1107 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL, 1108 PORT_MIRROR_SNIFFER, false); 1109 } 1110 1111 static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port) 1112 { 1113 struct ksz_port *p = &dev->ports[port]; 1114 1115 if (!p->interface && dev->compat_interface) { 1116 dev_warn(dev->dev, 1117 "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. " 1118 "Please update your device tree.\n", 1119 port); 1120 p->interface = dev->compat_interface; 1121 } 1122 } 1123 1124 void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port) 1125 { 1126 struct dsa_switch *ds = dev->ds; 1127 const u32 *masks; 1128 u8 member; 1129 1130 masks = dev->info->masks; 1131 1132 /* enable broadcast storm limit */ 1133 ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true); 1134 1135 if (!ksz_is_ksz88x3(dev)) 1136 ksz8795_set_prio_queue(dev, port, 4); 1137 1138 /* disable DiffServ priority */ 1139 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false); 1140 1141 /* replace priority */ 1142 ksz_port_cfg(dev, port, P_802_1P_CTRL, 1143 masks[PORT_802_1P_REMAPPING], false); 1144 1145 /* enable 802.1p priority */ 1146 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true); 1147 1148 if (cpu_port) { 1149 if (!ksz_is_ksz88x3(dev)) 1150 ksz8795_cpu_interface_select(dev, port); 1151 1152 member = dsa_user_ports(ds); 1153 } else { 1154 member = BIT(dsa_upstream_port(ds, port)); 1155 } 1156 1157 ksz8_cfg_port_member(dev, port, member); 1158 } 1159 1160 void ksz8_config_cpu_port(struct dsa_switch *ds) 1161 { 1162 struct ksz_device *dev = ds->priv; 1163 struct ksz_port *p; 1164 const u32 *masks; 1165 const u16 *regs; 1166 u8 remote; 1167 int i; 1168 1169 masks = dev->info->masks; 1170 regs = dev->info->regs; 1171 1172 /* Switch marks the maximum frame with extra byte as oversize. */ 1173 ksz_cfg(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, true); 1174 ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true); 1175 1176 p = &dev->ports[dev->cpu_port]; 1177 p->on = 1; 1178 1179 ksz8_port_setup(dev, dev->cpu_port, true); 1180 1181 for (i = 0; i < dev->phy_port_cnt; i++) { 1182 p = &dev->ports[i]; 1183 1184 ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED); 1185 1186 /* Last port may be disabled. */ 1187 if (i == dev->phy_port_cnt) 1188 break; 1189 p->on = 1; 1190 p->phy = 1; 1191 } 1192 for (i = 0; i < dev->phy_port_cnt; i++) { 1193 p = &dev->ports[i]; 1194 if (!p->on) 1195 continue; 1196 if (!ksz_is_ksz88x3(dev)) { 1197 ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote); 1198 if (remote & KSZ8_PORT_FIBER_MODE) 1199 p->fiber = 1; 1200 } 1201 if (p->fiber) 1202 ksz_port_cfg(dev, i, regs[P_STP_CTRL], 1203 PORT_FORCE_FLOW_CTRL, true); 1204 else 1205 ksz_port_cfg(dev, i, regs[P_STP_CTRL], 1206 PORT_FORCE_FLOW_CTRL, false); 1207 } 1208 } 1209 1210 static int ksz8_handle_global_errata(struct dsa_switch *ds) 1211 { 1212 struct ksz_device *dev = ds->priv; 1213 int ret = 0; 1214 1215 /* KSZ87xx Errata DS80000687C. 1216 * Module 2: Link drops with some EEE link partners. 1217 * An issue with the EEE next page exchange between the 1218 * KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in 1219 * the link dropping. 1220 */ 1221 if (dev->info->ksz87xx_eee_link_erratum) 1222 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0); 1223 1224 return ret; 1225 } 1226 1227 int ksz8_enable_stp_addr(struct ksz_device *dev) 1228 { 1229 struct alu_struct alu; 1230 1231 /* Setup STP address for STP operation. */ 1232 memset(&alu, 0, sizeof(alu)); 1233 ether_addr_copy(alu.mac, eth_stp_addr); 1234 alu.is_static = true; 1235 alu.is_override = true; 1236 alu.port_forward = dev->info->cpu_ports; 1237 1238 ksz8_w_sta_mac_table(dev, 0, &alu); 1239 1240 return 0; 1241 } 1242 1243 int ksz8_setup(struct dsa_switch *ds) 1244 { 1245 struct ksz_device *dev = ds->priv; 1246 int i; 1247 1248 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true); 1249 1250 /* Enable automatic fast aging when link changed detected. */ 1251 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true); 1252 1253 /* Enable aggressive back off algorithm in half duplex mode. */ 1254 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1, 1255 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF); 1256 1257 /* 1258 * Make sure unicast VLAN boundary is set as default and 1259 * enable no excessive collision drop. 1260 */ 1261 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2, 1262 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP, 1263 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP); 1264 1265 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false); 1266 1267 ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false); 1268 1269 if (!ksz_is_ksz88x3(dev)) 1270 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true); 1271 1272 for (i = 0; i < (dev->info->num_vlans / 4); i++) 1273 ksz8_r_vlan_entries(dev, i); 1274 1275 return ksz8_handle_global_errata(ds); 1276 } 1277 1278 void ksz8_get_caps(struct ksz_device *dev, int port, 1279 struct phylink_config *config) 1280 { 1281 config->mac_capabilities = MAC_10 | MAC_100; 1282 1283 /* Silicon Errata Sheet (DS80000830A): 1284 * "Port 1 does not respond to received flow control PAUSE frames" 1285 * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3 1286 * switches. 1287 */ 1288 if (!ksz_is_ksz88x3(dev) || port) 1289 config->mac_capabilities |= MAC_SYM_PAUSE; 1290 1291 /* Asym pause is not supported on KSZ8863 and KSZ8873 */ 1292 if (!ksz_is_ksz88x3(dev)) 1293 config->mac_capabilities |= MAC_ASYM_PAUSE; 1294 } 1295 1296 u32 ksz8_get_port_addr(int port, int offset) 1297 { 1298 return PORT_CTRL_ADDR(port, offset); 1299 } 1300 1301 int ksz8_switch_init(struct ksz_device *dev) 1302 { 1303 dev->cpu_port = fls(dev->info->cpu_ports) - 1; 1304 dev->phy_port_cnt = dev->info->port_cnt - 1; 1305 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports; 1306 1307 /* We rely on software untagging on the CPU port, so that we 1308 * can support both tagged and untagged VLANs 1309 */ 1310 dev->ds->untag_bridge_pvid = true; 1311 1312 /* VLAN filtering is partly controlled by the global VLAN 1313 * Enable flag 1314 */ 1315 dev->ds->vlan_filtering_is_global = true; 1316 1317 return 0; 1318 } 1319 1320 void ksz8_switch_exit(struct ksz_device *dev) 1321 { 1322 ksz8_reset_switch(dev); 1323 } 1324 1325 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>"); 1326 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver"); 1327 MODULE_LICENSE("GPL"); 1328