1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8
9 #include <linux/bitfield.h>
10 #include <linux/delay.h>
11 #include <linux/export.h>
12 #include <linux/gpio.h>
13 #include <linux/if_vlan.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/platform_data/microchip-ksz.h>
17 #include <linux/phy.h>
18 #include <linux/etherdevice.h>
19 #include <linux/if_bridge.h>
20 #include <linux/micrel_phy.h>
21 #include <net/dsa.h>
22 #include <net/switchdev.h>
23 #include <linux/phylink.h>
24
25 #include "ksz_common.h"
26 #include "ksz8795_reg.h"
27 #include "ksz8.h"
28
ksz_cfg(struct ksz_device * dev,u32 addr,u8 bits,bool set)29 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
30 {
31 regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);
32 }
33
ksz_port_cfg(struct ksz_device * dev,int port,int offset,u8 bits,bool set)34 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
35 bool set)
36 {
37 regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),
38 bits, set ? bits : 0);
39 }
40
ksz8_ind_write8(struct ksz_device * dev,u8 table,u16 addr,u8 data)41 static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)
42 {
43 const u16 *regs;
44 u16 ctrl_addr;
45 int ret = 0;
46
47 regs = dev->info->regs;
48
49 mutex_lock(&dev->alu_mutex);
50
51 ctrl_addr = IND_ACC_TABLE(table) | addr;
52 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
53 if (!ret)
54 ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
55
56 mutex_unlock(&dev->alu_mutex);
57
58 return ret;
59 }
60
ksz8_reset_switch(struct ksz_device * dev)61 int ksz8_reset_switch(struct ksz_device *dev)
62 {
63 if (ksz_is_ksz88x3(dev)) {
64 /* reset switch */
65 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
66 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);
67 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
68 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);
69 } else {
70 /* reset switch */
71 ksz_write8(dev, REG_POWER_MANAGEMENT_1,
72 SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
73 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
74 }
75
76 return 0;
77 }
78
ksz8863_change_mtu(struct ksz_device * dev,int frame_size)79 static int ksz8863_change_mtu(struct ksz_device *dev, int frame_size)
80 {
81 u8 ctrl2 = 0;
82
83 if (frame_size <= KSZ8_LEGAL_PACKET_SIZE)
84 ctrl2 |= KSZ8863_LEGAL_PACKET_ENABLE;
85 else if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
86 ctrl2 |= KSZ8863_HUGE_PACKET_ENABLE;
87
88 return ksz_rmw8(dev, REG_SW_CTRL_2, KSZ8863_LEGAL_PACKET_ENABLE |
89 KSZ8863_HUGE_PACKET_ENABLE, ctrl2);
90 }
91
ksz8795_change_mtu(struct ksz_device * dev,int frame_size)92 static int ksz8795_change_mtu(struct ksz_device *dev, int frame_size)
93 {
94 u8 ctrl1 = 0, ctrl2 = 0;
95 int ret;
96
97 if (frame_size > KSZ8_LEGAL_PACKET_SIZE)
98 ctrl2 |= SW_LEGAL_PACKET_DISABLE;
99 if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
100 ctrl1 |= SW_HUGE_PACKET;
101
102 ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_HUGE_PACKET, ctrl1);
103 if (ret)
104 return ret;
105
106 return ksz_rmw8(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, ctrl2);
107 }
108
ksz8_change_mtu(struct ksz_device * dev,int port,int mtu)109 int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu)
110 {
111 u16 frame_size;
112
113 if (!dsa_is_cpu_port(dev->ds, port))
114 return 0;
115
116 frame_size = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
117
118 switch (dev->chip_id) {
119 case KSZ8795_CHIP_ID:
120 case KSZ8794_CHIP_ID:
121 case KSZ8765_CHIP_ID:
122 return ksz8795_change_mtu(dev, frame_size);
123 case KSZ8830_CHIP_ID:
124 return ksz8863_change_mtu(dev, frame_size);
125 }
126
127 return -EOPNOTSUPP;
128 }
129
ksz8795_set_prio_queue(struct ksz_device * dev,int port,int queue)130 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
131 {
132 u8 hi, lo;
133
134 /* Number of queues can only be 1, 2, or 4. */
135 switch (queue) {
136 case 4:
137 case 3:
138 queue = PORT_QUEUE_SPLIT_4;
139 break;
140 case 2:
141 queue = PORT_QUEUE_SPLIT_2;
142 break;
143 default:
144 queue = PORT_QUEUE_SPLIT_1;
145 }
146 ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
147 ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
148 lo &= ~PORT_QUEUE_SPLIT_L;
149 if (queue & PORT_QUEUE_SPLIT_2)
150 lo |= PORT_QUEUE_SPLIT_L;
151 hi &= ~PORT_QUEUE_SPLIT_H;
152 if (queue & PORT_QUEUE_SPLIT_4)
153 hi |= PORT_QUEUE_SPLIT_H;
154 ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
155 ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
156
157 /* Default is port based for egress rate limit. */
158 if (queue != PORT_QUEUE_SPLIT_1)
159 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
160 true);
161 }
162
ksz8_r_mib_cnt(struct ksz_device * dev,int port,u16 addr,u64 * cnt)163 void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)
164 {
165 const u32 *masks;
166 const u16 *regs;
167 u16 ctrl_addr;
168 u32 data;
169 u8 check;
170 int loop;
171
172 masks = dev->info->masks;
173 regs = dev->info->regs;
174
175 ctrl_addr = addr + dev->info->reg_mib_cnt * port;
176 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
177
178 mutex_lock(&dev->alu_mutex);
179 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
180
181 /* It is almost guaranteed to always read the valid bit because of
182 * slow SPI speed.
183 */
184 for (loop = 2; loop > 0; loop--) {
185 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
186
187 if (check & masks[MIB_COUNTER_VALID]) {
188 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
189 if (check & masks[MIB_COUNTER_OVERFLOW])
190 *cnt += MIB_COUNTER_VALUE + 1;
191 *cnt += data & MIB_COUNTER_VALUE;
192 break;
193 }
194 }
195 mutex_unlock(&dev->alu_mutex);
196 }
197
ksz8795_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)198 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
199 u64 *dropped, u64 *cnt)
200 {
201 const u32 *masks;
202 const u16 *regs;
203 u16 ctrl_addr;
204 u32 data;
205 u8 check;
206 int loop;
207
208 masks = dev->info->masks;
209 regs = dev->info->regs;
210
211 addr -= dev->info->reg_mib_cnt;
212 ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;
213 ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;
214 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
215
216 mutex_lock(&dev->alu_mutex);
217 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
218
219 /* It is almost guaranteed to always read the valid bit because of
220 * slow SPI speed.
221 */
222 for (loop = 2; loop > 0; loop--) {
223 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
224
225 if (check & masks[MIB_COUNTER_VALID]) {
226 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
227 if (addr < 2) {
228 u64 total;
229
230 total = check & MIB_TOTAL_BYTES_H;
231 total <<= 32;
232 *cnt += total;
233 *cnt += data;
234 if (check & masks[MIB_COUNTER_OVERFLOW]) {
235 total = MIB_TOTAL_BYTES_H + 1;
236 total <<= 32;
237 *cnt += total;
238 }
239 } else {
240 if (check & masks[MIB_COUNTER_OVERFLOW])
241 *cnt += MIB_PACKET_DROPPED + 1;
242 *cnt += data & MIB_PACKET_DROPPED;
243 }
244 break;
245 }
246 }
247 mutex_unlock(&dev->alu_mutex);
248 }
249
ksz8863_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)250 static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
251 u64 *dropped, u64 *cnt)
252 {
253 u32 *last = (u32 *)dropped;
254 const u16 *regs;
255 u16 ctrl_addr;
256 u32 data;
257 u32 cur;
258
259 regs = dev->info->regs;
260
261 addr -= dev->info->reg_mib_cnt;
262 ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :
263 KSZ8863_MIB_PACKET_DROPPED_RX_0;
264 ctrl_addr += port;
265 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
266
267 mutex_lock(&dev->alu_mutex);
268 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
269 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
270 mutex_unlock(&dev->alu_mutex);
271
272 data &= MIB_PACKET_DROPPED;
273 cur = last[addr];
274 if (data != cur) {
275 last[addr] = data;
276 if (data < cur)
277 data += MIB_PACKET_DROPPED + 1;
278 data -= cur;
279 *cnt += data;
280 }
281 }
282
ksz8_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)283 void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
284 u64 *dropped, u64 *cnt)
285 {
286 if (ksz_is_ksz88x3(dev))
287 ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);
288 else
289 ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);
290 }
291
ksz8_freeze_mib(struct ksz_device * dev,int port,bool freeze)292 void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)
293 {
294 if (ksz_is_ksz88x3(dev))
295 return;
296
297 /* enable the port for flush/freeze function */
298 if (freeze)
299 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
300 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
301
302 /* disable the port after freeze is done */
303 if (!freeze)
304 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
305 }
306
ksz8_port_init_cnt(struct ksz_device * dev,int port)307 void ksz8_port_init_cnt(struct ksz_device *dev, int port)
308 {
309 struct ksz_port_mib *mib = &dev->ports[port].mib;
310 u64 *dropped;
311
312 if (!ksz_is_ksz88x3(dev)) {
313 /* flush all enabled port MIB counters */
314 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
315 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
316 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
317 }
318
319 mib->cnt_ptr = 0;
320
321 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
322 while (mib->cnt_ptr < dev->info->reg_mib_cnt) {
323 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
324 &mib->counters[mib->cnt_ptr]);
325 ++mib->cnt_ptr;
326 }
327
328 /* last one in storage */
329 dropped = &mib->counters[dev->info->mib_cnt];
330
331 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
332 while (mib->cnt_ptr < dev->info->mib_cnt) {
333 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
334 dropped, &mib->counters[mib->cnt_ptr]);
335 ++mib->cnt_ptr;
336 }
337 }
338
ksz8_r_table(struct ksz_device * dev,int table,u16 addr,u64 * data)339 static int ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)
340 {
341 const u16 *regs;
342 u16 ctrl_addr;
343 int ret;
344
345 regs = dev->info->regs;
346
347 ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
348
349 mutex_lock(&dev->alu_mutex);
350 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
351 if (ret)
352 goto unlock_alu;
353
354 ret = ksz_read64(dev, regs[REG_IND_DATA_HI], data);
355 unlock_alu:
356 mutex_unlock(&dev->alu_mutex);
357
358 return ret;
359 }
360
ksz8_w_table(struct ksz_device * dev,int table,u16 addr,u64 data)361 static int ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)
362 {
363 const u16 *regs;
364 u16 ctrl_addr;
365 int ret;
366
367 regs = dev->info->regs;
368
369 ctrl_addr = IND_ACC_TABLE(table) | addr;
370
371 mutex_lock(&dev->alu_mutex);
372 ret = ksz_write64(dev, regs[REG_IND_DATA_HI], data);
373 if (ret)
374 goto unlock_alu;
375
376 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
377 unlock_alu:
378 mutex_unlock(&dev->alu_mutex);
379
380 return ret;
381 }
382
ksz8_valid_dyn_entry(struct ksz_device * dev,u8 * data)383 static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)
384 {
385 int timeout = 100;
386 const u32 *masks;
387 const u16 *regs;
388
389 masks = dev->info->masks;
390 regs = dev->info->regs;
391
392 do {
393 ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);
394 timeout--;
395 } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout);
396
397 /* Entry is not ready for accessing. */
398 if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) {
399 return -EAGAIN;
400 /* Entry is ready for accessing. */
401 } else {
402 ksz_read8(dev, regs[REG_IND_DATA_8], data);
403
404 /* There is no valid entry in the table. */
405 if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY])
406 return -ENXIO;
407 }
408 return 0;
409 }
410
ksz8_r_dyn_mac_table(struct ksz_device * dev,u16 addr,u8 * mac_addr,u8 * fid,u8 * src_port,u8 * timestamp,u16 * entries)411 int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr, u8 *mac_addr,
412 u8 *fid, u8 *src_port, u8 *timestamp, u16 *entries)
413 {
414 u32 data_hi, data_lo;
415 const u8 *shifts;
416 const u32 *masks;
417 const u16 *regs;
418 u16 ctrl_addr;
419 u8 data;
420 int rc;
421
422 shifts = dev->info->shifts;
423 masks = dev->info->masks;
424 regs = dev->info->regs;
425
426 ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
427
428 mutex_lock(&dev->alu_mutex);
429 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
430
431 rc = ksz8_valid_dyn_entry(dev, &data);
432 if (rc == -EAGAIN) {
433 if (addr == 0)
434 *entries = 0;
435 } else if (rc == -ENXIO) {
436 *entries = 0;
437 /* At least one valid entry in the table. */
438 } else {
439 u64 buf = 0;
440 int cnt;
441
442 ksz_read64(dev, regs[REG_IND_DATA_HI], &buf);
443 data_hi = (u32)(buf >> 32);
444 data_lo = (u32)buf;
445
446 /* Check out how many valid entry in the table. */
447 cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H];
448 cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H];
449 cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >>
450 shifts[DYNAMIC_MAC_ENTRIES];
451 *entries = cnt + 1;
452
453 *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >>
454 shifts[DYNAMIC_MAC_FID];
455 *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >>
456 shifts[DYNAMIC_MAC_SRC_PORT];
457 *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >>
458 shifts[DYNAMIC_MAC_TIMESTAMP];
459
460 mac_addr[5] = (u8)data_lo;
461 mac_addr[4] = (u8)(data_lo >> 8);
462 mac_addr[3] = (u8)(data_lo >> 16);
463 mac_addr[2] = (u8)(data_lo >> 24);
464
465 mac_addr[1] = (u8)data_hi;
466 mac_addr[0] = (u8)(data_hi >> 8);
467 rc = 0;
468 }
469 mutex_unlock(&dev->alu_mutex);
470
471 return rc;
472 }
473
ksz8_r_sta_mac_table(struct ksz_device * dev,u16 addr,struct alu_struct * alu,bool * valid)474 static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,
475 struct alu_struct *alu, bool *valid)
476 {
477 u32 data_hi, data_lo;
478 const u8 *shifts;
479 const u32 *masks;
480 u64 data;
481 int ret;
482
483 shifts = dev->info->shifts;
484 masks = dev->info->masks;
485
486 ret = ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data);
487 if (ret)
488 return ret;
489
490 data_hi = data >> 32;
491 data_lo = (u32)data;
492
493 if (!(data_hi & (masks[STATIC_MAC_TABLE_VALID] |
494 masks[STATIC_MAC_TABLE_OVERRIDE]))) {
495 *valid = false;
496 return 0;
497 }
498
499 alu->mac[5] = (u8)data_lo;
500 alu->mac[4] = (u8)(data_lo >> 8);
501 alu->mac[3] = (u8)(data_lo >> 16);
502 alu->mac[2] = (u8)(data_lo >> 24);
503 alu->mac[1] = (u8)data_hi;
504 alu->mac[0] = (u8)(data_hi >> 8);
505 alu->port_forward =
506 (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >>
507 shifts[STATIC_MAC_FWD_PORTS];
508 alu->is_override = (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;
509
510 /* KSZ8795 family switches have STATIC_MAC_TABLE_USE_FID and
511 * STATIC_MAC_TABLE_FID definitions off by 1 when doing read on the
512 * static MAC table compared to doing write.
513 */
514 if (ksz_is_ksz87xx(dev))
515 data_hi >>= 1;
516 alu->is_static = true;
517 alu->is_use_fid = (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;
518 alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >>
519 shifts[STATIC_MAC_FID];
520
521 *valid = true;
522
523 return 0;
524 }
525
ksz8_w_sta_mac_table(struct ksz_device * dev,u16 addr,struct alu_struct * alu)526 static int ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,
527 struct alu_struct *alu)
528 {
529 u32 data_hi, data_lo;
530 const u8 *shifts;
531 const u32 *masks;
532 u64 data;
533
534 shifts = dev->info->shifts;
535 masks = dev->info->masks;
536
537 data_lo = ((u32)alu->mac[2] << 24) |
538 ((u32)alu->mac[3] << 16) |
539 ((u32)alu->mac[4] << 8) | alu->mac[5];
540 data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
541 data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS];
542
543 if (alu->is_override)
544 data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];
545 if (alu->is_use_fid) {
546 data_hi |= masks[STATIC_MAC_TABLE_USE_FID];
547 data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID];
548 }
549 if (alu->is_static)
550 data_hi |= masks[STATIC_MAC_TABLE_VALID];
551 else
552 data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE];
553
554 data = (u64)data_hi << 32 | data_lo;
555
556 return ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);
557 }
558
ksz8_from_vlan(struct ksz_device * dev,u32 vlan,u8 * fid,u8 * member,u8 * valid)559 static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,
560 u8 *member, u8 *valid)
561 {
562 const u8 *shifts;
563 const u32 *masks;
564
565 shifts = dev->info->shifts;
566 masks = dev->info->masks;
567
568 *fid = vlan & masks[VLAN_TABLE_FID];
569 *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >>
570 shifts[VLAN_TABLE_MEMBERSHIP_S];
571 *valid = !!(vlan & masks[VLAN_TABLE_VALID]);
572 }
573
ksz8_to_vlan(struct ksz_device * dev,u8 fid,u8 member,u8 valid,u16 * vlan)574 static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,
575 u16 *vlan)
576 {
577 const u8 *shifts;
578 const u32 *masks;
579
580 shifts = dev->info->shifts;
581 masks = dev->info->masks;
582
583 *vlan = fid;
584 *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S];
585 if (valid)
586 *vlan |= masks[VLAN_TABLE_VALID];
587 }
588
ksz8_r_vlan_entries(struct ksz_device * dev,u16 addr)589 static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)
590 {
591 const u8 *shifts;
592 u64 data;
593 int i;
594
595 shifts = dev->info->shifts;
596
597 ksz8_r_table(dev, TABLE_VLAN, addr, &data);
598 addr *= 4;
599 for (i = 0; i < 4; i++) {
600 dev->vlan_cache[addr + i].table[0] = (u16)data;
601 data >>= shifts[VLAN_TABLE];
602 }
603 }
604
ksz8_r_vlan_table(struct ksz_device * dev,u16 vid,u16 * vlan)605 static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
606 {
607 int index;
608 u16 *data;
609 u16 addr;
610 u64 buf;
611
612 data = (u16 *)&buf;
613 addr = vid / 4;
614 index = vid & 3;
615 ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
616 *vlan = data[index];
617 }
618
ksz8_w_vlan_table(struct ksz_device * dev,u16 vid,u16 vlan)619 static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
620 {
621 int index;
622 u16 *data;
623 u16 addr;
624 u64 buf;
625
626 data = (u16 *)&buf;
627 addr = vid / 4;
628 index = vid & 3;
629 ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
630 data[index] = vlan;
631 dev->vlan_cache[vid].table[0] = vlan;
632 ksz8_w_table(dev, TABLE_VLAN, addr, buf);
633 }
634
ksz8_r_phy(struct ksz_device * dev,u16 phy,u16 reg,u16 * val)635 int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
636 {
637 u8 restart, speed, ctrl, link;
638 int processed = true;
639 const u16 *regs;
640 u8 val1, val2;
641 u16 data = 0;
642 u8 p = phy;
643 int ret;
644
645 regs = dev->info->regs;
646
647 switch (reg) {
648 case MII_BMCR:
649 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
650 if (ret)
651 return ret;
652
653 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
654 if (ret)
655 return ret;
656
657 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
658 if (ret)
659 return ret;
660
661 if (restart & PORT_PHY_LOOPBACK)
662 data |= BMCR_LOOPBACK;
663 if (ctrl & PORT_FORCE_100_MBIT)
664 data |= BMCR_SPEED100;
665 if (ksz_is_ksz88x3(dev)) {
666 if ((ctrl & PORT_AUTO_NEG_ENABLE))
667 data |= BMCR_ANENABLE;
668 } else {
669 if (!(ctrl & PORT_AUTO_NEG_DISABLE))
670 data |= BMCR_ANENABLE;
671 }
672 if (restart & PORT_POWER_DOWN)
673 data |= BMCR_PDOWN;
674 if (restart & PORT_AUTO_NEG_RESTART)
675 data |= BMCR_ANRESTART;
676 if (ctrl & PORT_FORCE_FULL_DUPLEX)
677 data |= BMCR_FULLDPLX;
678 if (speed & PORT_HP_MDIX)
679 data |= KSZ886X_BMCR_HP_MDIX;
680 if (restart & PORT_FORCE_MDIX)
681 data |= KSZ886X_BMCR_FORCE_MDI;
682 if (restart & PORT_AUTO_MDIX_DISABLE)
683 data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;
684 if (restart & PORT_TX_DISABLE)
685 data |= KSZ886X_BMCR_DISABLE_TRANSMIT;
686 if (restart & PORT_LED_OFF)
687 data |= KSZ886X_BMCR_DISABLE_LED;
688 break;
689 case MII_BMSR:
690 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
691 if (ret)
692 return ret;
693
694 data = BMSR_100FULL |
695 BMSR_100HALF |
696 BMSR_10FULL |
697 BMSR_10HALF |
698 BMSR_ANEGCAPABLE;
699 if (link & PORT_AUTO_NEG_COMPLETE)
700 data |= BMSR_ANEGCOMPLETE;
701 if (link & PORT_STAT_LINK_GOOD)
702 data |= BMSR_LSTATUS;
703 break;
704 case MII_PHYSID1:
705 data = KSZ8795_ID_HI;
706 break;
707 case MII_PHYSID2:
708 if (ksz_is_ksz88x3(dev))
709 data = KSZ8863_ID_LO;
710 else
711 data = KSZ8795_ID_LO;
712 break;
713 case MII_ADVERTISE:
714 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
715 if (ret)
716 return ret;
717
718 data = ADVERTISE_CSMA;
719 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
720 data |= ADVERTISE_PAUSE_CAP;
721 if (ctrl & PORT_AUTO_NEG_100BTX_FD)
722 data |= ADVERTISE_100FULL;
723 if (ctrl & PORT_AUTO_NEG_100BTX)
724 data |= ADVERTISE_100HALF;
725 if (ctrl & PORT_AUTO_NEG_10BT_FD)
726 data |= ADVERTISE_10FULL;
727 if (ctrl & PORT_AUTO_NEG_10BT)
728 data |= ADVERTISE_10HALF;
729 break;
730 case MII_LPA:
731 ret = ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link);
732 if (ret)
733 return ret;
734
735 data = LPA_SLCT;
736 if (link & PORT_REMOTE_SYM_PAUSE)
737 data |= LPA_PAUSE_CAP;
738 if (link & PORT_REMOTE_100BTX_FD)
739 data |= LPA_100FULL;
740 if (link & PORT_REMOTE_100BTX)
741 data |= LPA_100HALF;
742 if (link & PORT_REMOTE_10BT_FD)
743 data |= LPA_10FULL;
744 if (link & PORT_REMOTE_10BT)
745 data |= LPA_10HALF;
746 if (data & ~LPA_SLCT)
747 data |= LPA_LPACK;
748 break;
749 case PHY_REG_LINK_MD:
750 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1);
751 if (ret)
752 return ret;
753
754 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2);
755 if (ret)
756 return ret;
757
758 if (val1 & PORT_START_CABLE_DIAG)
759 data |= PHY_START_CABLE_DIAG;
760
761 if (val1 & PORT_CABLE_10M_SHORT)
762 data |= PHY_CABLE_10M_SHORT;
763
764 data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,
765 FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));
766
767 data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,
768 (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) |
769 FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));
770 break;
771 case PHY_REG_PHY_CTRL:
772 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
773 if (ret)
774 return ret;
775
776 if (link & PORT_MDIX_STATUS)
777 data |= KSZ886X_CTRL_MDIX_STAT;
778 break;
779 default:
780 processed = false;
781 break;
782 }
783 if (processed)
784 *val = data;
785
786 return 0;
787 }
788
ksz8_w_phy(struct ksz_device * dev,u16 phy,u16 reg,u16 val)789 int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
790 {
791 u8 restart, speed, ctrl, data;
792 const u16 *regs;
793 u8 p = phy;
794 int ret;
795
796 regs = dev->info->regs;
797
798 switch (reg) {
799 case MII_BMCR:
800
801 /* Do not support PHY reset function. */
802 if (val & BMCR_RESET)
803 break;
804 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
805 if (ret)
806 return ret;
807
808 data = speed;
809 if (val & KSZ886X_BMCR_HP_MDIX)
810 data |= PORT_HP_MDIX;
811 else
812 data &= ~PORT_HP_MDIX;
813
814 if (data != speed) {
815 ret = ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data);
816 if (ret)
817 return ret;
818 }
819
820 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
821 if (ret)
822 return ret;
823
824 data = ctrl;
825 if (ksz_is_ksz88x3(dev)) {
826 if ((val & BMCR_ANENABLE))
827 data |= PORT_AUTO_NEG_ENABLE;
828 else
829 data &= ~PORT_AUTO_NEG_ENABLE;
830 } else {
831 if (!(val & BMCR_ANENABLE))
832 data |= PORT_AUTO_NEG_DISABLE;
833 else
834 data &= ~PORT_AUTO_NEG_DISABLE;
835
836 /* Fiber port does not support auto-negotiation. */
837 if (dev->ports[p].fiber)
838 data |= PORT_AUTO_NEG_DISABLE;
839 }
840
841 if (val & BMCR_SPEED100)
842 data |= PORT_FORCE_100_MBIT;
843 else
844 data &= ~PORT_FORCE_100_MBIT;
845 if (val & BMCR_FULLDPLX)
846 data |= PORT_FORCE_FULL_DUPLEX;
847 else
848 data &= ~PORT_FORCE_FULL_DUPLEX;
849
850 if (data != ctrl) {
851 ret = ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data);
852 if (ret)
853 return ret;
854 }
855
856 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
857 if (ret)
858 return ret;
859
860 data = restart;
861 if (val & KSZ886X_BMCR_DISABLE_LED)
862 data |= PORT_LED_OFF;
863 else
864 data &= ~PORT_LED_OFF;
865 if (val & KSZ886X_BMCR_DISABLE_TRANSMIT)
866 data |= PORT_TX_DISABLE;
867 else
868 data &= ~PORT_TX_DISABLE;
869 if (val & BMCR_ANRESTART)
870 data |= PORT_AUTO_NEG_RESTART;
871 else
872 data &= ~(PORT_AUTO_NEG_RESTART);
873 if (val & BMCR_PDOWN)
874 data |= PORT_POWER_DOWN;
875 else
876 data &= ~PORT_POWER_DOWN;
877 if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX)
878 data |= PORT_AUTO_MDIX_DISABLE;
879 else
880 data &= ~PORT_AUTO_MDIX_DISABLE;
881 if (val & KSZ886X_BMCR_FORCE_MDI)
882 data |= PORT_FORCE_MDIX;
883 else
884 data &= ~PORT_FORCE_MDIX;
885 if (val & BMCR_LOOPBACK)
886 data |= PORT_PHY_LOOPBACK;
887 else
888 data &= ~PORT_PHY_LOOPBACK;
889
890 if (data != restart) {
891 ret = ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL],
892 data);
893 if (ret)
894 return ret;
895 }
896 break;
897 case MII_ADVERTISE:
898 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
899 if (ret)
900 return ret;
901
902 data = ctrl;
903 data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
904 PORT_AUTO_NEG_100BTX_FD |
905 PORT_AUTO_NEG_100BTX |
906 PORT_AUTO_NEG_10BT_FD |
907 PORT_AUTO_NEG_10BT);
908 if (val & ADVERTISE_PAUSE_CAP)
909 data |= PORT_AUTO_NEG_SYM_PAUSE;
910 if (val & ADVERTISE_100FULL)
911 data |= PORT_AUTO_NEG_100BTX_FD;
912 if (val & ADVERTISE_100HALF)
913 data |= PORT_AUTO_NEG_100BTX;
914 if (val & ADVERTISE_10FULL)
915 data |= PORT_AUTO_NEG_10BT_FD;
916 if (val & ADVERTISE_10HALF)
917 data |= PORT_AUTO_NEG_10BT;
918
919 if (data != ctrl) {
920 ret = ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);
921 if (ret)
922 return ret;
923 }
924 break;
925 case PHY_REG_LINK_MD:
926 if (val & PHY_START_CABLE_DIAG)
927 ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);
928 break;
929 default:
930 break;
931 }
932
933 return 0;
934 }
935
ksz8_cfg_port_member(struct ksz_device * dev,int port,u8 member)936 void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
937 {
938 u8 data;
939
940 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
941 data &= ~PORT_VLAN_MEMBERSHIP;
942 data |= (member & dev->port_mask);
943 ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
944 }
945
ksz8_flush_dyn_mac_table(struct ksz_device * dev,int port)946 void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
947 {
948 u8 learn[DSA_MAX_PORTS];
949 int first, index, cnt;
950 const u16 *regs;
951
952 regs = dev->info->regs;
953
954 if ((uint)port < dev->info->port_cnt) {
955 first = port;
956 cnt = port + 1;
957 } else {
958 /* Flush all ports. */
959 first = 0;
960 cnt = dev->info->port_cnt;
961 }
962 for (index = first; index < cnt; index++) {
963 ksz_pread8(dev, index, regs[P_STP_CTRL], &learn[index]);
964 if (!(learn[index] & PORT_LEARN_DISABLE))
965 ksz_pwrite8(dev, index, regs[P_STP_CTRL],
966 learn[index] | PORT_LEARN_DISABLE);
967 }
968 ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
969 for (index = first; index < cnt; index++) {
970 if (!(learn[index] & PORT_LEARN_DISABLE))
971 ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]);
972 }
973 }
974
ksz8_fdb_dump(struct ksz_device * dev,int port,dsa_fdb_dump_cb_t * cb,void * data)975 int ksz8_fdb_dump(struct ksz_device *dev, int port,
976 dsa_fdb_dump_cb_t *cb, void *data)
977 {
978 int ret = 0;
979 u16 i = 0;
980 u16 entries = 0;
981 u8 timestamp = 0;
982 u8 fid;
983 u8 src_port;
984 u8 mac[ETH_ALEN];
985
986 do {
987 ret = ksz8_r_dyn_mac_table(dev, i, mac, &fid, &src_port,
988 ×tamp, &entries);
989 if (!ret && port == src_port) {
990 ret = cb(mac, fid, false, data);
991 if (ret)
992 break;
993 }
994 i++;
995 } while (i < entries);
996 if (i >= entries)
997 ret = 0;
998
999 return ret;
1000 }
1001
ksz8_add_sta_mac(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid)1002 static int ksz8_add_sta_mac(struct ksz_device *dev, int port,
1003 const unsigned char *addr, u16 vid)
1004 {
1005 struct alu_struct alu;
1006 int index, ret;
1007 int empty = 0;
1008
1009 alu.port_forward = 0;
1010 for (index = 0; index < dev->info->num_statics; index++) {
1011 bool valid;
1012
1013 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
1014 if (ret)
1015 return ret;
1016 if (!valid) {
1017 /* Remember the first empty entry. */
1018 if (!empty)
1019 empty = index + 1;
1020 continue;
1021 }
1022
1023 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
1024 break;
1025 }
1026
1027 /* no available entry */
1028 if (index == dev->info->num_statics && !empty)
1029 return -ENOSPC;
1030
1031 /* add entry */
1032 if (index == dev->info->num_statics) {
1033 index = empty - 1;
1034 memset(&alu, 0, sizeof(alu));
1035 memcpy(alu.mac, addr, ETH_ALEN);
1036 alu.is_static = true;
1037 }
1038 alu.port_forward |= BIT(port);
1039 if (vid) {
1040 alu.is_use_fid = true;
1041
1042 /* Need a way to map VID to FID. */
1043 alu.fid = vid;
1044 }
1045
1046 return ksz8_w_sta_mac_table(dev, index, &alu);
1047 }
1048
ksz8_del_sta_mac(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid)1049 static int ksz8_del_sta_mac(struct ksz_device *dev, int port,
1050 const unsigned char *addr, u16 vid)
1051 {
1052 struct alu_struct alu;
1053 int index, ret;
1054
1055 for (index = 0; index < dev->info->num_statics; index++) {
1056 bool valid;
1057
1058 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
1059 if (ret)
1060 return ret;
1061 if (!valid)
1062 continue;
1063
1064 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
1065 break;
1066 }
1067
1068 /* no available entry */
1069 if (index == dev->info->num_statics)
1070 return 0;
1071
1072 /* clear port */
1073 alu.port_forward &= ~BIT(port);
1074 if (!alu.port_forward)
1075 alu.is_static = false;
1076
1077 return ksz8_w_sta_mac_table(dev, index, &alu);
1078 }
1079
ksz8_mdb_add(struct ksz_device * dev,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)1080 int ksz8_mdb_add(struct ksz_device *dev, int port,
1081 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1082 {
1083 return ksz8_add_sta_mac(dev, port, mdb->addr, mdb->vid);
1084 }
1085
ksz8_mdb_del(struct ksz_device * dev,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)1086 int ksz8_mdb_del(struct ksz_device *dev, int port,
1087 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1088 {
1089 return ksz8_del_sta_mac(dev, port, mdb->addr, mdb->vid);
1090 }
1091
ksz8_fdb_add(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid,struct dsa_db db)1092 int ksz8_fdb_add(struct ksz_device *dev, int port, const unsigned char *addr,
1093 u16 vid, struct dsa_db db)
1094 {
1095 return ksz8_add_sta_mac(dev, port, addr, vid);
1096 }
1097
ksz8_fdb_del(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid,struct dsa_db db)1098 int ksz8_fdb_del(struct ksz_device *dev, int port, const unsigned char *addr,
1099 u16 vid, struct dsa_db db)
1100 {
1101 return ksz8_del_sta_mac(dev, port, addr, vid);
1102 }
1103
ksz8_port_vlan_filtering(struct ksz_device * dev,int port,bool flag,struct netlink_ext_ack * extack)1104 int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,
1105 struct netlink_ext_ack *extack)
1106 {
1107 if (ksz_is_ksz88x3(dev))
1108 return -ENOTSUPP;
1109
1110 /* Discard packets with VID not enabled on the switch */
1111 ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
1112
1113 /* Discard packets with VID not enabled on the ingress port */
1114 for (port = 0; port < dev->phy_port_cnt; ++port)
1115 ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,
1116 flag);
1117
1118 return 0;
1119 }
1120
ksz8_port_enable_pvid(struct ksz_device * dev,int port,bool state)1121 static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)
1122 {
1123 if (ksz_is_ksz88x3(dev)) {
1124 ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,
1125 0x03 << (4 - 2 * port), state);
1126 } else {
1127 ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);
1128 }
1129 }
1130
ksz8_port_vlan_add(struct ksz_device * dev,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)1131 int ksz8_port_vlan_add(struct ksz_device *dev, int port,
1132 const struct switchdev_obj_port_vlan *vlan,
1133 struct netlink_ext_ack *extack)
1134 {
1135 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
1136 struct ksz_port *p = &dev->ports[port];
1137 u16 data, new_pvid = 0;
1138 u8 fid, member, valid;
1139
1140 if (ksz_is_ksz88x3(dev))
1141 return -ENOTSUPP;
1142
1143 /* If a VLAN is added with untagged flag different from the
1144 * port's Remove Tag flag, we need to change the latter.
1145 * Ignore VID 0, which is always untagged.
1146 * Ignore CPU port, which will always be tagged.
1147 */
1148 if (untagged != p->remove_tag && vlan->vid != 0 &&
1149 port != dev->cpu_port) {
1150 unsigned int vid;
1151
1152 /* Reject attempts to add a VLAN that requires the
1153 * Remove Tag flag to be changed, unless there are no
1154 * other VLANs currently configured.
1155 */
1156 for (vid = 1; vid < dev->info->num_vlans; ++vid) {
1157 /* Skip the VID we are going to add or reconfigure */
1158 if (vid == vlan->vid)
1159 continue;
1160
1161 ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1162 &fid, &member, &valid);
1163 if (valid && (member & BIT(port)))
1164 return -EINVAL;
1165 }
1166
1167 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
1168 p->remove_tag = untagged;
1169 }
1170
1171 ksz8_r_vlan_table(dev, vlan->vid, &data);
1172 ksz8_from_vlan(dev, data, &fid, &member, &valid);
1173
1174 /* First time to setup the VLAN entry. */
1175 if (!valid) {
1176 /* Need to find a way to map VID to FID. */
1177 fid = 1;
1178 valid = 1;
1179 }
1180 member |= BIT(port);
1181
1182 ksz8_to_vlan(dev, fid, member, valid, &data);
1183 ksz8_w_vlan_table(dev, vlan->vid, data);
1184
1185 /* change PVID */
1186 if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
1187 new_pvid = vlan->vid;
1188
1189 if (new_pvid) {
1190 u16 vid;
1191
1192 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
1193 vid &= ~VLAN_VID_MASK;
1194 vid |= new_pvid;
1195 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
1196
1197 ksz8_port_enable_pvid(dev, port, true);
1198 }
1199
1200 return 0;
1201 }
1202
ksz8_port_vlan_del(struct ksz_device * dev,int port,const struct switchdev_obj_port_vlan * vlan)1203 int ksz8_port_vlan_del(struct ksz_device *dev, int port,
1204 const struct switchdev_obj_port_vlan *vlan)
1205 {
1206 u16 data, pvid;
1207 u8 fid, member, valid;
1208
1209 if (ksz_is_ksz88x3(dev))
1210 return -ENOTSUPP;
1211
1212 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
1213 pvid = pvid & 0xFFF;
1214
1215 ksz8_r_vlan_table(dev, vlan->vid, &data);
1216 ksz8_from_vlan(dev, data, &fid, &member, &valid);
1217
1218 member &= ~BIT(port);
1219
1220 /* Invalidate the entry if no more member. */
1221 if (!member) {
1222 fid = 0;
1223 valid = 0;
1224 }
1225
1226 ksz8_to_vlan(dev, fid, member, valid, &data);
1227 ksz8_w_vlan_table(dev, vlan->vid, data);
1228
1229 if (pvid == vlan->vid)
1230 ksz8_port_enable_pvid(dev, port, false);
1231
1232 return 0;
1233 }
1234
ksz8_port_mirror_add(struct ksz_device * dev,int port,struct dsa_mall_mirror_tc_entry * mirror,bool ingress,struct netlink_ext_ack * extack)1235 int ksz8_port_mirror_add(struct ksz_device *dev, int port,
1236 struct dsa_mall_mirror_tc_entry *mirror,
1237 bool ingress, struct netlink_ext_ack *extack)
1238 {
1239 if (ingress) {
1240 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1241 dev->mirror_rx |= BIT(port);
1242 } else {
1243 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1244 dev->mirror_tx |= BIT(port);
1245 }
1246
1247 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1248
1249 /* configure mirror port */
1250 if (dev->mirror_rx || dev->mirror_tx)
1251 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1252 PORT_MIRROR_SNIFFER, true);
1253
1254 return 0;
1255 }
1256
ksz8_port_mirror_del(struct ksz_device * dev,int port,struct dsa_mall_mirror_tc_entry * mirror)1257 void ksz8_port_mirror_del(struct ksz_device *dev, int port,
1258 struct dsa_mall_mirror_tc_entry *mirror)
1259 {
1260 u8 data;
1261
1262 if (mirror->ingress) {
1263 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1264 dev->mirror_rx &= ~BIT(port);
1265 } else {
1266 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1267 dev->mirror_tx &= ~BIT(port);
1268 }
1269
1270 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1271
1272 if (!dev->mirror_rx && !dev->mirror_tx)
1273 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1274 PORT_MIRROR_SNIFFER, false);
1275 }
1276
ksz8795_cpu_interface_select(struct ksz_device * dev,int port)1277 static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
1278 {
1279 struct ksz_port *p = &dev->ports[port];
1280
1281 if (!p->interface && dev->compat_interface) {
1282 dev_warn(dev->dev,
1283 "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "
1284 "Please update your device tree.\n",
1285 port);
1286 p->interface = dev->compat_interface;
1287 }
1288 }
1289
ksz8_port_setup(struct ksz_device * dev,int port,bool cpu_port)1290 void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
1291 {
1292 struct dsa_switch *ds = dev->ds;
1293 const u32 *masks;
1294 u8 member;
1295
1296 masks = dev->info->masks;
1297
1298 /* enable broadcast storm limit */
1299 ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
1300
1301 if (!ksz_is_ksz88x3(dev))
1302 ksz8795_set_prio_queue(dev, port, 4);
1303
1304 /* disable DiffServ priority */
1305 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
1306
1307 /* replace priority */
1308 ksz_port_cfg(dev, port, P_802_1P_CTRL,
1309 masks[PORT_802_1P_REMAPPING], false);
1310
1311 /* enable 802.1p priority */
1312 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
1313
1314 if (cpu_port) {
1315 if (!ksz_is_ksz88x3(dev))
1316 ksz8795_cpu_interface_select(dev, port);
1317
1318 member = dsa_user_ports(ds);
1319 } else {
1320 member = BIT(dsa_upstream_port(ds, port));
1321 }
1322
1323 ksz8_cfg_port_member(dev, port, member);
1324 }
1325
ksz8_config_cpu_port(struct dsa_switch * ds)1326 void ksz8_config_cpu_port(struct dsa_switch *ds)
1327 {
1328 struct ksz_device *dev = ds->priv;
1329 struct ksz_port *p;
1330 const u32 *masks;
1331 const u16 *regs;
1332 u8 remote;
1333 int i;
1334
1335 masks = dev->info->masks;
1336 regs = dev->info->regs;
1337
1338 ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);
1339
1340 ksz8_port_setup(dev, dev->cpu_port, true);
1341
1342 for (i = 0; i < dev->phy_port_cnt; i++) {
1343 ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1344 }
1345 for (i = 0; i < dev->phy_port_cnt; i++) {
1346 p = &dev->ports[i];
1347
1348 if (!ksz_is_ksz88x3(dev)) {
1349 ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote);
1350 if (remote & KSZ8_PORT_FIBER_MODE)
1351 p->fiber = 1;
1352 }
1353 if (p->fiber)
1354 ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1355 PORT_FORCE_FLOW_CTRL, true);
1356 else
1357 ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1358 PORT_FORCE_FLOW_CTRL, false);
1359 }
1360 }
1361
ksz8_handle_global_errata(struct dsa_switch * ds)1362 static int ksz8_handle_global_errata(struct dsa_switch *ds)
1363 {
1364 struct ksz_device *dev = ds->priv;
1365 int ret = 0;
1366
1367 /* KSZ87xx Errata DS80000687C.
1368 * Module 2: Link drops with some EEE link partners.
1369 * An issue with the EEE next page exchange between the
1370 * KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1371 * the link dropping.
1372 */
1373 if (dev->info->ksz87xx_eee_link_erratum)
1374 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1375
1376 return ret;
1377 }
1378
ksz8_enable_stp_addr(struct ksz_device * dev)1379 int ksz8_enable_stp_addr(struct ksz_device *dev)
1380 {
1381 struct alu_struct alu;
1382
1383 /* Setup STP address for STP operation. */
1384 memset(&alu, 0, sizeof(alu));
1385 ether_addr_copy(alu.mac, eth_stp_addr);
1386 alu.is_static = true;
1387 alu.is_override = true;
1388 alu.port_forward = dev->info->cpu_ports;
1389
1390 return ksz8_w_sta_mac_table(dev, 0, &alu);
1391 }
1392
ksz8_setup(struct dsa_switch * ds)1393 int ksz8_setup(struct dsa_switch *ds)
1394 {
1395 struct ksz_device *dev = ds->priv;
1396 int i;
1397
1398 ds->mtu_enforcement_ingress = true;
1399
1400 /* We rely on software untagging on the CPU port, so that we
1401 * can support both tagged and untagged VLANs
1402 */
1403 ds->untag_bridge_pvid = true;
1404
1405 /* VLAN filtering is partly controlled by the global VLAN
1406 * Enable flag
1407 */
1408 ds->vlan_filtering_is_global = true;
1409
1410 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1411
1412 /* Enable automatic fast aging when link changed detected. */
1413 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1414
1415 /* Enable aggressive back off algorithm in half duplex mode. */
1416 regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_1,
1417 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1418
1419 /*
1420 * Make sure unicast VLAN boundary is set as default and
1421 * enable no excessive collision drop.
1422 */
1423 regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_2,
1424 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1425 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1426
1427 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1428
1429 ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1430
1431 if (!ksz_is_ksz88x3(dev))
1432 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1433
1434 for (i = 0; i < (dev->info->num_vlans / 4); i++)
1435 ksz8_r_vlan_entries(dev, i);
1436
1437 return ksz8_handle_global_errata(ds);
1438 }
1439
ksz8_get_caps(struct ksz_device * dev,int port,struct phylink_config * config)1440 void ksz8_get_caps(struct ksz_device *dev, int port,
1441 struct phylink_config *config)
1442 {
1443 config->mac_capabilities = MAC_10 | MAC_100;
1444
1445 /* Silicon Errata Sheet (DS80000830A):
1446 * "Port 1 does not respond to received flow control PAUSE frames"
1447 * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3
1448 * switches.
1449 */
1450 if (!ksz_is_ksz88x3(dev) || port)
1451 config->mac_capabilities |= MAC_SYM_PAUSE;
1452
1453 /* Asym pause is not supported on KSZ8863 and KSZ8873 */
1454 if (!ksz_is_ksz88x3(dev))
1455 config->mac_capabilities |= MAC_ASYM_PAUSE;
1456 }
1457
ksz8_get_port_addr(int port,int offset)1458 u32 ksz8_get_port_addr(int port, int offset)
1459 {
1460 return PORT_CTRL_ADDR(port, offset);
1461 }
1462
ksz8_switch_init(struct ksz_device * dev)1463 int ksz8_switch_init(struct ksz_device *dev)
1464 {
1465 dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1466 dev->phy_port_cnt = dev->info->port_cnt - 1;
1467 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1468
1469 return 0;
1470 }
1471
ksz8_switch_exit(struct ksz_device * dev)1472 void ksz8_switch_exit(struct ksz_device *dev)
1473 {
1474 ksz8_reset_switch(dev);
1475 }
1476
1477 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1478 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1479 MODULE_LICENSE("GPL");
1480