1 // SPDX-License-Identifier: (GPL-2.0 or MIT) 2 /* 3 * DSA driver for: 4 * Hirschmann Hellcreek TSN switch. 5 * 6 * Copyright (C) 2019-2021 Linutronix GmbH 7 * Author Kurt Kanzenbach <kurt@linutronix.de> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/device.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/of_mdio.h> 16 #include <linux/platform_device.h> 17 #include <linux/bitops.h> 18 #include <linux/if_bridge.h> 19 #include <linux/if_vlan.h> 20 #include <linux/etherdevice.h> 21 #include <linux/random.h> 22 #include <linux/iopoll.h> 23 #include <linux/mutex.h> 24 #include <linux/delay.h> 25 #include <net/dsa.h> 26 27 #include "hellcreek.h" 28 #include "hellcreek_ptp.h" 29 #include "hellcreek_hwtstamp.h" 30 31 static const struct hellcreek_counter hellcreek_counter[] = { 32 { 0x00, "RxFiltered", }, 33 { 0x01, "RxOctets1k", }, 34 { 0x02, "RxVTAG", }, 35 { 0x03, "RxL2BAD", }, 36 { 0x04, "RxOverloadDrop", }, 37 { 0x05, "RxUC", }, 38 { 0x06, "RxMC", }, 39 { 0x07, "RxBC", }, 40 { 0x08, "RxRS<64", }, 41 { 0x09, "RxRS64", }, 42 { 0x0a, "RxRS65_127", }, 43 { 0x0b, "RxRS128_255", }, 44 { 0x0c, "RxRS256_511", }, 45 { 0x0d, "RxRS512_1023", }, 46 { 0x0e, "RxRS1024_1518", }, 47 { 0x0f, "RxRS>1518", }, 48 { 0x10, "TxTailDropQueue0", }, 49 { 0x11, "TxTailDropQueue1", }, 50 { 0x12, "TxTailDropQueue2", }, 51 { 0x13, "TxTailDropQueue3", }, 52 { 0x14, "TxTailDropQueue4", }, 53 { 0x15, "TxTailDropQueue5", }, 54 { 0x16, "TxTailDropQueue6", }, 55 { 0x17, "TxTailDropQueue7", }, 56 { 0x18, "RxTrafficClass0", }, 57 { 0x19, "RxTrafficClass1", }, 58 { 0x1a, "RxTrafficClass2", }, 59 { 0x1b, "RxTrafficClass3", }, 60 { 0x1c, "RxTrafficClass4", }, 61 { 0x1d, "RxTrafficClass5", }, 62 { 0x1e, "RxTrafficClass6", }, 63 { 0x1f, "RxTrafficClass7", }, 64 { 0x21, "TxOctets1k", }, 65 { 0x22, "TxVTAG", }, 66 { 0x23, "TxL2BAD", }, 67 { 0x25, "TxUC", }, 68 { 0x26, "TxMC", }, 69 { 0x27, "TxBC", }, 70 { 0x28, "TxTS<64", }, 71 { 0x29, "TxTS64", }, 72 { 0x2a, "TxTS65_127", }, 73 { 0x2b, "TxTS128_255", }, 74 { 0x2c, "TxTS256_511", }, 75 { 0x2d, "TxTS512_1023", }, 76 { 0x2e, "TxTS1024_1518", }, 77 { 0x2f, "TxTS>1518", }, 78 { 0x30, "TxTrafficClassOverrun0", }, 79 { 0x31, "TxTrafficClassOverrun1", }, 80 { 0x32, "TxTrafficClassOverrun2", }, 81 { 0x33, "TxTrafficClassOverrun3", }, 82 { 0x34, "TxTrafficClassOverrun4", }, 83 { 0x35, "TxTrafficClassOverrun5", }, 84 { 0x36, "TxTrafficClassOverrun6", }, 85 { 0x37, "TxTrafficClassOverrun7", }, 86 { 0x38, "TxTrafficClass0", }, 87 { 0x39, "TxTrafficClass1", }, 88 { 0x3a, "TxTrafficClass2", }, 89 { 0x3b, "TxTrafficClass3", }, 90 { 0x3c, "TxTrafficClass4", }, 91 { 0x3d, "TxTrafficClass5", }, 92 { 0x3e, "TxTrafficClass6", }, 93 { 0x3f, "TxTrafficClass7", }, 94 }; 95 96 static u16 hellcreek_read(struct hellcreek *hellcreek, unsigned int offset) 97 { 98 return readw(hellcreek->base + offset); 99 } 100 101 static u16 hellcreek_read_ctrl(struct hellcreek *hellcreek) 102 { 103 return readw(hellcreek->base + HR_CTRL_C); 104 } 105 106 static u16 hellcreek_read_stat(struct hellcreek *hellcreek) 107 { 108 return readw(hellcreek->base + HR_SWSTAT); 109 } 110 111 static void hellcreek_write(struct hellcreek *hellcreek, u16 data, 112 unsigned int offset) 113 { 114 writew(data, hellcreek->base + offset); 115 } 116 117 static void hellcreek_select_port(struct hellcreek *hellcreek, int port) 118 { 119 u16 val = port << HR_PSEL_PTWSEL_SHIFT; 120 121 hellcreek_write(hellcreek, val, HR_PSEL); 122 } 123 124 static void hellcreek_select_prio(struct hellcreek *hellcreek, int prio) 125 { 126 u16 val = prio << HR_PSEL_PRTCWSEL_SHIFT; 127 128 hellcreek_write(hellcreek, val, HR_PSEL); 129 } 130 131 static void hellcreek_select_counter(struct hellcreek *hellcreek, int counter) 132 { 133 u16 val = counter << HR_CSEL_SHIFT; 134 135 hellcreek_write(hellcreek, val, HR_CSEL); 136 137 /* Data sheet states to wait at least 20 internal clock cycles */ 138 ndelay(200); 139 } 140 141 static void hellcreek_select_vlan(struct hellcreek *hellcreek, int vid, 142 bool pvid) 143 { 144 u16 val = 0; 145 146 /* Set pvid bit first */ 147 if (pvid) 148 val |= HR_VIDCFG_PVID; 149 hellcreek_write(hellcreek, val, HR_VIDCFG); 150 151 /* Set vlan */ 152 val |= vid << HR_VIDCFG_VID_SHIFT; 153 hellcreek_write(hellcreek, val, HR_VIDCFG); 154 } 155 156 static void hellcreek_select_tgd(struct hellcreek *hellcreek, int port) 157 { 158 u16 val = port << TR_TGDSEL_TDGSEL_SHIFT; 159 160 hellcreek_write(hellcreek, val, TR_TGDSEL); 161 } 162 163 static int hellcreek_wait_until_ready(struct hellcreek *hellcreek) 164 { 165 u16 val; 166 167 /* Wait up to 1ms, although 3 us should be enough */ 168 return readx_poll_timeout(hellcreek_read_ctrl, hellcreek, 169 val, val & HR_CTRL_C_READY, 170 3, 1000); 171 } 172 173 static int hellcreek_wait_until_transitioned(struct hellcreek *hellcreek) 174 { 175 u16 val; 176 177 return readx_poll_timeout_atomic(hellcreek_read_ctrl, hellcreek, 178 val, !(val & HR_CTRL_C_TRANSITION), 179 1, 1000); 180 } 181 182 static int hellcreek_wait_fdb_ready(struct hellcreek *hellcreek) 183 { 184 u16 val; 185 186 return readx_poll_timeout_atomic(hellcreek_read_stat, hellcreek, 187 val, !(val & HR_SWSTAT_BUSY), 188 1, 1000); 189 } 190 191 static int hellcreek_detect(struct hellcreek *hellcreek) 192 { 193 u16 id, rel_low, rel_high, date_low, date_high, tgd_ver; 194 u8 tgd_maj, tgd_min; 195 u32 rel, date; 196 197 id = hellcreek_read(hellcreek, HR_MODID_C); 198 rel_low = hellcreek_read(hellcreek, HR_REL_L_C); 199 rel_high = hellcreek_read(hellcreek, HR_REL_H_C); 200 date_low = hellcreek_read(hellcreek, HR_BLD_L_C); 201 date_high = hellcreek_read(hellcreek, HR_BLD_H_C); 202 tgd_ver = hellcreek_read(hellcreek, TR_TGDVER); 203 204 if (id != hellcreek->pdata->module_id) 205 return -ENODEV; 206 207 rel = rel_low | (rel_high << 16); 208 date = date_low | (date_high << 16); 209 tgd_maj = (tgd_ver & TR_TGDVER_REV_MAJ_MASK) >> TR_TGDVER_REV_MAJ_SHIFT; 210 tgd_min = (tgd_ver & TR_TGDVER_REV_MIN_MASK) >> TR_TGDVER_REV_MIN_SHIFT; 211 212 dev_info(hellcreek->dev, "Module ID=%02x Release=%04x Date=%04x TGD Version=%02x.%02x\n", 213 id, rel, date, tgd_maj, tgd_min); 214 215 return 0; 216 } 217 218 static void hellcreek_feature_detect(struct hellcreek *hellcreek) 219 { 220 u16 features; 221 222 features = hellcreek_read(hellcreek, HR_FEABITS0); 223 224 /* Only detect the size of the FDB table. The size and current 225 * utilization can be queried via devlink. 226 */ 227 hellcreek->fdb_entries = ((features & HR_FEABITS0_FDBBINS_MASK) >> 228 HR_FEABITS0_FDBBINS_SHIFT) * 32; 229 } 230 231 static enum dsa_tag_protocol hellcreek_get_tag_protocol(struct dsa_switch *ds, 232 int port, 233 enum dsa_tag_protocol mp) 234 { 235 return DSA_TAG_PROTO_HELLCREEK; 236 } 237 238 static int hellcreek_port_enable(struct dsa_switch *ds, int port, 239 struct phy_device *phy) 240 { 241 struct hellcreek *hellcreek = ds->priv; 242 struct hellcreek_port *hellcreek_port; 243 u16 val; 244 245 hellcreek_port = &hellcreek->ports[port]; 246 247 dev_dbg(hellcreek->dev, "Enable port %d\n", port); 248 249 mutex_lock(&hellcreek->reg_lock); 250 251 hellcreek_select_port(hellcreek, port); 252 val = hellcreek_port->ptcfg; 253 val |= HR_PTCFG_ADMIN_EN; 254 hellcreek_write(hellcreek, val, HR_PTCFG); 255 hellcreek_port->ptcfg = val; 256 257 mutex_unlock(&hellcreek->reg_lock); 258 259 return 0; 260 } 261 262 static void hellcreek_port_disable(struct dsa_switch *ds, int port) 263 { 264 struct hellcreek *hellcreek = ds->priv; 265 struct hellcreek_port *hellcreek_port; 266 u16 val; 267 268 hellcreek_port = &hellcreek->ports[port]; 269 270 dev_dbg(hellcreek->dev, "Disable port %d\n", port); 271 272 mutex_lock(&hellcreek->reg_lock); 273 274 hellcreek_select_port(hellcreek, port); 275 val = hellcreek_port->ptcfg; 276 val &= ~HR_PTCFG_ADMIN_EN; 277 hellcreek_write(hellcreek, val, HR_PTCFG); 278 hellcreek_port->ptcfg = val; 279 280 mutex_unlock(&hellcreek->reg_lock); 281 } 282 283 static void hellcreek_get_strings(struct dsa_switch *ds, int port, 284 u32 stringset, uint8_t *data) 285 { 286 int i; 287 288 for (i = 0; i < ARRAY_SIZE(hellcreek_counter); ++i) { 289 const struct hellcreek_counter *counter = &hellcreek_counter[i]; 290 291 strlcpy(data + i * ETH_GSTRING_LEN, 292 counter->name, ETH_GSTRING_LEN); 293 } 294 } 295 296 static int hellcreek_get_sset_count(struct dsa_switch *ds, int port, int sset) 297 { 298 if (sset != ETH_SS_STATS) 299 return 0; 300 301 return ARRAY_SIZE(hellcreek_counter); 302 } 303 304 static void hellcreek_get_ethtool_stats(struct dsa_switch *ds, int port, 305 uint64_t *data) 306 { 307 struct hellcreek *hellcreek = ds->priv; 308 struct hellcreek_port *hellcreek_port; 309 int i; 310 311 hellcreek_port = &hellcreek->ports[port]; 312 313 for (i = 0; i < ARRAY_SIZE(hellcreek_counter); ++i) { 314 const struct hellcreek_counter *counter = &hellcreek_counter[i]; 315 u8 offset = counter->offset + port * 64; 316 u16 high, low; 317 u64 value; 318 319 mutex_lock(&hellcreek->reg_lock); 320 321 hellcreek_select_counter(hellcreek, offset); 322 323 /* The registers are locked internally by selecting the 324 * counter. So low and high can be read without reading high 325 * again. 326 */ 327 high = hellcreek_read(hellcreek, HR_CRDH); 328 low = hellcreek_read(hellcreek, HR_CRDL); 329 value = ((u64)high << 16) | low; 330 331 hellcreek_port->counter_values[i] += value; 332 data[i] = hellcreek_port->counter_values[i]; 333 334 mutex_unlock(&hellcreek->reg_lock); 335 } 336 } 337 338 static u16 hellcreek_private_vid(int port) 339 { 340 return VLAN_N_VID - port + 1; 341 } 342 343 static int hellcreek_vlan_prepare(struct dsa_switch *ds, int port, 344 const struct switchdev_obj_port_vlan *vlan) 345 { 346 struct hellcreek *hellcreek = ds->priv; 347 int i; 348 349 dev_dbg(hellcreek->dev, "VLAN prepare for port %d\n", port); 350 351 /* Restriction: Make sure that nobody uses the "private" VLANs. These 352 * VLANs are internally used by the driver to ensure port 353 * separation. Thus, they cannot be used by someone else. 354 */ 355 for (i = 0; i < hellcreek->pdata->num_ports; ++i) { 356 const u16 restricted_vid = hellcreek_private_vid(i); 357 358 if (!dsa_is_user_port(ds, i)) 359 continue; 360 361 if (vlan->vid == restricted_vid) 362 return -EBUSY; 363 } 364 365 return 0; 366 } 367 368 static void hellcreek_select_vlan_params(struct hellcreek *hellcreek, int port, 369 int *shift, int *mask) 370 { 371 switch (port) { 372 case 0: 373 *shift = HR_VIDMBRCFG_P0MBR_SHIFT; 374 *mask = HR_VIDMBRCFG_P0MBR_MASK; 375 break; 376 case 1: 377 *shift = HR_VIDMBRCFG_P1MBR_SHIFT; 378 *mask = HR_VIDMBRCFG_P1MBR_MASK; 379 break; 380 case 2: 381 *shift = HR_VIDMBRCFG_P2MBR_SHIFT; 382 *mask = HR_VIDMBRCFG_P2MBR_MASK; 383 break; 384 case 3: 385 *shift = HR_VIDMBRCFG_P3MBR_SHIFT; 386 *mask = HR_VIDMBRCFG_P3MBR_MASK; 387 break; 388 default: 389 *shift = *mask = 0; 390 dev_err(hellcreek->dev, "Unknown port %d selected!\n", port); 391 } 392 } 393 394 static void hellcreek_apply_vlan(struct hellcreek *hellcreek, int port, u16 vid, 395 bool pvid, bool untagged) 396 { 397 int shift, mask; 398 u16 val; 399 400 dev_dbg(hellcreek->dev, "Apply VLAN: port=%d vid=%u pvid=%d untagged=%d", 401 port, vid, pvid, untagged); 402 403 mutex_lock(&hellcreek->reg_lock); 404 405 hellcreek_select_port(hellcreek, port); 406 hellcreek_select_vlan(hellcreek, vid, pvid); 407 408 /* Setup port vlan membership */ 409 hellcreek_select_vlan_params(hellcreek, port, &shift, &mask); 410 val = hellcreek->vidmbrcfg[vid]; 411 val &= ~mask; 412 if (untagged) 413 val |= HELLCREEK_VLAN_UNTAGGED_MEMBER << shift; 414 else 415 val |= HELLCREEK_VLAN_TAGGED_MEMBER << shift; 416 417 hellcreek_write(hellcreek, val, HR_VIDMBRCFG); 418 hellcreek->vidmbrcfg[vid] = val; 419 420 mutex_unlock(&hellcreek->reg_lock); 421 } 422 423 static void hellcreek_unapply_vlan(struct hellcreek *hellcreek, int port, 424 u16 vid) 425 { 426 int shift, mask; 427 u16 val; 428 429 dev_dbg(hellcreek->dev, "Unapply VLAN: port=%d vid=%u\n", port, vid); 430 431 mutex_lock(&hellcreek->reg_lock); 432 433 hellcreek_select_vlan(hellcreek, vid, 0); 434 435 /* Setup port vlan membership */ 436 hellcreek_select_vlan_params(hellcreek, port, &shift, &mask); 437 val = hellcreek->vidmbrcfg[vid]; 438 val &= ~mask; 439 val |= HELLCREEK_VLAN_NO_MEMBER << shift; 440 441 hellcreek_write(hellcreek, val, HR_VIDMBRCFG); 442 hellcreek->vidmbrcfg[vid] = val; 443 444 mutex_unlock(&hellcreek->reg_lock); 445 } 446 447 static int hellcreek_vlan_add(struct dsa_switch *ds, int port, 448 const struct switchdev_obj_port_vlan *vlan) 449 { 450 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 451 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; 452 struct hellcreek *hellcreek = ds->priv; 453 int err; 454 455 err = hellcreek_vlan_prepare(ds, port, vlan); 456 if (err) 457 return err; 458 459 dev_dbg(hellcreek->dev, "Add VLAN %d on port %d, %s, %s\n", 460 vlan->vid, port, untagged ? "untagged" : "tagged", 461 pvid ? "PVID" : "no PVID"); 462 463 hellcreek_apply_vlan(hellcreek, port, vlan->vid, pvid, untagged); 464 465 return 0; 466 } 467 468 static int hellcreek_vlan_del(struct dsa_switch *ds, int port, 469 const struct switchdev_obj_port_vlan *vlan) 470 { 471 struct hellcreek *hellcreek = ds->priv; 472 473 dev_dbg(hellcreek->dev, "Remove VLAN %d on port %d\n", vlan->vid, port); 474 475 hellcreek_unapply_vlan(hellcreek, port, vlan->vid); 476 477 return 0; 478 } 479 480 static void hellcreek_port_stp_state_set(struct dsa_switch *ds, int port, 481 u8 state) 482 { 483 struct hellcreek *hellcreek = ds->priv; 484 struct hellcreek_port *hellcreek_port; 485 const char *new_state; 486 u16 val; 487 488 mutex_lock(&hellcreek->reg_lock); 489 490 hellcreek_port = &hellcreek->ports[port]; 491 val = hellcreek_port->ptcfg; 492 493 switch (state) { 494 case BR_STATE_DISABLED: 495 new_state = "DISABLED"; 496 val |= HR_PTCFG_BLOCKED; 497 val &= ~HR_PTCFG_LEARNING_EN; 498 break; 499 case BR_STATE_BLOCKING: 500 new_state = "BLOCKING"; 501 val |= HR_PTCFG_BLOCKED; 502 val &= ~HR_PTCFG_LEARNING_EN; 503 break; 504 case BR_STATE_LISTENING: 505 new_state = "LISTENING"; 506 val |= HR_PTCFG_BLOCKED; 507 val &= ~HR_PTCFG_LEARNING_EN; 508 break; 509 case BR_STATE_LEARNING: 510 new_state = "LEARNING"; 511 val |= HR_PTCFG_BLOCKED; 512 val |= HR_PTCFG_LEARNING_EN; 513 break; 514 case BR_STATE_FORWARDING: 515 new_state = "FORWARDING"; 516 val &= ~HR_PTCFG_BLOCKED; 517 val |= HR_PTCFG_LEARNING_EN; 518 break; 519 default: 520 new_state = "UNKNOWN"; 521 } 522 523 hellcreek_select_port(hellcreek, port); 524 hellcreek_write(hellcreek, val, HR_PTCFG); 525 hellcreek_port->ptcfg = val; 526 527 mutex_unlock(&hellcreek->reg_lock); 528 529 dev_dbg(hellcreek->dev, "Configured STP state for port %d: %s\n", 530 port, new_state); 531 } 532 533 static void hellcreek_setup_ingressflt(struct hellcreek *hellcreek, int port, 534 bool enable) 535 { 536 struct hellcreek_port *hellcreek_port = &hellcreek->ports[port]; 537 u16 ptcfg; 538 539 mutex_lock(&hellcreek->reg_lock); 540 541 ptcfg = hellcreek_port->ptcfg; 542 543 if (enable) 544 ptcfg |= HR_PTCFG_INGRESSFLT; 545 else 546 ptcfg &= ~HR_PTCFG_INGRESSFLT; 547 548 hellcreek_select_port(hellcreek, port); 549 hellcreek_write(hellcreek, ptcfg, HR_PTCFG); 550 hellcreek_port->ptcfg = ptcfg; 551 552 mutex_unlock(&hellcreek->reg_lock); 553 } 554 555 static void hellcreek_setup_vlan_awareness(struct hellcreek *hellcreek, 556 bool enable) 557 { 558 u16 swcfg; 559 560 mutex_lock(&hellcreek->reg_lock); 561 562 swcfg = hellcreek->swcfg; 563 564 if (enable) 565 swcfg |= HR_SWCFG_VLAN_UNAWARE; 566 else 567 swcfg &= ~HR_SWCFG_VLAN_UNAWARE; 568 569 hellcreek_write(hellcreek, swcfg, HR_SWCFG); 570 571 mutex_unlock(&hellcreek->reg_lock); 572 } 573 574 /* Default setup for DSA: VLAN <X>: CPU and Port <X> egress untagged. */ 575 static void hellcreek_setup_vlan_membership(struct dsa_switch *ds, int port, 576 bool enabled) 577 { 578 const u16 vid = hellcreek_private_vid(port); 579 int upstream = dsa_upstream_port(ds, port); 580 struct hellcreek *hellcreek = ds->priv; 581 582 /* Apply vid to port as egress untagged and port vlan id */ 583 if (enabled) 584 hellcreek_apply_vlan(hellcreek, port, vid, true, true); 585 else 586 hellcreek_unapply_vlan(hellcreek, port, vid); 587 588 /* Apply vid to cpu port as well */ 589 if (enabled) 590 hellcreek_apply_vlan(hellcreek, upstream, vid, false, true); 591 else 592 hellcreek_unapply_vlan(hellcreek, upstream, vid); 593 } 594 595 static int hellcreek_port_bridge_join(struct dsa_switch *ds, int port, 596 struct net_device *br) 597 { 598 struct hellcreek *hellcreek = ds->priv; 599 600 dev_dbg(hellcreek->dev, "Port %d joins a bridge\n", port); 601 602 /* When joining a vlan_filtering bridge, keep the switch VLAN aware */ 603 if (!ds->vlan_filtering) 604 hellcreek_setup_vlan_awareness(hellcreek, false); 605 606 /* Drop private vlans */ 607 hellcreek_setup_vlan_membership(ds, port, false); 608 609 return 0; 610 } 611 612 static void hellcreek_port_bridge_leave(struct dsa_switch *ds, int port, 613 struct net_device *br) 614 { 615 struct hellcreek *hellcreek = ds->priv; 616 617 dev_dbg(hellcreek->dev, "Port %d leaves a bridge\n", port); 618 619 /* Enable VLAN awareness */ 620 hellcreek_setup_vlan_awareness(hellcreek, true); 621 622 /* Enable private vlans */ 623 hellcreek_setup_vlan_membership(ds, port, true); 624 } 625 626 static int __hellcreek_fdb_add(struct hellcreek *hellcreek, 627 const struct hellcreek_fdb_entry *entry) 628 { 629 u16 meta = 0; 630 631 dev_dbg(hellcreek->dev, "Add static FDB entry: MAC=%pM, MASK=0x%02x, " 632 "OBT=%d, REPRIO_EN=%d, PRIO=%d\n", entry->mac, entry->portmask, 633 entry->is_obt, entry->reprio_en, entry->reprio_tc); 634 635 /* Add mac address */ 636 hellcreek_write(hellcreek, entry->mac[1] | (entry->mac[0] << 8), HR_FDBWDH); 637 hellcreek_write(hellcreek, entry->mac[3] | (entry->mac[2] << 8), HR_FDBWDM); 638 hellcreek_write(hellcreek, entry->mac[5] | (entry->mac[4] << 8), HR_FDBWDL); 639 640 /* Meta data */ 641 meta |= entry->portmask << HR_FDBWRM0_PORTMASK_SHIFT; 642 if (entry->is_obt) 643 meta |= HR_FDBWRM0_OBT; 644 if (entry->reprio_en) { 645 meta |= HR_FDBWRM0_REPRIO_EN; 646 meta |= entry->reprio_tc << HR_FDBWRM0_REPRIO_TC_SHIFT; 647 } 648 hellcreek_write(hellcreek, meta, HR_FDBWRM0); 649 650 /* Commit */ 651 hellcreek_write(hellcreek, 0x00, HR_FDBWRCMD); 652 653 /* Wait until done */ 654 return hellcreek_wait_fdb_ready(hellcreek); 655 } 656 657 static int __hellcreek_fdb_del(struct hellcreek *hellcreek, 658 const struct hellcreek_fdb_entry *entry) 659 { 660 dev_dbg(hellcreek->dev, "Delete FDB entry: MAC=%pM!\n", entry->mac); 661 662 /* Delete by matching idx */ 663 hellcreek_write(hellcreek, entry->idx | HR_FDBWRCMD_FDBDEL, HR_FDBWRCMD); 664 665 /* Wait until done */ 666 return hellcreek_wait_fdb_ready(hellcreek); 667 } 668 669 /* Retrieve the index of a FDB entry by mac address. Currently we search through 670 * the complete table in hardware. If that's too slow, we might have to cache 671 * the complete FDB table in software. 672 */ 673 static int hellcreek_fdb_get(struct hellcreek *hellcreek, 674 const unsigned char *dest, 675 struct hellcreek_fdb_entry *entry) 676 { 677 size_t i; 678 679 /* Set read pointer to zero: The read of HR_FDBMAX (read-only register) 680 * should reset the internal pointer. But, that doesn't work. The vendor 681 * suggested a subsequent write as workaround. Same for HR_FDBRDH below. 682 */ 683 hellcreek_read(hellcreek, HR_FDBMAX); 684 hellcreek_write(hellcreek, 0x00, HR_FDBMAX); 685 686 /* We have to read the complete table, because the switch/driver might 687 * enter new entries anywhere. 688 */ 689 for (i = 0; i < hellcreek->fdb_entries; ++i) { 690 unsigned char addr[ETH_ALEN]; 691 u16 meta, mac; 692 693 meta = hellcreek_read(hellcreek, HR_FDBMDRD); 694 mac = hellcreek_read(hellcreek, HR_FDBRDL); 695 addr[5] = mac & 0xff; 696 addr[4] = (mac & 0xff00) >> 8; 697 mac = hellcreek_read(hellcreek, HR_FDBRDM); 698 addr[3] = mac & 0xff; 699 addr[2] = (mac & 0xff00) >> 8; 700 mac = hellcreek_read(hellcreek, HR_FDBRDH); 701 addr[1] = mac & 0xff; 702 addr[0] = (mac & 0xff00) >> 8; 703 704 /* Force next entry */ 705 hellcreek_write(hellcreek, 0x00, HR_FDBRDH); 706 707 if (memcmp(addr, dest, ETH_ALEN)) 708 continue; 709 710 /* Match found */ 711 entry->idx = i; 712 entry->portmask = (meta & HR_FDBMDRD_PORTMASK_MASK) >> 713 HR_FDBMDRD_PORTMASK_SHIFT; 714 entry->age = (meta & HR_FDBMDRD_AGE_MASK) >> 715 HR_FDBMDRD_AGE_SHIFT; 716 entry->is_obt = !!(meta & HR_FDBMDRD_OBT); 717 entry->pass_blocked = !!(meta & HR_FDBMDRD_PASS_BLOCKED); 718 entry->is_static = !!(meta & HR_FDBMDRD_STATIC); 719 entry->reprio_tc = (meta & HR_FDBMDRD_REPRIO_TC_MASK) >> 720 HR_FDBMDRD_REPRIO_TC_SHIFT; 721 entry->reprio_en = !!(meta & HR_FDBMDRD_REPRIO_EN); 722 memcpy(entry->mac, addr, sizeof(addr)); 723 724 return 0; 725 } 726 727 return -ENOENT; 728 } 729 730 static int hellcreek_fdb_add(struct dsa_switch *ds, int port, 731 const unsigned char *addr, u16 vid) 732 { 733 struct hellcreek_fdb_entry entry = { 0 }; 734 struct hellcreek *hellcreek = ds->priv; 735 int ret; 736 737 dev_dbg(hellcreek->dev, "Add FDB entry for MAC=%pM\n", addr); 738 739 mutex_lock(&hellcreek->reg_lock); 740 741 ret = hellcreek_fdb_get(hellcreek, addr, &entry); 742 if (ret) { 743 /* Not found */ 744 memcpy(entry.mac, addr, sizeof(entry.mac)); 745 entry.portmask = BIT(port); 746 747 ret = __hellcreek_fdb_add(hellcreek, &entry); 748 if (ret) { 749 dev_err(hellcreek->dev, "Failed to add FDB entry!\n"); 750 goto out; 751 } 752 } else { 753 /* Found */ 754 ret = __hellcreek_fdb_del(hellcreek, &entry); 755 if (ret) { 756 dev_err(hellcreek->dev, "Failed to delete FDB entry!\n"); 757 goto out; 758 } 759 760 entry.portmask |= BIT(port); 761 762 ret = __hellcreek_fdb_add(hellcreek, &entry); 763 if (ret) { 764 dev_err(hellcreek->dev, "Failed to add FDB entry!\n"); 765 goto out; 766 } 767 } 768 769 out: 770 mutex_unlock(&hellcreek->reg_lock); 771 772 return ret; 773 } 774 775 static int hellcreek_fdb_del(struct dsa_switch *ds, int port, 776 const unsigned char *addr, u16 vid) 777 { 778 struct hellcreek_fdb_entry entry = { 0 }; 779 struct hellcreek *hellcreek = ds->priv; 780 int ret; 781 782 dev_dbg(hellcreek->dev, "Delete FDB entry for MAC=%pM\n", addr); 783 784 mutex_lock(&hellcreek->reg_lock); 785 786 ret = hellcreek_fdb_get(hellcreek, addr, &entry); 787 if (ret) { 788 /* Not found */ 789 dev_err(hellcreek->dev, "FDB entry for deletion not found!\n"); 790 } else { 791 /* Found */ 792 ret = __hellcreek_fdb_del(hellcreek, &entry); 793 if (ret) { 794 dev_err(hellcreek->dev, "Failed to delete FDB entry!\n"); 795 goto out; 796 } 797 798 entry.portmask &= ~BIT(port); 799 800 if (entry.portmask != 0x00) { 801 ret = __hellcreek_fdb_add(hellcreek, &entry); 802 if (ret) { 803 dev_err(hellcreek->dev, "Failed to add FDB entry!\n"); 804 goto out; 805 } 806 } 807 } 808 809 out: 810 mutex_unlock(&hellcreek->reg_lock); 811 812 return ret; 813 } 814 815 static int hellcreek_fdb_dump(struct dsa_switch *ds, int port, 816 dsa_fdb_dump_cb_t *cb, void *data) 817 { 818 struct hellcreek *hellcreek = ds->priv; 819 u16 entries; 820 size_t i; 821 822 mutex_lock(&hellcreek->reg_lock); 823 824 /* Set read pointer to zero: The read of HR_FDBMAX (read-only register) 825 * should reset the internal pointer. But, that doesn't work. The vendor 826 * suggested a subsequent write as workaround. Same for HR_FDBRDH below. 827 */ 828 entries = hellcreek_read(hellcreek, HR_FDBMAX); 829 hellcreek_write(hellcreek, 0x00, HR_FDBMAX); 830 831 dev_dbg(hellcreek->dev, "FDB dump for port %d, entries=%d!\n", port, entries); 832 833 /* Read table */ 834 for (i = 0; i < hellcreek->fdb_entries; ++i) { 835 unsigned char null_addr[ETH_ALEN] = { 0 }; 836 struct hellcreek_fdb_entry entry = { 0 }; 837 u16 meta, mac; 838 839 meta = hellcreek_read(hellcreek, HR_FDBMDRD); 840 mac = hellcreek_read(hellcreek, HR_FDBRDL); 841 entry.mac[5] = mac & 0xff; 842 entry.mac[4] = (mac & 0xff00) >> 8; 843 mac = hellcreek_read(hellcreek, HR_FDBRDM); 844 entry.mac[3] = mac & 0xff; 845 entry.mac[2] = (mac & 0xff00) >> 8; 846 mac = hellcreek_read(hellcreek, HR_FDBRDH); 847 entry.mac[1] = mac & 0xff; 848 entry.mac[0] = (mac & 0xff00) >> 8; 849 850 /* Force next entry */ 851 hellcreek_write(hellcreek, 0x00, HR_FDBRDH); 852 853 /* Check valid */ 854 if (!memcmp(entry.mac, null_addr, ETH_ALEN)) 855 continue; 856 857 entry.portmask = (meta & HR_FDBMDRD_PORTMASK_MASK) >> 858 HR_FDBMDRD_PORTMASK_SHIFT; 859 entry.is_static = !!(meta & HR_FDBMDRD_STATIC); 860 861 /* Check port mask */ 862 if (!(entry.portmask & BIT(port))) 863 continue; 864 865 cb(entry.mac, 0, entry.is_static, data); 866 } 867 868 mutex_unlock(&hellcreek->reg_lock); 869 870 return 0; 871 } 872 873 static int hellcreek_vlan_filtering(struct dsa_switch *ds, int port, 874 bool vlan_filtering) 875 { 876 struct hellcreek *hellcreek = ds->priv; 877 878 dev_dbg(hellcreek->dev, "%s VLAN filtering on port %d\n", 879 vlan_filtering ? "Enable" : "Disable", port); 880 881 /* Configure port to drop packages with not known vids */ 882 hellcreek_setup_ingressflt(hellcreek, port, vlan_filtering); 883 884 /* Enable VLAN awareness on the switch. This save due to 885 * ds->vlan_filtering_is_global. 886 */ 887 hellcreek_setup_vlan_awareness(hellcreek, vlan_filtering); 888 889 return 0; 890 } 891 892 static int hellcreek_enable_ip_core(struct hellcreek *hellcreek) 893 { 894 int ret; 895 u16 val; 896 897 mutex_lock(&hellcreek->reg_lock); 898 899 val = hellcreek_read(hellcreek, HR_CTRL_C); 900 val |= HR_CTRL_C_ENABLE; 901 hellcreek_write(hellcreek, val, HR_CTRL_C); 902 ret = hellcreek_wait_until_transitioned(hellcreek); 903 904 mutex_unlock(&hellcreek->reg_lock); 905 906 return ret; 907 } 908 909 static void hellcreek_setup_cpu_and_tunnel_port(struct hellcreek *hellcreek) 910 { 911 struct hellcreek_port *tunnel_port = &hellcreek->ports[TUNNEL_PORT]; 912 struct hellcreek_port *cpu_port = &hellcreek->ports[CPU_PORT]; 913 u16 ptcfg = 0; 914 915 ptcfg |= HR_PTCFG_LEARNING_EN | HR_PTCFG_ADMIN_EN; 916 917 mutex_lock(&hellcreek->reg_lock); 918 919 hellcreek_select_port(hellcreek, CPU_PORT); 920 hellcreek_write(hellcreek, ptcfg, HR_PTCFG); 921 922 hellcreek_select_port(hellcreek, TUNNEL_PORT); 923 hellcreek_write(hellcreek, ptcfg, HR_PTCFG); 924 925 cpu_port->ptcfg = ptcfg; 926 tunnel_port->ptcfg = ptcfg; 927 928 mutex_unlock(&hellcreek->reg_lock); 929 } 930 931 static void hellcreek_setup_tc_identity_mapping(struct hellcreek *hellcreek) 932 { 933 int i; 934 935 /* The switch has multiple egress queues per port. The queue is selected 936 * via the PCP field in the VLAN header. The switch internally deals 937 * with traffic classes instead of PCP values and this mapping is 938 * configurable. 939 * 940 * The default mapping is (PCP - TC): 941 * 7 - 7 942 * 6 - 6 943 * 5 - 5 944 * 4 - 4 945 * 3 - 3 946 * 2 - 1 947 * 1 - 0 948 * 0 - 2 949 * 950 * The default should be an identity mapping. 951 */ 952 953 for (i = 0; i < 8; ++i) { 954 mutex_lock(&hellcreek->reg_lock); 955 956 hellcreek_select_prio(hellcreek, i); 957 hellcreek_write(hellcreek, 958 i << HR_PRTCCFG_PCP_TC_MAP_SHIFT, 959 HR_PRTCCFG); 960 961 mutex_unlock(&hellcreek->reg_lock); 962 } 963 } 964 965 static int hellcreek_setup_fdb(struct hellcreek *hellcreek) 966 { 967 static struct hellcreek_fdb_entry ptp = { 968 /* MAC: 01-1B-19-00-00-00 */ 969 .mac = { 0x01, 0x1b, 0x19, 0x00, 0x00, 0x00 }, 970 .portmask = 0x03, /* Management ports */ 971 .age = 0, 972 .is_obt = 0, 973 .pass_blocked = 0, 974 .is_static = 1, 975 .reprio_tc = 6, /* TC: 6 as per IEEE 802.1AS */ 976 .reprio_en = 1, 977 }; 978 static struct hellcreek_fdb_entry p2p = { 979 /* MAC: 01-80-C2-00-00-0E */ 980 .mac = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x0e }, 981 .portmask = 0x03, /* Management ports */ 982 .age = 0, 983 .is_obt = 0, 984 .pass_blocked = 0, 985 .is_static = 1, 986 .reprio_tc = 6, /* TC: 6 as per IEEE 802.1AS */ 987 .reprio_en = 1, 988 }; 989 int ret; 990 991 mutex_lock(&hellcreek->reg_lock); 992 ret = __hellcreek_fdb_add(hellcreek, &ptp); 993 if (ret) 994 goto out; 995 ret = __hellcreek_fdb_add(hellcreek, &p2p); 996 out: 997 mutex_unlock(&hellcreek->reg_lock); 998 999 return ret; 1000 } 1001 1002 static u64 hellcreek_devlink_vlan_table_get(void *priv) 1003 { 1004 struct hellcreek *hellcreek = priv; 1005 u64 count = 0; 1006 int i; 1007 1008 mutex_lock(&hellcreek->reg_lock); 1009 for (i = 0; i < VLAN_N_VID; ++i) 1010 if (hellcreek->vidmbrcfg[i]) 1011 count++; 1012 mutex_unlock(&hellcreek->reg_lock); 1013 1014 return count; 1015 } 1016 1017 static u64 hellcreek_devlink_fdb_table_get(void *priv) 1018 { 1019 struct hellcreek *hellcreek = priv; 1020 u64 count = 0; 1021 1022 /* Reading this register has side effects. Synchronize against the other 1023 * FDB operations. 1024 */ 1025 mutex_lock(&hellcreek->reg_lock); 1026 count = hellcreek_read(hellcreek, HR_FDBMAX); 1027 mutex_unlock(&hellcreek->reg_lock); 1028 1029 return count; 1030 } 1031 1032 static int hellcreek_setup_devlink_resources(struct dsa_switch *ds) 1033 { 1034 struct devlink_resource_size_params size_vlan_params; 1035 struct devlink_resource_size_params size_fdb_params; 1036 struct hellcreek *hellcreek = ds->priv; 1037 int err; 1038 1039 devlink_resource_size_params_init(&size_vlan_params, VLAN_N_VID, 1040 VLAN_N_VID, 1041 1, DEVLINK_RESOURCE_UNIT_ENTRY); 1042 1043 devlink_resource_size_params_init(&size_fdb_params, 1044 hellcreek->fdb_entries, 1045 hellcreek->fdb_entries, 1046 1, DEVLINK_RESOURCE_UNIT_ENTRY); 1047 1048 err = dsa_devlink_resource_register(ds, "VLAN", VLAN_N_VID, 1049 HELLCREEK_DEVLINK_PARAM_ID_VLAN_TABLE, 1050 DEVLINK_RESOURCE_ID_PARENT_TOP, 1051 &size_vlan_params); 1052 if (err) 1053 goto out; 1054 1055 err = dsa_devlink_resource_register(ds, "FDB", hellcreek->fdb_entries, 1056 HELLCREEK_DEVLINK_PARAM_ID_FDB_TABLE, 1057 DEVLINK_RESOURCE_ID_PARENT_TOP, 1058 &size_fdb_params); 1059 if (err) 1060 goto out; 1061 1062 dsa_devlink_resource_occ_get_register(ds, 1063 HELLCREEK_DEVLINK_PARAM_ID_VLAN_TABLE, 1064 hellcreek_devlink_vlan_table_get, 1065 hellcreek); 1066 1067 dsa_devlink_resource_occ_get_register(ds, 1068 HELLCREEK_DEVLINK_PARAM_ID_FDB_TABLE, 1069 hellcreek_devlink_fdb_table_get, 1070 hellcreek); 1071 1072 return 0; 1073 1074 out: 1075 dsa_devlink_resources_unregister(ds); 1076 1077 return err; 1078 } 1079 1080 static int hellcreek_setup(struct dsa_switch *ds) 1081 { 1082 struct hellcreek *hellcreek = ds->priv; 1083 u16 swcfg = 0; 1084 int ret, i; 1085 1086 dev_dbg(hellcreek->dev, "Set up the switch\n"); 1087 1088 /* Let's go */ 1089 ret = hellcreek_enable_ip_core(hellcreek); 1090 if (ret) { 1091 dev_err(hellcreek->dev, "Failed to enable IP core!\n"); 1092 return ret; 1093 } 1094 1095 /* Enable CPU/Tunnel ports */ 1096 hellcreek_setup_cpu_and_tunnel_port(hellcreek); 1097 1098 /* Switch config: Keep defaults, enable FDB aging and learning and tag 1099 * each frame from/to cpu port for DSA tagging. Also enable the length 1100 * aware shaping mode. This eliminates the need for Qbv guard bands. 1101 */ 1102 swcfg |= HR_SWCFG_FDBAGE_EN | 1103 HR_SWCFG_FDBLRN_EN | 1104 HR_SWCFG_ALWAYS_OBT | 1105 (HR_SWCFG_LAS_ON << HR_SWCFG_LAS_MODE_SHIFT); 1106 hellcreek->swcfg = swcfg; 1107 hellcreek_write(hellcreek, swcfg, HR_SWCFG); 1108 1109 /* Initial vlan membership to reflect port separation */ 1110 for (i = 0; i < ds->num_ports; ++i) { 1111 if (!dsa_is_user_port(ds, i)) 1112 continue; 1113 1114 hellcreek_setup_vlan_membership(ds, i, true); 1115 } 1116 1117 /* Configure PCP <-> TC mapping */ 1118 hellcreek_setup_tc_identity_mapping(hellcreek); 1119 1120 /* The VLAN awareness is a global switch setting. Therefore, mixed vlan 1121 * filtering setups are not supported. 1122 */ 1123 ds->vlan_filtering_is_global = true; 1124 1125 /* Intercept _all_ PTP multicast traffic */ 1126 ret = hellcreek_setup_fdb(hellcreek); 1127 if (ret) { 1128 dev_err(hellcreek->dev, 1129 "Failed to insert static PTP FDB entries\n"); 1130 return ret; 1131 } 1132 1133 /* Register devlink resources with DSA */ 1134 ret = hellcreek_setup_devlink_resources(ds); 1135 if (ret) { 1136 dev_err(hellcreek->dev, 1137 "Failed to setup devlink resources!\n"); 1138 return ret; 1139 } 1140 1141 return 0; 1142 } 1143 1144 static void hellcreek_teardown(struct dsa_switch *ds) 1145 { 1146 dsa_devlink_resources_unregister(ds); 1147 } 1148 1149 static void hellcreek_phylink_validate(struct dsa_switch *ds, int port, 1150 unsigned long *supported, 1151 struct phylink_link_state *state) 1152 { 1153 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 1154 struct hellcreek *hellcreek = ds->priv; 1155 1156 dev_dbg(hellcreek->dev, "Phylink validate for port %d\n", port); 1157 1158 /* The MAC settings are a hardware configuration option and cannot be 1159 * changed at run time or by strapping. Therefore the attached PHYs 1160 * should be programmed to only advertise settings which are supported 1161 * by the hardware. 1162 */ 1163 if (hellcreek->pdata->is_100_mbits) 1164 phylink_set(mask, 100baseT_Full); 1165 else 1166 phylink_set(mask, 1000baseT_Full); 1167 1168 bitmap_and(supported, supported, mask, 1169 __ETHTOOL_LINK_MODE_MASK_NBITS); 1170 bitmap_and(state->advertising, state->advertising, mask, 1171 __ETHTOOL_LINK_MODE_MASK_NBITS); 1172 } 1173 1174 static int 1175 hellcreek_port_prechangeupper(struct dsa_switch *ds, int port, 1176 struct netdev_notifier_changeupper_info *info) 1177 { 1178 struct hellcreek *hellcreek = ds->priv; 1179 bool used = true; 1180 int ret = -EBUSY; 1181 u16 vid; 1182 int i; 1183 1184 dev_dbg(hellcreek->dev, "Pre change upper for port %d\n", port); 1185 1186 /* 1187 * Deny VLAN devices on top of lan ports with the same VLAN ids, because 1188 * it breaks the port separation due to the private VLANs. Example: 1189 * 1190 * lan0.100 *and* lan1.100 cannot be used in parallel. However, lan0.99 1191 * and lan1.100 works. 1192 */ 1193 1194 if (!is_vlan_dev(info->upper_dev)) 1195 return 0; 1196 1197 vid = vlan_dev_vlan_id(info->upper_dev); 1198 1199 /* For all ports, check bitmaps */ 1200 mutex_lock(&hellcreek->vlan_lock); 1201 for (i = 0; i < hellcreek->pdata->num_ports; ++i) { 1202 if (!dsa_is_user_port(ds, i)) 1203 continue; 1204 1205 if (port == i) 1206 continue; 1207 1208 used = used && test_bit(vid, hellcreek->ports[i].vlan_dev_bitmap); 1209 } 1210 1211 if (used) 1212 goto out; 1213 1214 /* Update bitmap */ 1215 set_bit(vid, hellcreek->ports[port].vlan_dev_bitmap); 1216 1217 ret = 0; 1218 1219 out: 1220 mutex_unlock(&hellcreek->vlan_lock); 1221 1222 return ret; 1223 } 1224 1225 static void hellcreek_setup_gcl(struct hellcreek *hellcreek, int port, 1226 const struct tc_taprio_qopt_offload *schedule) 1227 { 1228 const struct tc_taprio_sched_entry *cur, *initial, *next; 1229 size_t i; 1230 1231 cur = initial = &schedule->entries[0]; 1232 next = cur + 1; 1233 1234 for (i = 1; i <= schedule->num_entries; ++i) { 1235 u16 data; 1236 u8 gates; 1237 1238 cur++; 1239 next++; 1240 1241 if (i == schedule->num_entries) 1242 gates = initial->gate_mask ^ 1243 cur->gate_mask; 1244 else 1245 gates = next->gate_mask ^ 1246 cur->gate_mask; 1247 1248 data = gates; 1249 1250 if (i == schedule->num_entries) 1251 data |= TR_GCLDAT_GCLWRLAST; 1252 1253 /* Gates states */ 1254 hellcreek_write(hellcreek, data, TR_GCLDAT); 1255 1256 /* Time interval */ 1257 hellcreek_write(hellcreek, 1258 cur->interval & 0x0000ffff, 1259 TR_GCLTIL); 1260 hellcreek_write(hellcreek, 1261 (cur->interval & 0xffff0000) >> 16, 1262 TR_GCLTIH); 1263 1264 /* Commit entry */ 1265 data = ((i - 1) << TR_GCLCMD_GCLWRADR_SHIFT) | 1266 (initial->gate_mask << 1267 TR_GCLCMD_INIT_GATE_STATES_SHIFT); 1268 hellcreek_write(hellcreek, data, TR_GCLCMD); 1269 } 1270 } 1271 1272 static void hellcreek_set_cycle_time(struct hellcreek *hellcreek, 1273 const struct tc_taprio_qopt_offload *schedule) 1274 { 1275 u32 cycle_time = schedule->cycle_time; 1276 1277 hellcreek_write(hellcreek, cycle_time & 0x0000ffff, TR_CTWRL); 1278 hellcreek_write(hellcreek, (cycle_time & 0xffff0000) >> 16, TR_CTWRH); 1279 } 1280 1281 static void hellcreek_switch_schedule(struct hellcreek *hellcreek, 1282 ktime_t start_time) 1283 { 1284 struct timespec64 ts = ktime_to_timespec64(start_time); 1285 1286 /* Start schedule at this point of time */ 1287 hellcreek_write(hellcreek, ts.tv_nsec & 0x0000ffff, TR_ESTWRL); 1288 hellcreek_write(hellcreek, (ts.tv_nsec & 0xffff0000) >> 16, TR_ESTWRH); 1289 1290 /* Arm timer, set seconds and switch schedule */ 1291 hellcreek_write(hellcreek, TR_ESTCMD_ESTARM | TR_ESTCMD_ESTSWCFG | 1292 ((ts.tv_sec & TR_ESTCMD_ESTSEC_MASK) << 1293 TR_ESTCMD_ESTSEC_SHIFT), TR_ESTCMD); 1294 } 1295 1296 static bool hellcreek_schedule_startable(struct hellcreek *hellcreek, int port) 1297 { 1298 struct hellcreek_port *hellcreek_port = &hellcreek->ports[port]; 1299 s64 base_time_ns, current_ns; 1300 1301 /* The switch allows a schedule to be started only eight seconds within 1302 * the future. Therefore, check the current PTP time if the schedule is 1303 * startable or not. 1304 */ 1305 1306 /* Use the "cached" time. That should be alright, as it's updated quite 1307 * frequently in the PTP code. 1308 */ 1309 mutex_lock(&hellcreek->ptp_lock); 1310 current_ns = hellcreek->seconds * NSEC_PER_SEC + hellcreek->last_ts; 1311 mutex_unlock(&hellcreek->ptp_lock); 1312 1313 /* Calculate difference to admin base time */ 1314 base_time_ns = ktime_to_ns(hellcreek_port->current_schedule->base_time); 1315 1316 return base_time_ns - current_ns < (s64)8 * NSEC_PER_SEC; 1317 } 1318 1319 static void hellcreek_start_schedule(struct hellcreek *hellcreek, int port) 1320 { 1321 struct hellcreek_port *hellcreek_port = &hellcreek->ports[port]; 1322 ktime_t base_time, current_time; 1323 s64 current_ns; 1324 u32 cycle_time; 1325 1326 /* First select port */ 1327 hellcreek_select_tgd(hellcreek, port); 1328 1329 /* Forward base time into the future if needed */ 1330 mutex_lock(&hellcreek->ptp_lock); 1331 current_ns = hellcreek->seconds * NSEC_PER_SEC + hellcreek->last_ts; 1332 mutex_unlock(&hellcreek->ptp_lock); 1333 1334 current_time = ns_to_ktime(current_ns); 1335 base_time = hellcreek_port->current_schedule->base_time; 1336 cycle_time = hellcreek_port->current_schedule->cycle_time; 1337 1338 if (ktime_compare(current_time, base_time) > 0) { 1339 s64 n; 1340 1341 n = div64_s64(ktime_sub_ns(current_time, base_time), 1342 cycle_time); 1343 base_time = ktime_add_ns(base_time, (n + 1) * cycle_time); 1344 } 1345 1346 /* Set admin base time and switch schedule */ 1347 hellcreek_switch_schedule(hellcreek, base_time); 1348 1349 taprio_offload_free(hellcreek_port->current_schedule); 1350 hellcreek_port->current_schedule = NULL; 1351 1352 dev_dbg(hellcreek->dev, "Armed EST timer for port %d\n", 1353 hellcreek_port->port); 1354 } 1355 1356 static void hellcreek_check_schedule(struct work_struct *work) 1357 { 1358 struct delayed_work *dw = to_delayed_work(work); 1359 struct hellcreek_port *hellcreek_port; 1360 struct hellcreek *hellcreek; 1361 bool startable; 1362 1363 hellcreek_port = dw_to_hellcreek_port(dw); 1364 hellcreek = hellcreek_port->hellcreek; 1365 1366 mutex_lock(&hellcreek->reg_lock); 1367 1368 /* Check starting time */ 1369 startable = hellcreek_schedule_startable(hellcreek, 1370 hellcreek_port->port); 1371 if (startable) { 1372 hellcreek_start_schedule(hellcreek, hellcreek_port->port); 1373 mutex_unlock(&hellcreek->reg_lock); 1374 return; 1375 } 1376 1377 mutex_unlock(&hellcreek->reg_lock); 1378 1379 /* Reschedule */ 1380 schedule_delayed_work(&hellcreek_port->schedule_work, 1381 HELLCREEK_SCHEDULE_PERIOD); 1382 } 1383 1384 static int hellcreek_port_set_schedule(struct dsa_switch *ds, int port, 1385 struct tc_taprio_qopt_offload *taprio) 1386 { 1387 struct hellcreek *hellcreek = ds->priv; 1388 struct hellcreek_port *hellcreek_port; 1389 bool startable; 1390 u16 ctrl; 1391 1392 hellcreek_port = &hellcreek->ports[port]; 1393 1394 dev_dbg(hellcreek->dev, "Configure traffic schedule on port %d\n", 1395 port); 1396 1397 /* First cancel delayed work */ 1398 cancel_delayed_work_sync(&hellcreek_port->schedule_work); 1399 1400 mutex_lock(&hellcreek->reg_lock); 1401 1402 if (hellcreek_port->current_schedule) { 1403 taprio_offload_free(hellcreek_port->current_schedule); 1404 hellcreek_port->current_schedule = NULL; 1405 } 1406 hellcreek_port->current_schedule = taprio_offload_get(taprio); 1407 1408 /* Then select port */ 1409 hellcreek_select_tgd(hellcreek, port); 1410 1411 /* Enable gating and keep defaults */ 1412 ctrl = (0xff << TR_TGDCTRL_ADMINGATESTATES_SHIFT) | TR_TGDCTRL_GATE_EN; 1413 hellcreek_write(hellcreek, ctrl, TR_TGDCTRL); 1414 1415 /* Cancel pending schedule */ 1416 hellcreek_write(hellcreek, 0x00, TR_ESTCMD); 1417 1418 /* Setup a new schedule */ 1419 hellcreek_setup_gcl(hellcreek, port, hellcreek_port->current_schedule); 1420 1421 /* Configure cycle time */ 1422 hellcreek_set_cycle_time(hellcreek, hellcreek_port->current_schedule); 1423 1424 /* Check starting time */ 1425 startable = hellcreek_schedule_startable(hellcreek, port); 1426 if (startable) { 1427 hellcreek_start_schedule(hellcreek, port); 1428 mutex_unlock(&hellcreek->reg_lock); 1429 return 0; 1430 } 1431 1432 mutex_unlock(&hellcreek->reg_lock); 1433 1434 /* Schedule periodic schedule check */ 1435 schedule_delayed_work(&hellcreek_port->schedule_work, 1436 HELLCREEK_SCHEDULE_PERIOD); 1437 1438 return 0; 1439 } 1440 1441 static int hellcreek_port_del_schedule(struct dsa_switch *ds, int port) 1442 { 1443 struct hellcreek *hellcreek = ds->priv; 1444 struct hellcreek_port *hellcreek_port; 1445 1446 hellcreek_port = &hellcreek->ports[port]; 1447 1448 dev_dbg(hellcreek->dev, "Remove traffic schedule on port %d\n", port); 1449 1450 /* First cancel delayed work */ 1451 cancel_delayed_work_sync(&hellcreek_port->schedule_work); 1452 1453 mutex_lock(&hellcreek->reg_lock); 1454 1455 if (hellcreek_port->current_schedule) { 1456 taprio_offload_free(hellcreek_port->current_schedule); 1457 hellcreek_port->current_schedule = NULL; 1458 } 1459 1460 /* Then select port */ 1461 hellcreek_select_tgd(hellcreek, port); 1462 1463 /* Disable gating and return to regular switching flow */ 1464 hellcreek_write(hellcreek, 0xff << TR_TGDCTRL_ADMINGATESTATES_SHIFT, 1465 TR_TGDCTRL); 1466 1467 mutex_unlock(&hellcreek->reg_lock); 1468 1469 return 0; 1470 } 1471 1472 static bool hellcreek_validate_schedule(struct hellcreek *hellcreek, 1473 struct tc_taprio_qopt_offload *schedule) 1474 { 1475 size_t i; 1476 1477 /* Does this hellcreek version support Qbv in hardware? */ 1478 if (!hellcreek->pdata->qbv_support) 1479 return false; 1480 1481 /* cycle time can only be 32bit */ 1482 if (schedule->cycle_time > (u32)-1) 1483 return false; 1484 1485 /* cycle time extension is not supported */ 1486 if (schedule->cycle_time_extension) 1487 return false; 1488 1489 /* Only set command is supported */ 1490 for (i = 0; i < schedule->num_entries; ++i) 1491 if (schedule->entries[i].command != TC_TAPRIO_CMD_SET_GATES) 1492 return false; 1493 1494 return true; 1495 } 1496 1497 static int hellcreek_port_setup_tc(struct dsa_switch *ds, int port, 1498 enum tc_setup_type type, void *type_data) 1499 { 1500 struct tc_taprio_qopt_offload *taprio = type_data; 1501 struct hellcreek *hellcreek = ds->priv; 1502 1503 if (type != TC_SETUP_QDISC_TAPRIO) 1504 return -EOPNOTSUPP; 1505 1506 if (!hellcreek_validate_schedule(hellcreek, taprio)) 1507 return -EOPNOTSUPP; 1508 1509 if (taprio->enable) 1510 return hellcreek_port_set_schedule(ds, port, taprio); 1511 1512 return hellcreek_port_del_schedule(ds, port); 1513 } 1514 1515 static const struct dsa_switch_ops hellcreek_ds_ops = { 1516 .get_ethtool_stats = hellcreek_get_ethtool_stats, 1517 .get_sset_count = hellcreek_get_sset_count, 1518 .get_strings = hellcreek_get_strings, 1519 .get_tag_protocol = hellcreek_get_tag_protocol, 1520 .get_ts_info = hellcreek_get_ts_info, 1521 .phylink_validate = hellcreek_phylink_validate, 1522 .port_bridge_join = hellcreek_port_bridge_join, 1523 .port_bridge_leave = hellcreek_port_bridge_leave, 1524 .port_disable = hellcreek_port_disable, 1525 .port_enable = hellcreek_port_enable, 1526 .port_fdb_add = hellcreek_fdb_add, 1527 .port_fdb_del = hellcreek_fdb_del, 1528 .port_fdb_dump = hellcreek_fdb_dump, 1529 .port_hwtstamp_set = hellcreek_port_hwtstamp_set, 1530 .port_hwtstamp_get = hellcreek_port_hwtstamp_get, 1531 .port_prechangeupper = hellcreek_port_prechangeupper, 1532 .port_rxtstamp = hellcreek_port_rxtstamp, 1533 .port_setup_tc = hellcreek_port_setup_tc, 1534 .port_stp_state_set = hellcreek_port_stp_state_set, 1535 .port_txtstamp = hellcreek_port_txtstamp, 1536 .port_vlan_add = hellcreek_vlan_add, 1537 .port_vlan_del = hellcreek_vlan_del, 1538 .port_vlan_filtering = hellcreek_vlan_filtering, 1539 .setup = hellcreek_setup, 1540 .teardown = hellcreek_teardown, 1541 }; 1542 1543 static int hellcreek_probe(struct platform_device *pdev) 1544 { 1545 struct device *dev = &pdev->dev; 1546 struct hellcreek *hellcreek; 1547 struct resource *res; 1548 int ret, i; 1549 1550 hellcreek = devm_kzalloc(dev, sizeof(*hellcreek), GFP_KERNEL); 1551 if (!hellcreek) 1552 return -ENOMEM; 1553 1554 hellcreek->vidmbrcfg = devm_kcalloc(dev, VLAN_N_VID, 1555 sizeof(*hellcreek->vidmbrcfg), 1556 GFP_KERNEL); 1557 if (!hellcreek->vidmbrcfg) 1558 return -ENOMEM; 1559 1560 hellcreek->pdata = of_device_get_match_data(dev); 1561 1562 hellcreek->ports = devm_kcalloc(dev, hellcreek->pdata->num_ports, 1563 sizeof(*hellcreek->ports), 1564 GFP_KERNEL); 1565 if (!hellcreek->ports) 1566 return -ENOMEM; 1567 1568 for (i = 0; i < hellcreek->pdata->num_ports; ++i) { 1569 struct hellcreek_port *port = &hellcreek->ports[i]; 1570 1571 port->counter_values = 1572 devm_kcalloc(dev, 1573 ARRAY_SIZE(hellcreek_counter), 1574 sizeof(*port->counter_values), 1575 GFP_KERNEL); 1576 if (!port->counter_values) 1577 return -ENOMEM; 1578 1579 port->vlan_dev_bitmap = 1580 devm_kcalloc(dev, 1581 BITS_TO_LONGS(VLAN_N_VID), 1582 sizeof(unsigned long), 1583 GFP_KERNEL); 1584 if (!port->vlan_dev_bitmap) 1585 return -ENOMEM; 1586 1587 port->hellcreek = hellcreek; 1588 port->port = i; 1589 1590 INIT_DELAYED_WORK(&port->schedule_work, 1591 hellcreek_check_schedule); 1592 } 1593 1594 mutex_init(&hellcreek->reg_lock); 1595 mutex_init(&hellcreek->vlan_lock); 1596 mutex_init(&hellcreek->ptp_lock); 1597 1598 hellcreek->dev = dev; 1599 1600 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tsn"); 1601 if (!res) { 1602 dev_err(dev, "No memory region provided!\n"); 1603 return -ENODEV; 1604 } 1605 1606 hellcreek->base = devm_ioremap_resource(dev, res); 1607 if (IS_ERR(hellcreek->base)) { 1608 dev_err(dev, "No memory available!\n"); 1609 return PTR_ERR(hellcreek->base); 1610 } 1611 1612 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ptp"); 1613 if (!res) { 1614 dev_err(dev, "No PTP memory region provided!\n"); 1615 return -ENODEV; 1616 } 1617 1618 hellcreek->ptp_base = devm_ioremap_resource(dev, res); 1619 if (IS_ERR(hellcreek->ptp_base)) { 1620 dev_err(dev, "No memory available!\n"); 1621 return PTR_ERR(hellcreek->ptp_base); 1622 } 1623 1624 ret = hellcreek_detect(hellcreek); 1625 if (ret) { 1626 dev_err(dev, "No (known) chip found!\n"); 1627 return ret; 1628 } 1629 1630 ret = hellcreek_wait_until_ready(hellcreek); 1631 if (ret) { 1632 dev_err(dev, "Switch didn't become ready!\n"); 1633 return ret; 1634 } 1635 1636 hellcreek_feature_detect(hellcreek); 1637 1638 hellcreek->ds = devm_kzalloc(dev, sizeof(*hellcreek->ds), GFP_KERNEL); 1639 if (!hellcreek->ds) 1640 return -ENOMEM; 1641 1642 hellcreek->ds->dev = dev; 1643 hellcreek->ds->priv = hellcreek; 1644 hellcreek->ds->ops = &hellcreek_ds_ops; 1645 hellcreek->ds->num_ports = hellcreek->pdata->num_ports; 1646 hellcreek->ds->num_tx_queues = HELLCREEK_NUM_EGRESS_QUEUES; 1647 1648 ret = dsa_register_switch(hellcreek->ds); 1649 if (ret) { 1650 dev_err_probe(dev, ret, "Unable to register switch\n"); 1651 return ret; 1652 } 1653 1654 ret = hellcreek_ptp_setup(hellcreek); 1655 if (ret) { 1656 dev_err(dev, "Failed to setup PTP!\n"); 1657 goto err_ptp_setup; 1658 } 1659 1660 ret = hellcreek_hwtstamp_setup(hellcreek); 1661 if (ret) { 1662 dev_err(dev, "Failed to setup hardware timestamping!\n"); 1663 goto err_tstamp_setup; 1664 } 1665 1666 platform_set_drvdata(pdev, hellcreek); 1667 1668 return 0; 1669 1670 err_tstamp_setup: 1671 hellcreek_ptp_free(hellcreek); 1672 err_ptp_setup: 1673 dsa_unregister_switch(hellcreek->ds); 1674 1675 return ret; 1676 } 1677 1678 static int hellcreek_remove(struct platform_device *pdev) 1679 { 1680 struct hellcreek *hellcreek = platform_get_drvdata(pdev); 1681 1682 hellcreek_hwtstamp_free(hellcreek); 1683 hellcreek_ptp_free(hellcreek); 1684 dsa_unregister_switch(hellcreek->ds); 1685 platform_set_drvdata(pdev, NULL); 1686 1687 return 0; 1688 } 1689 1690 static const struct hellcreek_platform_data de1soc_r1_pdata = { 1691 .num_ports = 4, 1692 .is_100_mbits = 1, 1693 .qbv_support = 1, 1694 .qbv_on_cpu_port = 1, 1695 .qbu_support = 0, 1696 .module_id = 0x4c30, 1697 }; 1698 1699 static const struct of_device_id hellcreek_of_match[] = { 1700 { 1701 .compatible = "hirschmann,hellcreek-de1soc-r1", 1702 .data = &de1soc_r1_pdata, 1703 }, 1704 { /* sentinel */ }, 1705 }; 1706 MODULE_DEVICE_TABLE(of, hellcreek_of_match); 1707 1708 static struct platform_driver hellcreek_driver = { 1709 .probe = hellcreek_probe, 1710 .remove = hellcreek_remove, 1711 .driver = { 1712 .name = "hellcreek", 1713 .of_match_table = hellcreek_of_match, 1714 }, 1715 }; 1716 module_platform_driver(hellcreek_driver); 1717 1718 MODULE_AUTHOR("Kurt Kanzenbach <kurt@linutronix.de>"); 1719 MODULE_DESCRIPTION("Hirschmann Hellcreek driver"); 1720 MODULE_LICENSE("Dual MIT/GPL"); 1721